patch_ca0132.c 27 KB

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  1. /*
  2. * HD audio interface patch for Creative CA0132 chip
  3. *
  4. * Copyright (c) 2011, Creative Technology Ltd.
  5. *
  6. * Based on patch_ca0110.c
  7. * Copyright (c) 2008 Takashi Iwai <tiwai@suse.de>
  8. *
  9. * This driver is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This driver is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. */
  23. #include <linux/init.h>
  24. #include <linux/delay.h>
  25. #include <linux/slab.h>
  26. #include <linux/pci.h>
  27. #include <linux/mutex.h>
  28. #include <linux/module.h>
  29. #include <sound/core.h>
  30. #include "hda_codec.h"
  31. #include "hda_local.h"
  32. #include "hda_auto_parser.h"
  33. #define WIDGET_CHIP_CTRL 0x15
  34. #define WIDGET_DSP_CTRL 0x16
  35. #define WUH_MEM_CONNID 10
  36. #define DSP_MEM_CONNID 16
  37. enum hda_cmd_vendor_io {
  38. /* for DspIO node */
  39. VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000,
  40. VENDOR_DSPIO_SCP_WRITE_DATA_HIGH = 0x100,
  41. VENDOR_DSPIO_STATUS = 0xF01,
  42. VENDOR_DSPIO_SCP_POST_READ_DATA = 0x702,
  43. VENDOR_DSPIO_SCP_READ_DATA = 0xF02,
  44. VENDOR_DSPIO_DSP_INIT = 0x703,
  45. VENDOR_DSPIO_SCP_POST_COUNT_QUERY = 0x704,
  46. VENDOR_DSPIO_SCP_READ_COUNT = 0xF04,
  47. /* for ChipIO node */
  48. VENDOR_CHIPIO_ADDRESS_LOW = 0x000,
  49. VENDOR_CHIPIO_ADDRESS_HIGH = 0x100,
  50. VENDOR_CHIPIO_STREAM_FORMAT = 0x200,
  51. VENDOR_CHIPIO_DATA_LOW = 0x300,
  52. VENDOR_CHIPIO_DATA_HIGH = 0x400,
  53. VENDOR_CHIPIO_GET_PARAMETER = 0xF00,
  54. VENDOR_CHIPIO_STATUS = 0xF01,
  55. VENDOR_CHIPIO_HIC_POST_READ = 0x702,
  56. VENDOR_CHIPIO_HIC_READ_DATA = 0xF03,
  57. VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE = 0x70A,
  58. VENDOR_CHIPIO_PLL_PMU_WRITE = 0x70C,
  59. VENDOR_CHIPIO_PLL_PMU_READ = 0xF0C,
  60. VENDOR_CHIPIO_8051_ADDRESS_LOW = 0x70D,
  61. VENDOR_CHIPIO_8051_ADDRESS_HIGH = 0x70E,
  62. VENDOR_CHIPIO_FLAG_SET = 0x70F,
  63. VENDOR_CHIPIO_FLAGS_GET = 0xF0F,
  64. VENDOR_CHIPIO_PARAMETER_SET = 0x710,
  65. VENDOR_CHIPIO_PARAMETER_GET = 0xF10,
  66. VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET = 0x711,
  67. VENDOR_CHIPIO_PORT_ALLOC_SET = 0x712,
  68. VENDOR_CHIPIO_PORT_ALLOC_GET = 0xF12,
  69. VENDOR_CHIPIO_PORT_FREE_SET = 0x713,
  70. VENDOR_CHIPIO_PARAMETER_EX_ID_GET = 0xF17,
  71. VENDOR_CHIPIO_PARAMETER_EX_ID_SET = 0x717,
  72. VENDOR_CHIPIO_PARAMETER_EX_VALUE_GET = 0xF18,
  73. VENDOR_CHIPIO_PARAMETER_EX_VALUE_SET = 0x718
  74. };
  75. /*
  76. * Control flag IDs
  77. */
  78. enum control_flag_id {
  79. /* Connection manager stream setup is bypassed/enabled */
  80. CONTROL_FLAG_C_MGR = 0,
  81. /* DSP DMA is bypassed/enabled */
  82. CONTROL_FLAG_DMA = 1,
  83. /* 8051 'idle' mode is disabled/enabled */
  84. CONTROL_FLAG_IDLE_ENABLE = 2,
  85. /* Tracker for the SPDIF-in path is bypassed/enabled */
  86. CONTROL_FLAG_TRACKER = 3,
  87. /* DigitalOut to Spdif2Out connection is disabled/enabled */
  88. CONTROL_FLAG_SPDIF2OUT = 4,
  89. /* Digital Microphone is disabled/enabled */
  90. CONTROL_FLAG_DMIC = 5,
  91. /* ADC_B rate is 48 kHz/96 kHz */
  92. CONTROL_FLAG_ADC_B_96KHZ = 6,
  93. /* ADC_C rate is 48 kHz/96 kHz */
  94. CONTROL_FLAG_ADC_C_96KHZ = 7,
  95. /* DAC rate is 48 kHz/96 kHz (affects all DACs) */
  96. CONTROL_FLAG_DAC_96KHZ = 8,
  97. /* DSP rate is 48 kHz/96 kHz */
  98. CONTROL_FLAG_DSP_96KHZ = 9,
  99. /* SRC clock is 98 MHz/196 MHz (196 MHz forces rate to 96 KHz) */
  100. CONTROL_FLAG_SRC_CLOCK_196MHZ = 10,
  101. /* SRC rate is 48 kHz/96 kHz (48 kHz disabled when clock is 196 MHz) */
  102. CONTROL_FLAG_SRC_RATE_96KHZ = 11,
  103. /* Decode Loop (DSP->SRC->DSP) is disabled/enabled */
  104. CONTROL_FLAG_DECODE_LOOP = 12,
  105. /* De-emphasis filter on DAC-1 disabled/enabled */
  106. CONTROL_FLAG_DAC1_DEEMPHASIS = 13,
  107. /* De-emphasis filter on DAC-2 disabled/enabled */
  108. CONTROL_FLAG_DAC2_DEEMPHASIS = 14,
  109. /* De-emphasis filter on DAC-3 disabled/enabled */
  110. CONTROL_FLAG_DAC3_DEEMPHASIS = 15,
  111. /* High-pass filter on ADC_B disabled/enabled */
  112. CONTROL_FLAG_ADC_B_HIGH_PASS = 16,
  113. /* High-pass filter on ADC_C disabled/enabled */
  114. CONTROL_FLAG_ADC_C_HIGH_PASS = 17,
  115. /* Common mode on Port_A disabled/enabled */
  116. CONTROL_FLAG_PORT_A_COMMON_MODE = 18,
  117. /* Common mode on Port_D disabled/enabled */
  118. CONTROL_FLAG_PORT_D_COMMON_MODE = 19,
  119. /* Impedance for ramp generator on Port_A 16 Ohm/10K Ohm */
  120. CONTROL_FLAG_PORT_A_10KOHM_LOAD = 20,
  121. /* Impedance for ramp generator on Port_D, 16 Ohm/10K Ohm */
  122. CONTROL_FLAG_PORT_D_10K0HM_LOAD = 21,
  123. /* ASI rate is 48kHz/96kHz */
  124. CONTROL_FLAG_ASI_96KHZ = 22,
  125. /* DAC power settings able to control attached ports no/yes */
  126. CONTROL_FLAG_DACS_CONTROL_PORTS = 23,
  127. /* Clock Stop OK reporting is disabled/enabled */
  128. CONTROL_FLAG_CONTROL_STOP_OK_ENABLE = 24,
  129. /* Number of control flags */
  130. CONTROL_FLAGS_MAX = (CONTROL_FLAG_CONTROL_STOP_OK_ENABLE+1)
  131. };
  132. /*
  133. * Control parameter IDs
  134. */
  135. enum control_parameter_id {
  136. /* 0: force HDA, 1: allow DSP if HDA Spdif1Out stream is idle */
  137. CONTROL_PARAM_SPDIF1_SOURCE = 2,
  138. /* Stream Control */
  139. /* Select stream with the given ID */
  140. CONTROL_PARAM_STREAM_ID = 24,
  141. /* Source connection point for the selected stream */
  142. CONTROL_PARAM_STREAM_SOURCE_CONN_POINT = 25,
  143. /* Destination connection point for the selected stream */
  144. CONTROL_PARAM_STREAM_DEST_CONN_POINT = 26,
  145. /* Number of audio channels in the selected stream */
  146. CONTROL_PARAM_STREAMS_CHANNELS = 27,
  147. /*Enable control for the selected stream */
  148. CONTROL_PARAM_STREAM_CONTROL = 28,
  149. /* Connection Point Control */
  150. /* Select connection point with the given ID */
  151. CONTROL_PARAM_CONN_POINT_ID = 29,
  152. /* Connection point sample rate */
  153. CONTROL_PARAM_CONN_POINT_SAMPLE_RATE = 30,
  154. /* Node Control */
  155. /* Select HDA node with the given ID */
  156. CONTROL_PARAM_NODE_ID = 31
  157. };
  158. /*
  159. * Dsp Io Status codes
  160. */
  161. enum hda_vendor_status_dspio {
  162. /* Success */
  163. VENDOR_STATUS_DSPIO_OK = 0x00,
  164. /* Busy, unable to accept new command, the host must retry */
  165. VENDOR_STATUS_DSPIO_BUSY = 0x01,
  166. /* SCP command queue is full */
  167. VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL = 0x02,
  168. /* SCP response queue is empty */
  169. VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY = 0x03
  170. };
  171. /*
  172. * Chip Io Status codes
  173. */
  174. enum hda_vendor_status_chipio {
  175. /* Success */
  176. VENDOR_STATUS_CHIPIO_OK = 0x00,
  177. /* Busy, unable to accept new command, the host must retry */
  178. VENDOR_STATUS_CHIPIO_BUSY = 0x01
  179. };
  180. /*
  181. * CA0132 sample rate
  182. */
  183. enum ca0132_sample_rate {
  184. SR_6_000 = 0x00,
  185. SR_8_000 = 0x01,
  186. SR_9_600 = 0x02,
  187. SR_11_025 = 0x03,
  188. SR_16_000 = 0x04,
  189. SR_22_050 = 0x05,
  190. SR_24_000 = 0x06,
  191. SR_32_000 = 0x07,
  192. SR_44_100 = 0x08,
  193. SR_48_000 = 0x09,
  194. SR_88_200 = 0x0A,
  195. SR_96_000 = 0x0B,
  196. SR_144_000 = 0x0C,
  197. SR_176_400 = 0x0D,
  198. SR_192_000 = 0x0E,
  199. SR_384_000 = 0x0F,
  200. SR_COUNT = 0x10,
  201. SR_RATE_UNKNOWN = 0x1F
  202. };
  203. /*
  204. * Scp Helper function
  205. */
  206. enum get_set {
  207. IS_SET = 0,
  208. IS_GET = 1,
  209. };
  210. /*
  211. * Duplicated from ca0110 codec
  212. */
  213. static void init_output(struct hda_codec *codec, hda_nid_t pin, hda_nid_t dac)
  214. {
  215. if (pin) {
  216. snd_hda_set_pin_ctl(codec, pin, PIN_HP);
  217. if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
  218. snd_hda_codec_write(codec, pin, 0,
  219. AC_VERB_SET_AMP_GAIN_MUTE,
  220. AMP_OUT_UNMUTE);
  221. }
  222. if (dac && (get_wcaps(codec, dac) & AC_WCAP_OUT_AMP))
  223. snd_hda_codec_write(codec, dac, 0,
  224. AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO);
  225. }
  226. static void init_input(struct hda_codec *codec, hda_nid_t pin, hda_nid_t adc)
  227. {
  228. if (pin) {
  229. snd_hda_set_pin_ctl(codec, pin, PIN_IN |
  230. snd_hda_get_default_vref(codec, pin));
  231. if (get_wcaps(codec, pin) & AC_WCAP_IN_AMP)
  232. snd_hda_codec_write(codec, pin, 0,
  233. AC_VERB_SET_AMP_GAIN_MUTE,
  234. AMP_IN_UNMUTE(0));
  235. }
  236. if (adc && (get_wcaps(codec, adc) & AC_WCAP_IN_AMP))
  237. snd_hda_codec_write(codec, adc, 0, AC_VERB_SET_AMP_GAIN_MUTE,
  238. AMP_IN_UNMUTE(0));
  239. }
  240. static char *dirstr[2] = { "Playback", "Capture" };
  241. static int _add_switch(struct hda_codec *codec, hda_nid_t nid, const char *pfx,
  242. int chan, int dir)
  243. {
  244. char namestr[44];
  245. int type = dir ? HDA_INPUT : HDA_OUTPUT;
  246. struct snd_kcontrol_new knew =
  247. HDA_CODEC_MUTE_MONO(namestr, nid, chan, 0, type);
  248. if ((query_amp_caps(codec, nid, type) & AC_AMPCAP_MUTE) == 0) {
  249. snd_printdd("Skipping '%s %s Switch' (no mute on node 0x%x)\n", pfx, dirstr[dir], nid);
  250. return 0;
  251. }
  252. sprintf(namestr, "%s %s Switch", pfx, dirstr[dir]);
  253. return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
  254. }
  255. static int _add_volume(struct hda_codec *codec, hda_nid_t nid, const char *pfx,
  256. int chan, int dir)
  257. {
  258. char namestr[44];
  259. int type = dir ? HDA_INPUT : HDA_OUTPUT;
  260. struct snd_kcontrol_new knew =
  261. HDA_CODEC_VOLUME_MONO(namestr, nid, chan, 0, type);
  262. if ((query_amp_caps(codec, nid, type) & AC_AMPCAP_NUM_STEPS) == 0) {
  263. snd_printdd("Skipping '%s %s Volume' (no amp on node 0x%x)\n", pfx, dirstr[dir], nid);
  264. return 0;
  265. }
  266. sprintf(namestr, "%s %s Volume", pfx, dirstr[dir]);
  267. return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
  268. }
  269. #define add_out_switch(codec, nid, pfx) _add_switch(codec, nid, pfx, 3, 0)
  270. #define add_out_volume(codec, nid, pfx) _add_volume(codec, nid, pfx, 3, 0)
  271. #define add_in_switch(codec, nid, pfx) _add_switch(codec, nid, pfx, 3, 1)
  272. #define add_in_volume(codec, nid, pfx) _add_volume(codec, nid, pfx, 3, 1)
  273. #define add_mono_switch(codec, nid, pfx, chan) \
  274. _add_switch(codec, nid, pfx, chan, 0)
  275. #define add_mono_volume(codec, nid, pfx, chan) \
  276. _add_volume(codec, nid, pfx, chan, 0)
  277. #define add_in_mono_switch(codec, nid, pfx, chan) \
  278. _add_switch(codec, nid, pfx, chan, 1)
  279. #define add_in_mono_volume(codec, nid, pfx, chan) \
  280. _add_volume(codec, nid, pfx, chan, 1)
  281. /*
  282. * CA0132 specific
  283. */
  284. struct ca0132_spec {
  285. struct auto_pin_cfg autocfg;
  286. struct hda_multi_out multiout;
  287. hda_nid_t out_pins[AUTO_CFG_MAX_OUTS];
  288. hda_nid_t dacs[AUTO_CFG_MAX_OUTS];
  289. hda_nid_t hp_dac;
  290. hda_nid_t input_pins[AUTO_PIN_LAST];
  291. hda_nid_t adcs[AUTO_PIN_LAST];
  292. hda_nid_t dig_out;
  293. hda_nid_t dig_in;
  294. unsigned int num_inputs;
  295. long curr_hp_switch;
  296. long curr_hp_volume[2];
  297. long curr_speaker_switch;
  298. struct mutex chipio_mutex;
  299. const char *input_labels[AUTO_PIN_LAST];
  300. struct hda_pcm pcm_rec[2]; /* PCM information */
  301. };
  302. /* Chip access helper function */
  303. static int chipio_send(struct hda_codec *codec,
  304. unsigned int reg,
  305. unsigned int data)
  306. {
  307. unsigned int res;
  308. int retry = 50;
  309. /* send bits of data specified by reg */
  310. do {
  311. res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
  312. reg, data);
  313. if (res == VENDOR_STATUS_CHIPIO_OK)
  314. return 0;
  315. } while (--retry);
  316. return -EIO;
  317. }
  318. /*
  319. * Write chip address through the vendor widget -- NOT protected by the Mutex!
  320. */
  321. static int chipio_write_address(struct hda_codec *codec,
  322. unsigned int chip_addx)
  323. {
  324. int res;
  325. /* send low 16 bits of the address */
  326. res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_LOW,
  327. chip_addx & 0xffff);
  328. if (res != -EIO) {
  329. /* send high 16 bits of the address */
  330. res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_HIGH,
  331. chip_addx >> 16);
  332. }
  333. return res;
  334. }
  335. /*
  336. * Write data through the vendor widget -- NOT protected by the Mutex!
  337. */
  338. static int chipio_write_data(struct hda_codec *codec, unsigned int data)
  339. {
  340. int res;
  341. /* send low 16 bits of the data */
  342. res = chipio_send(codec, VENDOR_CHIPIO_DATA_LOW, data & 0xffff);
  343. if (res != -EIO) {
  344. /* send high 16 bits of the data */
  345. res = chipio_send(codec, VENDOR_CHIPIO_DATA_HIGH,
  346. data >> 16);
  347. }
  348. return res;
  349. }
  350. /*
  351. * Read data through the vendor widget -- NOT protected by the Mutex!
  352. */
  353. static int chipio_read_data(struct hda_codec *codec, unsigned int *data)
  354. {
  355. int res;
  356. /* post read */
  357. res = chipio_send(codec, VENDOR_CHIPIO_HIC_POST_READ, 0);
  358. if (res != -EIO) {
  359. /* read status */
  360. res = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
  361. }
  362. if (res != -EIO) {
  363. /* read data */
  364. *data = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
  365. VENDOR_CHIPIO_HIC_READ_DATA,
  366. 0);
  367. }
  368. return res;
  369. }
  370. /*
  371. * Write given value to the given address through the chip I/O widget.
  372. * protected by the Mutex
  373. */
  374. static int chipio_write(struct hda_codec *codec,
  375. unsigned int chip_addx, const unsigned int data)
  376. {
  377. struct ca0132_spec *spec = codec->spec;
  378. int err;
  379. mutex_lock(&spec->chipio_mutex);
  380. /* write the address, and if successful proceed to write data */
  381. err = chipio_write_address(codec, chip_addx);
  382. if (err < 0)
  383. goto exit;
  384. err = chipio_write_data(codec, data);
  385. if (err < 0)
  386. goto exit;
  387. exit:
  388. mutex_unlock(&spec->chipio_mutex);
  389. return err;
  390. }
  391. /*
  392. * Read the given address through the chip I/O widget
  393. * protected by the Mutex
  394. */
  395. static int chipio_read(struct hda_codec *codec,
  396. unsigned int chip_addx, unsigned int *data)
  397. {
  398. struct ca0132_spec *spec = codec->spec;
  399. int err;
  400. mutex_lock(&spec->chipio_mutex);
  401. /* write the address, and if successful proceed to write data */
  402. err = chipio_write_address(codec, chip_addx);
  403. if (err < 0)
  404. goto exit;
  405. err = chipio_read_data(codec, data);
  406. if (err < 0)
  407. goto exit;
  408. exit:
  409. mutex_unlock(&spec->chipio_mutex);
  410. return err;
  411. }
  412. /*
  413. * PCM callbacks
  414. */
  415. static int ca0132_playback_pcm_open(struct hda_pcm_stream *hinfo,
  416. struct hda_codec *codec,
  417. struct snd_pcm_substream *substream)
  418. {
  419. struct ca0132_spec *spec = codec->spec;
  420. return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
  421. hinfo);
  422. }
  423. static int ca0132_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  424. struct hda_codec *codec,
  425. unsigned int stream_tag,
  426. unsigned int format,
  427. struct snd_pcm_substream *substream)
  428. {
  429. struct ca0132_spec *spec = codec->spec;
  430. return snd_hda_multi_out_analog_prepare(codec, &spec->multiout,
  431. stream_tag, format, substream);
  432. }
  433. static int ca0132_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  434. struct hda_codec *codec,
  435. struct snd_pcm_substream *substream)
  436. {
  437. struct ca0132_spec *spec = codec->spec;
  438. return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
  439. }
  440. /*
  441. * Digital out
  442. */
  443. static int ca0132_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
  444. struct hda_codec *codec,
  445. struct snd_pcm_substream *substream)
  446. {
  447. struct ca0132_spec *spec = codec->spec;
  448. return snd_hda_multi_out_dig_open(codec, &spec->multiout);
  449. }
  450. static int ca0132_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  451. struct hda_codec *codec,
  452. unsigned int stream_tag,
  453. unsigned int format,
  454. struct snd_pcm_substream *substream)
  455. {
  456. struct ca0132_spec *spec = codec->spec;
  457. return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
  458. stream_tag, format, substream);
  459. }
  460. static int ca0132_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  461. struct hda_codec *codec,
  462. struct snd_pcm_substream *substream)
  463. {
  464. struct ca0132_spec *spec = codec->spec;
  465. return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);
  466. }
  467. static int ca0132_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
  468. struct hda_codec *codec,
  469. struct snd_pcm_substream *substream)
  470. {
  471. struct ca0132_spec *spec = codec->spec;
  472. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  473. }
  474. /*
  475. */
  476. static struct hda_pcm_stream ca0132_pcm_analog_playback = {
  477. .substreams = 1,
  478. .channels_min = 2,
  479. .channels_max = 2,
  480. .ops = {
  481. .open = ca0132_playback_pcm_open,
  482. .prepare = ca0132_playback_pcm_prepare,
  483. .cleanup = ca0132_playback_pcm_cleanup
  484. },
  485. };
  486. static struct hda_pcm_stream ca0132_pcm_analog_capture = {
  487. .substreams = 1,
  488. .channels_min = 2,
  489. .channels_max = 2,
  490. };
  491. static struct hda_pcm_stream ca0132_pcm_digital_playback = {
  492. .substreams = 1,
  493. .channels_min = 2,
  494. .channels_max = 2,
  495. .ops = {
  496. .open = ca0132_dig_playback_pcm_open,
  497. .close = ca0132_dig_playback_pcm_close,
  498. .prepare = ca0132_dig_playback_pcm_prepare,
  499. .cleanup = ca0132_dig_playback_pcm_cleanup
  500. },
  501. };
  502. static struct hda_pcm_stream ca0132_pcm_digital_capture = {
  503. .substreams = 1,
  504. .channels_min = 2,
  505. .channels_max = 2,
  506. };
  507. static int ca0132_build_pcms(struct hda_codec *codec)
  508. {
  509. struct ca0132_spec *spec = codec->spec;
  510. struct hda_pcm *info = spec->pcm_rec;
  511. codec->pcm_info = info;
  512. codec->num_pcms = 0;
  513. info->name = "CA0132 Analog";
  514. info->stream[SNDRV_PCM_STREAM_PLAYBACK] = ca0132_pcm_analog_playback;
  515. info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dacs[0];
  516. info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max =
  517. spec->multiout.max_channels;
  518. info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture;
  519. info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_inputs;
  520. info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0];
  521. codec->num_pcms++;
  522. if (!spec->dig_out && !spec->dig_in)
  523. return 0;
  524. info++;
  525. info->name = "CA0132 Digital";
  526. info->pcm_type = HDA_PCM_TYPE_SPDIF;
  527. if (spec->dig_out) {
  528. info->stream[SNDRV_PCM_STREAM_PLAYBACK] =
  529. ca0132_pcm_digital_playback;
  530. info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dig_out;
  531. }
  532. if (spec->dig_in) {
  533. info->stream[SNDRV_PCM_STREAM_CAPTURE] =
  534. ca0132_pcm_digital_capture;
  535. info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in;
  536. }
  537. codec->num_pcms++;
  538. return 0;
  539. }
  540. #define REG_CODEC_MUTE 0x18b014
  541. #define REG_CODEC_HP_VOL_L 0x18b070
  542. #define REG_CODEC_HP_VOL_R 0x18b074
  543. static int ca0132_hp_switch_get(struct snd_kcontrol *kcontrol,
  544. struct snd_ctl_elem_value *ucontrol)
  545. {
  546. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  547. struct ca0132_spec *spec = codec->spec;
  548. long *valp = ucontrol->value.integer.value;
  549. *valp = spec->curr_hp_switch;
  550. return 0;
  551. }
  552. static int ca0132_hp_switch_put(struct snd_kcontrol *kcontrol,
  553. struct snd_ctl_elem_value *ucontrol)
  554. {
  555. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  556. struct ca0132_spec *spec = codec->spec;
  557. long *valp = ucontrol->value.integer.value;
  558. unsigned int data;
  559. int err;
  560. /* any change? */
  561. if (spec->curr_hp_switch == *valp)
  562. return 0;
  563. snd_hda_power_up(codec);
  564. err = chipio_read(codec, REG_CODEC_MUTE, &data);
  565. if (err < 0)
  566. goto exit;
  567. /* *valp 0 is mute, 1 is unmute */
  568. data = (data & 0x7f) | (*valp ? 0 : 0x80);
  569. err = chipio_write(codec, REG_CODEC_MUTE, data);
  570. if (err < 0)
  571. goto exit;
  572. spec->curr_hp_switch = *valp;
  573. exit:
  574. snd_hda_power_down(codec);
  575. return err < 0 ? err : 1;
  576. }
  577. static int ca0132_speaker_switch_get(struct snd_kcontrol *kcontrol,
  578. struct snd_ctl_elem_value *ucontrol)
  579. {
  580. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  581. struct ca0132_spec *spec = codec->spec;
  582. long *valp = ucontrol->value.integer.value;
  583. *valp = spec->curr_speaker_switch;
  584. return 0;
  585. }
  586. static int ca0132_speaker_switch_put(struct snd_kcontrol *kcontrol,
  587. struct snd_ctl_elem_value *ucontrol)
  588. {
  589. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  590. struct ca0132_spec *spec = codec->spec;
  591. long *valp = ucontrol->value.integer.value;
  592. unsigned int data;
  593. int err;
  594. /* any change? */
  595. if (spec->curr_speaker_switch == *valp)
  596. return 0;
  597. snd_hda_power_up(codec);
  598. err = chipio_read(codec, REG_CODEC_MUTE, &data);
  599. if (err < 0)
  600. goto exit;
  601. /* *valp 0 is mute, 1 is unmute */
  602. data = (data & 0xef) | (*valp ? 0 : 0x10);
  603. err = chipio_write(codec, REG_CODEC_MUTE, data);
  604. if (err < 0)
  605. goto exit;
  606. spec->curr_speaker_switch = *valp;
  607. exit:
  608. snd_hda_power_down(codec);
  609. return err < 0 ? err : 1;
  610. }
  611. static int ca0132_hp_volume_get(struct snd_kcontrol *kcontrol,
  612. struct snd_ctl_elem_value *ucontrol)
  613. {
  614. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  615. struct ca0132_spec *spec = codec->spec;
  616. long *valp = ucontrol->value.integer.value;
  617. *valp++ = spec->curr_hp_volume[0];
  618. *valp = spec->curr_hp_volume[1];
  619. return 0;
  620. }
  621. static int ca0132_hp_volume_put(struct snd_kcontrol *kcontrol,
  622. struct snd_ctl_elem_value *ucontrol)
  623. {
  624. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  625. struct ca0132_spec *spec = codec->spec;
  626. long *valp = ucontrol->value.integer.value;
  627. long left_vol, right_vol;
  628. unsigned int data;
  629. int val;
  630. int err;
  631. left_vol = *valp++;
  632. right_vol = *valp;
  633. /* any change? */
  634. if ((spec->curr_hp_volume[0] == left_vol) &&
  635. (spec->curr_hp_volume[1] == right_vol))
  636. return 0;
  637. snd_hda_power_up(codec);
  638. err = chipio_read(codec, REG_CODEC_HP_VOL_L, &data);
  639. if (err < 0)
  640. goto exit;
  641. val = 31 - left_vol;
  642. data = (data & 0xe0) | val;
  643. err = chipio_write(codec, REG_CODEC_HP_VOL_L, data);
  644. if (err < 0)
  645. goto exit;
  646. val = 31 - right_vol;
  647. data = (data & 0xe0) | val;
  648. err = chipio_write(codec, REG_CODEC_HP_VOL_R, data);
  649. if (err < 0)
  650. goto exit;
  651. spec->curr_hp_volume[0] = left_vol;
  652. spec->curr_hp_volume[1] = right_vol;
  653. exit:
  654. snd_hda_power_down(codec);
  655. return err < 0 ? err : 1;
  656. }
  657. static int add_hp_switch(struct hda_codec *codec, hda_nid_t nid)
  658. {
  659. struct snd_kcontrol_new knew =
  660. HDA_CODEC_MUTE_MONO("Headphone Playback Switch",
  661. nid, 1, 0, HDA_OUTPUT);
  662. knew.get = ca0132_hp_switch_get;
  663. knew.put = ca0132_hp_switch_put;
  664. return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
  665. }
  666. static int add_hp_volume(struct hda_codec *codec, hda_nid_t nid)
  667. {
  668. struct snd_kcontrol_new knew =
  669. HDA_CODEC_VOLUME_MONO("Headphone Playback Volume",
  670. nid, 3, 0, HDA_OUTPUT);
  671. knew.get = ca0132_hp_volume_get;
  672. knew.put = ca0132_hp_volume_put;
  673. return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
  674. }
  675. static int add_speaker_switch(struct hda_codec *codec, hda_nid_t nid)
  676. {
  677. struct snd_kcontrol_new knew =
  678. HDA_CODEC_MUTE_MONO("Speaker Playback Switch",
  679. nid, 1, 0, HDA_OUTPUT);
  680. knew.get = ca0132_speaker_switch_get;
  681. knew.put = ca0132_speaker_switch_put;
  682. return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
  683. }
  684. static void ca0132_fix_hp_caps(struct hda_codec *codec)
  685. {
  686. struct ca0132_spec *spec = codec->spec;
  687. struct auto_pin_cfg *cfg = &spec->autocfg;
  688. unsigned int caps;
  689. /* set mute-capable, 1db step, 32 steps, ofs 6 */
  690. caps = 0x80031f06;
  691. snd_hda_override_amp_caps(codec, cfg->hp_pins[0], HDA_OUTPUT, caps);
  692. }
  693. static int ca0132_build_controls(struct hda_codec *codec)
  694. {
  695. struct ca0132_spec *spec = codec->spec;
  696. struct auto_pin_cfg *cfg = &spec->autocfg;
  697. int i, err;
  698. if (spec->multiout.num_dacs) {
  699. err = add_speaker_switch(codec, spec->out_pins[0]);
  700. if (err < 0)
  701. return err;
  702. }
  703. if (cfg->hp_outs) {
  704. ca0132_fix_hp_caps(codec);
  705. err = add_hp_switch(codec, cfg->hp_pins[0]);
  706. if (err < 0)
  707. return err;
  708. err = add_hp_volume(codec, cfg->hp_pins[0]);
  709. if (err < 0)
  710. return err;
  711. }
  712. for (i = 0; i < spec->num_inputs; i++) {
  713. const char *label = spec->input_labels[i];
  714. err = add_in_switch(codec, spec->adcs[i], label);
  715. if (err < 0)
  716. return err;
  717. err = add_in_volume(codec, spec->adcs[i], label);
  718. if (err < 0)
  719. return err;
  720. if (cfg->inputs[i].type == AUTO_PIN_MIC) {
  721. /* add Mic-Boost */
  722. err = add_in_mono_volume(codec, spec->input_pins[i],
  723. "Mic Boost", 1);
  724. if (err < 0)
  725. return err;
  726. }
  727. }
  728. if (spec->dig_out) {
  729. err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out,
  730. spec->dig_out);
  731. if (err < 0)
  732. return err;
  733. err = snd_hda_create_spdif_share_sw(codec, &spec->multiout);
  734. if (err < 0)
  735. return err;
  736. /* spec->multiout.share_spdif = 1; */
  737. }
  738. if (spec->dig_in) {
  739. err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in);
  740. if (err < 0)
  741. return err;
  742. }
  743. return 0;
  744. }
  745. static void ca0132_set_ct_ext(struct hda_codec *codec, int enable)
  746. {
  747. /* Set Creative extension */
  748. snd_printdd("SET CREATIVE EXTENSION\n");
  749. snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
  750. VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE,
  751. enable);
  752. msleep(20);
  753. }
  754. static void ca0132_config(struct hda_codec *codec)
  755. {
  756. struct ca0132_spec *spec = codec->spec;
  757. struct auto_pin_cfg *cfg = &spec->autocfg;
  758. codec->pcm_format_first = 1;
  759. codec->no_sticky_stream = 1;
  760. /* line-outs */
  761. cfg->line_outs = 1;
  762. cfg->line_out_pins[0] = 0x0b; /* front */
  763. cfg->line_out_type = AUTO_PIN_LINE_OUT;
  764. spec->dacs[0] = 0x02;
  765. spec->out_pins[0] = 0x0b;
  766. spec->multiout.dac_nids = spec->dacs;
  767. spec->multiout.num_dacs = 1;
  768. spec->multiout.max_channels = 2;
  769. /* headphone */
  770. cfg->hp_outs = 1;
  771. cfg->hp_pins[0] = 0x0f;
  772. spec->hp_dac = 0;
  773. spec->multiout.hp_nid = 0;
  774. /* inputs */
  775. cfg->num_inputs = 2; /* Mic-in and line-in */
  776. cfg->inputs[0].pin = 0x12;
  777. cfg->inputs[0].type = AUTO_PIN_MIC;
  778. cfg->inputs[1].pin = 0x11;
  779. cfg->inputs[1].type = AUTO_PIN_LINE_IN;
  780. /* Mic-in */
  781. spec->input_pins[0] = 0x12;
  782. spec->input_labels[0] = "Mic";
  783. spec->adcs[0] = 0x07;
  784. /* Line-In */
  785. spec->input_pins[1] = 0x11;
  786. spec->input_labels[1] = "Line";
  787. spec->adcs[1] = 0x08;
  788. spec->num_inputs = 2;
  789. /* SPDIF I/O */
  790. spec->dig_out = 0x05;
  791. spec->multiout.dig_out_nid = spec->dig_out;
  792. cfg->dig_out_pins[0] = 0x0c;
  793. cfg->dig_outs = 1;
  794. cfg->dig_out_type[0] = HDA_PCM_TYPE_SPDIF;
  795. spec->dig_in = 0x09;
  796. cfg->dig_in_pin = 0x0e;
  797. cfg->dig_in_type = HDA_PCM_TYPE_SPDIF;
  798. }
  799. static void ca0132_init_chip(struct hda_codec *codec)
  800. {
  801. struct ca0132_spec *spec = codec->spec;
  802. mutex_init(&spec->chipio_mutex);
  803. }
  804. static void ca0132_exit_chip(struct hda_codec *codec)
  805. {
  806. /* put any chip cleanup stuffs here. */
  807. }
  808. static int ca0132_init(struct hda_codec *codec)
  809. {
  810. struct ca0132_spec *spec = codec->spec;
  811. struct auto_pin_cfg *cfg = &spec->autocfg;
  812. int i;
  813. for (i = 0; i < spec->multiout.num_dacs; i++) {
  814. init_output(codec, spec->out_pins[i],
  815. spec->multiout.dac_nids[i]);
  816. }
  817. init_output(codec, cfg->hp_pins[0], spec->hp_dac);
  818. init_output(codec, cfg->dig_out_pins[0], spec->dig_out);
  819. for (i = 0; i < spec->num_inputs; i++)
  820. init_input(codec, spec->input_pins[i], spec->adcs[i]);
  821. init_input(codec, cfg->dig_in_pin, spec->dig_in);
  822. ca0132_set_ct_ext(codec, 1);
  823. return 0;
  824. }
  825. static void ca0132_free(struct hda_codec *codec)
  826. {
  827. ca0132_set_ct_ext(codec, 0);
  828. ca0132_exit_chip(codec);
  829. kfree(codec->spec);
  830. }
  831. static struct hda_codec_ops ca0132_patch_ops = {
  832. .build_controls = ca0132_build_controls,
  833. .build_pcms = ca0132_build_pcms,
  834. .init = ca0132_init,
  835. .free = ca0132_free,
  836. };
  837. static int patch_ca0132(struct hda_codec *codec)
  838. {
  839. struct ca0132_spec *spec;
  840. snd_printdd("patch_ca0132\n");
  841. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  842. if (!spec)
  843. return -ENOMEM;
  844. codec->spec = spec;
  845. ca0132_init_chip(codec);
  846. ca0132_config(codec);
  847. codec->patch_ops = ca0132_patch_ops;
  848. return 0;
  849. }
  850. /*
  851. * patch entries
  852. */
  853. static struct hda_codec_preset snd_hda_preset_ca0132[] = {
  854. { .id = 0x11020011, .name = "CA0132", .patch = patch_ca0132 },
  855. {} /* terminator */
  856. };
  857. MODULE_ALIAS("snd-hda-codec-id:11020011");
  858. MODULE_LICENSE("GPL");
  859. MODULE_DESCRIPTION("Creative CA0132, CA0132 HD-audio codec");
  860. static struct hda_codec_preset_list ca0132_list = {
  861. .preset = snd_hda_preset_ca0132,
  862. .owner = THIS_MODULE,
  863. };
  864. static int __init patch_ca0132_init(void)
  865. {
  866. return snd_hda_add_codec_preset(&ca0132_list);
  867. }
  868. static void __exit patch_ca0132_exit(void)
  869. {
  870. snd_hda_delete_codec_preset(&ca0132_list);
  871. }
  872. module_init(patch_ca0132_init)
  873. module_exit(patch_ca0132_exit)