ad1816a_lib.c 30 KB

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  1. /*
  2. ad1816a.c - lowlevel code for Analog Devices AD1816A chip.
  3. Copyright (C) 1999-2000 by Massimo Piccioni <dafastidio@libero.it>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  15. */
  16. #include <linux/delay.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/slab.h>
  20. #include <linux/ioport.h>
  21. #include <sound/core.h>
  22. #include <sound/tlv.h>
  23. #include <sound/ad1816a.h>
  24. #include <asm/io.h>
  25. #include <asm/dma.h>
  26. static inline int snd_ad1816a_busy_wait(struct snd_ad1816a *chip)
  27. {
  28. int timeout;
  29. for (timeout = 1000; timeout-- > 0; udelay(10))
  30. if (inb(AD1816A_REG(AD1816A_CHIP_STATUS)) & AD1816A_READY)
  31. return 0;
  32. snd_printk(KERN_WARNING "chip busy.\n");
  33. return -EBUSY;
  34. }
  35. static inline unsigned char snd_ad1816a_in(struct snd_ad1816a *chip, unsigned char reg)
  36. {
  37. snd_ad1816a_busy_wait(chip);
  38. return inb(AD1816A_REG(reg));
  39. }
  40. static inline void snd_ad1816a_out(struct snd_ad1816a *chip, unsigned char reg,
  41. unsigned char value)
  42. {
  43. snd_ad1816a_busy_wait(chip);
  44. outb(value, AD1816A_REG(reg));
  45. }
  46. static inline void snd_ad1816a_out_mask(struct snd_ad1816a *chip, unsigned char reg,
  47. unsigned char mask, unsigned char value)
  48. {
  49. snd_ad1816a_out(chip, reg,
  50. (value & mask) | (snd_ad1816a_in(chip, reg) & ~mask));
  51. }
  52. static unsigned short snd_ad1816a_read(struct snd_ad1816a *chip, unsigned char reg)
  53. {
  54. snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f);
  55. return snd_ad1816a_in(chip, AD1816A_INDIR_DATA_LOW) |
  56. (snd_ad1816a_in(chip, AD1816A_INDIR_DATA_HIGH) << 8);
  57. }
  58. static void snd_ad1816a_write(struct snd_ad1816a *chip, unsigned char reg,
  59. unsigned short value)
  60. {
  61. snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f);
  62. snd_ad1816a_out(chip, AD1816A_INDIR_DATA_LOW, value & 0xff);
  63. snd_ad1816a_out(chip, AD1816A_INDIR_DATA_HIGH, (value >> 8) & 0xff);
  64. }
  65. static void snd_ad1816a_write_mask(struct snd_ad1816a *chip, unsigned char reg,
  66. unsigned short mask, unsigned short value)
  67. {
  68. snd_ad1816a_write(chip, reg,
  69. (value & mask) | (snd_ad1816a_read(chip, reg) & ~mask));
  70. }
  71. static unsigned char snd_ad1816a_get_format(struct snd_ad1816a *chip,
  72. unsigned int format, int channels)
  73. {
  74. unsigned char retval = AD1816A_FMT_LINEAR_8;
  75. switch (format) {
  76. case SNDRV_PCM_FORMAT_MU_LAW:
  77. retval = AD1816A_FMT_ULAW_8;
  78. break;
  79. case SNDRV_PCM_FORMAT_A_LAW:
  80. retval = AD1816A_FMT_ALAW_8;
  81. break;
  82. case SNDRV_PCM_FORMAT_S16_LE:
  83. retval = AD1816A_FMT_LINEAR_16_LIT;
  84. break;
  85. case SNDRV_PCM_FORMAT_S16_BE:
  86. retval = AD1816A_FMT_LINEAR_16_BIG;
  87. }
  88. return (channels > 1) ? (retval | AD1816A_FMT_STEREO) : retval;
  89. }
  90. static int snd_ad1816a_open(struct snd_ad1816a *chip, unsigned int mode)
  91. {
  92. unsigned long flags;
  93. spin_lock_irqsave(&chip->lock, flags);
  94. if (chip->mode & mode) {
  95. spin_unlock_irqrestore(&chip->lock, flags);
  96. return -EAGAIN;
  97. }
  98. switch ((mode &= AD1816A_MODE_OPEN)) {
  99. case AD1816A_MODE_PLAYBACK:
  100. snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
  101. AD1816A_PLAYBACK_IRQ_PENDING, 0x00);
  102. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  103. AD1816A_PLAYBACK_IRQ_ENABLE, 0xffff);
  104. break;
  105. case AD1816A_MODE_CAPTURE:
  106. snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
  107. AD1816A_CAPTURE_IRQ_PENDING, 0x00);
  108. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  109. AD1816A_CAPTURE_IRQ_ENABLE, 0xffff);
  110. break;
  111. case AD1816A_MODE_TIMER:
  112. snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
  113. AD1816A_TIMER_IRQ_PENDING, 0x00);
  114. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  115. AD1816A_TIMER_IRQ_ENABLE, 0xffff);
  116. }
  117. chip->mode |= mode;
  118. spin_unlock_irqrestore(&chip->lock, flags);
  119. return 0;
  120. }
  121. static void snd_ad1816a_close(struct snd_ad1816a *chip, unsigned int mode)
  122. {
  123. unsigned long flags;
  124. spin_lock_irqsave(&chip->lock, flags);
  125. switch ((mode &= AD1816A_MODE_OPEN)) {
  126. case AD1816A_MODE_PLAYBACK:
  127. snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
  128. AD1816A_PLAYBACK_IRQ_PENDING, 0x00);
  129. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  130. AD1816A_PLAYBACK_IRQ_ENABLE, 0x0000);
  131. break;
  132. case AD1816A_MODE_CAPTURE:
  133. snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
  134. AD1816A_CAPTURE_IRQ_PENDING, 0x00);
  135. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  136. AD1816A_CAPTURE_IRQ_ENABLE, 0x0000);
  137. break;
  138. case AD1816A_MODE_TIMER:
  139. snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
  140. AD1816A_TIMER_IRQ_PENDING, 0x00);
  141. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  142. AD1816A_TIMER_IRQ_ENABLE, 0x0000);
  143. }
  144. if (!((chip->mode &= ~mode) & AD1816A_MODE_OPEN))
  145. chip->mode = 0;
  146. spin_unlock_irqrestore(&chip->lock, flags);
  147. }
  148. static int snd_ad1816a_trigger(struct snd_ad1816a *chip, unsigned char what,
  149. int channel, int cmd, int iscapture)
  150. {
  151. int error = 0;
  152. switch (cmd) {
  153. case SNDRV_PCM_TRIGGER_START:
  154. case SNDRV_PCM_TRIGGER_STOP:
  155. spin_lock(&chip->lock);
  156. cmd = (cmd == SNDRV_PCM_TRIGGER_START) ? 0xff: 0x00;
  157. /* if (what & AD1816A_PLAYBACK_ENABLE) */
  158. /* That is not valid, because playback and capture enable
  159. * are the same bit pattern, just to different addresses
  160. */
  161. if (! iscapture)
  162. snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
  163. AD1816A_PLAYBACK_ENABLE, cmd);
  164. else
  165. snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
  166. AD1816A_CAPTURE_ENABLE, cmd);
  167. spin_unlock(&chip->lock);
  168. break;
  169. default:
  170. snd_printk(KERN_WARNING "invalid trigger mode 0x%x.\n", what);
  171. error = -EINVAL;
  172. }
  173. return error;
  174. }
  175. static int snd_ad1816a_playback_trigger(struct snd_pcm_substream *substream, int cmd)
  176. {
  177. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  178. return snd_ad1816a_trigger(chip, AD1816A_PLAYBACK_ENABLE,
  179. SNDRV_PCM_STREAM_PLAYBACK, cmd, 0);
  180. }
  181. static int snd_ad1816a_capture_trigger(struct snd_pcm_substream *substream, int cmd)
  182. {
  183. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  184. return snd_ad1816a_trigger(chip, AD1816A_CAPTURE_ENABLE,
  185. SNDRV_PCM_STREAM_CAPTURE, cmd, 1);
  186. }
  187. static int snd_ad1816a_hw_params(struct snd_pcm_substream *substream,
  188. struct snd_pcm_hw_params *hw_params)
  189. {
  190. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  191. }
  192. static int snd_ad1816a_hw_free(struct snd_pcm_substream *substream)
  193. {
  194. return snd_pcm_lib_free_pages(substream);
  195. }
  196. static int snd_ad1816a_playback_prepare(struct snd_pcm_substream *substream)
  197. {
  198. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  199. unsigned long flags;
  200. struct snd_pcm_runtime *runtime = substream->runtime;
  201. unsigned int size, rate;
  202. spin_lock_irqsave(&chip->lock, flags);
  203. chip->p_dma_size = size = snd_pcm_lib_buffer_bytes(substream);
  204. snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
  205. AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00);
  206. snd_dma_program(chip->dma1, runtime->dma_addr, size,
  207. DMA_MODE_WRITE | DMA_AUTOINIT);
  208. rate = runtime->rate;
  209. if (chip->clock_freq)
  210. rate = (rate * 33000) / chip->clock_freq;
  211. snd_ad1816a_write(chip, AD1816A_PLAYBACK_SAMPLE_RATE, rate);
  212. snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
  213. AD1816A_FMT_ALL | AD1816A_FMT_STEREO,
  214. snd_ad1816a_get_format(chip, runtime->format,
  215. runtime->channels));
  216. snd_ad1816a_write(chip, AD1816A_PLAYBACK_BASE_COUNT,
  217. snd_pcm_lib_period_bytes(substream) / 4 - 1);
  218. spin_unlock_irqrestore(&chip->lock, flags);
  219. return 0;
  220. }
  221. static int snd_ad1816a_capture_prepare(struct snd_pcm_substream *substream)
  222. {
  223. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  224. unsigned long flags;
  225. struct snd_pcm_runtime *runtime = substream->runtime;
  226. unsigned int size, rate;
  227. spin_lock_irqsave(&chip->lock, flags);
  228. chip->c_dma_size = size = snd_pcm_lib_buffer_bytes(substream);
  229. snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
  230. AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00);
  231. snd_dma_program(chip->dma2, runtime->dma_addr, size,
  232. DMA_MODE_READ | DMA_AUTOINIT);
  233. rate = runtime->rate;
  234. if (chip->clock_freq)
  235. rate = (rate * 33000) / chip->clock_freq;
  236. snd_ad1816a_write(chip, AD1816A_CAPTURE_SAMPLE_RATE, rate);
  237. snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
  238. AD1816A_FMT_ALL | AD1816A_FMT_STEREO,
  239. snd_ad1816a_get_format(chip, runtime->format,
  240. runtime->channels));
  241. snd_ad1816a_write(chip, AD1816A_CAPTURE_BASE_COUNT,
  242. snd_pcm_lib_period_bytes(substream) / 4 - 1);
  243. spin_unlock_irqrestore(&chip->lock, flags);
  244. return 0;
  245. }
  246. static snd_pcm_uframes_t snd_ad1816a_playback_pointer(struct snd_pcm_substream *substream)
  247. {
  248. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  249. size_t ptr;
  250. if (!(chip->mode & AD1816A_MODE_PLAYBACK))
  251. return 0;
  252. ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
  253. return bytes_to_frames(substream->runtime, ptr);
  254. }
  255. static snd_pcm_uframes_t snd_ad1816a_capture_pointer(struct snd_pcm_substream *substream)
  256. {
  257. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  258. size_t ptr;
  259. if (!(chip->mode & AD1816A_MODE_CAPTURE))
  260. return 0;
  261. ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
  262. return bytes_to_frames(substream->runtime, ptr);
  263. }
  264. static irqreturn_t snd_ad1816a_interrupt(int irq, void *dev_id)
  265. {
  266. struct snd_ad1816a *chip = dev_id;
  267. unsigned char status;
  268. spin_lock(&chip->lock);
  269. status = snd_ad1816a_in(chip, AD1816A_INTERRUPT_STATUS);
  270. spin_unlock(&chip->lock);
  271. if ((status & AD1816A_PLAYBACK_IRQ_PENDING) && chip->playback_substream)
  272. snd_pcm_period_elapsed(chip->playback_substream);
  273. if ((status & AD1816A_CAPTURE_IRQ_PENDING) && chip->capture_substream)
  274. snd_pcm_period_elapsed(chip->capture_substream);
  275. if ((status & AD1816A_TIMER_IRQ_PENDING) && chip->timer)
  276. snd_timer_interrupt(chip->timer, chip->timer->sticks);
  277. spin_lock(&chip->lock);
  278. snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00);
  279. spin_unlock(&chip->lock);
  280. return IRQ_HANDLED;
  281. }
  282. static struct snd_pcm_hardware snd_ad1816a_playback = {
  283. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  284. SNDRV_PCM_INFO_MMAP_VALID),
  285. .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  286. SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
  287. SNDRV_PCM_FMTBIT_S16_BE),
  288. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  289. .rate_min = 4000,
  290. .rate_max = 55200,
  291. .channels_min = 1,
  292. .channels_max = 2,
  293. .buffer_bytes_max = (128*1024),
  294. .period_bytes_min = 64,
  295. .period_bytes_max = (128*1024),
  296. .periods_min = 1,
  297. .periods_max = 1024,
  298. .fifo_size = 0,
  299. };
  300. static struct snd_pcm_hardware snd_ad1816a_capture = {
  301. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  302. SNDRV_PCM_INFO_MMAP_VALID),
  303. .formats = (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
  304. SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
  305. SNDRV_PCM_FMTBIT_S16_BE),
  306. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  307. .rate_min = 4000,
  308. .rate_max = 55200,
  309. .channels_min = 1,
  310. .channels_max = 2,
  311. .buffer_bytes_max = (128*1024),
  312. .period_bytes_min = 64,
  313. .period_bytes_max = (128*1024),
  314. .periods_min = 1,
  315. .periods_max = 1024,
  316. .fifo_size = 0,
  317. };
  318. static int snd_ad1816a_timer_close(struct snd_timer *timer)
  319. {
  320. struct snd_ad1816a *chip = snd_timer_chip(timer);
  321. snd_ad1816a_close(chip, AD1816A_MODE_TIMER);
  322. return 0;
  323. }
  324. static int snd_ad1816a_timer_open(struct snd_timer *timer)
  325. {
  326. struct snd_ad1816a *chip = snd_timer_chip(timer);
  327. snd_ad1816a_open(chip, AD1816A_MODE_TIMER);
  328. return 0;
  329. }
  330. static unsigned long snd_ad1816a_timer_resolution(struct snd_timer *timer)
  331. {
  332. if (snd_BUG_ON(!timer))
  333. return 0;
  334. return 10000;
  335. }
  336. static int snd_ad1816a_timer_start(struct snd_timer *timer)
  337. {
  338. unsigned short bits;
  339. unsigned long flags;
  340. struct snd_ad1816a *chip = snd_timer_chip(timer);
  341. spin_lock_irqsave(&chip->lock, flags);
  342. bits = snd_ad1816a_read(chip, AD1816A_INTERRUPT_ENABLE);
  343. if (!(bits & AD1816A_TIMER_ENABLE)) {
  344. snd_ad1816a_write(chip, AD1816A_TIMER_BASE_COUNT,
  345. timer->sticks & 0xffff);
  346. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  347. AD1816A_TIMER_ENABLE, 0xffff);
  348. }
  349. spin_unlock_irqrestore(&chip->lock, flags);
  350. return 0;
  351. }
  352. static int snd_ad1816a_timer_stop(struct snd_timer *timer)
  353. {
  354. unsigned long flags;
  355. struct snd_ad1816a *chip = snd_timer_chip(timer);
  356. spin_lock_irqsave(&chip->lock, flags);
  357. snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
  358. AD1816A_TIMER_ENABLE, 0x0000);
  359. spin_unlock_irqrestore(&chip->lock, flags);
  360. return 0;
  361. }
  362. static struct snd_timer_hardware snd_ad1816a_timer_table = {
  363. .flags = SNDRV_TIMER_HW_AUTO,
  364. .resolution = 10000,
  365. .ticks = 65535,
  366. .open = snd_ad1816a_timer_open,
  367. .close = snd_ad1816a_timer_close,
  368. .c_resolution = snd_ad1816a_timer_resolution,
  369. .start = snd_ad1816a_timer_start,
  370. .stop = snd_ad1816a_timer_stop,
  371. };
  372. static int snd_ad1816a_playback_open(struct snd_pcm_substream *substream)
  373. {
  374. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  375. struct snd_pcm_runtime *runtime = substream->runtime;
  376. int error;
  377. if ((error = snd_ad1816a_open(chip, AD1816A_MODE_PLAYBACK)) < 0)
  378. return error;
  379. runtime->hw = snd_ad1816a_playback;
  380. snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
  381. snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
  382. chip->playback_substream = substream;
  383. return 0;
  384. }
  385. static int snd_ad1816a_capture_open(struct snd_pcm_substream *substream)
  386. {
  387. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  388. struct snd_pcm_runtime *runtime = substream->runtime;
  389. int error;
  390. if ((error = snd_ad1816a_open(chip, AD1816A_MODE_CAPTURE)) < 0)
  391. return error;
  392. runtime->hw = snd_ad1816a_capture;
  393. snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
  394. snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
  395. chip->capture_substream = substream;
  396. return 0;
  397. }
  398. static int snd_ad1816a_playback_close(struct snd_pcm_substream *substream)
  399. {
  400. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  401. chip->playback_substream = NULL;
  402. snd_ad1816a_close(chip, AD1816A_MODE_PLAYBACK);
  403. return 0;
  404. }
  405. static int snd_ad1816a_capture_close(struct snd_pcm_substream *substream)
  406. {
  407. struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
  408. chip->capture_substream = NULL;
  409. snd_ad1816a_close(chip, AD1816A_MODE_CAPTURE);
  410. return 0;
  411. }
  412. static void snd_ad1816a_init(struct snd_ad1816a *chip)
  413. {
  414. unsigned long flags;
  415. spin_lock_irqsave(&chip->lock, flags);
  416. snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00);
  417. snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
  418. AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00);
  419. snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
  420. AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00);
  421. snd_ad1816a_write(chip, AD1816A_INTERRUPT_ENABLE, 0x0000);
  422. snd_ad1816a_write_mask(chip, AD1816A_CHIP_CONFIG,
  423. AD1816A_CAPTURE_NOT_EQUAL | AD1816A_WSS_ENABLE, 0xffff);
  424. snd_ad1816a_write(chip, AD1816A_DSP_CONFIG, 0x0000);
  425. snd_ad1816a_write(chip, AD1816A_POWERDOWN_CTRL, 0x0000);
  426. spin_unlock_irqrestore(&chip->lock, flags);
  427. }
  428. #ifdef CONFIG_PM
  429. void snd_ad1816a_suspend(struct snd_ad1816a *chip)
  430. {
  431. int reg;
  432. unsigned long flags;
  433. snd_pcm_suspend_all(chip->pcm);
  434. spin_lock_irqsave(&chip->lock, flags);
  435. for (reg = 0; reg < 48; reg++)
  436. chip->image[reg] = snd_ad1816a_read(chip, reg);
  437. spin_unlock_irqrestore(&chip->lock, flags);
  438. }
  439. void snd_ad1816a_resume(struct snd_ad1816a *chip)
  440. {
  441. int reg;
  442. unsigned long flags;
  443. snd_ad1816a_init(chip);
  444. spin_lock_irqsave(&chip->lock, flags);
  445. for (reg = 0; reg < 48; reg++)
  446. snd_ad1816a_write(chip, reg, chip->image[reg]);
  447. spin_unlock_irqrestore(&chip->lock, flags);
  448. }
  449. #endif
  450. static int snd_ad1816a_probe(struct snd_ad1816a *chip)
  451. {
  452. unsigned long flags;
  453. spin_lock_irqsave(&chip->lock, flags);
  454. switch (chip->version = snd_ad1816a_read(chip, AD1816A_VERSION_ID)) {
  455. case 0:
  456. chip->hardware = AD1816A_HW_AD1815;
  457. break;
  458. case 1:
  459. chip->hardware = AD1816A_HW_AD18MAX10;
  460. break;
  461. case 3:
  462. chip->hardware = AD1816A_HW_AD1816A;
  463. break;
  464. default:
  465. chip->hardware = AD1816A_HW_AUTO;
  466. }
  467. spin_unlock_irqrestore(&chip->lock, flags);
  468. return 0;
  469. }
  470. static int snd_ad1816a_free(struct snd_ad1816a *chip)
  471. {
  472. release_and_free_resource(chip->res_port);
  473. if (chip->irq >= 0)
  474. free_irq(chip->irq, (void *) chip);
  475. if (chip->dma1 >= 0) {
  476. snd_dma_disable(chip->dma1);
  477. free_dma(chip->dma1);
  478. }
  479. if (chip->dma2 >= 0) {
  480. snd_dma_disable(chip->dma2);
  481. free_dma(chip->dma2);
  482. }
  483. return 0;
  484. }
  485. static int snd_ad1816a_dev_free(struct snd_device *device)
  486. {
  487. struct snd_ad1816a *chip = device->device_data;
  488. return snd_ad1816a_free(chip);
  489. }
  490. static const char *snd_ad1816a_chip_id(struct snd_ad1816a *chip)
  491. {
  492. switch (chip->hardware) {
  493. case AD1816A_HW_AD1816A: return "AD1816A";
  494. case AD1816A_HW_AD1815: return "AD1815";
  495. case AD1816A_HW_AD18MAX10: return "AD18max10";
  496. default:
  497. snd_printk(KERN_WARNING "Unknown chip version %d:%d.\n",
  498. chip->version, chip->hardware);
  499. return "AD1816A - unknown";
  500. }
  501. }
  502. int snd_ad1816a_create(struct snd_card *card,
  503. unsigned long port, int irq, int dma1, int dma2,
  504. struct snd_ad1816a *chip)
  505. {
  506. static struct snd_device_ops ops = {
  507. .dev_free = snd_ad1816a_dev_free,
  508. };
  509. int error;
  510. chip->irq = -1;
  511. chip->dma1 = -1;
  512. chip->dma2 = -1;
  513. if ((chip->res_port = request_region(port, 16, "AD1816A")) == NULL) {
  514. snd_printk(KERN_ERR "ad1816a: can't grab port 0x%lx\n", port);
  515. snd_ad1816a_free(chip);
  516. return -EBUSY;
  517. }
  518. if (request_irq(irq, snd_ad1816a_interrupt, 0, "AD1816A", (void *) chip)) {
  519. snd_printk(KERN_ERR "ad1816a: can't grab IRQ %d\n", irq);
  520. snd_ad1816a_free(chip);
  521. return -EBUSY;
  522. }
  523. chip->irq = irq;
  524. if (request_dma(dma1, "AD1816A - 1")) {
  525. snd_printk(KERN_ERR "ad1816a: can't grab DMA1 %d\n", dma1);
  526. snd_ad1816a_free(chip);
  527. return -EBUSY;
  528. }
  529. chip->dma1 = dma1;
  530. if (request_dma(dma2, "AD1816A - 2")) {
  531. snd_printk(KERN_ERR "ad1816a: can't grab DMA2 %d\n", dma2);
  532. snd_ad1816a_free(chip);
  533. return -EBUSY;
  534. }
  535. chip->dma2 = dma2;
  536. chip->card = card;
  537. chip->port = port;
  538. spin_lock_init(&chip->lock);
  539. if ((error = snd_ad1816a_probe(chip))) {
  540. snd_ad1816a_free(chip);
  541. return error;
  542. }
  543. snd_ad1816a_init(chip);
  544. /* Register device */
  545. if ((error = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  546. snd_ad1816a_free(chip);
  547. return error;
  548. }
  549. return 0;
  550. }
  551. static struct snd_pcm_ops snd_ad1816a_playback_ops = {
  552. .open = snd_ad1816a_playback_open,
  553. .close = snd_ad1816a_playback_close,
  554. .ioctl = snd_pcm_lib_ioctl,
  555. .hw_params = snd_ad1816a_hw_params,
  556. .hw_free = snd_ad1816a_hw_free,
  557. .prepare = snd_ad1816a_playback_prepare,
  558. .trigger = snd_ad1816a_playback_trigger,
  559. .pointer = snd_ad1816a_playback_pointer,
  560. };
  561. static struct snd_pcm_ops snd_ad1816a_capture_ops = {
  562. .open = snd_ad1816a_capture_open,
  563. .close = snd_ad1816a_capture_close,
  564. .ioctl = snd_pcm_lib_ioctl,
  565. .hw_params = snd_ad1816a_hw_params,
  566. .hw_free = snd_ad1816a_hw_free,
  567. .prepare = snd_ad1816a_capture_prepare,
  568. .trigger = snd_ad1816a_capture_trigger,
  569. .pointer = snd_ad1816a_capture_pointer,
  570. };
  571. int snd_ad1816a_pcm(struct snd_ad1816a *chip, int device, struct snd_pcm **rpcm)
  572. {
  573. int error;
  574. struct snd_pcm *pcm;
  575. if ((error = snd_pcm_new(chip->card, "AD1816A", device, 1, 1, &pcm)))
  576. return error;
  577. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1816a_playback_ops);
  578. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1816a_capture_ops);
  579. pcm->private_data = chip;
  580. pcm->info_flags = (chip->dma1 == chip->dma2 ) ? SNDRV_PCM_INFO_JOINT_DUPLEX : 0;
  581. strcpy(pcm->name, snd_ad1816a_chip_id(chip));
  582. snd_ad1816a_init(chip);
  583. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  584. snd_dma_isa_data(),
  585. 64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
  586. chip->pcm = pcm;
  587. if (rpcm)
  588. *rpcm = pcm;
  589. return 0;
  590. }
  591. int snd_ad1816a_timer(struct snd_ad1816a *chip, int device,
  592. struct snd_timer **rtimer)
  593. {
  594. struct snd_timer *timer;
  595. struct snd_timer_id tid;
  596. int error;
  597. tid.dev_class = SNDRV_TIMER_CLASS_CARD;
  598. tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
  599. tid.card = chip->card->number;
  600. tid.device = device;
  601. tid.subdevice = 0;
  602. if ((error = snd_timer_new(chip->card, "AD1816A", &tid, &timer)) < 0)
  603. return error;
  604. strcpy(timer->name, snd_ad1816a_chip_id(chip));
  605. timer->private_data = chip;
  606. chip->timer = timer;
  607. timer->hw = snd_ad1816a_timer_table;
  608. if (rtimer)
  609. *rtimer = timer;
  610. return 0;
  611. }
  612. /*
  613. *
  614. */
  615. static int snd_ad1816a_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  616. {
  617. static char *texts[8] = {
  618. "Line", "Mix", "CD", "Synth", "Video",
  619. "Mic", "Phone",
  620. };
  621. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  622. uinfo->count = 2;
  623. uinfo->value.enumerated.items = 7;
  624. if (uinfo->value.enumerated.item > 6)
  625. uinfo->value.enumerated.item = 6;
  626. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  627. return 0;
  628. }
  629. static int snd_ad1816a_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  630. {
  631. struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
  632. unsigned long flags;
  633. unsigned short val;
  634. spin_lock_irqsave(&chip->lock, flags);
  635. val = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL);
  636. spin_unlock_irqrestore(&chip->lock, flags);
  637. ucontrol->value.enumerated.item[0] = (val >> 12) & 7;
  638. ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
  639. return 0;
  640. }
  641. static int snd_ad1816a_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  642. {
  643. struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
  644. unsigned long flags;
  645. unsigned short val;
  646. int change;
  647. if (ucontrol->value.enumerated.item[0] > 6 ||
  648. ucontrol->value.enumerated.item[1] > 6)
  649. return -EINVAL;
  650. val = (ucontrol->value.enumerated.item[0] << 12) |
  651. (ucontrol->value.enumerated.item[1] << 4);
  652. spin_lock_irqsave(&chip->lock, flags);
  653. change = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL) != val;
  654. snd_ad1816a_write(chip, AD1816A_ADC_SOURCE_SEL, val);
  655. spin_unlock_irqrestore(&chip->lock, flags);
  656. return change;
  657. }
  658. #define AD1816A_SINGLE_TLV(xname, reg, shift, mask, invert, xtlv) \
  659. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  660. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  661. .name = xname, .info = snd_ad1816a_info_single, \
  662. .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \
  663. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
  664. .tlv = { .p = (xtlv) } }
  665. #define AD1816A_SINGLE(xname, reg, shift, mask, invert) \
  666. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_single, \
  667. .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \
  668. .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
  669. static int snd_ad1816a_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  670. {
  671. int mask = (kcontrol->private_value >> 16) & 0xff;
  672. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  673. uinfo->count = 1;
  674. uinfo->value.integer.min = 0;
  675. uinfo->value.integer.max = mask;
  676. return 0;
  677. }
  678. static int snd_ad1816a_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  679. {
  680. struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
  681. unsigned long flags;
  682. int reg = kcontrol->private_value & 0xff;
  683. int shift = (kcontrol->private_value >> 8) & 0xff;
  684. int mask = (kcontrol->private_value >> 16) & 0xff;
  685. int invert = (kcontrol->private_value >> 24) & 0xff;
  686. spin_lock_irqsave(&chip->lock, flags);
  687. ucontrol->value.integer.value[0] = (snd_ad1816a_read(chip, reg) >> shift) & mask;
  688. spin_unlock_irqrestore(&chip->lock, flags);
  689. if (invert)
  690. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  691. return 0;
  692. }
  693. static int snd_ad1816a_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  694. {
  695. struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
  696. unsigned long flags;
  697. int reg = kcontrol->private_value & 0xff;
  698. int shift = (kcontrol->private_value >> 8) & 0xff;
  699. int mask = (kcontrol->private_value >> 16) & 0xff;
  700. int invert = (kcontrol->private_value >> 24) & 0xff;
  701. int change;
  702. unsigned short old_val, val;
  703. val = (ucontrol->value.integer.value[0] & mask);
  704. if (invert)
  705. val = mask - val;
  706. val <<= shift;
  707. spin_lock_irqsave(&chip->lock, flags);
  708. old_val = snd_ad1816a_read(chip, reg);
  709. val = (old_val & ~(mask << shift)) | val;
  710. change = val != old_val;
  711. snd_ad1816a_write(chip, reg, val);
  712. spin_unlock_irqrestore(&chip->lock, flags);
  713. return change;
  714. }
  715. #define AD1816A_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \
  716. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  717. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  718. .name = xname, .info = snd_ad1816a_info_double, \
  719. .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \
  720. .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \
  721. .tlv = { .p = (xtlv) } }
  722. #define AD1816A_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
  723. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_double, \
  724. .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \
  725. .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
  726. static int snd_ad1816a_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  727. {
  728. int mask = (kcontrol->private_value >> 16) & 0xff;
  729. uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
  730. uinfo->count = 2;
  731. uinfo->value.integer.min = 0;
  732. uinfo->value.integer.max = mask;
  733. return 0;
  734. }
  735. static int snd_ad1816a_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  736. {
  737. struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
  738. unsigned long flags;
  739. int reg = kcontrol->private_value & 0xff;
  740. int shift_left = (kcontrol->private_value >> 8) & 0x0f;
  741. int shift_right = (kcontrol->private_value >> 12) & 0x0f;
  742. int mask = (kcontrol->private_value >> 16) & 0xff;
  743. int invert = (kcontrol->private_value >> 24) & 0xff;
  744. unsigned short val;
  745. spin_lock_irqsave(&chip->lock, flags);
  746. val = snd_ad1816a_read(chip, reg);
  747. ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
  748. ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
  749. spin_unlock_irqrestore(&chip->lock, flags);
  750. if (invert) {
  751. ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
  752. ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
  753. }
  754. return 0;
  755. }
  756. static int snd_ad1816a_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  757. {
  758. struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
  759. unsigned long flags;
  760. int reg = kcontrol->private_value & 0xff;
  761. int shift_left = (kcontrol->private_value >> 8) & 0x0f;
  762. int shift_right = (kcontrol->private_value >> 12) & 0x0f;
  763. int mask = (kcontrol->private_value >> 16) & 0xff;
  764. int invert = (kcontrol->private_value >> 24) & 0xff;
  765. int change;
  766. unsigned short old_val, val1, val2;
  767. val1 = ucontrol->value.integer.value[0] & mask;
  768. val2 = ucontrol->value.integer.value[1] & mask;
  769. if (invert) {
  770. val1 = mask - val1;
  771. val2 = mask - val2;
  772. }
  773. val1 <<= shift_left;
  774. val2 <<= shift_right;
  775. spin_lock_irqsave(&chip->lock, flags);
  776. old_val = snd_ad1816a_read(chip, reg);
  777. val1 = (old_val & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
  778. change = val1 != old_val;
  779. snd_ad1816a_write(chip, reg, val1);
  780. spin_unlock_irqrestore(&chip->lock, flags);
  781. return change;
  782. }
  783. static const DECLARE_TLV_DB_SCALE(db_scale_4bit, -4500, 300, 0);
  784. static const DECLARE_TLV_DB_SCALE(db_scale_5bit, -4650, 150, 0);
  785. static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
  786. static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
  787. static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
  788. static struct snd_kcontrol_new snd_ad1816a_controls[] = {
  789. AD1816A_DOUBLE("Master Playback Switch", AD1816A_MASTER_ATT, 15, 7, 1, 1),
  790. AD1816A_DOUBLE_TLV("Master Playback Volume", AD1816A_MASTER_ATT, 8, 0, 31, 1,
  791. db_scale_5bit),
  792. AD1816A_DOUBLE("PCM Playback Switch", AD1816A_VOICE_ATT, 15, 7, 1, 1),
  793. AD1816A_DOUBLE_TLV("PCM Playback Volume", AD1816A_VOICE_ATT, 8, 0, 63, 1,
  794. db_scale_6bit),
  795. AD1816A_DOUBLE("Line Playback Switch", AD1816A_LINE_GAIN_ATT, 15, 7, 1, 1),
  796. AD1816A_DOUBLE_TLV("Line Playback Volume", AD1816A_LINE_GAIN_ATT, 8, 0, 31, 1,
  797. db_scale_5bit_12db_max),
  798. AD1816A_DOUBLE("CD Playback Switch", AD1816A_CD_GAIN_ATT, 15, 7, 1, 1),
  799. AD1816A_DOUBLE_TLV("CD Playback Volume", AD1816A_CD_GAIN_ATT, 8, 0, 31, 1,
  800. db_scale_5bit_12db_max),
  801. AD1816A_DOUBLE("Synth Playback Switch", AD1816A_SYNTH_GAIN_ATT, 15, 7, 1, 1),
  802. AD1816A_DOUBLE_TLV("Synth Playback Volume", AD1816A_SYNTH_GAIN_ATT, 8, 0, 31, 1,
  803. db_scale_5bit_12db_max),
  804. AD1816A_DOUBLE("FM Playback Switch", AD1816A_FM_ATT, 15, 7, 1, 1),
  805. AD1816A_DOUBLE_TLV("FM Playback Volume", AD1816A_FM_ATT, 8, 0, 63, 1,
  806. db_scale_6bit),
  807. AD1816A_SINGLE("Mic Playback Switch", AD1816A_MIC_GAIN_ATT, 15, 1, 1),
  808. AD1816A_SINGLE_TLV("Mic Playback Volume", AD1816A_MIC_GAIN_ATT, 8, 31, 1,
  809. db_scale_5bit_12db_max),
  810. AD1816A_SINGLE("Mic Boost", AD1816A_MIC_GAIN_ATT, 14, 1, 0),
  811. AD1816A_DOUBLE("Video Playback Switch", AD1816A_VID_GAIN_ATT, 15, 7, 1, 1),
  812. AD1816A_DOUBLE_TLV("Video Playback Volume", AD1816A_VID_GAIN_ATT, 8, 0, 31, 1,
  813. db_scale_5bit_12db_max),
  814. AD1816A_SINGLE("Phone Capture Switch", AD1816A_PHONE_IN_GAIN_ATT, 15, 1, 1),
  815. AD1816A_SINGLE_TLV("Phone Capture Volume", AD1816A_PHONE_IN_GAIN_ATT, 0, 15, 1,
  816. db_scale_4bit),
  817. AD1816A_SINGLE("Phone Playback Switch", AD1816A_PHONE_OUT_ATT, 7, 1, 1),
  818. AD1816A_SINGLE_TLV("Phone Playback Volume", AD1816A_PHONE_OUT_ATT, 0, 31, 1,
  819. db_scale_5bit),
  820. {
  821. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  822. .name = "Capture Source",
  823. .info = snd_ad1816a_info_mux,
  824. .get = snd_ad1816a_get_mux,
  825. .put = snd_ad1816a_put_mux,
  826. },
  827. AD1816A_DOUBLE("Capture Switch", AD1816A_ADC_PGA, 15, 7, 1, 1),
  828. AD1816A_DOUBLE_TLV("Capture Volume", AD1816A_ADC_PGA, 8, 0, 15, 0,
  829. db_scale_rec_gain),
  830. AD1816A_SINGLE("3D Control - Switch", AD1816A_3D_PHAT_CTRL, 15, 1, 1),
  831. AD1816A_SINGLE("3D Control - Level", AD1816A_3D_PHAT_CTRL, 0, 15, 0),
  832. };
  833. int snd_ad1816a_mixer(struct snd_ad1816a *chip)
  834. {
  835. struct snd_card *card;
  836. unsigned int idx;
  837. int err;
  838. if (snd_BUG_ON(!chip || !chip->card))
  839. return -EINVAL;
  840. card = chip->card;
  841. strcpy(card->mixername, snd_ad1816a_chip_id(chip));
  842. for (idx = 0; idx < ARRAY_SIZE(snd_ad1816a_controls); idx++) {
  843. if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_ad1816a_controls[idx], chip))) < 0)
  844. return err;
  845. }
  846. return 0;
  847. }