events.c 42 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is received, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. PIRQs - Hardware interrupts.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <linux/bootmem.h>
  29. #include <linux/slab.h>
  30. #include <linux/irqnr.h>
  31. #include <linux/pci.h>
  32. #ifdef CONFIG_X86
  33. #include <asm/desc.h>
  34. #include <asm/ptrace.h>
  35. #include <asm/irq.h>
  36. #include <asm/idle.h>
  37. #include <asm/io_apic.h>
  38. #include <asm/xen/page.h>
  39. #include <asm/xen/pci.h>
  40. #endif
  41. #include <asm/sync_bitops.h>
  42. #include <asm/xen/hypercall.h>
  43. #include <asm/xen/hypervisor.h>
  44. #include <xen/xen.h>
  45. #include <xen/hvm.h>
  46. #include <xen/xen-ops.h>
  47. #include <xen/events.h>
  48. #include <xen/interface/xen.h>
  49. #include <xen/interface/event_channel.h>
  50. #include <xen/interface/hvm/hvm_op.h>
  51. #include <xen/interface/hvm/params.h>
  52. #include <xen/interface/physdev.h>
  53. #include <xen/interface/sched.h>
  54. #include <asm/hw_irq.h>
  55. /*
  56. * This lock protects updates to the following mapping and reference-count
  57. * arrays. The lock does not need to be acquired to read the mapping tables.
  58. */
  59. static DEFINE_MUTEX(irq_mapping_update_lock);
  60. static LIST_HEAD(xen_irq_list_head);
  61. /* IRQ <-> VIRQ mapping. */
  62. static DEFINE_PER_CPU(int [NR_VIRQS], virq_to_irq) = {[0 ... NR_VIRQS-1] = -1};
  63. /* IRQ <-> IPI mapping */
  64. static DEFINE_PER_CPU(int [XEN_NR_IPIS], ipi_to_irq) = {[0 ... XEN_NR_IPIS-1] = -1};
  65. /* Interrupt types. */
  66. enum xen_irq_type {
  67. IRQT_UNBOUND = 0,
  68. IRQT_PIRQ,
  69. IRQT_VIRQ,
  70. IRQT_IPI,
  71. IRQT_EVTCHN
  72. };
  73. /*
  74. * Packed IRQ information:
  75. * type - enum xen_irq_type
  76. * event channel - irq->event channel mapping
  77. * cpu - cpu this event channel is bound to
  78. * index - type-specific information:
  79. * PIRQ - vector, with MSB being "needs EIO", or physical IRQ of the HVM
  80. * guest, or GSI (real passthrough IRQ) of the device.
  81. * VIRQ - virq number
  82. * IPI - IPI vector
  83. * EVTCHN -
  84. */
  85. struct irq_info {
  86. struct list_head list;
  87. int refcnt;
  88. enum xen_irq_type type; /* type */
  89. unsigned irq;
  90. unsigned short evtchn; /* event channel */
  91. unsigned short cpu; /* cpu bound */
  92. union {
  93. unsigned short virq;
  94. enum ipi_vector ipi;
  95. struct {
  96. unsigned short pirq;
  97. unsigned short gsi;
  98. unsigned char vector;
  99. unsigned char flags;
  100. uint16_t domid;
  101. } pirq;
  102. } u;
  103. };
  104. #define PIRQ_NEEDS_EOI (1 << 0)
  105. #define PIRQ_SHAREABLE (1 << 1)
  106. static int *evtchn_to_irq;
  107. #ifdef CONFIG_X86
  108. static unsigned long *pirq_eoi_map;
  109. #endif
  110. static bool (*pirq_needs_eoi)(unsigned irq);
  111. static DEFINE_PER_CPU(unsigned long [NR_EVENT_CHANNELS/BITS_PER_LONG],
  112. cpu_evtchn_mask);
  113. /* Xen will never allocate port zero for any purpose. */
  114. #define VALID_EVTCHN(chn) ((chn) != 0)
  115. static struct irq_chip xen_dynamic_chip;
  116. static struct irq_chip xen_percpu_chip;
  117. static struct irq_chip xen_pirq_chip;
  118. static void enable_dynirq(struct irq_data *data);
  119. static void disable_dynirq(struct irq_data *data);
  120. /* Get info for IRQ */
  121. static struct irq_info *info_for_irq(unsigned irq)
  122. {
  123. return irq_get_handler_data(irq);
  124. }
  125. /* Constructors for packed IRQ information. */
  126. static void xen_irq_info_common_init(struct irq_info *info,
  127. unsigned irq,
  128. enum xen_irq_type type,
  129. unsigned short evtchn,
  130. unsigned short cpu)
  131. {
  132. BUG_ON(info->type != IRQT_UNBOUND && info->type != type);
  133. info->type = type;
  134. info->irq = irq;
  135. info->evtchn = evtchn;
  136. info->cpu = cpu;
  137. evtchn_to_irq[evtchn] = irq;
  138. }
  139. static void xen_irq_info_evtchn_init(unsigned irq,
  140. unsigned short evtchn)
  141. {
  142. struct irq_info *info = info_for_irq(irq);
  143. xen_irq_info_common_init(info, irq, IRQT_EVTCHN, evtchn, 0);
  144. }
  145. static void xen_irq_info_ipi_init(unsigned cpu,
  146. unsigned irq,
  147. unsigned short evtchn,
  148. enum ipi_vector ipi)
  149. {
  150. struct irq_info *info = info_for_irq(irq);
  151. xen_irq_info_common_init(info, irq, IRQT_IPI, evtchn, 0);
  152. info->u.ipi = ipi;
  153. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  154. }
  155. static void xen_irq_info_virq_init(unsigned cpu,
  156. unsigned irq,
  157. unsigned short evtchn,
  158. unsigned short virq)
  159. {
  160. struct irq_info *info = info_for_irq(irq);
  161. xen_irq_info_common_init(info, irq, IRQT_VIRQ, evtchn, 0);
  162. info->u.virq = virq;
  163. per_cpu(virq_to_irq, cpu)[virq] = irq;
  164. }
  165. static void xen_irq_info_pirq_init(unsigned irq,
  166. unsigned short evtchn,
  167. unsigned short pirq,
  168. unsigned short gsi,
  169. unsigned short vector,
  170. uint16_t domid,
  171. unsigned char flags)
  172. {
  173. struct irq_info *info = info_for_irq(irq);
  174. xen_irq_info_common_init(info, irq, IRQT_PIRQ, evtchn, 0);
  175. info->u.pirq.pirq = pirq;
  176. info->u.pirq.gsi = gsi;
  177. info->u.pirq.vector = vector;
  178. info->u.pirq.domid = domid;
  179. info->u.pirq.flags = flags;
  180. }
  181. /*
  182. * Accessors for packed IRQ information.
  183. */
  184. static unsigned int evtchn_from_irq(unsigned irq)
  185. {
  186. if (unlikely(WARN(irq < 0 || irq >= nr_irqs, "Invalid irq %d!\n", irq)))
  187. return 0;
  188. return info_for_irq(irq)->evtchn;
  189. }
  190. unsigned irq_from_evtchn(unsigned int evtchn)
  191. {
  192. return evtchn_to_irq[evtchn];
  193. }
  194. EXPORT_SYMBOL_GPL(irq_from_evtchn);
  195. static enum ipi_vector ipi_from_irq(unsigned irq)
  196. {
  197. struct irq_info *info = info_for_irq(irq);
  198. BUG_ON(info == NULL);
  199. BUG_ON(info->type != IRQT_IPI);
  200. return info->u.ipi;
  201. }
  202. static unsigned virq_from_irq(unsigned irq)
  203. {
  204. struct irq_info *info = info_for_irq(irq);
  205. BUG_ON(info == NULL);
  206. BUG_ON(info->type != IRQT_VIRQ);
  207. return info->u.virq;
  208. }
  209. static unsigned pirq_from_irq(unsigned irq)
  210. {
  211. struct irq_info *info = info_for_irq(irq);
  212. BUG_ON(info == NULL);
  213. BUG_ON(info->type != IRQT_PIRQ);
  214. return info->u.pirq.pirq;
  215. }
  216. static enum xen_irq_type type_from_irq(unsigned irq)
  217. {
  218. return info_for_irq(irq)->type;
  219. }
  220. static unsigned cpu_from_irq(unsigned irq)
  221. {
  222. return info_for_irq(irq)->cpu;
  223. }
  224. static unsigned int cpu_from_evtchn(unsigned int evtchn)
  225. {
  226. int irq = evtchn_to_irq[evtchn];
  227. unsigned ret = 0;
  228. if (irq != -1)
  229. ret = cpu_from_irq(irq);
  230. return ret;
  231. }
  232. #ifdef CONFIG_X86
  233. static bool pirq_check_eoi_map(unsigned irq)
  234. {
  235. return test_bit(pirq_from_irq(irq), pirq_eoi_map);
  236. }
  237. #endif
  238. static bool pirq_needs_eoi_flag(unsigned irq)
  239. {
  240. struct irq_info *info = info_for_irq(irq);
  241. BUG_ON(info->type != IRQT_PIRQ);
  242. return info->u.pirq.flags & PIRQ_NEEDS_EOI;
  243. }
  244. static inline unsigned long active_evtchns(unsigned int cpu,
  245. struct shared_info *sh,
  246. unsigned int idx)
  247. {
  248. return sh->evtchn_pending[idx] &
  249. per_cpu(cpu_evtchn_mask, cpu)[idx] &
  250. ~sh->evtchn_mask[idx];
  251. }
  252. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  253. {
  254. int irq = evtchn_to_irq[chn];
  255. BUG_ON(irq == -1);
  256. #ifdef CONFIG_SMP
  257. cpumask_copy(irq_to_desc(irq)->irq_data.affinity, cpumask_of(cpu));
  258. #endif
  259. clear_bit(chn, per_cpu(cpu_evtchn_mask, cpu_from_irq(irq)));
  260. set_bit(chn, per_cpu(cpu_evtchn_mask, cpu));
  261. info_for_irq(irq)->cpu = cpu;
  262. }
  263. static void init_evtchn_cpu_bindings(void)
  264. {
  265. int i;
  266. #ifdef CONFIG_SMP
  267. struct irq_info *info;
  268. /* By default all event channels notify CPU#0. */
  269. list_for_each_entry(info, &xen_irq_list_head, list) {
  270. struct irq_desc *desc = irq_to_desc(info->irq);
  271. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  272. }
  273. #endif
  274. for_each_possible_cpu(i)
  275. memset(per_cpu(cpu_evtchn_mask, i),
  276. (i == 0) ? ~0 : 0, sizeof(*per_cpu(cpu_evtchn_mask, i)));
  277. }
  278. static inline void clear_evtchn(int port)
  279. {
  280. struct shared_info *s = HYPERVISOR_shared_info;
  281. sync_clear_bit(port, &s->evtchn_pending[0]);
  282. }
  283. static inline void set_evtchn(int port)
  284. {
  285. struct shared_info *s = HYPERVISOR_shared_info;
  286. sync_set_bit(port, &s->evtchn_pending[0]);
  287. }
  288. static inline int test_evtchn(int port)
  289. {
  290. struct shared_info *s = HYPERVISOR_shared_info;
  291. return sync_test_bit(port, &s->evtchn_pending[0]);
  292. }
  293. /**
  294. * notify_remote_via_irq - send event to remote end of event channel via irq
  295. * @irq: irq of event channel to send event to
  296. *
  297. * Unlike notify_remote_via_evtchn(), this is safe to use across
  298. * save/restore. Notifications on a broken connection are silently
  299. * dropped.
  300. */
  301. void notify_remote_via_irq(int irq)
  302. {
  303. int evtchn = evtchn_from_irq(irq);
  304. if (VALID_EVTCHN(evtchn))
  305. notify_remote_via_evtchn(evtchn);
  306. }
  307. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  308. static void mask_evtchn(int port)
  309. {
  310. struct shared_info *s = HYPERVISOR_shared_info;
  311. sync_set_bit(port, &s->evtchn_mask[0]);
  312. }
  313. static void unmask_evtchn(int port)
  314. {
  315. struct shared_info *s = HYPERVISOR_shared_info;
  316. unsigned int cpu = get_cpu();
  317. int do_hypercall = 0, evtchn_pending = 0;
  318. BUG_ON(!irqs_disabled());
  319. if (unlikely((cpu != cpu_from_evtchn(port))))
  320. do_hypercall = 1;
  321. else
  322. evtchn_pending = sync_test_bit(port, &s->evtchn_pending[0]);
  323. if (unlikely(evtchn_pending && xen_hvm_domain()))
  324. do_hypercall = 1;
  325. /* Slow path (hypercall) if this is a non-local port or if this is
  326. * an hvm domain and an event is pending (hvm domains don't have
  327. * their own implementation of irq_enable). */
  328. if (do_hypercall) {
  329. struct evtchn_unmask unmask = { .port = port };
  330. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  331. } else {
  332. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  333. sync_clear_bit(port, &s->evtchn_mask[0]);
  334. /*
  335. * The following is basically the equivalent of
  336. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  337. * the interrupt edge' if the channel is masked.
  338. */
  339. if (evtchn_pending &&
  340. !sync_test_and_set_bit(port / BITS_PER_LONG,
  341. &vcpu_info->evtchn_pending_sel))
  342. vcpu_info->evtchn_upcall_pending = 1;
  343. }
  344. put_cpu();
  345. }
  346. static void xen_irq_init(unsigned irq)
  347. {
  348. struct irq_info *info;
  349. #ifdef CONFIG_SMP
  350. struct irq_desc *desc = irq_to_desc(irq);
  351. /* By default all event channels notify CPU#0. */
  352. cpumask_copy(desc->irq_data.affinity, cpumask_of(0));
  353. #endif
  354. info = kzalloc(sizeof(*info), GFP_KERNEL);
  355. if (info == NULL)
  356. panic("Unable to allocate metadata for IRQ%d\n", irq);
  357. info->type = IRQT_UNBOUND;
  358. info->refcnt = -1;
  359. irq_set_handler_data(irq, info);
  360. list_add_tail(&info->list, &xen_irq_list_head);
  361. }
  362. static int __must_check xen_allocate_irq_dynamic(void)
  363. {
  364. int first = 0;
  365. int irq;
  366. #ifdef CONFIG_X86_IO_APIC
  367. /*
  368. * For an HVM guest or domain 0 which see "real" (emulated or
  369. * actual respectively) GSIs we allocate dynamic IRQs
  370. * e.g. those corresponding to event channels or MSIs
  371. * etc. from the range above those "real" GSIs to avoid
  372. * collisions.
  373. */
  374. if (xen_initial_domain() || xen_hvm_domain())
  375. first = get_nr_irqs_gsi();
  376. #endif
  377. irq = irq_alloc_desc_from(first, -1);
  378. if (irq >= 0)
  379. xen_irq_init(irq);
  380. return irq;
  381. }
  382. static int __must_check xen_allocate_irq_gsi(unsigned gsi)
  383. {
  384. int irq;
  385. /*
  386. * A PV guest has no concept of a GSI (since it has no ACPI
  387. * nor access to/knowledge of the physical APICs). Therefore
  388. * all IRQs are dynamically allocated from the entire IRQ
  389. * space.
  390. */
  391. if (xen_pv_domain() && !xen_initial_domain())
  392. return xen_allocate_irq_dynamic();
  393. /* Legacy IRQ descriptors are already allocated by the arch. */
  394. if (gsi < NR_IRQS_LEGACY)
  395. irq = gsi;
  396. else
  397. irq = irq_alloc_desc_at(gsi, -1);
  398. xen_irq_init(irq);
  399. return irq;
  400. }
  401. static void xen_free_irq(unsigned irq)
  402. {
  403. struct irq_info *info = irq_get_handler_data(irq);
  404. list_del(&info->list);
  405. irq_set_handler_data(irq, NULL);
  406. WARN_ON(info->refcnt > 0);
  407. kfree(info);
  408. /* Legacy IRQ descriptors are managed by the arch. */
  409. if (irq < NR_IRQS_LEGACY)
  410. return;
  411. irq_free_desc(irq);
  412. }
  413. static void pirq_query_unmask(int irq)
  414. {
  415. struct physdev_irq_status_query irq_status;
  416. struct irq_info *info = info_for_irq(irq);
  417. BUG_ON(info->type != IRQT_PIRQ);
  418. irq_status.irq = pirq_from_irq(irq);
  419. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  420. irq_status.flags = 0;
  421. info->u.pirq.flags &= ~PIRQ_NEEDS_EOI;
  422. if (irq_status.flags & XENIRQSTAT_needs_eoi)
  423. info->u.pirq.flags |= PIRQ_NEEDS_EOI;
  424. }
  425. static bool probing_irq(int irq)
  426. {
  427. struct irq_desc *desc = irq_to_desc(irq);
  428. return desc && desc->action == NULL;
  429. }
  430. static void eoi_pirq(struct irq_data *data)
  431. {
  432. int evtchn = evtchn_from_irq(data->irq);
  433. struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) };
  434. int rc = 0;
  435. irq_move_irq(data);
  436. if (VALID_EVTCHN(evtchn))
  437. clear_evtchn(evtchn);
  438. if (pirq_needs_eoi(data->irq)) {
  439. rc = HYPERVISOR_physdev_op(PHYSDEVOP_eoi, &eoi);
  440. WARN_ON(rc);
  441. }
  442. }
  443. static void mask_ack_pirq(struct irq_data *data)
  444. {
  445. disable_dynirq(data);
  446. eoi_pirq(data);
  447. }
  448. static unsigned int __startup_pirq(unsigned int irq)
  449. {
  450. struct evtchn_bind_pirq bind_pirq;
  451. struct irq_info *info = info_for_irq(irq);
  452. int evtchn = evtchn_from_irq(irq);
  453. int rc;
  454. BUG_ON(info->type != IRQT_PIRQ);
  455. if (VALID_EVTCHN(evtchn))
  456. goto out;
  457. bind_pirq.pirq = pirq_from_irq(irq);
  458. /* NB. We are happy to share unless we are probing. */
  459. bind_pirq.flags = info->u.pirq.flags & PIRQ_SHAREABLE ?
  460. BIND_PIRQ__WILL_SHARE : 0;
  461. rc = HYPERVISOR_event_channel_op(EVTCHNOP_bind_pirq, &bind_pirq);
  462. if (rc != 0) {
  463. if (!probing_irq(irq))
  464. printk(KERN_INFO "Failed to obtain physical IRQ %d\n",
  465. irq);
  466. return 0;
  467. }
  468. evtchn = bind_pirq.port;
  469. pirq_query_unmask(irq);
  470. evtchn_to_irq[evtchn] = irq;
  471. bind_evtchn_to_cpu(evtchn, 0);
  472. info->evtchn = evtchn;
  473. out:
  474. unmask_evtchn(evtchn);
  475. eoi_pirq(irq_get_irq_data(irq));
  476. return 0;
  477. }
  478. static unsigned int startup_pirq(struct irq_data *data)
  479. {
  480. return __startup_pirq(data->irq);
  481. }
  482. static void shutdown_pirq(struct irq_data *data)
  483. {
  484. struct evtchn_close close;
  485. unsigned int irq = data->irq;
  486. struct irq_info *info = info_for_irq(irq);
  487. int evtchn = evtchn_from_irq(irq);
  488. BUG_ON(info->type != IRQT_PIRQ);
  489. if (!VALID_EVTCHN(evtchn))
  490. return;
  491. mask_evtchn(evtchn);
  492. close.port = evtchn;
  493. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  494. BUG();
  495. bind_evtchn_to_cpu(evtchn, 0);
  496. evtchn_to_irq[evtchn] = -1;
  497. info->evtchn = 0;
  498. }
  499. static void enable_pirq(struct irq_data *data)
  500. {
  501. startup_pirq(data);
  502. }
  503. static void disable_pirq(struct irq_data *data)
  504. {
  505. disable_dynirq(data);
  506. }
  507. int xen_irq_from_gsi(unsigned gsi)
  508. {
  509. struct irq_info *info;
  510. list_for_each_entry(info, &xen_irq_list_head, list) {
  511. if (info->type != IRQT_PIRQ)
  512. continue;
  513. if (info->u.pirq.gsi == gsi)
  514. return info->irq;
  515. }
  516. return -1;
  517. }
  518. EXPORT_SYMBOL_GPL(xen_irq_from_gsi);
  519. /*
  520. * Do not make any assumptions regarding the relationship between the
  521. * IRQ number returned here and the Xen pirq argument.
  522. *
  523. * Note: We don't assign an event channel until the irq actually started
  524. * up. Return an existing irq if we've already got one for the gsi.
  525. *
  526. * Shareable implies level triggered, not shareable implies edge
  527. * triggered here.
  528. */
  529. int xen_bind_pirq_gsi_to_irq(unsigned gsi,
  530. unsigned pirq, int shareable, char *name)
  531. {
  532. int irq = -1;
  533. struct physdev_irq irq_op;
  534. mutex_lock(&irq_mapping_update_lock);
  535. irq = xen_irq_from_gsi(gsi);
  536. if (irq != -1) {
  537. printk(KERN_INFO "xen_map_pirq_gsi: returning irq %d for gsi %u\n",
  538. irq, gsi);
  539. goto out;
  540. }
  541. irq = xen_allocate_irq_gsi(gsi);
  542. if (irq < 0)
  543. goto out;
  544. irq_op.irq = irq;
  545. irq_op.vector = 0;
  546. /* Only the privileged domain can do this. For non-priv, the pcifront
  547. * driver provides a PCI bus that does the call to do exactly
  548. * this in the priv domain. */
  549. if (xen_initial_domain() &&
  550. HYPERVISOR_physdev_op(PHYSDEVOP_alloc_irq_vector, &irq_op)) {
  551. xen_free_irq(irq);
  552. irq = -ENOSPC;
  553. goto out;
  554. }
  555. xen_irq_info_pirq_init(irq, 0, pirq, gsi, irq_op.vector, DOMID_SELF,
  556. shareable ? PIRQ_SHAREABLE : 0);
  557. pirq_query_unmask(irq);
  558. /* We try to use the handler with the appropriate semantic for the
  559. * type of interrupt: if the interrupt is an edge triggered
  560. * interrupt we use handle_edge_irq.
  561. *
  562. * On the other hand if the interrupt is level triggered we use
  563. * handle_fasteoi_irq like the native code does for this kind of
  564. * interrupts.
  565. *
  566. * Depending on the Xen version, pirq_needs_eoi might return true
  567. * not only for level triggered interrupts but for edge triggered
  568. * interrupts too. In any case Xen always honors the eoi mechanism,
  569. * not injecting any more pirqs of the same kind if the first one
  570. * hasn't received an eoi yet. Therefore using the fasteoi handler
  571. * is the right choice either way.
  572. */
  573. if (shareable)
  574. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  575. handle_fasteoi_irq, name);
  576. else
  577. irq_set_chip_and_handler_name(irq, &xen_pirq_chip,
  578. handle_edge_irq, name);
  579. out:
  580. mutex_unlock(&irq_mapping_update_lock);
  581. return irq;
  582. }
  583. #ifdef CONFIG_PCI_MSI
  584. int xen_allocate_pirq_msi(struct pci_dev *dev, struct msi_desc *msidesc)
  585. {
  586. int rc;
  587. struct physdev_get_free_pirq op_get_free_pirq;
  588. op_get_free_pirq.type = MAP_PIRQ_TYPE_MSI;
  589. rc = HYPERVISOR_physdev_op(PHYSDEVOP_get_free_pirq, &op_get_free_pirq);
  590. WARN_ONCE(rc == -ENOSYS,
  591. "hypervisor does not support the PHYSDEVOP_get_free_pirq interface\n");
  592. return rc ? -1 : op_get_free_pirq.pirq;
  593. }
  594. int xen_bind_pirq_msi_to_irq(struct pci_dev *dev, struct msi_desc *msidesc,
  595. int pirq, int vector, const char *name,
  596. domid_t domid)
  597. {
  598. int irq, ret;
  599. mutex_lock(&irq_mapping_update_lock);
  600. irq = xen_allocate_irq_dynamic();
  601. if (irq < 0)
  602. goto out;
  603. irq_set_chip_and_handler_name(irq, &xen_pirq_chip, handle_edge_irq,
  604. name);
  605. xen_irq_info_pirq_init(irq, 0, pirq, 0, vector, domid, 0);
  606. ret = irq_set_msi_desc(irq, msidesc);
  607. if (ret < 0)
  608. goto error_irq;
  609. out:
  610. mutex_unlock(&irq_mapping_update_lock);
  611. return irq;
  612. error_irq:
  613. mutex_unlock(&irq_mapping_update_lock);
  614. xen_free_irq(irq);
  615. return ret;
  616. }
  617. #endif
  618. int xen_destroy_irq(int irq)
  619. {
  620. struct irq_desc *desc;
  621. struct physdev_unmap_pirq unmap_irq;
  622. struct irq_info *info = info_for_irq(irq);
  623. int rc = -ENOENT;
  624. mutex_lock(&irq_mapping_update_lock);
  625. desc = irq_to_desc(irq);
  626. if (!desc)
  627. goto out;
  628. if (xen_initial_domain()) {
  629. unmap_irq.pirq = info->u.pirq.pirq;
  630. unmap_irq.domid = info->u.pirq.domid;
  631. rc = HYPERVISOR_physdev_op(PHYSDEVOP_unmap_pirq, &unmap_irq);
  632. /* If another domain quits without making the pci_disable_msix
  633. * call, the Xen hypervisor takes care of freeing the PIRQs
  634. * (free_domain_pirqs).
  635. */
  636. if ((rc == -ESRCH && info->u.pirq.domid != DOMID_SELF))
  637. printk(KERN_INFO "domain %d does not have %d anymore\n",
  638. info->u.pirq.domid, info->u.pirq.pirq);
  639. else if (rc) {
  640. printk(KERN_WARNING "unmap irq failed %d\n", rc);
  641. goto out;
  642. }
  643. }
  644. xen_free_irq(irq);
  645. out:
  646. mutex_unlock(&irq_mapping_update_lock);
  647. return rc;
  648. }
  649. int xen_irq_from_pirq(unsigned pirq)
  650. {
  651. int irq;
  652. struct irq_info *info;
  653. mutex_lock(&irq_mapping_update_lock);
  654. list_for_each_entry(info, &xen_irq_list_head, list) {
  655. if (info->type != IRQT_PIRQ)
  656. continue;
  657. irq = info->irq;
  658. if (info->u.pirq.pirq == pirq)
  659. goto out;
  660. }
  661. irq = -1;
  662. out:
  663. mutex_unlock(&irq_mapping_update_lock);
  664. return irq;
  665. }
  666. int xen_pirq_from_irq(unsigned irq)
  667. {
  668. return pirq_from_irq(irq);
  669. }
  670. EXPORT_SYMBOL_GPL(xen_pirq_from_irq);
  671. int bind_evtchn_to_irq(unsigned int evtchn)
  672. {
  673. int irq;
  674. mutex_lock(&irq_mapping_update_lock);
  675. irq = evtchn_to_irq[evtchn];
  676. if (irq == -1) {
  677. irq = xen_allocate_irq_dynamic();
  678. if (irq == -1)
  679. goto out;
  680. irq_set_chip_and_handler_name(irq, &xen_dynamic_chip,
  681. handle_edge_irq, "event");
  682. xen_irq_info_evtchn_init(irq, evtchn);
  683. } else {
  684. struct irq_info *info = info_for_irq(irq);
  685. WARN_ON(info == NULL || info->type != IRQT_EVTCHN);
  686. }
  687. irq_clear_status_flags(irq, IRQ_NOREQUEST|IRQ_NOAUTOEN);
  688. out:
  689. mutex_unlock(&irq_mapping_update_lock);
  690. return irq;
  691. }
  692. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  693. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  694. {
  695. struct evtchn_bind_ipi bind_ipi;
  696. int evtchn, irq;
  697. mutex_lock(&irq_mapping_update_lock);
  698. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  699. if (irq == -1) {
  700. irq = xen_allocate_irq_dynamic();
  701. if (irq < 0)
  702. goto out;
  703. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  704. handle_percpu_irq, "ipi");
  705. bind_ipi.vcpu = cpu;
  706. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  707. &bind_ipi) != 0)
  708. BUG();
  709. evtchn = bind_ipi.port;
  710. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  711. bind_evtchn_to_cpu(evtchn, cpu);
  712. } else {
  713. struct irq_info *info = info_for_irq(irq);
  714. WARN_ON(info == NULL || info->type != IRQT_IPI);
  715. }
  716. out:
  717. mutex_unlock(&irq_mapping_update_lock);
  718. return irq;
  719. }
  720. static int bind_interdomain_evtchn_to_irq(unsigned int remote_domain,
  721. unsigned int remote_port)
  722. {
  723. struct evtchn_bind_interdomain bind_interdomain;
  724. int err;
  725. bind_interdomain.remote_dom = remote_domain;
  726. bind_interdomain.remote_port = remote_port;
  727. err = HYPERVISOR_event_channel_op(EVTCHNOP_bind_interdomain,
  728. &bind_interdomain);
  729. return err ? : bind_evtchn_to_irq(bind_interdomain.local_port);
  730. }
  731. static int find_virq(unsigned int virq, unsigned int cpu)
  732. {
  733. struct evtchn_status status;
  734. int port, rc = -ENOENT;
  735. memset(&status, 0, sizeof(status));
  736. for (port = 0; port <= NR_EVENT_CHANNELS; port++) {
  737. status.dom = DOMID_SELF;
  738. status.port = port;
  739. rc = HYPERVISOR_event_channel_op(EVTCHNOP_status, &status);
  740. if (rc < 0)
  741. continue;
  742. if (status.status != EVTCHNSTAT_virq)
  743. continue;
  744. if (status.u.virq == virq && status.vcpu == cpu) {
  745. rc = port;
  746. break;
  747. }
  748. }
  749. return rc;
  750. }
  751. int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  752. {
  753. struct evtchn_bind_virq bind_virq;
  754. int evtchn, irq, ret;
  755. mutex_lock(&irq_mapping_update_lock);
  756. irq = per_cpu(virq_to_irq, cpu)[virq];
  757. if (irq == -1) {
  758. irq = xen_allocate_irq_dynamic();
  759. if (irq == -1)
  760. goto out;
  761. irq_set_chip_and_handler_name(irq, &xen_percpu_chip,
  762. handle_percpu_irq, "virq");
  763. bind_virq.virq = virq;
  764. bind_virq.vcpu = cpu;
  765. ret = HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  766. &bind_virq);
  767. if (ret == 0)
  768. evtchn = bind_virq.port;
  769. else {
  770. if (ret == -EEXIST)
  771. ret = find_virq(virq, cpu);
  772. BUG_ON(ret < 0);
  773. evtchn = ret;
  774. }
  775. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  776. bind_evtchn_to_cpu(evtchn, cpu);
  777. } else {
  778. struct irq_info *info = info_for_irq(irq);
  779. WARN_ON(info == NULL || info->type != IRQT_VIRQ);
  780. }
  781. out:
  782. mutex_unlock(&irq_mapping_update_lock);
  783. return irq;
  784. }
  785. static void unbind_from_irq(unsigned int irq)
  786. {
  787. struct evtchn_close close;
  788. int evtchn = evtchn_from_irq(irq);
  789. struct irq_info *info = irq_get_handler_data(irq);
  790. mutex_lock(&irq_mapping_update_lock);
  791. if (info->refcnt > 0) {
  792. info->refcnt--;
  793. if (info->refcnt != 0)
  794. goto done;
  795. }
  796. if (VALID_EVTCHN(evtchn)) {
  797. close.port = evtchn;
  798. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  799. BUG();
  800. switch (type_from_irq(irq)) {
  801. case IRQT_VIRQ:
  802. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  803. [virq_from_irq(irq)] = -1;
  804. break;
  805. case IRQT_IPI:
  806. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  807. [ipi_from_irq(irq)] = -1;
  808. break;
  809. default:
  810. break;
  811. }
  812. /* Closed ports are implicitly re-bound to VCPU0. */
  813. bind_evtchn_to_cpu(evtchn, 0);
  814. evtchn_to_irq[evtchn] = -1;
  815. }
  816. BUG_ON(info_for_irq(irq)->type == IRQT_UNBOUND);
  817. xen_free_irq(irq);
  818. done:
  819. mutex_unlock(&irq_mapping_update_lock);
  820. }
  821. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  822. irq_handler_t handler,
  823. unsigned long irqflags,
  824. const char *devname, void *dev_id)
  825. {
  826. int irq, retval;
  827. irq = bind_evtchn_to_irq(evtchn);
  828. if (irq < 0)
  829. return irq;
  830. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  831. if (retval != 0) {
  832. unbind_from_irq(irq);
  833. return retval;
  834. }
  835. return irq;
  836. }
  837. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  838. int bind_interdomain_evtchn_to_irqhandler(unsigned int remote_domain,
  839. unsigned int remote_port,
  840. irq_handler_t handler,
  841. unsigned long irqflags,
  842. const char *devname,
  843. void *dev_id)
  844. {
  845. int irq, retval;
  846. irq = bind_interdomain_evtchn_to_irq(remote_domain, remote_port);
  847. if (irq < 0)
  848. return irq;
  849. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  850. if (retval != 0) {
  851. unbind_from_irq(irq);
  852. return retval;
  853. }
  854. return irq;
  855. }
  856. EXPORT_SYMBOL_GPL(bind_interdomain_evtchn_to_irqhandler);
  857. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  858. irq_handler_t handler,
  859. unsigned long irqflags, const char *devname, void *dev_id)
  860. {
  861. int irq, retval;
  862. irq = bind_virq_to_irq(virq, cpu);
  863. if (irq < 0)
  864. return irq;
  865. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  866. if (retval != 0) {
  867. unbind_from_irq(irq);
  868. return retval;
  869. }
  870. return irq;
  871. }
  872. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  873. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  874. unsigned int cpu,
  875. irq_handler_t handler,
  876. unsigned long irqflags,
  877. const char *devname,
  878. void *dev_id)
  879. {
  880. int irq, retval;
  881. irq = bind_ipi_to_irq(ipi, cpu);
  882. if (irq < 0)
  883. return irq;
  884. irqflags |= IRQF_NO_SUSPEND | IRQF_FORCE_RESUME | IRQF_EARLY_RESUME;
  885. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  886. if (retval != 0) {
  887. unbind_from_irq(irq);
  888. return retval;
  889. }
  890. return irq;
  891. }
  892. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  893. {
  894. free_irq(irq, dev_id);
  895. unbind_from_irq(irq);
  896. }
  897. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  898. int evtchn_make_refcounted(unsigned int evtchn)
  899. {
  900. int irq = evtchn_to_irq[evtchn];
  901. struct irq_info *info;
  902. if (irq == -1)
  903. return -ENOENT;
  904. info = irq_get_handler_data(irq);
  905. if (!info)
  906. return -ENOENT;
  907. WARN_ON(info->refcnt != -1);
  908. info->refcnt = 1;
  909. return 0;
  910. }
  911. EXPORT_SYMBOL_GPL(evtchn_make_refcounted);
  912. int evtchn_get(unsigned int evtchn)
  913. {
  914. int irq;
  915. struct irq_info *info;
  916. int err = -ENOENT;
  917. if (evtchn >= NR_EVENT_CHANNELS)
  918. return -EINVAL;
  919. mutex_lock(&irq_mapping_update_lock);
  920. irq = evtchn_to_irq[evtchn];
  921. if (irq == -1)
  922. goto done;
  923. info = irq_get_handler_data(irq);
  924. if (!info)
  925. goto done;
  926. err = -EINVAL;
  927. if (info->refcnt <= 0)
  928. goto done;
  929. info->refcnt++;
  930. err = 0;
  931. done:
  932. mutex_unlock(&irq_mapping_update_lock);
  933. return err;
  934. }
  935. EXPORT_SYMBOL_GPL(evtchn_get);
  936. void evtchn_put(unsigned int evtchn)
  937. {
  938. int irq = evtchn_to_irq[evtchn];
  939. if (WARN_ON(irq == -1))
  940. return;
  941. unbind_from_irq(irq);
  942. }
  943. EXPORT_SYMBOL_GPL(evtchn_put);
  944. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  945. {
  946. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  947. BUG_ON(irq < 0);
  948. notify_remote_via_irq(irq);
  949. }
  950. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  951. {
  952. struct shared_info *sh = HYPERVISOR_shared_info;
  953. int cpu = smp_processor_id();
  954. unsigned long *cpu_evtchn = per_cpu(cpu_evtchn_mask, cpu);
  955. int i;
  956. unsigned long flags;
  957. static DEFINE_SPINLOCK(debug_lock);
  958. struct vcpu_info *v;
  959. spin_lock_irqsave(&debug_lock, flags);
  960. printk("\nvcpu %d\n ", cpu);
  961. for_each_online_cpu(i) {
  962. int pending;
  963. v = per_cpu(xen_vcpu, i);
  964. pending = (get_irq_regs() && i == cpu)
  965. ? xen_irqs_disabled(get_irq_regs())
  966. : v->evtchn_upcall_mask;
  967. printk("%d: masked=%d pending=%d event_sel %0*lx\n ", i,
  968. pending, v->evtchn_upcall_pending,
  969. (int)(sizeof(v->evtchn_pending_sel)*2),
  970. v->evtchn_pending_sel);
  971. }
  972. v = per_cpu(xen_vcpu, cpu);
  973. printk("\npending:\n ");
  974. for (i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  975. printk("%0*lx%s", (int)sizeof(sh->evtchn_pending[0])*2,
  976. sh->evtchn_pending[i],
  977. i % 8 == 0 ? "\n " : " ");
  978. printk("\nglobal mask:\n ");
  979. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  980. printk("%0*lx%s",
  981. (int)(sizeof(sh->evtchn_mask[0])*2),
  982. sh->evtchn_mask[i],
  983. i % 8 == 0 ? "\n " : " ");
  984. printk("\nglobally unmasked:\n ");
  985. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  986. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  987. sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  988. i % 8 == 0 ? "\n " : " ");
  989. printk("\nlocal cpu%d mask:\n ", cpu);
  990. for (i = (NR_EVENT_CHANNELS/BITS_PER_LONG)-1; i >= 0; i--)
  991. printk("%0*lx%s", (int)(sizeof(cpu_evtchn[0])*2),
  992. cpu_evtchn[i],
  993. i % 8 == 0 ? "\n " : " ");
  994. printk("\nlocally unmasked:\n ");
  995. for (i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--) {
  996. unsigned long pending = sh->evtchn_pending[i]
  997. & ~sh->evtchn_mask[i]
  998. & cpu_evtchn[i];
  999. printk("%0*lx%s", (int)(sizeof(sh->evtchn_mask[0])*2),
  1000. pending, i % 8 == 0 ? "\n " : " ");
  1001. }
  1002. printk("\npending list:\n");
  1003. for (i = 0; i < NR_EVENT_CHANNELS; i++) {
  1004. if (sync_test_bit(i, sh->evtchn_pending)) {
  1005. int word_idx = i / BITS_PER_LONG;
  1006. printk(" %d: event %d -> irq %d%s%s%s\n",
  1007. cpu_from_evtchn(i), i,
  1008. evtchn_to_irq[i],
  1009. sync_test_bit(word_idx, &v->evtchn_pending_sel)
  1010. ? "" : " l2-clear",
  1011. !sync_test_bit(i, sh->evtchn_mask)
  1012. ? "" : " globally-masked",
  1013. sync_test_bit(i, cpu_evtchn)
  1014. ? "" : " locally-masked");
  1015. }
  1016. }
  1017. spin_unlock_irqrestore(&debug_lock, flags);
  1018. return IRQ_HANDLED;
  1019. }
  1020. static DEFINE_PER_CPU(unsigned, xed_nesting_count);
  1021. static DEFINE_PER_CPU(unsigned int, current_word_idx);
  1022. static DEFINE_PER_CPU(unsigned int, current_bit_idx);
  1023. /*
  1024. * Mask out the i least significant bits of w
  1025. */
  1026. #define MASK_LSBS(w, i) (w & ((~0UL) << i))
  1027. /*
  1028. * Search the CPUs pending events bitmasks. For each one found, map
  1029. * the event number to an irq, and feed it into do_IRQ() for
  1030. * handling.
  1031. *
  1032. * Xen uses a two-level bitmap to speed searching. The first level is
  1033. * a bitset of words which contain pending event bits. The second
  1034. * level is a bitset of pending events themselves.
  1035. */
  1036. static void __xen_evtchn_do_upcall(void)
  1037. {
  1038. int start_word_idx, start_bit_idx;
  1039. int word_idx, bit_idx;
  1040. int i;
  1041. int cpu = get_cpu();
  1042. struct shared_info *s = HYPERVISOR_shared_info;
  1043. struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
  1044. unsigned count;
  1045. do {
  1046. unsigned long pending_words;
  1047. vcpu_info->evtchn_upcall_pending = 0;
  1048. if (__this_cpu_inc_return(xed_nesting_count) - 1)
  1049. goto out;
  1050. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  1051. /* Clear master flag /before/ clearing selector flag. */
  1052. wmb();
  1053. #endif
  1054. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  1055. start_word_idx = __this_cpu_read(current_word_idx);
  1056. start_bit_idx = __this_cpu_read(current_bit_idx);
  1057. word_idx = start_word_idx;
  1058. for (i = 0; pending_words != 0; i++) {
  1059. unsigned long pending_bits;
  1060. unsigned long words;
  1061. words = MASK_LSBS(pending_words, word_idx);
  1062. /*
  1063. * If we masked out all events, wrap to beginning.
  1064. */
  1065. if (words == 0) {
  1066. word_idx = 0;
  1067. bit_idx = 0;
  1068. continue;
  1069. }
  1070. word_idx = __ffs(words);
  1071. pending_bits = active_evtchns(cpu, s, word_idx);
  1072. bit_idx = 0; /* usually scan entire word from start */
  1073. if (word_idx == start_word_idx) {
  1074. /* We scan the starting word in two parts */
  1075. if (i == 0)
  1076. /* 1st time: start in the middle */
  1077. bit_idx = start_bit_idx;
  1078. else
  1079. /* 2nd time: mask bits done already */
  1080. bit_idx &= (1UL << start_bit_idx) - 1;
  1081. }
  1082. do {
  1083. unsigned long bits;
  1084. int port, irq;
  1085. struct irq_desc *desc;
  1086. bits = MASK_LSBS(pending_bits, bit_idx);
  1087. /* If we masked out all events, move on. */
  1088. if (bits == 0)
  1089. break;
  1090. bit_idx = __ffs(bits);
  1091. /* Process port. */
  1092. port = (word_idx * BITS_PER_LONG) + bit_idx;
  1093. irq = evtchn_to_irq[port];
  1094. if (irq != -1) {
  1095. desc = irq_to_desc(irq);
  1096. if (desc)
  1097. generic_handle_irq_desc(irq, desc);
  1098. }
  1099. bit_idx = (bit_idx + 1) % BITS_PER_LONG;
  1100. /* Next caller starts at last processed + 1 */
  1101. __this_cpu_write(current_word_idx,
  1102. bit_idx ? word_idx :
  1103. (word_idx+1) % BITS_PER_LONG);
  1104. __this_cpu_write(current_bit_idx, bit_idx);
  1105. } while (bit_idx != 0);
  1106. /* Scan start_l1i twice; all others once. */
  1107. if ((word_idx != start_word_idx) || (i != 0))
  1108. pending_words &= ~(1UL << word_idx);
  1109. word_idx = (word_idx + 1) % BITS_PER_LONG;
  1110. }
  1111. BUG_ON(!irqs_disabled());
  1112. count = __this_cpu_read(xed_nesting_count);
  1113. __this_cpu_write(xed_nesting_count, 0);
  1114. } while (count != 1 || vcpu_info->evtchn_upcall_pending);
  1115. out:
  1116. put_cpu();
  1117. }
  1118. void xen_evtchn_do_upcall(struct pt_regs *regs)
  1119. {
  1120. struct pt_regs *old_regs = set_irq_regs(regs);
  1121. irq_enter();
  1122. #ifdef CONFIG_X86
  1123. exit_idle();
  1124. #endif
  1125. __xen_evtchn_do_upcall();
  1126. irq_exit();
  1127. set_irq_regs(old_regs);
  1128. }
  1129. void xen_hvm_evtchn_do_upcall(void)
  1130. {
  1131. __xen_evtchn_do_upcall();
  1132. }
  1133. EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
  1134. /* Rebind a new event channel to an existing irq. */
  1135. void rebind_evtchn_irq(int evtchn, int irq)
  1136. {
  1137. struct irq_info *info = info_for_irq(irq);
  1138. /* Make sure the irq is masked, since the new event channel
  1139. will also be masked. */
  1140. disable_irq(irq);
  1141. mutex_lock(&irq_mapping_update_lock);
  1142. /* After resume the irq<->evtchn mappings are all cleared out */
  1143. BUG_ON(evtchn_to_irq[evtchn] != -1);
  1144. /* Expect irq to have been bound before,
  1145. so there should be a proper type */
  1146. BUG_ON(info->type == IRQT_UNBOUND);
  1147. xen_irq_info_evtchn_init(irq, evtchn);
  1148. mutex_unlock(&irq_mapping_update_lock);
  1149. /* new event channels are always bound to cpu 0 */
  1150. irq_set_affinity(irq, cpumask_of(0));
  1151. /* Unmask the event channel. */
  1152. enable_irq(irq);
  1153. }
  1154. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  1155. static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  1156. {
  1157. struct evtchn_bind_vcpu bind_vcpu;
  1158. int evtchn = evtchn_from_irq(irq);
  1159. if (!VALID_EVTCHN(evtchn))
  1160. return -1;
  1161. /*
  1162. * Events delivered via platform PCI interrupts are always
  1163. * routed to vcpu 0 and hence cannot be rebound.
  1164. */
  1165. if (xen_hvm_domain() && !xen_have_vector_callback)
  1166. return -1;
  1167. /* Send future instances of this interrupt to other vcpu. */
  1168. bind_vcpu.port = evtchn;
  1169. bind_vcpu.vcpu = tcpu;
  1170. /*
  1171. * If this fails, it usually just indicates that we're dealing with a
  1172. * virq or IPI channel, which don't actually need to be rebound. Ignore
  1173. * it, but don't do the xenlinux-level rebind in that case.
  1174. */
  1175. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  1176. bind_evtchn_to_cpu(evtchn, tcpu);
  1177. return 0;
  1178. }
  1179. static int set_affinity_irq(struct irq_data *data, const struct cpumask *dest,
  1180. bool force)
  1181. {
  1182. unsigned tcpu = cpumask_first(dest);
  1183. return rebind_irq_to_cpu(data->irq, tcpu);
  1184. }
  1185. int resend_irq_on_evtchn(unsigned int irq)
  1186. {
  1187. int masked, evtchn = evtchn_from_irq(irq);
  1188. struct shared_info *s = HYPERVISOR_shared_info;
  1189. if (!VALID_EVTCHN(evtchn))
  1190. return 1;
  1191. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  1192. sync_set_bit(evtchn, s->evtchn_pending);
  1193. if (!masked)
  1194. unmask_evtchn(evtchn);
  1195. return 1;
  1196. }
  1197. static void enable_dynirq(struct irq_data *data)
  1198. {
  1199. int evtchn = evtchn_from_irq(data->irq);
  1200. if (VALID_EVTCHN(evtchn))
  1201. unmask_evtchn(evtchn);
  1202. }
  1203. static void disable_dynirq(struct irq_data *data)
  1204. {
  1205. int evtchn = evtchn_from_irq(data->irq);
  1206. if (VALID_EVTCHN(evtchn))
  1207. mask_evtchn(evtchn);
  1208. }
  1209. static void ack_dynirq(struct irq_data *data)
  1210. {
  1211. int evtchn = evtchn_from_irq(data->irq);
  1212. irq_move_irq(data);
  1213. if (VALID_EVTCHN(evtchn))
  1214. clear_evtchn(evtchn);
  1215. }
  1216. static void mask_ack_dynirq(struct irq_data *data)
  1217. {
  1218. disable_dynirq(data);
  1219. ack_dynirq(data);
  1220. }
  1221. static int retrigger_dynirq(struct irq_data *data)
  1222. {
  1223. int evtchn = evtchn_from_irq(data->irq);
  1224. struct shared_info *sh = HYPERVISOR_shared_info;
  1225. int ret = 0;
  1226. if (VALID_EVTCHN(evtchn)) {
  1227. int masked;
  1228. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  1229. sync_set_bit(evtchn, sh->evtchn_pending);
  1230. if (!masked)
  1231. unmask_evtchn(evtchn);
  1232. ret = 1;
  1233. }
  1234. return ret;
  1235. }
  1236. static void restore_pirqs(void)
  1237. {
  1238. int pirq, rc, irq, gsi;
  1239. struct physdev_map_pirq map_irq;
  1240. struct irq_info *info;
  1241. list_for_each_entry(info, &xen_irq_list_head, list) {
  1242. if (info->type != IRQT_PIRQ)
  1243. continue;
  1244. pirq = info->u.pirq.pirq;
  1245. gsi = info->u.pirq.gsi;
  1246. irq = info->irq;
  1247. /* save/restore of PT devices doesn't work, so at this point the
  1248. * only devices present are GSI based emulated devices */
  1249. if (!gsi)
  1250. continue;
  1251. map_irq.domid = DOMID_SELF;
  1252. map_irq.type = MAP_PIRQ_TYPE_GSI;
  1253. map_irq.index = gsi;
  1254. map_irq.pirq = pirq;
  1255. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  1256. if (rc) {
  1257. printk(KERN_WARNING "xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n",
  1258. gsi, irq, pirq, rc);
  1259. xen_free_irq(irq);
  1260. continue;
  1261. }
  1262. printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq);
  1263. __startup_pirq(irq);
  1264. }
  1265. }
  1266. static void restore_cpu_virqs(unsigned int cpu)
  1267. {
  1268. struct evtchn_bind_virq bind_virq;
  1269. int virq, irq, evtchn;
  1270. for (virq = 0; virq < NR_VIRQS; virq++) {
  1271. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  1272. continue;
  1273. BUG_ON(virq_from_irq(irq) != virq);
  1274. /* Get a new binding from Xen. */
  1275. bind_virq.virq = virq;
  1276. bind_virq.vcpu = cpu;
  1277. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  1278. &bind_virq) != 0)
  1279. BUG();
  1280. evtchn = bind_virq.port;
  1281. /* Record the new mapping. */
  1282. xen_irq_info_virq_init(cpu, irq, evtchn, virq);
  1283. bind_evtchn_to_cpu(evtchn, cpu);
  1284. }
  1285. }
  1286. static void restore_cpu_ipis(unsigned int cpu)
  1287. {
  1288. struct evtchn_bind_ipi bind_ipi;
  1289. int ipi, irq, evtchn;
  1290. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  1291. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  1292. continue;
  1293. BUG_ON(ipi_from_irq(irq) != ipi);
  1294. /* Get a new binding from Xen. */
  1295. bind_ipi.vcpu = cpu;
  1296. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  1297. &bind_ipi) != 0)
  1298. BUG();
  1299. evtchn = bind_ipi.port;
  1300. /* Record the new mapping. */
  1301. xen_irq_info_ipi_init(cpu, irq, evtchn, ipi);
  1302. bind_evtchn_to_cpu(evtchn, cpu);
  1303. }
  1304. }
  1305. /* Clear an irq's pending state, in preparation for polling on it */
  1306. void xen_clear_irq_pending(int irq)
  1307. {
  1308. int evtchn = evtchn_from_irq(irq);
  1309. if (VALID_EVTCHN(evtchn))
  1310. clear_evtchn(evtchn);
  1311. }
  1312. EXPORT_SYMBOL(xen_clear_irq_pending);
  1313. void xen_set_irq_pending(int irq)
  1314. {
  1315. int evtchn = evtchn_from_irq(irq);
  1316. if (VALID_EVTCHN(evtchn))
  1317. set_evtchn(evtchn);
  1318. }
  1319. bool xen_test_irq_pending(int irq)
  1320. {
  1321. int evtchn = evtchn_from_irq(irq);
  1322. bool ret = false;
  1323. if (VALID_EVTCHN(evtchn))
  1324. ret = test_evtchn(evtchn);
  1325. return ret;
  1326. }
  1327. /* Poll waiting for an irq to become pending with timeout. In the usual case,
  1328. * the irq will be disabled so it won't deliver an interrupt. */
  1329. void xen_poll_irq_timeout(int irq, u64 timeout)
  1330. {
  1331. evtchn_port_t evtchn = evtchn_from_irq(irq);
  1332. if (VALID_EVTCHN(evtchn)) {
  1333. struct sched_poll poll;
  1334. poll.nr_ports = 1;
  1335. poll.timeout = timeout;
  1336. set_xen_guest_handle(poll.ports, &evtchn);
  1337. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  1338. BUG();
  1339. }
  1340. }
  1341. EXPORT_SYMBOL(xen_poll_irq_timeout);
  1342. /* Poll waiting for an irq to become pending. In the usual case, the
  1343. * irq will be disabled so it won't deliver an interrupt. */
  1344. void xen_poll_irq(int irq)
  1345. {
  1346. xen_poll_irq_timeout(irq, 0 /* no timeout */);
  1347. }
  1348. /* Check whether the IRQ line is shared with other guests. */
  1349. int xen_test_irq_shared(int irq)
  1350. {
  1351. struct irq_info *info = info_for_irq(irq);
  1352. struct physdev_irq_status_query irq_status = { .irq = info->u.pirq.pirq };
  1353. if (HYPERVISOR_physdev_op(PHYSDEVOP_irq_status_query, &irq_status))
  1354. return 0;
  1355. return !(irq_status.flags & XENIRQSTAT_shared);
  1356. }
  1357. EXPORT_SYMBOL_GPL(xen_test_irq_shared);
  1358. void xen_irq_resume(void)
  1359. {
  1360. unsigned int cpu, evtchn;
  1361. struct irq_info *info;
  1362. init_evtchn_cpu_bindings();
  1363. /* New event-channel space is not 'live' yet. */
  1364. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1365. mask_evtchn(evtchn);
  1366. /* No IRQ <-> event-channel mappings. */
  1367. list_for_each_entry(info, &xen_irq_list_head, list)
  1368. info->evtchn = 0; /* zap event-channel binding */
  1369. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  1370. evtchn_to_irq[evtchn] = -1;
  1371. for_each_possible_cpu(cpu) {
  1372. restore_cpu_virqs(cpu);
  1373. restore_cpu_ipis(cpu);
  1374. }
  1375. restore_pirqs();
  1376. }
  1377. static struct irq_chip xen_dynamic_chip __read_mostly = {
  1378. .name = "xen-dyn",
  1379. .irq_disable = disable_dynirq,
  1380. .irq_mask = disable_dynirq,
  1381. .irq_unmask = enable_dynirq,
  1382. .irq_ack = ack_dynirq,
  1383. .irq_mask_ack = mask_ack_dynirq,
  1384. .irq_set_affinity = set_affinity_irq,
  1385. .irq_retrigger = retrigger_dynirq,
  1386. };
  1387. static struct irq_chip xen_pirq_chip __read_mostly = {
  1388. .name = "xen-pirq",
  1389. .irq_startup = startup_pirq,
  1390. .irq_shutdown = shutdown_pirq,
  1391. .irq_enable = enable_pirq,
  1392. .irq_disable = disable_pirq,
  1393. .irq_mask = disable_dynirq,
  1394. .irq_unmask = enable_dynirq,
  1395. .irq_ack = eoi_pirq,
  1396. .irq_eoi = eoi_pirq,
  1397. .irq_mask_ack = mask_ack_pirq,
  1398. .irq_set_affinity = set_affinity_irq,
  1399. .irq_retrigger = retrigger_dynirq,
  1400. };
  1401. static struct irq_chip xen_percpu_chip __read_mostly = {
  1402. .name = "xen-percpu",
  1403. .irq_disable = disable_dynirq,
  1404. .irq_mask = disable_dynirq,
  1405. .irq_unmask = enable_dynirq,
  1406. .irq_ack = ack_dynirq,
  1407. };
  1408. int xen_set_callback_via(uint64_t via)
  1409. {
  1410. struct xen_hvm_param a;
  1411. a.domid = DOMID_SELF;
  1412. a.index = HVM_PARAM_CALLBACK_IRQ;
  1413. a.value = via;
  1414. return HYPERVISOR_hvm_op(HVMOP_set_param, &a);
  1415. }
  1416. EXPORT_SYMBOL_GPL(xen_set_callback_via);
  1417. #ifdef CONFIG_XEN_PVHVM
  1418. /* Vector callbacks are better than PCI interrupts to receive event
  1419. * channel notifications because we can receive vector callbacks on any
  1420. * vcpu and we don't need PCI support or APIC interactions. */
  1421. void xen_callback_vector(void)
  1422. {
  1423. int rc;
  1424. uint64_t callback_via;
  1425. if (xen_have_vector_callback) {
  1426. callback_via = HVM_CALLBACK_VECTOR(XEN_HVM_EVTCHN_CALLBACK);
  1427. rc = xen_set_callback_via(callback_via);
  1428. if (rc) {
  1429. printk(KERN_ERR "Request for Xen HVM callback vector"
  1430. " failed.\n");
  1431. xen_have_vector_callback = 0;
  1432. return;
  1433. }
  1434. printk(KERN_INFO "Xen HVM callback vector for event delivery is "
  1435. "enabled\n");
  1436. /* in the restore case the vector has already been allocated */
  1437. if (!test_bit(XEN_HVM_EVTCHN_CALLBACK, used_vectors))
  1438. alloc_intr_gate(XEN_HVM_EVTCHN_CALLBACK, xen_hvm_callback_vector);
  1439. }
  1440. }
  1441. #else
  1442. void xen_callback_vector(void) {}
  1443. #endif
  1444. void __init xen_init_IRQ(void)
  1445. {
  1446. int i;
  1447. evtchn_to_irq = kcalloc(NR_EVENT_CHANNELS, sizeof(*evtchn_to_irq),
  1448. GFP_KERNEL);
  1449. BUG_ON(!evtchn_to_irq);
  1450. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1451. evtchn_to_irq[i] = -1;
  1452. init_evtchn_cpu_bindings();
  1453. /* No event channels are 'live' right now. */
  1454. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  1455. mask_evtchn(i);
  1456. pirq_needs_eoi = pirq_needs_eoi_flag;
  1457. #ifdef CONFIG_X86
  1458. if (xen_hvm_domain()) {
  1459. xen_callback_vector();
  1460. native_init_IRQ();
  1461. /* pci_xen_hvm_init must be called after native_init_IRQ so that
  1462. * __acpi_register_gsi can point at the right function */
  1463. pci_xen_hvm_init();
  1464. } else {
  1465. int rc;
  1466. struct physdev_pirq_eoi_gmfn eoi_gmfn;
  1467. irq_ctx_init(smp_processor_id());
  1468. if (xen_initial_domain())
  1469. pci_xen_initial_domain();
  1470. pirq_eoi_map = (void *)__get_free_page(GFP_KERNEL|__GFP_ZERO);
  1471. eoi_gmfn.gmfn = virt_to_mfn(pirq_eoi_map);
  1472. rc = HYPERVISOR_physdev_op(PHYSDEVOP_pirq_eoi_gmfn_v2, &eoi_gmfn);
  1473. if (rc != 0) {
  1474. free_page((unsigned long) pirq_eoi_map);
  1475. pirq_eoi_map = NULL;
  1476. } else
  1477. pirq_needs_eoi = pirq_check_eoi_map;
  1478. }
  1479. #endif
  1480. }