omap2430.c 17 KB

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  1. /*
  2. * Copyright (C) 2005-2007 by Texas Instruments
  3. * Some code has been taken from tusb6010.c
  4. * Copyrights for that are attributable to:
  5. * Copyright (C) 2006 Nokia Corporation
  6. * Tony Lindgren <tony@atomide.com>
  7. *
  8. * This file is part of the Inventra Controller Driver for Linux.
  9. *
  10. * The Inventra Controller Driver for Linux is free software; you
  11. * can redistribute it and/or modify it under the terms of the GNU
  12. * General Public License version 2 as published by the Free Software
  13. * Foundation.
  14. *
  15. * The Inventra Controller Driver for Linux is distributed in
  16. * the hope that it will be useful, but WITHOUT ANY WARRANTY;
  17. * without even the implied warranty of MERCHANTABILITY or
  18. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
  19. * License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with The Inventra Controller Driver for Linux ; if not,
  23. * write to the Free Software Foundation, Inc., 59 Temple Place,
  24. * Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. #include <linux/module.h>
  28. #include <linux/kernel.h>
  29. #include <linux/sched.h>
  30. #include <linux/init.h>
  31. #include <linux/list.h>
  32. #include <linux/io.h>
  33. #include <linux/of.h>
  34. #include <linux/platform_device.h>
  35. #include <linux/dma-mapping.h>
  36. #include <linux/pm_runtime.h>
  37. #include <linux/err.h>
  38. #include <linux/delay.h>
  39. #include <linux/usb/musb-omap.h>
  40. #include "musb_core.h"
  41. #include "omap2430.h"
  42. struct omap2430_glue {
  43. struct device *dev;
  44. struct platform_device *musb;
  45. enum omap_musb_vbus_id_status status;
  46. struct work_struct omap_musb_mailbox_work;
  47. u32 __iomem *control_otghs;
  48. };
  49. #define glue_to_musb(g) platform_get_drvdata(g->musb)
  50. struct omap2430_glue *_glue;
  51. static struct timer_list musb_idle_timer;
  52. /**
  53. * omap4_usb_phy_mailbox - write to usb otg mailbox
  54. * @glue: struct omap2430_glue *
  55. * @val: the value to be written to the mailbox
  56. *
  57. * On detection of a device (ID pin is grounded), this API should be called
  58. * to set AVALID, VBUSVALID and ID pin is grounded.
  59. *
  60. * When OMAP is connected to a host (OMAP in device mode), this API
  61. * is called to set AVALID, VBUSVALID and ID pin in high impedance.
  62. *
  63. * XXX: This function will be removed once we have a seperate driver for
  64. * control module
  65. */
  66. static void omap4_usb_phy_mailbox(struct omap2430_glue *glue, u32 val)
  67. {
  68. if (glue->control_otghs)
  69. writel(val, glue->control_otghs);
  70. }
  71. static void musb_do_idle(unsigned long _musb)
  72. {
  73. struct musb *musb = (void *)_musb;
  74. unsigned long flags;
  75. u8 power;
  76. u8 devctl;
  77. spin_lock_irqsave(&musb->lock, flags);
  78. switch (musb->xceiv->state) {
  79. case OTG_STATE_A_WAIT_BCON:
  80. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  81. if (devctl & MUSB_DEVCTL_BDEVICE) {
  82. musb->xceiv->state = OTG_STATE_B_IDLE;
  83. MUSB_DEV_MODE(musb);
  84. } else {
  85. musb->xceiv->state = OTG_STATE_A_IDLE;
  86. MUSB_HST_MODE(musb);
  87. }
  88. break;
  89. case OTG_STATE_A_SUSPEND:
  90. /* finish RESUME signaling? */
  91. if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
  92. power = musb_readb(musb->mregs, MUSB_POWER);
  93. power &= ~MUSB_POWER_RESUME;
  94. dev_dbg(musb->controller, "root port resume stopped, power %02x\n", power);
  95. musb_writeb(musb->mregs, MUSB_POWER, power);
  96. musb->is_active = 1;
  97. musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
  98. | MUSB_PORT_STAT_RESUME);
  99. musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
  100. usb_hcd_poll_rh_status(musb_to_hcd(musb));
  101. /* NOTE: it might really be A_WAIT_BCON ... */
  102. musb->xceiv->state = OTG_STATE_A_HOST;
  103. }
  104. break;
  105. case OTG_STATE_A_HOST:
  106. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  107. if (devctl & MUSB_DEVCTL_BDEVICE)
  108. musb->xceiv->state = OTG_STATE_B_IDLE;
  109. else
  110. musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
  111. default:
  112. break;
  113. }
  114. spin_unlock_irqrestore(&musb->lock, flags);
  115. }
  116. static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
  117. {
  118. unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
  119. static unsigned long last_timer;
  120. if (timeout == 0)
  121. timeout = default_timeout;
  122. /* Never idle if active, or when VBUS timeout is not set as host */
  123. if (musb->is_active || ((musb->a_wait_bcon == 0)
  124. && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
  125. dev_dbg(musb->controller, "%s active, deleting timer\n",
  126. otg_state_string(musb->xceiv->state));
  127. del_timer(&musb_idle_timer);
  128. last_timer = jiffies;
  129. return;
  130. }
  131. if (time_after(last_timer, timeout)) {
  132. if (!timer_pending(&musb_idle_timer))
  133. last_timer = timeout;
  134. else {
  135. dev_dbg(musb->controller, "Longer idle timer already pending, ignoring\n");
  136. return;
  137. }
  138. }
  139. last_timer = timeout;
  140. dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n",
  141. otg_state_string(musb->xceiv->state),
  142. (unsigned long)jiffies_to_msecs(timeout - jiffies));
  143. mod_timer(&musb_idle_timer, timeout);
  144. }
  145. static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
  146. {
  147. struct usb_otg *otg = musb->xceiv->otg;
  148. u8 devctl;
  149. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  150. /* HDRC controls CPEN, but beware current surges during device
  151. * connect. They can trigger transient overcurrent conditions
  152. * that must be ignored.
  153. */
  154. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  155. if (is_on) {
  156. if (musb->xceiv->state == OTG_STATE_A_IDLE) {
  157. int loops = 100;
  158. /* start the session */
  159. devctl |= MUSB_DEVCTL_SESSION;
  160. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  161. /*
  162. * Wait for the musb to set as A device to enable the
  163. * VBUS
  164. */
  165. while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) {
  166. mdelay(5);
  167. cpu_relax();
  168. if (time_after(jiffies, timeout)
  169. || loops-- <= 0) {
  170. dev_err(musb->controller,
  171. "configured as A device timeout");
  172. break;
  173. }
  174. }
  175. if (otg->set_vbus)
  176. otg_set_vbus(otg, 1);
  177. } else {
  178. musb->is_active = 1;
  179. otg->default_a = 1;
  180. musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
  181. devctl |= MUSB_DEVCTL_SESSION;
  182. MUSB_HST_MODE(musb);
  183. }
  184. } else {
  185. musb->is_active = 0;
  186. /* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
  187. * jumping right to B_IDLE...
  188. */
  189. otg->default_a = 0;
  190. musb->xceiv->state = OTG_STATE_B_IDLE;
  191. devctl &= ~MUSB_DEVCTL_SESSION;
  192. MUSB_DEV_MODE(musb);
  193. }
  194. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  195. dev_dbg(musb->controller, "VBUS %s, devctl %02x "
  196. /* otg %3x conf %08x prcm %08x */ "\n",
  197. otg_state_string(musb->xceiv->state),
  198. musb_readb(musb->mregs, MUSB_DEVCTL));
  199. }
  200. static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
  201. {
  202. u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  203. devctl |= MUSB_DEVCTL_SESSION;
  204. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  205. return 0;
  206. }
  207. static inline void omap2430_low_level_exit(struct musb *musb)
  208. {
  209. u32 l;
  210. /* in any role */
  211. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  212. l |= ENABLEFORCE; /* enable MSTANDBY */
  213. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  214. }
  215. static inline void omap2430_low_level_init(struct musb *musb)
  216. {
  217. u32 l;
  218. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  219. l &= ~ENABLEFORCE; /* disable MSTANDBY */
  220. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  221. }
  222. void omap_musb_mailbox(enum omap_musb_vbus_id_status status)
  223. {
  224. struct omap2430_glue *glue = _glue;
  225. struct musb *musb = glue_to_musb(glue);
  226. glue->status = status;
  227. if (!musb) {
  228. dev_err(glue->dev, "musb core is not yet ready\n");
  229. return;
  230. }
  231. schedule_work(&glue->omap_musb_mailbox_work);
  232. }
  233. EXPORT_SYMBOL_GPL(omap_musb_mailbox);
  234. static void omap_musb_set_mailbox(struct omap2430_glue *glue)
  235. {
  236. u32 val;
  237. struct musb *musb = glue_to_musb(glue);
  238. struct device *dev = musb->controller;
  239. struct musb_hdrc_platform_data *pdata = dev->platform_data;
  240. struct omap_musb_board_data *data = pdata->board_data;
  241. struct usb_otg *otg = musb->xceiv->otg;
  242. switch (glue->status) {
  243. case OMAP_MUSB_ID_GROUND:
  244. dev_dbg(dev, "ID GND\n");
  245. otg->default_a = true;
  246. musb->xceiv->state = OTG_STATE_A_IDLE;
  247. musb->xceiv->last_event = USB_EVENT_ID;
  248. if (musb->gadget_driver) {
  249. pm_runtime_get_sync(dev);
  250. val = AVALID | VBUSVALID;
  251. omap4_usb_phy_mailbox(glue, val);
  252. omap2430_musb_set_vbus(musb, 1);
  253. }
  254. break;
  255. case OMAP_MUSB_VBUS_VALID:
  256. dev_dbg(dev, "VBUS Connect\n");
  257. otg->default_a = false;
  258. musb->xceiv->state = OTG_STATE_B_IDLE;
  259. musb->xceiv->last_event = USB_EVENT_VBUS;
  260. if (musb->gadget_driver)
  261. pm_runtime_get_sync(dev);
  262. val = IDDIG | AVALID | VBUSVALID;
  263. omap4_usb_phy_mailbox(glue, val);
  264. break;
  265. case OMAP_MUSB_ID_FLOAT:
  266. case OMAP_MUSB_VBUS_OFF:
  267. dev_dbg(dev, "VBUS Disconnect\n");
  268. musb->xceiv->last_event = USB_EVENT_NONE;
  269. if (musb->gadget_driver) {
  270. pm_runtime_mark_last_busy(dev);
  271. pm_runtime_put_autosuspend(dev);
  272. }
  273. if (data->interface_type == MUSB_INTERFACE_UTMI) {
  274. if (musb->xceiv->otg->set_vbus)
  275. otg_set_vbus(musb->xceiv->otg, 0);
  276. }
  277. val = SESSEND | IDDIG;
  278. omap4_usb_phy_mailbox(glue, val);
  279. break;
  280. default:
  281. dev_dbg(dev, "ID float\n");
  282. }
  283. }
  284. static void omap_musb_mailbox_work(struct work_struct *mailbox_work)
  285. {
  286. struct omap2430_glue *glue = container_of(mailbox_work,
  287. struct omap2430_glue, omap_musb_mailbox_work);
  288. omap_musb_set_mailbox(glue);
  289. }
  290. static irqreturn_t omap2430_musb_interrupt(int irq, void *__hci)
  291. {
  292. unsigned long flags;
  293. irqreturn_t retval = IRQ_NONE;
  294. struct musb *musb = __hci;
  295. spin_lock_irqsave(&musb->lock, flags);
  296. musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
  297. musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
  298. musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
  299. if (musb->int_usb || musb->int_tx || musb->int_rx)
  300. retval = musb_interrupt(musb);
  301. spin_unlock_irqrestore(&musb->lock, flags);
  302. return retval;
  303. }
  304. static int omap2430_musb_init(struct musb *musb)
  305. {
  306. u32 l;
  307. int status = 0;
  308. struct device *dev = musb->controller;
  309. struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
  310. struct musb_hdrc_platform_data *plat = dev->platform_data;
  311. struct omap_musb_board_data *data = plat->board_data;
  312. /* We require some kind of external transceiver, hooked
  313. * up through ULPI. TWL4030-family PMICs include one,
  314. * which needs a driver, drivers aren't always needed.
  315. */
  316. musb->xceiv = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
  317. if (IS_ERR_OR_NULL(musb->xceiv)) {
  318. pr_err("HS USB OTG: no transceiver configured\n");
  319. return -ENODEV;
  320. }
  321. musb->isr = omap2430_musb_interrupt;
  322. status = pm_runtime_get_sync(dev);
  323. if (status < 0) {
  324. dev_err(dev, "pm_runtime_get_sync FAILED %d\n", status);
  325. goto err1;
  326. }
  327. l = musb_readl(musb->mregs, OTG_INTERFSEL);
  328. if (data->interface_type == MUSB_INTERFACE_UTMI) {
  329. /* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
  330. l &= ~ULPI_12PIN; /* Disable ULPI */
  331. l |= UTMI_8BIT; /* Enable UTMI */
  332. } else {
  333. l |= ULPI_12PIN;
  334. }
  335. musb_writel(musb->mregs, OTG_INTERFSEL, l);
  336. pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
  337. "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
  338. musb_readl(musb->mregs, OTG_REVISION),
  339. musb_readl(musb->mregs, OTG_SYSCONFIG),
  340. musb_readl(musb->mregs, OTG_SYSSTATUS),
  341. musb_readl(musb->mregs, OTG_INTERFSEL),
  342. musb_readl(musb->mregs, OTG_SIMENABLE));
  343. setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
  344. if (glue->status != OMAP_MUSB_UNKNOWN)
  345. omap_musb_set_mailbox(glue);
  346. pm_runtime_put_noidle(musb->controller);
  347. return 0;
  348. err1:
  349. return status;
  350. }
  351. static void omap2430_musb_enable(struct musb *musb)
  352. {
  353. u8 devctl;
  354. u32 val;
  355. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  356. struct device *dev = musb->controller;
  357. struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
  358. struct musb_hdrc_platform_data *pdata = dev->platform_data;
  359. struct omap_musb_board_data *data = pdata->board_data;
  360. switch (glue->status) {
  361. case OMAP_MUSB_ID_GROUND:
  362. val = AVALID | VBUSVALID;
  363. omap4_usb_phy_mailbox(glue, val);
  364. if (data->interface_type != MUSB_INTERFACE_UTMI)
  365. break;
  366. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  367. /* start the session */
  368. devctl |= MUSB_DEVCTL_SESSION;
  369. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  370. while (musb_readb(musb->mregs, MUSB_DEVCTL) &
  371. MUSB_DEVCTL_BDEVICE) {
  372. cpu_relax();
  373. if (time_after(jiffies, timeout)) {
  374. dev_err(dev, "configured as A device timeout");
  375. break;
  376. }
  377. }
  378. break;
  379. case OMAP_MUSB_VBUS_VALID:
  380. val = IDDIG | AVALID | VBUSVALID;
  381. omap4_usb_phy_mailbox(glue, val);
  382. break;
  383. default:
  384. break;
  385. }
  386. }
  387. static void omap2430_musb_disable(struct musb *musb)
  388. {
  389. u32 val;
  390. struct device *dev = musb->controller;
  391. struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
  392. if (glue->status != OMAP_MUSB_UNKNOWN) {
  393. val = SESSEND | IDDIG;
  394. omap4_usb_phy_mailbox(glue, val);
  395. }
  396. }
  397. static int omap2430_musb_exit(struct musb *musb)
  398. {
  399. del_timer_sync(&musb_idle_timer);
  400. omap2430_low_level_exit(musb);
  401. return 0;
  402. }
  403. static const struct musb_platform_ops omap2430_ops = {
  404. .init = omap2430_musb_init,
  405. .exit = omap2430_musb_exit,
  406. .set_mode = omap2430_musb_set_mode,
  407. .try_idle = omap2430_musb_try_idle,
  408. .set_vbus = omap2430_musb_set_vbus,
  409. .enable = omap2430_musb_enable,
  410. .disable = omap2430_musb_disable,
  411. };
  412. static u64 omap2430_dmamask = DMA_BIT_MASK(32);
  413. static int omap2430_probe(struct platform_device *pdev)
  414. {
  415. struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data;
  416. struct omap_musb_board_data *data;
  417. struct platform_device *musb;
  418. struct omap2430_glue *glue;
  419. struct device_node *np = pdev->dev.of_node;
  420. struct musb_hdrc_config *config;
  421. struct resource *res;
  422. int ret = -ENOMEM;
  423. glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
  424. if (!glue) {
  425. dev_err(&pdev->dev, "failed to allocate glue context\n");
  426. goto err0;
  427. }
  428. musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
  429. if (!musb) {
  430. dev_err(&pdev->dev, "failed to allocate musb device\n");
  431. goto err0;
  432. }
  433. musb->dev.parent = &pdev->dev;
  434. musb->dev.dma_mask = &omap2430_dmamask;
  435. musb->dev.coherent_dma_mask = omap2430_dmamask;
  436. glue->dev = &pdev->dev;
  437. glue->musb = musb;
  438. glue->status = OMAP_MUSB_UNKNOWN;
  439. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  440. glue->control_otghs = devm_request_and_ioremap(&pdev->dev, res);
  441. if (glue->control_otghs == NULL)
  442. dev_dbg(&pdev->dev, "Failed to obtain control memory\n");
  443. if (np) {
  444. pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
  445. if (!pdata) {
  446. dev_err(&pdev->dev,
  447. "failed to allocate musb platfrom data\n");
  448. ret = -ENOMEM;
  449. goto err2;
  450. }
  451. data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
  452. if (!data) {
  453. dev_err(&pdev->dev,
  454. "failed to allocate musb board data\n");
  455. ret = -ENOMEM;
  456. goto err2;
  457. }
  458. config = devm_kzalloc(&pdev->dev, sizeof(*config), GFP_KERNEL);
  459. if (!data) {
  460. dev_err(&pdev->dev,
  461. "failed to allocate musb hdrc config\n");
  462. goto err2;
  463. }
  464. of_property_read_u32(np, "mode", (u32 *)&pdata->mode);
  465. of_property_read_u32(np, "interface_type",
  466. (u32 *)&data->interface_type);
  467. of_property_read_u32(np, "num_eps", (u32 *)&config->num_eps);
  468. of_property_read_u32(np, "ram_bits", (u32 *)&config->ram_bits);
  469. of_property_read_u32(np, "power", (u32 *)&pdata->power);
  470. config->multipoint = of_property_read_bool(np, "multipoint");
  471. pdata->board_data = data;
  472. pdata->config = config;
  473. }
  474. pdata->platform_ops = &omap2430_ops;
  475. platform_set_drvdata(pdev, glue);
  476. /*
  477. * REVISIT if we ever have two instances of the wrapper, we will be
  478. * in big trouble
  479. */
  480. _glue = glue;
  481. INIT_WORK(&glue->omap_musb_mailbox_work, omap_musb_mailbox_work);
  482. ret = platform_device_add_resources(musb, pdev->resource,
  483. pdev->num_resources);
  484. if (ret) {
  485. dev_err(&pdev->dev, "failed to add resources\n");
  486. goto err2;
  487. }
  488. ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
  489. if (ret) {
  490. dev_err(&pdev->dev, "failed to add platform_data\n");
  491. goto err2;
  492. }
  493. pm_runtime_enable(&pdev->dev);
  494. ret = platform_device_add(musb);
  495. if (ret) {
  496. dev_err(&pdev->dev, "failed to register musb device\n");
  497. goto err2;
  498. }
  499. return 0;
  500. err2:
  501. platform_device_put(musb);
  502. err0:
  503. return ret;
  504. }
  505. static int omap2430_remove(struct platform_device *pdev)
  506. {
  507. struct omap2430_glue *glue = platform_get_drvdata(pdev);
  508. cancel_work_sync(&glue->omap_musb_mailbox_work);
  509. platform_device_unregister(glue->musb);
  510. return 0;
  511. }
  512. #ifdef CONFIG_PM
  513. static int omap2430_runtime_suspend(struct device *dev)
  514. {
  515. struct omap2430_glue *glue = dev_get_drvdata(dev);
  516. struct musb *musb = glue_to_musb(glue);
  517. if (musb) {
  518. musb->context.otg_interfsel = musb_readl(musb->mregs,
  519. OTG_INTERFSEL);
  520. omap2430_low_level_exit(musb);
  521. usb_phy_set_suspend(musb->xceiv, 1);
  522. }
  523. return 0;
  524. }
  525. static int omap2430_runtime_resume(struct device *dev)
  526. {
  527. struct omap2430_glue *glue = dev_get_drvdata(dev);
  528. struct musb *musb = glue_to_musb(glue);
  529. if (musb) {
  530. omap2430_low_level_init(musb);
  531. musb_writel(musb->mregs, OTG_INTERFSEL,
  532. musb->context.otg_interfsel);
  533. usb_phy_set_suspend(musb->xceiv, 0);
  534. }
  535. return 0;
  536. }
  537. static struct dev_pm_ops omap2430_pm_ops = {
  538. .runtime_suspend = omap2430_runtime_suspend,
  539. .runtime_resume = omap2430_runtime_resume,
  540. };
  541. #define DEV_PM_OPS (&omap2430_pm_ops)
  542. #else
  543. #define DEV_PM_OPS NULL
  544. #endif
  545. #ifdef CONFIG_OF
  546. static const struct of_device_id omap2430_id_table[] = {
  547. {
  548. .compatible = "ti,omap4-musb"
  549. },
  550. {
  551. .compatible = "ti,omap3-musb"
  552. },
  553. {},
  554. };
  555. MODULE_DEVICE_TABLE(of, omap2430_id_table);
  556. #endif
  557. static struct platform_driver omap2430_driver = {
  558. .probe = omap2430_probe,
  559. .remove = omap2430_remove,
  560. .driver = {
  561. .name = "musb-omap2430",
  562. .pm = DEV_PM_OPS,
  563. .of_match_table = of_match_ptr(omap2430_id_table),
  564. },
  565. };
  566. MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
  567. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
  568. MODULE_LICENSE("GPL v2");
  569. static int __init omap2430_init(void)
  570. {
  571. return platform_driver_register(&omap2430_driver);
  572. }
  573. subsys_initcall(omap2430_init);
  574. static void __exit omap2430_exit(void)
  575. {
  576. platform_driver_unregister(&omap2430_driver);
  577. }
  578. module_exit(omap2430_exit);