sunsu.c 38 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614
  1. /*
  2. * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
  3. *
  4. * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
  5. * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
  6. *
  7. * This is mainly a variation of 8250.c, credits go to authors mentioned
  8. * therein. In fact this driver should be merged into the generic 8250.c
  9. * infrastructure perhaps using a 8250_sparc.c module.
  10. *
  11. * Fixed to use tty_get_baud_rate().
  12. * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
  13. *
  14. * Converted to new 2.5.x UART layer.
  15. * David S. Miller (davem@davemloft.net), 2002-Jul-29
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/spinlock.h>
  20. #include <linux/errno.h>
  21. #include <linux/tty.h>
  22. #include <linux/tty_flip.h>
  23. #include <linux/major.h>
  24. #include <linux/string.h>
  25. #include <linux/ptrace.h>
  26. #include <linux/ioport.h>
  27. #include <linux/circ_buf.h>
  28. #include <linux/serial.h>
  29. #include <linux/sysrq.h>
  30. #include <linux/console.h>
  31. #include <linux/slab.h>
  32. #ifdef CONFIG_SERIO
  33. #include <linux/serio.h>
  34. #endif
  35. #include <linux/serial_reg.h>
  36. #include <linux/init.h>
  37. #include <linux/delay.h>
  38. #include <linux/of_device.h>
  39. #include <asm/io.h>
  40. #include <asm/irq.h>
  41. #include <asm/prom.h>
  42. #include <asm/setup.h>
  43. #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  44. #define SUPPORT_SYSRQ
  45. #endif
  46. #include <linux/serial_core.h>
  47. #include <linux/sunserialcore.h>
  48. /* We are on a NS PC87303 clocked with 24.0 MHz, which results
  49. * in a UART clock of 1.8462 MHz.
  50. */
  51. #define SU_BASE_BAUD (1846200 / 16)
  52. enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
  53. static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
  54. struct serial_uart_config {
  55. char *name;
  56. int dfl_xmit_fifo_size;
  57. int flags;
  58. };
  59. /*
  60. * Here we define the default xmit fifo size used for each type of UART.
  61. */
  62. static const struct serial_uart_config uart_config[] = {
  63. { "unknown", 1, 0 },
  64. { "8250", 1, 0 },
  65. { "16450", 1, 0 },
  66. { "16550", 1, 0 },
  67. { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
  68. { "Cirrus", 1, 0 },
  69. { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
  70. { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  71. { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
  72. { "Startech", 1, 0 },
  73. { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
  74. { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  75. { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  76. { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
  77. };
  78. struct uart_sunsu_port {
  79. struct uart_port port;
  80. unsigned char acr;
  81. unsigned char ier;
  82. unsigned short rev;
  83. unsigned char lcr;
  84. unsigned int lsr_break_flag;
  85. unsigned int cflag;
  86. /* Probing information. */
  87. enum su_type su_type;
  88. unsigned int type_probed; /* XXX Stupid */
  89. unsigned long reg_size;
  90. #ifdef CONFIG_SERIO
  91. struct serio serio;
  92. int serio_open;
  93. #endif
  94. };
  95. static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
  96. {
  97. offset <<= up->port.regshift;
  98. switch (up->port.iotype) {
  99. case UPIO_HUB6:
  100. outb(up->port.hub6 - 1 + offset, up->port.iobase);
  101. return inb(up->port.iobase + 1);
  102. case UPIO_MEM:
  103. return readb(up->port.membase + offset);
  104. default:
  105. return inb(up->port.iobase + offset);
  106. }
  107. }
  108. static void serial_out(struct uart_sunsu_port *up, int offset, int value)
  109. {
  110. #ifndef CONFIG_SPARC64
  111. /*
  112. * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
  113. * connected with a gate then go to SlavIO. When IRQ4 goes tristated
  114. * gate outputs a logical one. Since we use level triggered interrupts
  115. * we have lockup and watchdog reset. We cannot mask IRQ because
  116. * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
  117. * This problem is similar to what Alpha people suffer, see serial.c.
  118. */
  119. if (offset == UART_MCR)
  120. value |= UART_MCR_OUT2;
  121. #endif
  122. offset <<= up->port.regshift;
  123. switch (up->port.iotype) {
  124. case UPIO_HUB6:
  125. outb(up->port.hub6 - 1 + offset, up->port.iobase);
  126. outb(value, up->port.iobase + 1);
  127. break;
  128. case UPIO_MEM:
  129. writeb(value, up->port.membase + offset);
  130. break;
  131. default:
  132. outb(value, up->port.iobase + offset);
  133. }
  134. }
  135. /*
  136. * We used to support using pause I/O for certain machines. We
  137. * haven't supported this for a while, but just in case it's badly
  138. * needed for certain old 386 machines, I've left these #define's
  139. * in....
  140. */
  141. #define serial_inp(up, offset) serial_in(up, offset)
  142. #define serial_outp(up, offset, value) serial_out(up, offset, value)
  143. /*
  144. * For the 16C950
  145. */
  146. static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
  147. {
  148. serial_out(up, UART_SCR, offset);
  149. serial_out(up, UART_ICR, value);
  150. }
  151. #if 0 /* Unused currently */
  152. static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
  153. {
  154. unsigned int value;
  155. serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
  156. serial_out(up, UART_SCR, offset);
  157. value = serial_in(up, UART_ICR);
  158. serial_icr_write(up, UART_ACR, up->acr);
  159. return value;
  160. }
  161. #endif
  162. #ifdef CONFIG_SERIAL_8250_RSA
  163. /*
  164. * Attempts to turn on the RSA FIFO. Returns zero on failure.
  165. * We set the port uart clock rate if we succeed.
  166. */
  167. static int __enable_rsa(struct uart_sunsu_port *up)
  168. {
  169. unsigned char mode;
  170. int result;
  171. mode = serial_inp(up, UART_RSA_MSR);
  172. result = mode & UART_RSA_MSR_FIFO;
  173. if (!result) {
  174. serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
  175. mode = serial_inp(up, UART_RSA_MSR);
  176. result = mode & UART_RSA_MSR_FIFO;
  177. }
  178. if (result)
  179. up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
  180. return result;
  181. }
  182. static void enable_rsa(struct uart_sunsu_port *up)
  183. {
  184. if (up->port.type == PORT_RSA) {
  185. if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
  186. spin_lock_irq(&up->port.lock);
  187. __enable_rsa(up);
  188. spin_unlock_irq(&up->port.lock);
  189. }
  190. if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
  191. serial_outp(up, UART_RSA_FRR, 0);
  192. }
  193. }
  194. /*
  195. * Attempts to turn off the RSA FIFO. Returns zero on failure.
  196. * It is unknown why interrupts were disabled in here. However,
  197. * the caller is expected to preserve this behaviour by grabbing
  198. * the spinlock before calling this function.
  199. */
  200. static void disable_rsa(struct uart_sunsu_port *up)
  201. {
  202. unsigned char mode;
  203. int result;
  204. if (up->port.type == PORT_RSA &&
  205. up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
  206. spin_lock_irq(&up->port.lock);
  207. mode = serial_inp(up, UART_RSA_MSR);
  208. result = !(mode & UART_RSA_MSR_FIFO);
  209. if (!result) {
  210. serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
  211. mode = serial_inp(up, UART_RSA_MSR);
  212. result = !(mode & UART_RSA_MSR_FIFO);
  213. }
  214. if (result)
  215. up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
  216. spin_unlock_irq(&up->port.lock);
  217. }
  218. }
  219. #endif /* CONFIG_SERIAL_8250_RSA */
  220. static inline void __stop_tx(struct uart_sunsu_port *p)
  221. {
  222. if (p->ier & UART_IER_THRI) {
  223. p->ier &= ~UART_IER_THRI;
  224. serial_out(p, UART_IER, p->ier);
  225. }
  226. }
  227. static void sunsu_stop_tx(struct uart_port *port)
  228. {
  229. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  230. __stop_tx(up);
  231. /*
  232. * We really want to stop the transmitter from sending.
  233. */
  234. if (up->port.type == PORT_16C950) {
  235. up->acr |= UART_ACR_TXDIS;
  236. serial_icr_write(up, UART_ACR, up->acr);
  237. }
  238. }
  239. static void sunsu_start_tx(struct uart_port *port)
  240. {
  241. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  242. if (!(up->ier & UART_IER_THRI)) {
  243. up->ier |= UART_IER_THRI;
  244. serial_out(up, UART_IER, up->ier);
  245. }
  246. /*
  247. * Re-enable the transmitter if we disabled it.
  248. */
  249. if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
  250. up->acr &= ~UART_ACR_TXDIS;
  251. serial_icr_write(up, UART_ACR, up->acr);
  252. }
  253. }
  254. static void sunsu_stop_rx(struct uart_port *port)
  255. {
  256. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  257. up->ier &= ~UART_IER_RLSI;
  258. up->port.read_status_mask &= ~UART_LSR_DR;
  259. serial_out(up, UART_IER, up->ier);
  260. }
  261. static void sunsu_enable_ms(struct uart_port *port)
  262. {
  263. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  264. unsigned long flags;
  265. spin_lock_irqsave(&up->port.lock, flags);
  266. up->ier |= UART_IER_MSI;
  267. serial_out(up, UART_IER, up->ier);
  268. spin_unlock_irqrestore(&up->port.lock, flags);
  269. }
  270. static struct tty_struct *
  271. receive_chars(struct uart_sunsu_port *up, unsigned char *status)
  272. {
  273. struct tty_struct *tty = up->port.state->port.tty;
  274. unsigned char ch, flag;
  275. int max_count = 256;
  276. int saw_console_brk = 0;
  277. do {
  278. ch = serial_inp(up, UART_RX);
  279. flag = TTY_NORMAL;
  280. up->port.icount.rx++;
  281. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  282. UART_LSR_FE | UART_LSR_OE))) {
  283. /*
  284. * For statistics only
  285. */
  286. if (*status & UART_LSR_BI) {
  287. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  288. up->port.icount.brk++;
  289. if (up->port.cons != NULL &&
  290. up->port.line == up->port.cons->index)
  291. saw_console_brk = 1;
  292. /*
  293. * We do the SysRQ and SAK checking
  294. * here because otherwise the break
  295. * may get masked by ignore_status_mask
  296. * or read_status_mask.
  297. */
  298. if (uart_handle_break(&up->port))
  299. goto ignore_char;
  300. } else if (*status & UART_LSR_PE)
  301. up->port.icount.parity++;
  302. else if (*status & UART_LSR_FE)
  303. up->port.icount.frame++;
  304. if (*status & UART_LSR_OE)
  305. up->port.icount.overrun++;
  306. /*
  307. * Mask off conditions which should be ingored.
  308. */
  309. *status &= up->port.read_status_mask;
  310. if (up->port.cons != NULL &&
  311. up->port.line == up->port.cons->index) {
  312. /* Recover the break flag from console xmit */
  313. *status |= up->lsr_break_flag;
  314. up->lsr_break_flag = 0;
  315. }
  316. if (*status & UART_LSR_BI) {
  317. flag = TTY_BREAK;
  318. } else if (*status & UART_LSR_PE)
  319. flag = TTY_PARITY;
  320. else if (*status & UART_LSR_FE)
  321. flag = TTY_FRAME;
  322. }
  323. if (uart_handle_sysrq_char(&up->port, ch))
  324. goto ignore_char;
  325. if ((*status & up->port.ignore_status_mask) == 0)
  326. tty_insert_flip_char(tty, ch, flag);
  327. if (*status & UART_LSR_OE)
  328. /*
  329. * Overrun is special, since it's reported
  330. * immediately, and doesn't affect the current
  331. * character.
  332. */
  333. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  334. ignore_char:
  335. *status = serial_inp(up, UART_LSR);
  336. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  337. if (saw_console_brk)
  338. sun_do_break();
  339. return tty;
  340. }
  341. static void transmit_chars(struct uart_sunsu_port *up)
  342. {
  343. struct circ_buf *xmit = &up->port.state->xmit;
  344. int count;
  345. if (up->port.x_char) {
  346. serial_outp(up, UART_TX, up->port.x_char);
  347. up->port.icount.tx++;
  348. up->port.x_char = 0;
  349. return;
  350. }
  351. if (uart_tx_stopped(&up->port)) {
  352. sunsu_stop_tx(&up->port);
  353. return;
  354. }
  355. if (uart_circ_empty(xmit)) {
  356. __stop_tx(up);
  357. return;
  358. }
  359. count = up->port.fifosize;
  360. do {
  361. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  362. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  363. up->port.icount.tx++;
  364. if (uart_circ_empty(xmit))
  365. break;
  366. } while (--count > 0);
  367. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  368. uart_write_wakeup(&up->port);
  369. if (uart_circ_empty(xmit))
  370. __stop_tx(up);
  371. }
  372. static void check_modem_status(struct uart_sunsu_port *up)
  373. {
  374. int status;
  375. status = serial_in(up, UART_MSR);
  376. if ((status & UART_MSR_ANY_DELTA) == 0)
  377. return;
  378. if (status & UART_MSR_TERI)
  379. up->port.icount.rng++;
  380. if (status & UART_MSR_DDSR)
  381. up->port.icount.dsr++;
  382. if (status & UART_MSR_DDCD)
  383. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  384. if (status & UART_MSR_DCTS)
  385. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  386. wake_up_interruptible(&up->port.state->port.delta_msr_wait);
  387. }
  388. static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)
  389. {
  390. struct uart_sunsu_port *up = dev_id;
  391. unsigned long flags;
  392. unsigned char status;
  393. spin_lock_irqsave(&up->port.lock, flags);
  394. do {
  395. struct tty_struct *tty;
  396. status = serial_inp(up, UART_LSR);
  397. tty = NULL;
  398. if (status & UART_LSR_DR)
  399. tty = receive_chars(up, &status);
  400. check_modem_status(up);
  401. if (status & UART_LSR_THRE)
  402. transmit_chars(up);
  403. spin_unlock_irqrestore(&up->port.lock, flags);
  404. if (tty)
  405. tty_flip_buffer_push(tty);
  406. spin_lock_irqsave(&up->port.lock, flags);
  407. } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
  408. spin_unlock_irqrestore(&up->port.lock, flags);
  409. return IRQ_HANDLED;
  410. }
  411. /* Separate interrupt handling path for keyboard/mouse ports. */
  412. static void
  413. sunsu_change_speed(struct uart_port *port, unsigned int cflag,
  414. unsigned int iflag, unsigned int quot);
  415. static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
  416. {
  417. unsigned int cur_cflag = up->cflag;
  418. int quot, new_baud;
  419. up->cflag &= ~CBAUD;
  420. up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
  421. quot = up->port.uartclk / (16 * new_baud);
  422. sunsu_change_speed(&up->port, up->cflag, 0, quot);
  423. }
  424. static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
  425. {
  426. do {
  427. unsigned char ch = serial_inp(up, UART_RX);
  428. /* Stop-A is handled by drivers/char/keyboard.c now. */
  429. if (up->su_type == SU_PORT_KBD) {
  430. #ifdef CONFIG_SERIO
  431. serio_interrupt(&up->serio, ch, 0);
  432. #endif
  433. } else if (up->su_type == SU_PORT_MS) {
  434. int ret = suncore_mouse_baud_detection(ch, is_break);
  435. switch (ret) {
  436. case 2:
  437. sunsu_change_mouse_baud(up);
  438. /* fallthru */
  439. case 1:
  440. break;
  441. case 0:
  442. #ifdef CONFIG_SERIO
  443. serio_interrupt(&up->serio, ch, 0);
  444. #endif
  445. break;
  446. };
  447. }
  448. } while (serial_in(up, UART_LSR) & UART_LSR_DR);
  449. }
  450. static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)
  451. {
  452. struct uart_sunsu_port *up = dev_id;
  453. if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
  454. unsigned char status = serial_inp(up, UART_LSR);
  455. if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
  456. receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
  457. }
  458. return IRQ_HANDLED;
  459. }
  460. static unsigned int sunsu_tx_empty(struct uart_port *port)
  461. {
  462. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  463. unsigned long flags;
  464. unsigned int ret;
  465. spin_lock_irqsave(&up->port.lock, flags);
  466. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  467. spin_unlock_irqrestore(&up->port.lock, flags);
  468. return ret;
  469. }
  470. static unsigned int sunsu_get_mctrl(struct uart_port *port)
  471. {
  472. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  473. unsigned char status;
  474. unsigned int ret;
  475. status = serial_in(up, UART_MSR);
  476. ret = 0;
  477. if (status & UART_MSR_DCD)
  478. ret |= TIOCM_CAR;
  479. if (status & UART_MSR_RI)
  480. ret |= TIOCM_RNG;
  481. if (status & UART_MSR_DSR)
  482. ret |= TIOCM_DSR;
  483. if (status & UART_MSR_CTS)
  484. ret |= TIOCM_CTS;
  485. return ret;
  486. }
  487. static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
  488. {
  489. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  490. unsigned char mcr = 0;
  491. if (mctrl & TIOCM_RTS)
  492. mcr |= UART_MCR_RTS;
  493. if (mctrl & TIOCM_DTR)
  494. mcr |= UART_MCR_DTR;
  495. if (mctrl & TIOCM_OUT1)
  496. mcr |= UART_MCR_OUT1;
  497. if (mctrl & TIOCM_OUT2)
  498. mcr |= UART_MCR_OUT2;
  499. if (mctrl & TIOCM_LOOP)
  500. mcr |= UART_MCR_LOOP;
  501. serial_out(up, UART_MCR, mcr);
  502. }
  503. static void sunsu_break_ctl(struct uart_port *port, int break_state)
  504. {
  505. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  506. unsigned long flags;
  507. spin_lock_irqsave(&up->port.lock, flags);
  508. if (break_state == -1)
  509. up->lcr |= UART_LCR_SBC;
  510. else
  511. up->lcr &= ~UART_LCR_SBC;
  512. serial_out(up, UART_LCR, up->lcr);
  513. spin_unlock_irqrestore(&up->port.lock, flags);
  514. }
  515. static int sunsu_startup(struct uart_port *port)
  516. {
  517. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  518. unsigned long flags;
  519. int retval;
  520. if (up->port.type == PORT_16C950) {
  521. /* Wake up and initialize UART */
  522. up->acr = 0;
  523. serial_outp(up, UART_LCR, 0xBF);
  524. serial_outp(up, UART_EFR, UART_EFR_ECB);
  525. serial_outp(up, UART_IER, 0);
  526. serial_outp(up, UART_LCR, 0);
  527. serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
  528. serial_outp(up, UART_LCR, 0xBF);
  529. serial_outp(up, UART_EFR, UART_EFR_ECB);
  530. serial_outp(up, UART_LCR, 0);
  531. }
  532. #ifdef CONFIG_SERIAL_8250_RSA
  533. /*
  534. * If this is an RSA port, see if we can kick it up to the
  535. * higher speed clock.
  536. */
  537. enable_rsa(up);
  538. #endif
  539. /*
  540. * Clear the FIFO buffers and disable them.
  541. * (they will be reenabled in set_termios())
  542. */
  543. if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
  544. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  545. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  546. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  547. serial_outp(up, UART_FCR, 0);
  548. }
  549. /*
  550. * Clear the interrupt registers.
  551. */
  552. (void) serial_inp(up, UART_LSR);
  553. (void) serial_inp(up, UART_RX);
  554. (void) serial_inp(up, UART_IIR);
  555. (void) serial_inp(up, UART_MSR);
  556. /*
  557. * At this point, there's no way the LSR could still be 0xff;
  558. * if it is, then bail out, because there's likely no UART
  559. * here.
  560. */
  561. if (!(up->port.flags & UPF_BUGGY_UART) &&
  562. (serial_inp(up, UART_LSR) == 0xff)) {
  563. printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
  564. return -ENODEV;
  565. }
  566. if (up->su_type != SU_PORT_PORT) {
  567. retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
  568. IRQF_SHARED, su_typev[up->su_type], up);
  569. } else {
  570. retval = request_irq(up->port.irq, sunsu_serial_interrupt,
  571. IRQF_SHARED, su_typev[up->su_type], up);
  572. }
  573. if (retval) {
  574. printk("su: Cannot register IRQ %d\n", up->port.irq);
  575. return retval;
  576. }
  577. /*
  578. * Now, initialize the UART
  579. */
  580. serial_outp(up, UART_LCR, UART_LCR_WLEN8);
  581. spin_lock_irqsave(&up->port.lock, flags);
  582. up->port.mctrl |= TIOCM_OUT2;
  583. sunsu_set_mctrl(&up->port, up->port.mctrl);
  584. spin_unlock_irqrestore(&up->port.lock, flags);
  585. /*
  586. * Finally, enable interrupts. Note: Modem status interrupts
  587. * are set via set_termios(), which will be occurring imminently
  588. * anyway, so we don't enable them here.
  589. */
  590. up->ier = UART_IER_RLSI | UART_IER_RDI;
  591. serial_outp(up, UART_IER, up->ier);
  592. if (up->port.flags & UPF_FOURPORT) {
  593. unsigned int icp;
  594. /*
  595. * Enable interrupts on the AST Fourport board
  596. */
  597. icp = (up->port.iobase & 0xfe0) | 0x01f;
  598. outb_p(0x80, icp);
  599. (void) inb_p(icp);
  600. }
  601. /*
  602. * And clear the interrupt registers again for luck.
  603. */
  604. (void) serial_inp(up, UART_LSR);
  605. (void) serial_inp(up, UART_RX);
  606. (void) serial_inp(up, UART_IIR);
  607. (void) serial_inp(up, UART_MSR);
  608. return 0;
  609. }
  610. static void sunsu_shutdown(struct uart_port *port)
  611. {
  612. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  613. unsigned long flags;
  614. /*
  615. * Disable interrupts from this port
  616. */
  617. up->ier = 0;
  618. serial_outp(up, UART_IER, 0);
  619. spin_lock_irqsave(&up->port.lock, flags);
  620. if (up->port.flags & UPF_FOURPORT) {
  621. /* reset interrupts on the AST Fourport board */
  622. inb((up->port.iobase & 0xfe0) | 0x1f);
  623. up->port.mctrl |= TIOCM_OUT1;
  624. } else
  625. up->port.mctrl &= ~TIOCM_OUT2;
  626. sunsu_set_mctrl(&up->port, up->port.mctrl);
  627. spin_unlock_irqrestore(&up->port.lock, flags);
  628. /*
  629. * Disable break condition and FIFOs
  630. */
  631. serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
  632. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  633. UART_FCR_CLEAR_RCVR |
  634. UART_FCR_CLEAR_XMIT);
  635. serial_outp(up, UART_FCR, 0);
  636. #ifdef CONFIG_SERIAL_8250_RSA
  637. /*
  638. * Reset the RSA board back to 115kbps compat mode.
  639. */
  640. disable_rsa(up);
  641. #endif
  642. /*
  643. * Read data port to reset things.
  644. */
  645. (void) serial_in(up, UART_RX);
  646. free_irq(up->port.irq, up);
  647. }
  648. static void
  649. sunsu_change_speed(struct uart_port *port, unsigned int cflag,
  650. unsigned int iflag, unsigned int quot)
  651. {
  652. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  653. unsigned char cval, fcr = 0;
  654. unsigned long flags;
  655. switch (cflag & CSIZE) {
  656. case CS5:
  657. cval = 0x00;
  658. break;
  659. case CS6:
  660. cval = 0x01;
  661. break;
  662. case CS7:
  663. cval = 0x02;
  664. break;
  665. default:
  666. case CS8:
  667. cval = 0x03;
  668. break;
  669. }
  670. if (cflag & CSTOPB)
  671. cval |= 0x04;
  672. if (cflag & PARENB)
  673. cval |= UART_LCR_PARITY;
  674. if (!(cflag & PARODD))
  675. cval |= UART_LCR_EPAR;
  676. #ifdef CMSPAR
  677. if (cflag & CMSPAR)
  678. cval |= UART_LCR_SPAR;
  679. #endif
  680. /*
  681. * Work around a bug in the Oxford Semiconductor 952 rev B
  682. * chip which causes it to seriously miscalculate baud rates
  683. * when DLL is 0.
  684. */
  685. if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
  686. up->rev == 0x5201)
  687. quot ++;
  688. if (uart_config[up->port.type].flags & UART_USE_FIFO) {
  689. if ((up->port.uartclk / quot) < (2400 * 16))
  690. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
  691. #ifdef CONFIG_SERIAL_8250_RSA
  692. else if (up->port.type == PORT_RSA)
  693. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
  694. #endif
  695. else
  696. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
  697. }
  698. if (up->port.type == PORT_16750)
  699. fcr |= UART_FCR7_64BYTE;
  700. /*
  701. * Ok, we're now changing the port state. Do it with
  702. * interrupts disabled.
  703. */
  704. spin_lock_irqsave(&up->port.lock, flags);
  705. /*
  706. * Update the per-port timeout.
  707. */
  708. uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
  709. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  710. if (iflag & INPCK)
  711. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  712. if (iflag & (BRKINT | PARMRK))
  713. up->port.read_status_mask |= UART_LSR_BI;
  714. /*
  715. * Characteres to ignore
  716. */
  717. up->port.ignore_status_mask = 0;
  718. if (iflag & IGNPAR)
  719. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  720. if (iflag & IGNBRK) {
  721. up->port.ignore_status_mask |= UART_LSR_BI;
  722. /*
  723. * If we're ignoring parity and break indicators,
  724. * ignore overruns too (for real raw support).
  725. */
  726. if (iflag & IGNPAR)
  727. up->port.ignore_status_mask |= UART_LSR_OE;
  728. }
  729. /*
  730. * ignore all characters if CREAD is not set
  731. */
  732. if ((cflag & CREAD) == 0)
  733. up->port.ignore_status_mask |= UART_LSR_DR;
  734. /*
  735. * CTS flow control flag and modem status interrupts
  736. */
  737. up->ier &= ~UART_IER_MSI;
  738. if (UART_ENABLE_MS(&up->port, cflag))
  739. up->ier |= UART_IER_MSI;
  740. serial_out(up, UART_IER, up->ier);
  741. if (uart_config[up->port.type].flags & UART_STARTECH) {
  742. serial_outp(up, UART_LCR, 0xBF);
  743. serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
  744. }
  745. serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
  746. serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
  747. serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
  748. if (up->port.type == PORT_16750)
  749. serial_outp(up, UART_FCR, fcr); /* set fcr */
  750. serial_outp(up, UART_LCR, cval); /* reset DLAB */
  751. up->lcr = cval; /* Save LCR */
  752. if (up->port.type != PORT_16750) {
  753. if (fcr & UART_FCR_ENABLE_FIFO) {
  754. /* emulated UARTs (Lucent Venus 167x) need two steps */
  755. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  756. }
  757. serial_outp(up, UART_FCR, fcr); /* set fcr */
  758. }
  759. up->cflag = cflag;
  760. spin_unlock_irqrestore(&up->port.lock, flags);
  761. }
  762. static void
  763. sunsu_set_termios(struct uart_port *port, struct ktermios *termios,
  764. struct ktermios *old)
  765. {
  766. unsigned int baud, quot;
  767. /*
  768. * Ask the core to calculate the divisor for us.
  769. */
  770. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  771. quot = uart_get_divisor(port, baud);
  772. sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
  773. }
  774. static void sunsu_release_port(struct uart_port *port)
  775. {
  776. }
  777. static int sunsu_request_port(struct uart_port *port)
  778. {
  779. return 0;
  780. }
  781. static void sunsu_config_port(struct uart_port *port, int flags)
  782. {
  783. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  784. if (flags & UART_CONFIG_TYPE) {
  785. /*
  786. * We are supposed to call autoconfig here, but this requires
  787. * splitting all the OBP probing crap from the UART probing.
  788. * We'll do it when we kill sunsu.c altogether.
  789. */
  790. port->type = up->type_probed; /* XXX */
  791. }
  792. }
  793. static int
  794. sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
  795. {
  796. return -EINVAL;
  797. }
  798. static const char *
  799. sunsu_type(struct uart_port *port)
  800. {
  801. int type = port->type;
  802. if (type >= ARRAY_SIZE(uart_config))
  803. type = 0;
  804. return uart_config[type].name;
  805. }
  806. static struct uart_ops sunsu_pops = {
  807. .tx_empty = sunsu_tx_empty,
  808. .set_mctrl = sunsu_set_mctrl,
  809. .get_mctrl = sunsu_get_mctrl,
  810. .stop_tx = sunsu_stop_tx,
  811. .start_tx = sunsu_start_tx,
  812. .stop_rx = sunsu_stop_rx,
  813. .enable_ms = sunsu_enable_ms,
  814. .break_ctl = sunsu_break_ctl,
  815. .startup = sunsu_startup,
  816. .shutdown = sunsu_shutdown,
  817. .set_termios = sunsu_set_termios,
  818. .type = sunsu_type,
  819. .release_port = sunsu_release_port,
  820. .request_port = sunsu_request_port,
  821. .config_port = sunsu_config_port,
  822. .verify_port = sunsu_verify_port,
  823. };
  824. #define UART_NR 4
  825. static struct uart_sunsu_port sunsu_ports[UART_NR];
  826. #ifdef CONFIG_SERIO
  827. static DEFINE_SPINLOCK(sunsu_serio_lock);
  828. static int sunsu_serio_write(struct serio *serio, unsigned char ch)
  829. {
  830. struct uart_sunsu_port *up = serio->port_data;
  831. unsigned long flags;
  832. int lsr;
  833. spin_lock_irqsave(&sunsu_serio_lock, flags);
  834. do {
  835. lsr = serial_in(up, UART_LSR);
  836. } while (!(lsr & UART_LSR_THRE));
  837. /* Send the character out. */
  838. serial_out(up, UART_TX, ch);
  839. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  840. return 0;
  841. }
  842. static int sunsu_serio_open(struct serio *serio)
  843. {
  844. struct uart_sunsu_port *up = serio->port_data;
  845. unsigned long flags;
  846. int ret;
  847. spin_lock_irqsave(&sunsu_serio_lock, flags);
  848. if (!up->serio_open) {
  849. up->serio_open = 1;
  850. ret = 0;
  851. } else
  852. ret = -EBUSY;
  853. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  854. return ret;
  855. }
  856. static void sunsu_serio_close(struct serio *serio)
  857. {
  858. struct uart_sunsu_port *up = serio->port_data;
  859. unsigned long flags;
  860. spin_lock_irqsave(&sunsu_serio_lock, flags);
  861. up->serio_open = 0;
  862. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  863. }
  864. #endif /* CONFIG_SERIO */
  865. static void sunsu_autoconfig(struct uart_sunsu_port *up)
  866. {
  867. unsigned char status1, status2, scratch, scratch2, scratch3;
  868. unsigned char save_lcr, save_mcr;
  869. unsigned long flags;
  870. if (up->su_type == SU_PORT_NONE)
  871. return;
  872. up->type_probed = PORT_UNKNOWN;
  873. up->port.iotype = UPIO_MEM;
  874. spin_lock_irqsave(&up->port.lock, flags);
  875. if (!(up->port.flags & UPF_BUGGY_UART)) {
  876. /*
  877. * Do a simple existence test first; if we fail this, there's
  878. * no point trying anything else.
  879. *
  880. * 0x80 is used as a nonsense port to prevent against false
  881. * positives due to ISA bus float. The assumption is that
  882. * 0x80 is a non-existent port; which should be safe since
  883. * include/asm/io.h also makes this assumption.
  884. */
  885. scratch = serial_inp(up, UART_IER);
  886. serial_outp(up, UART_IER, 0);
  887. #ifdef __i386__
  888. outb(0xff, 0x080);
  889. #endif
  890. scratch2 = serial_inp(up, UART_IER);
  891. serial_outp(up, UART_IER, 0x0f);
  892. #ifdef __i386__
  893. outb(0, 0x080);
  894. #endif
  895. scratch3 = serial_inp(up, UART_IER);
  896. serial_outp(up, UART_IER, scratch);
  897. if (scratch2 != 0 || scratch3 != 0x0F)
  898. goto out; /* We failed; there's nothing here */
  899. }
  900. save_mcr = serial_in(up, UART_MCR);
  901. save_lcr = serial_in(up, UART_LCR);
  902. /*
  903. * Check to see if a UART is really there. Certain broken
  904. * internal modems based on the Rockwell chipset fail this
  905. * test, because they apparently don't implement the loopback
  906. * test mode. So this test is skipped on the COM 1 through
  907. * COM 4 ports. This *should* be safe, since no board
  908. * manufacturer would be stupid enough to design a board
  909. * that conflicts with COM 1-4 --- we hope!
  910. */
  911. if (!(up->port.flags & UPF_SKIP_TEST)) {
  912. serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
  913. status1 = serial_inp(up, UART_MSR) & 0xF0;
  914. serial_outp(up, UART_MCR, save_mcr);
  915. if (status1 != 0x90)
  916. goto out; /* We failed loopback test */
  917. }
  918. serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
  919. serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
  920. serial_outp(up, UART_LCR, 0);
  921. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  922. scratch = serial_in(up, UART_IIR) >> 6;
  923. switch (scratch) {
  924. case 0:
  925. up->port.type = PORT_16450;
  926. break;
  927. case 1:
  928. up->port.type = PORT_UNKNOWN;
  929. break;
  930. case 2:
  931. up->port.type = PORT_16550;
  932. break;
  933. case 3:
  934. up->port.type = PORT_16550A;
  935. break;
  936. }
  937. if (up->port.type == PORT_16550A) {
  938. /* Check for Startech UART's */
  939. serial_outp(up, UART_LCR, UART_LCR_DLAB);
  940. if (serial_in(up, UART_EFR) == 0) {
  941. up->port.type = PORT_16650;
  942. } else {
  943. serial_outp(up, UART_LCR, 0xBF);
  944. if (serial_in(up, UART_EFR) == 0)
  945. up->port.type = PORT_16650V2;
  946. }
  947. }
  948. if (up->port.type == PORT_16550A) {
  949. /* Check for TI 16750 */
  950. serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
  951. serial_outp(up, UART_FCR,
  952. UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
  953. scratch = serial_in(up, UART_IIR) >> 5;
  954. if (scratch == 7) {
  955. /*
  956. * If this is a 16750, and not a cheap UART
  957. * clone, then it should only go into 64 byte
  958. * mode if the UART_FCR7_64BYTE bit was set
  959. * while UART_LCR_DLAB was latched.
  960. */
  961. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  962. serial_outp(up, UART_LCR, 0);
  963. serial_outp(up, UART_FCR,
  964. UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
  965. scratch = serial_in(up, UART_IIR) >> 5;
  966. if (scratch == 6)
  967. up->port.type = PORT_16750;
  968. }
  969. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  970. }
  971. serial_outp(up, UART_LCR, save_lcr);
  972. if (up->port.type == PORT_16450) {
  973. scratch = serial_in(up, UART_SCR);
  974. serial_outp(up, UART_SCR, 0xa5);
  975. status1 = serial_in(up, UART_SCR);
  976. serial_outp(up, UART_SCR, 0x5a);
  977. status2 = serial_in(up, UART_SCR);
  978. serial_outp(up, UART_SCR, scratch);
  979. if ((status1 != 0xa5) || (status2 != 0x5a))
  980. up->port.type = PORT_8250;
  981. }
  982. up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
  983. if (up->port.type == PORT_UNKNOWN)
  984. goto out;
  985. up->type_probed = up->port.type; /* XXX */
  986. /*
  987. * Reset the UART.
  988. */
  989. #ifdef CONFIG_SERIAL_8250_RSA
  990. if (up->port.type == PORT_RSA)
  991. serial_outp(up, UART_RSA_FRR, 0);
  992. #endif
  993. serial_outp(up, UART_MCR, save_mcr);
  994. serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
  995. UART_FCR_CLEAR_RCVR |
  996. UART_FCR_CLEAR_XMIT));
  997. serial_outp(up, UART_FCR, 0);
  998. (void)serial_in(up, UART_RX);
  999. serial_outp(up, UART_IER, 0);
  1000. out:
  1001. spin_unlock_irqrestore(&up->port.lock, flags);
  1002. }
  1003. static struct uart_driver sunsu_reg = {
  1004. .owner = THIS_MODULE,
  1005. .driver_name = "sunsu",
  1006. .dev_name = "ttyS",
  1007. .major = TTY_MAJOR,
  1008. };
  1009. static int sunsu_kbd_ms_init(struct uart_sunsu_port *up)
  1010. {
  1011. int quot, baud;
  1012. #ifdef CONFIG_SERIO
  1013. struct serio *serio;
  1014. #endif
  1015. if (up->su_type == SU_PORT_KBD) {
  1016. up->cflag = B1200 | CS8 | CLOCAL | CREAD;
  1017. baud = 1200;
  1018. } else {
  1019. up->cflag = B4800 | CS8 | CLOCAL | CREAD;
  1020. baud = 4800;
  1021. }
  1022. quot = up->port.uartclk / (16 * baud);
  1023. sunsu_autoconfig(up);
  1024. if (up->port.type == PORT_UNKNOWN)
  1025. return -ENODEV;
  1026. printk("%s: %s port at %llx, irq %u\n",
  1027. up->port.dev->of_node->full_name,
  1028. (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
  1029. (unsigned long long) up->port.mapbase,
  1030. up->port.irq);
  1031. #ifdef CONFIG_SERIO
  1032. serio = &up->serio;
  1033. serio->port_data = up;
  1034. serio->id.type = SERIO_RS232;
  1035. if (up->su_type == SU_PORT_KBD) {
  1036. serio->id.proto = SERIO_SUNKBD;
  1037. strlcpy(serio->name, "sukbd", sizeof(serio->name));
  1038. } else {
  1039. serio->id.proto = SERIO_SUN;
  1040. serio->id.extra = 1;
  1041. strlcpy(serio->name, "sums", sizeof(serio->name));
  1042. }
  1043. strlcpy(serio->phys,
  1044. (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
  1045. sizeof(serio->phys));
  1046. serio->write = sunsu_serio_write;
  1047. serio->open = sunsu_serio_open;
  1048. serio->close = sunsu_serio_close;
  1049. serio->dev.parent = up->port.dev;
  1050. serio_register_port(serio);
  1051. #endif
  1052. sunsu_change_speed(&up->port, up->cflag, 0, quot);
  1053. sunsu_startup(&up->port);
  1054. return 0;
  1055. }
  1056. /*
  1057. * ------------------------------------------------------------
  1058. * Serial console driver
  1059. * ------------------------------------------------------------
  1060. */
  1061. #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
  1062. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  1063. /*
  1064. * Wait for transmitter & holding register to empty
  1065. */
  1066. static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
  1067. {
  1068. unsigned int status, tmout = 10000;
  1069. /* Wait up to 10ms for the character(s) to be sent. */
  1070. do {
  1071. status = serial_in(up, UART_LSR);
  1072. if (status & UART_LSR_BI)
  1073. up->lsr_break_flag = UART_LSR_BI;
  1074. if (--tmout == 0)
  1075. break;
  1076. udelay(1);
  1077. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  1078. /* Wait up to 1s for flow control if necessary */
  1079. if (up->port.flags & UPF_CONS_FLOW) {
  1080. tmout = 1000000;
  1081. while (--tmout &&
  1082. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  1083. udelay(1);
  1084. }
  1085. }
  1086. static void sunsu_console_putchar(struct uart_port *port, int ch)
  1087. {
  1088. struct uart_sunsu_port *up = (struct uart_sunsu_port *)port;
  1089. wait_for_xmitr(up);
  1090. serial_out(up, UART_TX, ch);
  1091. }
  1092. /*
  1093. * Print a string to the serial port trying not to disturb
  1094. * any possible real use of the port...
  1095. */
  1096. static void sunsu_console_write(struct console *co, const char *s,
  1097. unsigned int count)
  1098. {
  1099. struct uart_sunsu_port *up = &sunsu_ports[co->index];
  1100. unsigned long flags;
  1101. unsigned int ier;
  1102. int locked = 1;
  1103. local_irq_save(flags);
  1104. if (up->port.sysrq) {
  1105. locked = 0;
  1106. } else if (oops_in_progress) {
  1107. locked = spin_trylock(&up->port.lock);
  1108. } else
  1109. spin_lock(&up->port.lock);
  1110. /*
  1111. * First save the UER then disable the interrupts
  1112. */
  1113. ier = serial_in(up, UART_IER);
  1114. serial_out(up, UART_IER, 0);
  1115. uart_console_write(&up->port, s, count, sunsu_console_putchar);
  1116. /*
  1117. * Finally, wait for transmitter to become empty
  1118. * and restore the IER
  1119. */
  1120. wait_for_xmitr(up);
  1121. serial_out(up, UART_IER, ier);
  1122. if (locked)
  1123. spin_unlock(&up->port.lock);
  1124. local_irq_restore(flags);
  1125. }
  1126. /*
  1127. * Setup initial baud/bits/parity. We do two things here:
  1128. * - construct a cflag setting for the first su_open()
  1129. * - initialize the serial port
  1130. * Return non-zero if we didn't find a serial port.
  1131. */
  1132. static int __init sunsu_console_setup(struct console *co, char *options)
  1133. {
  1134. static struct ktermios dummy;
  1135. struct ktermios termios;
  1136. struct uart_port *port;
  1137. printk("Console: ttyS%d (SU)\n",
  1138. (sunsu_reg.minor - 64) + co->index);
  1139. /*
  1140. * Check whether an invalid uart number has been specified, and
  1141. * if so, search for the first available port that does have
  1142. * console support.
  1143. */
  1144. if (co->index >= UART_NR)
  1145. co->index = 0;
  1146. port = &sunsu_ports[co->index].port;
  1147. /*
  1148. * Temporary fix.
  1149. */
  1150. spin_lock_init(&port->lock);
  1151. /* Get firmware console settings. */
  1152. sunserial_console_termios(co, port->dev->of_node);
  1153. memset(&termios, 0, sizeof(struct ktermios));
  1154. termios.c_cflag = co->cflag;
  1155. port->mctrl |= TIOCM_DTR;
  1156. port->ops->set_termios(port, &termios, &dummy);
  1157. return 0;
  1158. }
  1159. static struct console sunsu_console = {
  1160. .name = "ttyS",
  1161. .write = sunsu_console_write,
  1162. .device = uart_console_device,
  1163. .setup = sunsu_console_setup,
  1164. .flags = CON_PRINTBUFFER,
  1165. .index = -1,
  1166. .data = &sunsu_reg,
  1167. };
  1168. /*
  1169. * Register console.
  1170. */
  1171. static inline struct console *SUNSU_CONSOLE(void)
  1172. {
  1173. return &sunsu_console;
  1174. }
  1175. #else
  1176. #define SUNSU_CONSOLE() (NULL)
  1177. #define sunsu_serial_console_init() do { } while (0)
  1178. #endif
  1179. static enum su_type su_get_type(struct device_node *dp)
  1180. {
  1181. struct device_node *ap = of_find_node_by_path("/aliases");
  1182. if (ap) {
  1183. const char *keyb = of_get_property(ap, "keyboard", NULL);
  1184. const char *ms = of_get_property(ap, "mouse", NULL);
  1185. if (keyb) {
  1186. if (dp == of_find_node_by_path(keyb))
  1187. return SU_PORT_KBD;
  1188. }
  1189. if (ms) {
  1190. if (dp == of_find_node_by_path(ms))
  1191. return SU_PORT_MS;
  1192. }
  1193. }
  1194. return SU_PORT_PORT;
  1195. }
  1196. static int su_probe(struct platform_device *op)
  1197. {
  1198. static int inst;
  1199. struct device_node *dp = op->dev.of_node;
  1200. struct uart_sunsu_port *up;
  1201. struct resource *rp;
  1202. enum su_type type;
  1203. bool ignore_line;
  1204. int err;
  1205. type = su_get_type(dp);
  1206. if (type == SU_PORT_PORT) {
  1207. if (inst >= UART_NR)
  1208. return -EINVAL;
  1209. up = &sunsu_ports[inst];
  1210. } else {
  1211. up = kzalloc(sizeof(*up), GFP_KERNEL);
  1212. if (!up)
  1213. return -ENOMEM;
  1214. }
  1215. up->port.line = inst;
  1216. spin_lock_init(&up->port.lock);
  1217. up->su_type = type;
  1218. rp = &op->resource[0];
  1219. up->port.mapbase = rp->start;
  1220. up->reg_size = resource_size(rp);
  1221. up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
  1222. if (!up->port.membase) {
  1223. if (type != SU_PORT_PORT)
  1224. kfree(up);
  1225. return -ENOMEM;
  1226. }
  1227. up->port.irq = op->archdata.irqs[0];
  1228. up->port.dev = &op->dev;
  1229. up->port.type = PORT_UNKNOWN;
  1230. up->port.uartclk = (SU_BASE_BAUD * 16);
  1231. err = 0;
  1232. if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
  1233. err = sunsu_kbd_ms_init(up);
  1234. if (err) {
  1235. of_iounmap(&op->resource[0],
  1236. up->port.membase, up->reg_size);
  1237. kfree(up);
  1238. return err;
  1239. }
  1240. dev_set_drvdata(&op->dev, up);
  1241. return 0;
  1242. }
  1243. up->port.flags |= UPF_BOOT_AUTOCONF;
  1244. sunsu_autoconfig(up);
  1245. err = -ENODEV;
  1246. if (up->port.type == PORT_UNKNOWN)
  1247. goto out_unmap;
  1248. up->port.ops = &sunsu_pops;
  1249. ignore_line = false;
  1250. if (!strcmp(dp->name, "rsc-console") ||
  1251. !strcmp(dp->name, "lom-console"))
  1252. ignore_line = true;
  1253. sunserial_console_match(SUNSU_CONSOLE(), dp,
  1254. &sunsu_reg, up->port.line,
  1255. ignore_line);
  1256. err = uart_add_one_port(&sunsu_reg, &up->port);
  1257. if (err)
  1258. goto out_unmap;
  1259. dev_set_drvdata(&op->dev, up);
  1260. inst++;
  1261. return 0;
  1262. out_unmap:
  1263. of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
  1264. return err;
  1265. }
  1266. static int su_remove(struct platform_device *op)
  1267. {
  1268. struct uart_sunsu_port *up = dev_get_drvdata(&op->dev);
  1269. bool kbdms = false;
  1270. if (up->su_type == SU_PORT_MS ||
  1271. up->su_type == SU_PORT_KBD)
  1272. kbdms = true;
  1273. if (kbdms) {
  1274. #ifdef CONFIG_SERIO
  1275. serio_unregister_port(&up->serio);
  1276. #endif
  1277. } else if (up->port.type != PORT_UNKNOWN)
  1278. uart_remove_one_port(&sunsu_reg, &up->port);
  1279. if (up->port.membase)
  1280. of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
  1281. if (kbdms)
  1282. kfree(up);
  1283. dev_set_drvdata(&op->dev, NULL);
  1284. return 0;
  1285. }
  1286. static const struct of_device_id su_match[] = {
  1287. {
  1288. .name = "su",
  1289. },
  1290. {
  1291. .name = "su_pnp",
  1292. },
  1293. {
  1294. .name = "serial",
  1295. .compatible = "su",
  1296. },
  1297. {
  1298. .type = "serial",
  1299. .compatible = "su",
  1300. },
  1301. {},
  1302. };
  1303. MODULE_DEVICE_TABLE(of, su_match);
  1304. static struct platform_driver su_driver = {
  1305. .driver = {
  1306. .name = "su",
  1307. .owner = THIS_MODULE,
  1308. .of_match_table = su_match,
  1309. },
  1310. .probe = su_probe,
  1311. .remove = su_remove,
  1312. };
  1313. static int __init sunsu_init(void)
  1314. {
  1315. struct device_node *dp;
  1316. int err;
  1317. int num_uart = 0;
  1318. for_each_node_by_name(dp, "su") {
  1319. if (su_get_type(dp) == SU_PORT_PORT)
  1320. num_uart++;
  1321. }
  1322. for_each_node_by_name(dp, "su_pnp") {
  1323. if (su_get_type(dp) == SU_PORT_PORT)
  1324. num_uart++;
  1325. }
  1326. for_each_node_by_name(dp, "serial") {
  1327. if (of_device_is_compatible(dp, "su")) {
  1328. if (su_get_type(dp) == SU_PORT_PORT)
  1329. num_uart++;
  1330. }
  1331. }
  1332. for_each_node_by_type(dp, "serial") {
  1333. if (of_device_is_compatible(dp, "su")) {
  1334. if (su_get_type(dp) == SU_PORT_PORT)
  1335. num_uart++;
  1336. }
  1337. }
  1338. if (num_uart) {
  1339. err = sunserial_register_minors(&sunsu_reg, num_uart);
  1340. if (err)
  1341. return err;
  1342. }
  1343. err = platform_driver_register(&su_driver);
  1344. if (err && num_uart)
  1345. sunserial_unregister_minors(&sunsu_reg, num_uart);
  1346. return err;
  1347. }
  1348. static void __exit sunsu_exit(void)
  1349. {
  1350. if (sunsu_reg.nr)
  1351. sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);
  1352. }
  1353. module_init(sunsu_init);
  1354. module_exit(sunsu_exit);
  1355. MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
  1356. MODULE_DESCRIPTION("Sun SU serial port driver");
  1357. MODULE_VERSION("2.0");
  1358. MODULE_LICENSE("GPL");