of_serial.c 6.5 KB

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  1. /*
  2. * Serial Port driver for Open Firmware platform devices
  3. *
  4. * Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. *
  11. */
  12. #include <linux/init.h>
  13. #include <linux/module.h>
  14. #include <linux/slab.h>
  15. #include <linux/delay.h>
  16. #include <linux/serial_core.h>
  17. #include <linux/serial_8250.h>
  18. #include <linux/serial_reg.h>
  19. #include <linux/of_address.h>
  20. #include <linux/of_irq.h>
  21. #include <linux/of_serial.h>
  22. #include <linux/of_platform.h>
  23. #include <linux/nwpserial.h>
  24. #include <linux/clk.h>
  25. struct of_serial_info {
  26. struct clk *clk;
  27. int type;
  28. int line;
  29. };
  30. #ifdef CONFIG_ARCH_TEGRA
  31. void tegra_serial_handle_break(struct uart_port *p)
  32. {
  33. unsigned int status, tmout = 10000;
  34. do {
  35. status = p->serial_in(p, UART_LSR);
  36. if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
  37. status = p->serial_in(p, UART_RX);
  38. else
  39. break;
  40. if (--tmout == 0)
  41. break;
  42. udelay(1);
  43. } while (1);
  44. }
  45. /* FIXME remove this export when tegra finishes conversion to open firmware */
  46. EXPORT_SYMBOL_GPL(tegra_serial_handle_break);
  47. #endif
  48. /*
  49. * Fill a struct uart_port for a given device node
  50. */
  51. static int of_platform_serial_setup(struct platform_device *ofdev,
  52. int type, struct uart_port *port,
  53. struct of_serial_info *info)
  54. {
  55. struct resource resource;
  56. struct device_node *np = ofdev->dev.of_node;
  57. u32 clk, spd, prop;
  58. int ret;
  59. memset(port, 0, sizeof *port);
  60. if (of_property_read_u32(np, "clock-frequency", &clk)) {
  61. /* Get clk rate through clk driver if present */
  62. info->clk = clk_get(&ofdev->dev, NULL);
  63. if (IS_ERR(info->clk)) {
  64. dev_warn(&ofdev->dev,
  65. "clk or clock-frequency not defined\n");
  66. return PTR_ERR(info->clk);
  67. }
  68. clk_prepare_enable(info->clk);
  69. clk = clk_get_rate(info->clk);
  70. }
  71. /* If current-speed was set, then try not to change it. */
  72. if (of_property_read_u32(np, "current-speed", &spd) == 0)
  73. port->custom_divisor = clk / (16 * spd);
  74. ret = of_address_to_resource(np, 0, &resource);
  75. if (ret) {
  76. dev_warn(&ofdev->dev, "invalid address\n");
  77. goto out;
  78. }
  79. spin_lock_init(&port->lock);
  80. port->mapbase = resource.start;
  81. /* Check for shifted address mapping */
  82. if (of_property_read_u32(np, "reg-offset", &prop) == 0)
  83. port->mapbase += prop;
  84. /* Check for registers offset within the devices address range */
  85. if (of_property_read_u32(np, "reg-shift", &prop) == 0)
  86. port->regshift = prop;
  87. port->irq = irq_of_parse_and_map(np, 0);
  88. port->iotype = UPIO_MEM;
  89. if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
  90. switch (prop) {
  91. case 1:
  92. port->iotype = UPIO_MEM;
  93. break;
  94. case 4:
  95. port->iotype = UPIO_MEM32;
  96. break;
  97. default:
  98. dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
  99. prop);
  100. ret = -EINVAL;
  101. goto out;
  102. }
  103. }
  104. port->type = type;
  105. port->uartclk = clk;
  106. port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
  107. | UPF_FIXED_PORT | UPF_FIXED_TYPE;
  108. if (of_find_property(np, "no-loopback-test", NULL))
  109. port->flags |= UPF_SKIP_TEST;
  110. port->dev = &ofdev->dev;
  111. if (type == PORT_TEGRA)
  112. port->handle_break = tegra_serial_handle_break;
  113. return 0;
  114. out:
  115. if (info->clk)
  116. clk_disable_unprepare(info->clk);
  117. return ret;
  118. }
  119. /*
  120. * Try to register a serial port
  121. */
  122. static struct of_device_id of_platform_serial_table[];
  123. static int of_platform_serial_probe(struct platform_device *ofdev)
  124. {
  125. const struct of_device_id *match;
  126. struct of_serial_info *info;
  127. struct uart_port port;
  128. int port_type;
  129. int ret;
  130. match = of_match_device(of_platform_serial_table, &ofdev->dev);
  131. if (!match)
  132. return -EINVAL;
  133. if (of_find_property(ofdev->dev.of_node, "used-by-rtas", NULL))
  134. return -EBUSY;
  135. info = kmalloc(sizeof(*info), GFP_KERNEL);
  136. if (info == NULL)
  137. return -ENOMEM;
  138. port_type = (unsigned long)match->data;
  139. ret = of_platform_serial_setup(ofdev, port_type, &port, info);
  140. if (ret)
  141. goto out;
  142. switch (port_type) {
  143. #ifdef CONFIG_SERIAL_8250
  144. case PORT_8250 ... PORT_MAX_8250:
  145. {
  146. /* For now the of bindings don't support the extra
  147. 8250 specific bits */
  148. struct uart_8250_port port8250;
  149. memset(&port8250, 0, sizeof(port8250));
  150. port8250.port = port;
  151. ret = serial8250_register_8250_port(&port8250);
  152. break;
  153. }
  154. #endif
  155. #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
  156. case PORT_NWPSERIAL:
  157. ret = nwpserial_register_port(&port);
  158. break;
  159. #endif
  160. default:
  161. /* need to add code for these */
  162. case PORT_UNKNOWN:
  163. dev_info(&ofdev->dev, "Unknown serial port found, ignored\n");
  164. ret = -ENODEV;
  165. break;
  166. }
  167. if (ret < 0)
  168. goto out;
  169. info->type = port_type;
  170. info->line = ret;
  171. dev_set_drvdata(&ofdev->dev, info);
  172. return 0;
  173. out:
  174. kfree(info);
  175. irq_dispose_mapping(port.irq);
  176. return ret;
  177. }
  178. /*
  179. * Release a line
  180. */
  181. static int of_platform_serial_remove(struct platform_device *ofdev)
  182. {
  183. struct of_serial_info *info = dev_get_drvdata(&ofdev->dev);
  184. switch (info->type) {
  185. #ifdef CONFIG_SERIAL_8250
  186. case PORT_8250 ... PORT_MAX_8250:
  187. serial8250_unregister_port(info->line);
  188. break;
  189. #endif
  190. #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
  191. case PORT_NWPSERIAL:
  192. nwpserial_unregister_port(info->line);
  193. break;
  194. #endif
  195. default:
  196. /* need to add code for these */
  197. break;
  198. }
  199. if (info->clk)
  200. clk_disable_unprepare(info->clk);
  201. kfree(info);
  202. return 0;
  203. }
  204. /*
  205. * A few common types, add more as needed.
  206. */
  207. static struct of_device_id of_platform_serial_table[] = {
  208. { .compatible = "ns8250", .data = (void *)PORT_8250, },
  209. { .compatible = "ns16450", .data = (void *)PORT_16450, },
  210. { .compatible = "ns16550a", .data = (void *)PORT_16550A, },
  211. { .compatible = "ns16550", .data = (void *)PORT_16550, },
  212. { .compatible = "ns16750", .data = (void *)PORT_16750, },
  213. { .compatible = "ns16850", .data = (void *)PORT_16850, },
  214. { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
  215. { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
  216. #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
  217. { .compatible = "ibm,qpace-nwp-serial",
  218. .data = (void *)PORT_NWPSERIAL, },
  219. #endif
  220. { .type = "serial", .data = (void *)PORT_UNKNOWN, },
  221. { /* end of list */ },
  222. };
  223. static struct platform_driver of_platform_serial_driver = {
  224. .driver = {
  225. .name = "of_serial",
  226. .owner = THIS_MODULE,
  227. .of_match_table = of_platform_serial_table,
  228. },
  229. .probe = of_platform_serial_probe,
  230. .remove = of_platform_serial_remove,
  231. };
  232. module_platform_driver(of_platform_serial_driver);
  233. MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
  234. MODULE_LICENSE("GPL");
  235. MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");