arc_uart.c 19 KB

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  1. /*
  2. * ARC On-Chip(fpga) UART Driver
  3. *
  4. * Copyright (C) 2010-2012 Synopsys, Inc. (www.synopsys.com)
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * vineetg: July 10th 2012
  11. * -Decoupled the driver from arch/arc
  12. * +Using platform_get_resource() for irq/membase (thx to bfin_uart.c)
  13. * +Using early_platform_xxx() for early console (thx to mach-shmobile/xxx)
  14. *
  15. * Vineetg: Aug 21st 2010
  16. * -Is uart_tx_stopped() not done in tty write path as it has already been
  17. * taken care of, in serial core
  18. *
  19. * Vineetg: Aug 18th 2010
  20. * -New Serial Core based ARC UART driver
  21. * -Derived largely from blackfin driver albiet with some major tweaks
  22. *
  23. * TODO:
  24. * -check if sysreq works
  25. */
  26. #if defined(CONFIG_SERIAL_ARC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  27. #define SUPPORT_SYSRQ
  28. #endif
  29. #include <linux/module.h>
  30. #include <linux/serial.h>
  31. #include <linux/console.h>
  32. #include <linux/sysrq.h>
  33. #include <linux/platform_device.h>
  34. #include <linux/tty.h>
  35. #include <linux/tty_flip.h>
  36. #include <linux/serial_core.h>
  37. #include <linux/io.h>
  38. /*************************************
  39. * ARC UART Hardware Specs
  40. ************************************/
  41. #define ARC_UART_TX_FIFO_SIZE 1
  42. /*
  43. * UART Register set (this is not a Standards Compliant IP)
  44. * Also each reg is Word aligned, but only 8 bits wide
  45. */
  46. #define R_ID0 0
  47. #define R_ID1 4
  48. #define R_ID2 8
  49. #define R_ID3 12
  50. #define R_DATA 16
  51. #define R_STS 20
  52. #define R_BAUDL 24
  53. #define R_BAUDH 28
  54. /* Bits for UART Status Reg (R/W) */
  55. #define RXIENB 0x04 /* Receive Interrupt Enable */
  56. #define TXIENB 0x40 /* Transmit Interrupt Enable */
  57. #define RXEMPTY 0x20 /* Receive FIFO Empty: No char receivede */
  58. #define TXEMPTY 0x80 /* Transmit FIFO Empty, thus char can be written into */
  59. #define RXFULL 0x08 /* Receive FIFO full */
  60. #define RXFULL1 0x10 /* Receive FIFO has space for 1 char (tot space=4) */
  61. #define RXFERR 0x01 /* Frame Error: Stop Bit not detected */
  62. #define RXOERR 0x02 /* OverFlow Err: Char recv but RXFULL still set */
  63. /* Uart bit fiddling helpers: lowest level */
  64. #define RBASE(uart, reg) (uart->port.membase + reg)
  65. #define UART_REG_SET(u, r, v) writeb((v), RBASE(u, r))
  66. #define UART_REG_GET(u, r) readb(RBASE(u, r))
  67. #define UART_REG_OR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) | (v))
  68. #define UART_REG_CLR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) & ~(v))
  69. /* Uart bit fiddling helpers: API level */
  70. #define UART_SET_DATA(uart, val) UART_REG_SET(uart, R_DATA, val)
  71. #define UART_GET_DATA(uart) UART_REG_GET(uart, R_DATA)
  72. #define UART_SET_BAUDH(uart, val) UART_REG_SET(uart, R_BAUDH, val)
  73. #define UART_SET_BAUDL(uart, val) UART_REG_SET(uart, R_BAUDL, val)
  74. #define UART_CLR_STATUS(uart, val) UART_REG_CLR(uart, R_STS, val)
  75. #define UART_GET_STATUS(uart) UART_REG_GET(uart, R_STS)
  76. #define UART_ALL_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB|TXIENB)
  77. #define UART_RX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB)
  78. #define UART_TX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, TXIENB)
  79. #define UART_ALL_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB|TXIENB)
  80. #define UART_RX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB)
  81. #define UART_TX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, TXIENB)
  82. #define ARC_SERIAL_DEV_NAME "ttyARC"
  83. struct arc_uart_port {
  84. struct uart_port port;
  85. unsigned long baud;
  86. int is_emulated; /* H/w vs. Instruction Set Simulator */
  87. };
  88. #define to_arc_port(uport) container_of(uport, struct arc_uart_port, port)
  89. static struct arc_uart_port arc_uart_ports[CONFIG_SERIAL_ARC_NR_PORTS];
  90. #ifdef CONFIG_SERIAL_ARC_CONSOLE
  91. static struct console arc_console;
  92. #endif
  93. #define DRIVER_NAME "arc-uart"
  94. static struct uart_driver arc_uart_driver = {
  95. .owner = THIS_MODULE,
  96. .driver_name = DRIVER_NAME,
  97. .dev_name = ARC_SERIAL_DEV_NAME,
  98. .major = 0,
  99. .minor = 0,
  100. .nr = CONFIG_SERIAL_ARC_NR_PORTS,
  101. #ifdef CONFIG_SERIAL_ARC_CONSOLE
  102. .cons = &arc_console,
  103. #endif
  104. };
  105. static void arc_serial_stop_rx(struct uart_port *port)
  106. {
  107. struct arc_uart_port *uart = to_arc_port(port);
  108. UART_RX_IRQ_DISABLE(uart);
  109. }
  110. static void arc_serial_stop_tx(struct uart_port *port)
  111. {
  112. struct arc_uart_port *uart = to_arc_port(port);
  113. while (!(UART_GET_STATUS(uart) & TXEMPTY))
  114. cpu_relax();
  115. UART_TX_IRQ_DISABLE(uart);
  116. }
  117. /*
  118. * Return TIOCSER_TEMT when transmitter is not busy.
  119. */
  120. static unsigned int arc_serial_tx_empty(struct uart_port *port)
  121. {
  122. struct arc_uart_port *uart = to_arc_port(port);
  123. unsigned int stat;
  124. stat = UART_GET_STATUS(uart);
  125. if (stat & TXEMPTY)
  126. return TIOCSER_TEMT;
  127. return 0;
  128. }
  129. /*
  130. * Driver internal routine, used by both tty(serial core) as well as tx-isr
  131. * -Called under spinlock in either cases
  132. * -also tty->stopped / tty->hw_stopped has already been checked
  133. * = by uart_start( ) before calling us
  134. * = tx_ist checks that too before calling
  135. */
  136. static void arc_serial_tx_chars(struct arc_uart_port *uart)
  137. {
  138. struct circ_buf *xmit = &uart->port.state->xmit;
  139. int sent = 0;
  140. unsigned char ch;
  141. if (unlikely(uart->port.x_char)) {
  142. UART_SET_DATA(uart, uart->port.x_char);
  143. uart->port.icount.tx++;
  144. uart->port.x_char = 0;
  145. sent = 1;
  146. } else if (xmit->tail != xmit->head) { /* TODO: uart_circ_empty */
  147. ch = xmit->buf[xmit->tail];
  148. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  149. uart->port.icount.tx++;
  150. while (!(UART_GET_STATUS(uart) & TXEMPTY))
  151. cpu_relax();
  152. UART_SET_DATA(uart, ch);
  153. sent = 1;
  154. }
  155. /*
  156. * If num chars in xmit buffer are too few, ask tty layer for more.
  157. * By Hard ISR to schedule processing in software interrupt part
  158. */
  159. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  160. uart_write_wakeup(&uart->port);
  161. if (sent)
  162. UART_TX_IRQ_ENABLE(uart);
  163. }
  164. /*
  165. * port is locked and interrupts are disabled
  166. * uart_start( ) calls us under the port spinlock irqsave
  167. */
  168. static void arc_serial_start_tx(struct uart_port *port)
  169. {
  170. struct arc_uart_port *uart = to_arc_port(port);
  171. arc_serial_tx_chars(uart);
  172. }
  173. static void arc_serial_rx_chars(struct arc_uart_port *uart)
  174. {
  175. struct tty_struct *tty = tty_port_tty_get(&uart->port.state->port);
  176. unsigned int status, ch, flg = 0;
  177. if (!tty)
  178. return;
  179. /*
  180. * UART has 4 deep RX-FIFO. Driver's recongnition of this fact
  181. * is very subtle. Here's how ...
  182. * Upon getting a RX-Intr, such that RX-EMPTY=0, meaning data available,
  183. * driver reads the DATA Reg and keeps doing that in a loop, until
  184. * RX-EMPTY=1. Multiple chars being avail, with a single Interrupt,
  185. * before RX-EMPTY=0, implies some sort of buffering going on in the
  186. * controller, which is indeed the Rx-FIFO.
  187. */
  188. while (!((status = UART_GET_STATUS(uart)) & RXEMPTY)) {
  189. ch = UART_GET_DATA(uart);
  190. uart->port.icount.rx++;
  191. if (unlikely(status & (RXOERR | RXFERR))) {
  192. if (status & RXOERR) {
  193. uart->port.icount.overrun++;
  194. flg = TTY_OVERRUN;
  195. UART_CLR_STATUS(uart, RXOERR);
  196. }
  197. if (status & RXFERR) {
  198. uart->port.icount.frame++;
  199. flg = TTY_FRAME;
  200. UART_CLR_STATUS(uart, RXFERR);
  201. }
  202. } else
  203. flg = TTY_NORMAL;
  204. if (unlikely(uart_handle_sysrq_char(&uart->port, ch)))
  205. goto done;
  206. uart_insert_char(&uart->port, status, RXOERR, ch, flg);
  207. done:
  208. tty_flip_buffer_push(tty);
  209. }
  210. tty_kref_put(tty);
  211. }
  212. /*
  213. * A note on the Interrupt handling state machine of this driver
  214. *
  215. * kernel printk writes funnel thru the console driver framework and in order
  216. * to keep things simple as well as efficient, it writes to UART in polled
  217. * mode, in one shot, and exits.
  218. *
  219. * OTOH, Userland output (via tty layer), uses interrupt based writes as there
  220. * can be undeterministic delay between char writes.
  221. *
  222. * Thus Rx-interrupts are always enabled, while tx-interrupts are by default
  223. * disabled.
  224. *
  225. * When tty has some data to send out, serial core calls driver's start_tx
  226. * which
  227. * -checks-if-tty-buffer-has-char-to-send
  228. * -writes-data-to-uart
  229. * -enable-tx-intr
  230. *
  231. * Once data bits are pushed out, controller raises the Tx-room-avail-Interrupt.
  232. * The first thing Tx ISR does is disable further Tx interrupts (as this could
  233. * be the last char to send, before settling down into the quiet polled mode).
  234. * It then calls the exact routine used by tty layer write to send out any
  235. * more char in tty buffer. In case of sending, it re-enables Tx-intr. In case
  236. * of no data, it remains disabled.
  237. * This is how the transmit state machine is dynamically switched on/off
  238. */
  239. static irqreturn_t arc_serial_isr(int irq, void *dev_id)
  240. {
  241. struct arc_uart_port *uart = dev_id;
  242. unsigned int status;
  243. status = UART_GET_STATUS(uart);
  244. /*
  245. * Single IRQ for both Rx (data available) Tx (room available) Interrupt
  246. * notifications from the UART Controller.
  247. * To demultiplex between the two, we check the relevant bits
  248. */
  249. if ((status & RXIENB) && !(status & RXEMPTY)) {
  250. /* already in ISR, no need of xx_irqsave */
  251. spin_lock(&uart->port.lock);
  252. arc_serial_rx_chars(uart);
  253. spin_unlock(&uart->port.lock);
  254. }
  255. if ((status & TXIENB) && (status & TXEMPTY)) {
  256. /* Unconditionally disable further Tx-Interrupts.
  257. * will be enabled by tx_chars() if needed.
  258. */
  259. UART_TX_IRQ_DISABLE(uart);
  260. spin_lock(&uart->port.lock);
  261. if (!uart_tx_stopped(&uart->port))
  262. arc_serial_tx_chars(uart);
  263. spin_unlock(&uart->port.lock);
  264. }
  265. return IRQ_HANDLED;
  266. }
  267. static unsigned int arc_serial_get_mctrl(struct uart_port *port)
  268. {
  269. /*
  270. * Pretend we have a Modem status reg and following bits are
  271. * always set, to satify the serial core state machine
  272. * (DSR) Data Set Ready
  273. * (CTS) Clear To Send
  274. * (CAR) Carrier Detect
  275. */
  276. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  277. }
  278. static void arc_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  279. {
  280. /* MCR not present */
  281. }
  282. /* Enable Modem Status Interrupts */
  283. static void arc_serial_enable_ms(struct uart_port *port)
  284. {
  285. /* MSR not present */
  286. }
  287. static void arc_serial_break_ctl(struct uart_port *port, int break_state)
  288. {
  289. /* ARC UART doesn't support sending Break signal */
  290. }
  291. static int arc_serial_startup(struct uart_port *port)
  292. {
  293. struct arc_uart_port *uart = to_arc_port(port);
  294. /* Before we hook up the ISR, Disable all UART Interrupts */
  295. UART_ALL_IRQ_DISABLE(uart);
  296. if (request_irq(uart->port.irq, arc_serial_isr, 0, "arc uart rx-tx",
  297. uart)) {
  298. dev_warn(uart->port.dev, "Unable to attach ARC UART intr\n");
  299. return -EBUSY;
  300. }
  301. UART_RX_IRQ_ENABLE(uart); /* Only Rx IRQ enabled to begin with */
  302. return 0;
  303. }
  304. /* This is not really needed */
  305. static void arc_serial_shutdown(struct uart_port *port)
  306. {
  307. struct arc_uart_port *uart = to_arc_port(port);
  308. free_irq(uart->port.irq, uart);
  309. }
  310. static void
  311. arc_serial_set_termios(struct uart_port *port, struct ktermios *new,
  312. struct ktermios *old)
  313. {
  314. struct arc_uart_port *uart = to_arc_port(port);
  315. unsigned int baud, uartl, uarth, hw_val;
  316. unsigned long flags;
  317. /*
  318. * Use the generic handler so that any specially encoded baud rates
  319. * such as SPD_xx flags or "%B0" can be handled
  320. * Max Baud I suppose will not be more than current 115K * 4
  321. * Formula for ARC UART is: hw-val = ((CLK/(BAUD*4)) -1)
  322. * spread over two 8-bit registers
  323. */
  324. baud = uart_get_baud_rate(port, new, old, 0, 460800);
  325. hw_val = port->uartclk / (uart->baud * 4) - 1;
  326. uartl = hw_val & 0xFF;
  327. uarth = (hw_val >> 8) & 0xFF;
  328. /*
  329. * UART ISS(Instruction Set simulator) emulation has a subtle bug:
  330. * A existing value of Baudh = 0 is used as a indication to startup
  331. * it's internal state machine.
  332. * Thus if baudh is set to 0, 2 times, it chokes.
  333. * This happens with BAUD=115200 and the formaula above
  334. * Until that is fixed, when running on ISS, we will set baudh to !0
  335. */
  336. if (uart->is_emulated)
  337. uarth = 1;
  338. spin_lock_irqsave(&port->lock, flags);
  339. UART_ALL_IRQ_DISABLE(uart);
  340. UART_SET_BAUDL(uart, uartl);
  341. UART_SET_BAUDH(uart, uarth);
  342. UART_RX_IRQ_ENABLE(uart);
  343. /*
  344. * UART doesn't support Parity/Hardware Flow Control;
  345. * Only supports 8N1 character size
  346. */
  347. new->c_cflag &= ~(CMSPAR|CRTSCTS|CSIZE);
  348. new->c_cflag |= CS8;
  349. if (old)
  350. tty_termios_copy_hw(new, old);
  351. /* Don't rewrite B0 */
  352. if (tty_termios_baud_rate(new))
  353. tty_termios_encode_baud_rate(new, baud, baud);
  354. uart_update_timeout(port, new->c_cflag, baud);
  355. spin_unlock_irqrestore(&port->lock, flags);
  356. }
  357. static const char *arc_serial_type(struct uart_port *port)
  358. {
  359. struct arc_uart_port *uart = to_arc_port(port);
  360. return uart->port.type == PORT_ARC ? DRIVER_NAME : NULL;
  361. }
  362. static void arc_serial_release_port(struct uart_port *port)
  363. {
  364. }
  365. static int arc_serial_request_port(struct uart_port *port)
  366. {
  367. return 0;
  368. }
  369. /*
  370. * Verify the new serial_struct (for TIOCSSERIAL).
  371. */
  372. static int
  373. arc_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  374. {
  375. if (port->type != PORT_UNKNOWN && ser->type != PORT_ARC)
  376. return -EINVAL;
  377. return 0;
  378. }
  379. /*
  380. * Configure/autoconfigure the port.
  381. */
  382. static void arc_serial_config_port(struct uart_port *port, int flags)
  383. {
  384. struct arc_uart_port *uart = to_arc_port(port);
  385. if (flags & UART_CONFIG_TYPE)
  386. uart->port.type = PORT_ARC;
  387. }
  388. #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_ARC_CONSOLE)
  389. static void arc_serial_poll_putchar(struct uart_port *port, unsigned char chr)
  390. {
  391. struct arc_uart_port *uart = to_arc_port(port);
  392. while (!(UART_GET_STATUS(uart) & TXEMPTY))
  393. cpu_relax();
  394. UART_SET_DATA(uart, chr);
  395. }
  396. #endif
  397. #ifdef CONFIG_CONSOLE_POLL
  398. static int arc_serial_poll_getchar(struct uart_port *port)
  399. {
  400. struct arc_uart_port *uart = to_arc_port(port);
  401. unsigned char chr;
  402. while (!(UART_GET_STATUS(uart) & RXEMPTY))
  403. cpu_relax();
  404. chr = UART_GET_DATA(uart);
  405. return chr;
  406. }
  407. #endif
  408. static struct uart_ops arc_serial_pops = {
  409. .tx_empty = arc_serial_tx_empty,
  410. .set_mctrl = arc_serial_set_mctrl,
  411. .get_mctrl = arc_serial_get_mctrl,
  412. .stop_tx = arc_serial_stop_tx,
  413. .start_tx = arc_serial_start_tx,
  414. .stop_rx = arc_serial_stop_rx,
  415. .enable_ms = arc_serial_enable_ms,
  416. .break_ctl = arc_serial_break_ctl,
  417. .startup = arc_serial_startup,
  418. .shutdown = arc_serial_shutdown,
  419. .set_termios = arc_serial_set_termios,
  420. .type = arc_serial_type,
  421. .release_port = arc_serial_release_port,
  422. .request_port = arc_serial_request_port,
  423. .config_port = arc_serial_config_port,
  424. .verify_port = arc_serial_verify_port,
  425. #ifdef CONFIG_CONSOLE_POLL
  426. .poll_put_char = arc_serial_poll_putchar,
  427. .poll_get_char = arc_serial_poll_getchar,
  428. #endif
  429. };
  430. static int
  431. arc_uart_init_one(struct platform_device *pdev, struct arc_uart_port *uart)
  432. {
  433. struct resource *res, *res2;
  434. unsigned long *plat_data;
  435. if (pdev->id < 0 || pdev->id >= CONFIG_SERIAL_ARC_NR_PORTS) {
  436. dev_err(&pdev->dev, "Wrong uart platform device id.\n");
  437. return -ENOENT;
  438. }
  439. plat_data = ((unsigned long *)(pdev->dev.platform_data));
  440. uart->baud = plat_data[0];
  441. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  442. if (!res)
  443. return -ENODEV;
  444. res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  445. if (!res2)
  446. return -ENODEV;
  447. uart->port.mapbase = res->start;
  448. uart->port.membase = ioremap_nocache(res->start, resource_size(res));
  449. if (!uart->port.membase)
  450. /* No point of dev_err since UART itself is hosed here */
  451. return -ENXIO;
  452. uart->port.irq = res2->start;
  453. uart->port.dev = &pdev->dev;
  454. uart->port.iotype = UPIO_MEM;
  455. uart->port.flags = UPF_BOOT_AUTOCONF;
  456. uart->port.line = pdev->id;
  457. uart->port.ops = &arc_serial_pops;
  458. uart->port.uartclk = plat_data[1];
  459. uart->port.fifosize = ARC_UART_TX_FIFO_SIZE;
  460. /*
  461. * uart_insert_char( ) uses it in decideding whether to ignore a
  462. * char or not. Explicitly setting it here, removes the subtelty
  463. */
  464. uart->port.ignore_status_mask = 0;
  465. /* Real Hardware vs. emulated to work around a bug */
  466. uart->is_emulated = !!plat_data[2];
  467. return 0;
  468. }
  469. #ifdef CONFIG_SERIAL_ARC_CONSOLE
  470. static int arc_serial_console_setup(struct console *co, char *options)
  471. {
  472. struct uart_port *port;
  473. int baud = 115200;
  474. int bits = 8;
  475. int parity = 'n';
  476. int flow = 'n';
  477. if (co->index < 0 || co->index >= CONFIG_SERIAL_ARC_NR_PORTS)
  478. return -ENODEV;
  479. /*
  480. * The uart port backing the console (e.g. ttyARC1) might not have been
  481. * init yet. If so, defer the console setup to after the port.
  482. */
  483. port = &arc_uart_ports[co->index].port;
  484. if (!port->membase)
  485. return -ENODEV;
  486. if (options)
  487. uart_parse_options(options, &baud, &parity, &bits, &flow);
  488. /*
  489. * Serial core will call port->ops->set_termios( )
  490. * which will set the baud reg
  491. */
  492. return uart_set_options(port, co, baud, parity, bits, flow);
  493. }
  494. static void arc_serial_console_putchar(struct uart_port *port, int ch)
  495. {
  496. arc_serial_poll_putchar(port, (unsigned char)ch);
  497. }
  498. /*
  499. * Interrupts are disabled on entering
  500. */
  501. static void arc_serial_console_write(struct console *co, const char *s,
  502. unsigned int count)
  503. {
  504. struct uart_port *port = &arc_uart_ports[co->index].port;
  505. unsigned long flags;
  506. spin_lock_irqsave(&port->lock, flags);
  507. uart_console_write(port, s, count, arc_serial_console_putchar);
  508. spin_unlock_irqrestore(&port->lock, flags);
  509. }
  510. static struct console arc_console = {
  511. .name = ARC_SERIAL_DEV_NAME,
  512. .write = arc_serial_console_write,
  513. .device = uart_console_device,
  514. .setup = arc_serial_console_setup,
  515. .flags = CON_PRINTBUFFER,
  516. .index = -1,
  517. .data = &arc_uart_driver
  518. };
  519. static __init void early_serial_write(struct console *con, const char *s,
  520. unsigned int n)
  521. {
  522. struct uart_port *port = &arc_uart_ports[con->index].port;
  523. unsigned int i;
  524. for (i = 0; i < n; i++, s++) {
  525. if (*s == '\n')
  526. arc_serial_poll_putchar(port, '\r');
  527. arc_serial_poll_putchar(port, *s);
  528. }
  529. }
  530. static struct __initdata console arc_early_serial_console = {
  531. .name = "early_ARCuart",
  532. .write = early_serial_write,
  533. .flags = CON_PRINTBUFFER | CON_BOOT,
  534. .index = -1
  535. };
  536. static int arc_serial_probe_earlyprintk(struct platform_device *pdev)
  537. {
  538. arc_early_serial_console.index = pdev->id;
  539. arc_uart_init_one(pdev, &arc_uart_ports[pdev->id]);
  540. arc_serial_console_setup(&arc_early_serial_console, NULL);
  541. register_console(&arc_early_serial_console);
  542. return 0;
  543. }
  544. #else
  545. static int arc_serial_probe_earlyprintk(struct platform_device *pdev)
  546. {
  547. return -ENODEV;
  548. }
  549. #endif /* CONFIG_SERIAL_ARC_CONSOLE */
  550. static int arc_serial_probe(struct platform_device *pdev)
  551. {
  552. struct arc_uart_port *uart;
  553. int rc;
  554. if (is_early_platform_device(pdev))
  555. return arc_serial_probe_earlyprintk(pdev);
  556. uart = &arc_uart_ports[pdev->id];
  557. rc = arc_uart_init_one(pdev, uart);
  558. if (rc)
  559. return rc;
  560. return uart_add_one_port(&arc_uart_driver, &uart->port);
  561. }
  562. static int arc_serial_remove(struct platform_device *pdev)
  563. {
  564. /* This will never be called */
  565. return 0;
  566. }
  567. static struct platform_driver arc_platform_driver = {
  568. .probe = arc_serial_probe,
  569. .remove = arc_serial_remove,
  570. .driver = {
  571. .name = DRIVER_NAME,
  572. .owner = THIS_MODULE,
  573. },
  574. };
  575. #ifdef CONFIG_SERIAL_ARC_CONSOLE
  576. /*
  577. * Register an early platform driver of "earlyprintk" class.
  578. * ARCH platform code installs the driver and probes the early devices
  579. * The installation could rely on user specifying earlyprintk=xyx in cmd line
  580. * or it could be done independently, for all "earlyprintk" class drivers.
  581. * [see arch/arc/plat-arcfpga/platform.c]
  582. */
  583. early_platform_init("earlyprintk", &arc_platform_driver);
  584. #endif /* CONFIG_SERIAL_ARC_CONSOLE */
  585. static int __init arc_serial_init(void)
  586. {
  587. int ret;
  588. ret = uart_register_driver(&arc_uart_driver);
  589. if (ret)
  590. return ret;
  591. ret = platform_driver_register(&arc_platform_driver);
  592. if (ret)
  593. uart_unregister_driver(&arc_uart_driver);
  594. return ret;
  595. }
  596. static void __exit arc_serial_exit(void)
  597. {
  598. platform_driver_unregister(&arc_platform_driver);
  599. uart_unregister_driver(&arc_uart_driver);
  600. }
  601. module_init(arc_serial_init);
  602. module_exit(arc_serial_exit);
  603. MODULE_LICENSE("GPL");
  604. MODULE_ALIAS("plat-arcfpga/uart");
  605. MODULE_AUTHOR("Vineet Gupta");
  606. MODULE_DESCRIPTION("ARC(Synopsys) On-Chip(fpga) serial driver");