pinctrl.c 12 KB

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  1. /*
  2. * SuperH Pin Function Controller pinmux support.
  3. *
  4. * Copyright (C) 2012 Paul Mundt
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #define DRV_NAME "pinctrl-sh_pfc"
  11. #define pr_fmt(fmt) DRV_NAME " " KBUILD_MODNAME ": " fmt
  12. #include <linux/init.h>
  13. #include <linux/module.h>
  14. #include <linux/sh_pfc.h>
  15. #include <linux/err.h>
  16. #include <linux/slab.h>
  17. #include <linux/spinlock.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/pinctrl/consumer.h>
  20. #include <linux/pinctrl/pinctrl.h>
  21. #include <linux/pinctrl/pinconf.h>
  22. #include <linux/pinctrl/pinmux.h>
  23. #include <linux/pinctrl/pinconf-generic.h>
  24. struct sh_pfc_pinctrl {
  25. struct pinctrl_dev *pctl;
  26. struct sh_pfc *pfc;
  27. struct pinmux_gpio **functions;
  28. unsigned int nr_functions;
  29. struct pinctrl_pin_desc *pads;
  30. unsigned int nr_pads;
  31. spinlock_t lock;
  32. };
  33. static struct sh_pfc_pinctrl *sh_pfc_pmx;
  34. static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev)
  35. {
  36. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  37. return pmx->nr_pads;
  38. }
  39. static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev,
  40. unsigned selector)
  41. {
  42. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  43. return pmx->pads[selector].name;
  44. }
  45. static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
  46. const unsigned **pins, unsigned *num_pins)
  47. {
  48. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  49. *pins = &pmx->pads[group].number;
  50. *num_pins = 1;
  51. return 0;
  52. }
  53. static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
  54. unsigned offset)
  55. {
  56. seq_printf(s, "%s", DRV_NAME);
  57. }
  58. static struct pinctrl_ops sh_pfc_pinctrl_ops = {
  59. .get_groups_count = sh_pfc_get_groups_count,
  60. .get_group_name = sh_pfc_get_group_name,
  61. .get_group_pins = sh_pfc_get_group_pins,
  62. .pin_dbg_show = sh_pfc_pin_dbg_show,
  63. };
  64. static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
  65. {
  66. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  67. return pmx->nr_functions;
  68. }
  69. static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev,
  70. unsigned selector)
  71. {
  72. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  73. return pmx->functions[selector]->name;
  74. }
  75. static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev, unsigned func,
  76. const char * const **groups,
  77. unsigned * const num_groups)
  78. {
  79. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  80. *groups = &pmx->functions[func]->name;
  81. *num_groups = 1;
  82. return 0;
  83. }
  84. static int sh_pfc_noop_enable(struct pinctrl_dev *pctldev, unsigned func,
  85. unsigned group)
  86. {
  87. return 0;
  88. }
  89. static void sh_pfc_noop_disable(struct pinctrl_dev *pctldev, unsigned func,
  90. unsigned group)
  91. {
  92. }
  93. static inline int sh_pfc_config_function(struct sh_pfc *pfc, unsigned offset)
  94. {
  95. if (sh_pfc_config_gpio(pfc, offset,
  96. PINMUX_TYPE_FUNCTION,
  97. GPIO_CFG_DRYRUN) != 0)
  98. return -EINVAL;
  99. if (sh_pfc_config_gpio(pfc, offset,
  100. PINMUX_TYPE_FUNCTION,
  101. GPIO_CFG_REQ) != 0)
  102. return -EINVAL;
  103. return 0;
  104. }
  105. static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
  106. int new_type)
  107. {
  108. unsigned long flags;
  109. int pinmux_type;
  110. int ret = -EINVAL;
  111. spin_lock_irqsave(&pfc->lock, flags);
  112. pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE;
  113. /*
  114. * See if the present config needs to first be de-configured.
  115. */
  116. switch (pinmux_type) {
  117. case PINMUX_TYPE_GPIO:
  118. break;
  119. case PINMUX_TYPE_OUTPUT:
  120. case PINMUX_TYPE_INPUT:
  121. case PINMUX_TYPE_INPUT_PULLUP:
  122. case PINMUX_TYPE_INPUT_PULLDOWN:
  123. sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
  124. break;
  125. default:
  126. goto err;
  127. }
  128. /*
  129. * Dry run
  130. */
  131. if (sh_pfc_config_gpio(pfc, offset, new_type,
  132. GPIO_CFG_DRYRUN) != 0)
  133. goto err;
  134. /*
  135. * Request
  136. */
  137. if (sh_pfc_config_gpio(pfc, offset, new_type,
  138. GPIO_CFG_REQ) != 0)
  139. goto err;
  140. pfc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
  141. pfc->gpios[offset].flags |= new_type;
  142. ret = 0;
  143. err:
  144. spin_unlock_irqrestore(&pfc->lock, flags);
  145. return ret;
  146. }
  147. static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
  148. struct pinctrl_gpio_range *range,
  149. unsigned offset)
  150. {
  151. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  152. struct sh_pfc *pfc = pmx->pfc;
  153. unsigned long flags;
  154. int ret, pinmux_type;
  155. spin_lock_irqsave(&pfc->lock, flags);
  156. pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE;
  157. switch (pinmux_type) {
  158. case PINMUX_TYPE_FUNCTION:
  159. pr_notice_once("Use of GPIO API for function requests is "
  160. "deprecated, convert to pinctrl\n");
  161. /* handle for now */
  162. ret = sh_pfc_config_function(pfc, offset);
  163. if (unlikely(ret < 0))
  164. goto err;
  165. break;
  166. case PINMUX_TYPE_GPIO:
  167. case PINMUX_TYPE_INPUT:
  168. case PINMUX_TYPE_OUTPUT:
  169. break;
  170. default:
  171. pr_err("Unsupported mux type (%d), bailing...\n", pinmux_type);
  172. ret = -ENOTSUPP;
  173. goto err;
  174. }
  175. ret = 0;
  176. err:
  177. spin_unlock_irqrestore(&pfc->lock, flags);
  178. return ret;
  179. }
  180. static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
  181. struct pinctrl_gpio_range *range,
  182. unsigned offset)
  183. {
  184. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  185. struct sh_pfc *pfc = pmx->pfc;
  186. unsigned long flags;
  187. int pinmux_type;
  188. spin_lock_irqsave(&pfc->lock, flags);
  189. pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE;
  190. sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
  191. spin_unlock_irqrestore(&pfc->lock, flags);
  192. }
  193. static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
  194. struct pinctrl_gpio_range *range,
  195. unsigned offset, bool input)
  196. {
  197. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  198. int type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
  199. return sh_pfc_reconfig_pin(pmx->pfc, offset, type);
  200. }
  201. static struct pinmux_ops sh_pfc_pinmux_ops = {
  202. .get_functions_count = sh_pfc_get_functions_count,
  203. .get_function_name = sh_pfc_get_function_name,
  204. .get_function_groups = sh_pfc_get_function_groups,
  205. .enable = sh_pfc_noop_enable,
  206. .disable = sh_pfc_noop_disable,
  207. .gpio_request_enable = sh_pfc_gpio_request_enable,
  208. .gpio_disable_free = sh_pfc_gpio_disable_free,
  209. .gpio_set_direction = sh_pfc_gpio_set_direction,
  210. };
  211. static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
  212. unsigned long *config)
  213. {
  214. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  215. struct sh_pfc *pfc = pmx->pfc;
  216. *config = pfc->gpios[pin].flags & PINMUX_FLAG_TYPE;
  217. return 0;
  218. }
  219. static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
  220. unsigned long config)
  221. {
  222. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  223. /* Validate the new type */
  224. if (config >= PINMUX_FLAG_TYPE)
  225. return -EINVAL;
  226. return sh_pfc_reconfig_pin(pmx->pfc, pin, config);
  227. }
  228. static void sh_pfc_pinconf_dbg_show(struct pinctrl_dev *pctldev,
  229. struct seq_file *s, unsigned pin)
  230. {
  231. const char *pinmux_type_str[] = {
  232. [PINMUX_TYPE_NONE] = "none",
  233. [PINMUX_TYPE_FUNCTION] = "function",
  234. [PINMUX_TYPE_GPIO] = "gpio",
  235. [PINMUX_TYPE_OUTPUT] = "output",
  236. [PINMUX_TYPE_INPUT] = "input",
  237. [PINMUX_TYPE_INPUT_PULLUP] = "input bias pull up",
  238. [PINMUX_TYPE_INPUT_PULLDOWN] = "input bias pull down",
  239. };
  240. unsigned long config;
  241. int rc;
  242. rc = sh_pfc_pinconf_get(pctldev, pin, &config);
  243. if (unlikely(rc != 0))
  244. return;
  245. seq_printf(s, " %s", pinmux_type_str[config]);
  246. }
  247. static struct pinconf_ops sh_pfc_pinconf_ops = {
  248. .pin_config_get = sh_pfc_pinconf_get,
  249. .pin_config_set = sh_pfc_pinconf_set,
  250. .pin_config_dbg_show = sh_pfc_pinconf_dbg_show,
  251. };
  252. static struct pinctrl_gpio_range sh_pfc_gpio_range = {
  253. .name = DRV_NAME,
  254. .id = 0,
  255. };
  256. static struct pinctrl_desc sh_pfc_pinctrl_desc = {
  257. .name = DRV_NAME,
  258. .owner = THIS_MODULE,
  259. .pctlops = &sh_pfc_pinctrl_ops,
  260. .pmxops = &sh_pfc_pinmux_ops,
  261. .confops = &sh_pfc_pinconf_ops,
  262. };
  263. static inline void sh_pfc_map_one_gpio(struct sh_pfc *pfc,
  264. struct sh_pfc_pinctrl *pmx,
  265. struct pinmux_gpio *gpio,
  266. unsigned offset)
  267. {
  268. struct pinmux_data_reg *dummy;
  269. unsigned long flags;
  270. int bit;
  271. gpio->flags &= ~PINMUX_FLAG_TYPE;
  272. if (sh_pfc_get_data_reg(pfc, offset, &dummy, &bit) == 0)
  273. gpio->flags |= PINMUX_TYPE_GPIO;
  274. else {
  275. gpio->flags |= PINMUX_TYPE_FUNCTION;
  276. spin_lock_irqsave(&pmx->lock, flags);
  277. pmx->nr_functions++;
  278. spin_unlock_irqrestore(&pmx->lock, flags);
  279. }
  280. }
  281. /* pinmux ranges -> pinctrl pin descs */
  282. static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
  283. {
  284. unsigned long flags;
  285. int i;
  286. pmx->nr_pads = pfc->last_gpio - pfc->first_gpio + 1;
  287. pmx->pads = kmalloc(sizeof(struct pinctrl_pin_desc) * pmx->nr_pads,
  288. GFP_KERNEL);
  289. if (unlikely(!pmx->pads)) {
  290. pmx->nr_pads = 0;
  291. return -ENOMEM;
  292. }
  293. spin_lock_irqsave(&pfc->lock, flags);
  294. /*
  295. * We don't necessarily have a 1:1 mapping between pin and linux
  296. * GPIO number, as the latter maps to the associated enum_id.
  297. * Care needs to be taken to translate back to pin space when
  298. * dealing with any pin configurations.
  299. */
  300. for (i = 0; i < pmx->nr_pads; i++) {
  301. struct pinctrl_pin_desc *pin = pmx->pads + i;
  302. struct pinmux_gpio *gpio = pfc->gpios + i;
  303. pin->number = pfc->first_gpio + i;
  304. pin->name = gpio->name;
  305. /* XXX */
  306. if (unlikely(!gpio->enum_id))
  307. continue;
  308. sh_pfc_map_one_gpio(pfc, pmx, gpio, i);
  309. }
  310. spin_unlock_irqrestore(&pfc->lock, flags);
  311. sh_pfc_pinctrl_desc.pins = pmx->pads;
  312. sh_pfc_pinctrl_desc.npins = pmx->nr_pads;
  313. return 0;
  314. }
  315. static int sh_pfc_map_functions(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
  316. {
  317. unsigned long flags;
  318. int i, fn;
  319. pmx->functions = kzalloc(pmx->nr_functions * sizeof(void *),
  320. GFP_KERNEL);
  321. if (unlikely(!pmx->functions))
  322. return -ENOMEM;
  323. spin_lock_irqsave(&pmx->lock, flags);
  324. for (i = fn = 0; i < pmx->nr_pads; i++) {
  325. struct pinmux_gpio *gpio = pfc->gpios + i;
  326. if ((gpio->flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_FUNCTION)
  327. pmx->functions[fn++] = gpio;
  328. }
  329. spin_unlock_irqrestore(&pmx->lock, flags);
  330. return 0;
  331. }
  332. static int sh_pfc_pinctrl_probe(struct platform_device *pdev)
  333. {
  334. struct sh_pfc *pfc;
  335. int ret;
  336. if (unlikely(!sh_pfc_pmx))
  337. return -ENODEV;
  338. pfc = sh_pfc_pmx->pfc;
  339. ret = sh_pfc_map_gpios(pfc, sh_pfc_pmx);
  340. if (unlikely(ret != 0))
  341. return ret;
  342. ret = sh_pfc_map_functions(pfc, sh_pfc_pmx);
  343. if (unlikely(ret != 0))
  344. goto free_pads;
  345. sh_pfc_pmx->pctl = pinctrl_register(&sh_pfc_pinctrl_desc, &pdev->dev,
  346. sh_pfc_pmx);
  347. if (IS_ERR(sh_pfc_pmx->pctl)) {
  348. ret = PTR_ERR(sh_pfc_pmx->pctl);
  349. goto free_functions;
  350. }
  351. sh_pfc_gpio_range.npins = pfc->last_gpio - pfc->first_gpio + 1;
  352. sh_pfc_gpio_range.base = pfc->first_gpio;
  353. sh_pfc_gpio_range.pin_base = pfc->first_gpio;
  354. pinctrl_add_gpio_range(sh_pfc_pmx->pctl, &sh_pfc_gpio_range);
  355. platform_set_drvdata(pdev, sh_pfc_pmx);
  356. return 0;
  357. free_functions:
  358. kfree(sh_pfc_pmx->functions);
  359. free_pads:
  360. kfree(sh_pfc_pmx->pads);
  361. kfree(sh_pfc_pmx);
  362. return ret;
  363. }
  364. static int sh_pfc_pinctrl_remove(struct platform_device *pdev)
  365. {
  366. struct sh_pfc_pinctrl *pmx = platform_get_drvdata(pdev);
  367. pinctrl_unregister(pmx->pctl);
  368. platform_set_drvdata(pdev, NULL);
  369. kfree(sh_pfc_pmx->functions);
  370. kfree(sh_pfc_pmx->pads);
  371. kfree(sh_pfc_pmx);
  372. return 0;
  373. }
  374. static struct platform_driver sh_pfc_pinctrl_driver = {
  375. .probe = sh_pfc_pinctrl_probe,
  376. .remove = sh_pfc_pinctrl_remove,
  377. .driver = {
  378. .name = DRV_NAME,
  379. .owner = THIS_MODULE,
  380. },
  381. };
  382. static struct platform_device sh_pfc_pinctrl_device = {
  383. .name = DRV_NAME,
  384. .id = -1,
  385. };
  386. static int sh_pfc_pinctrl_init(void)
  387. {
  388. int rc;
  389. rc = platform_driver_register(&sh_pfc_pinctrl_driver);
  390. if (likely(!rc)) {
  391. rc = platform_device_register(&sh_pfc_pinctrl_device);
  392. if (unlikely(rc))
  393. platform_driver_unregister(&sh_pfc_pinctrl_driver);
  394. }
  395. return rc;
  396. }
  397. int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
  398. {
  399. sh_pfc_pmx = kzalloc(sizeof(struct sh_pfc_pinctrl), GFP_KERNEL);
  400. if (unlikely(!sh_pfc_pmx))
  401. return -ENOMEM;
  402. spin_lock_init(&sh_pfc_pmx->lock);
  403. sh_pfc_pmx->pfc = pfc;
  404. return sh_pfc_pinctrl_init();
  405. }
  406. EXPORT_SYMBOL_GPL(sh_pfc_register_pinctrl);
  407. static void __exit sh_pfc_pinctrl_exit(void)
  408. {
  409. platform_driver_unregister(&sh_pfc_pinctrl_driver);
  410. }
  411. module_exit(sh_pfc_pinctrl_exit);