qdio_main.c 44 KB

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  1. /*
  2. * Linux for s390 qdio support, buffer handling, qdio API and module support.
  3. *
  4. * Copyright IBM Corp. 2000, 2008
  5. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
  6. * Jan Glauber <jang@linux.vnet.ibm.com>
  7. * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
  8. */
  9. #include <linux/module.h>
  10. #include <linux/init.h>
  11. #include <linux/kernel.h>
  12. #include <linux/timer.h>
  13. #include <linux/delay.h>
  14. #include <linux/gfp.h>
  15. #include <linux/io.h>
  16. #include <linux/atomic.h>
  17. #include <asm/debug.h>
  18. #include <asm/qdio.h>
  19. #include <asm/ipl.h>
  20. #include "cio.h"
  21. #include "css.h"
  22. #include "device.h"
  23. #include "qdio.h"
  24. #include "qdio_debug.h"
  25. MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
  26. "Jan Glauber <jang@linux.vnet.ibm.com>");
  27. MODULE_DESCRIPTION("QDIO base support");
  28. MODULE_LICENSE("GPL");
  29. static inline int do_siga_sync(unsigned long schid,
  30. unsigned int out_mask, unsigned int in_mask,
  31. unsigned int fc)
  32. {
  33. register unsigned long __fc asm ("0") = fc;
  34. register unsigned long __schid asm ("1") = schid;
  35. register unsigned long out asm ("2") = out_mask;
  36. register unsigned long in asm ("3") = in_mask;
  37. int cc;
  38. asm volatile(
  39. " siga 0\n"
  40. " ipm %0\n"
  41. " srl %0,28\n"
  42. : "=d" (cc)
  43. : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
  44. return cc;
  45. }
  46. static inline int do_siga_input(unsigned long schid, unsigned int mask,
  47. unsigned int fc)
  48. {
  49. register unsigned long __fc asm ("0") = fc;
  50. register unsigned long __schid asm ("1") = schid;
  51. register unsigned long __mask asm ("2") = mask;
  52. int cc;
  53. asm volatile(
  54. " siga 0\n"
  55. " ipm %0\n"
  56. " srl %0,28\n"
  57. : "=d" (cc)
  58. : "d" (__fc), "d" (__schid), "d" (__mask) : "cc");
  59. return cc;
  60. }
  61. /**
  62. * do_siga_output - perform SIGA-w/wt function
  63. * @schid: subchannel id or in case of QEBSM the subchannel token
  64. * @mask: which output queues to process
  65. * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
  66. * @fc: function code to perform
  67. *
  68. * Returns condition code.
  69. * Note: For IQDC unicast queues only the highest priority queue is processed.
  70. */
  71. static inline int do_siga_output(unsigned long schid, unsigned long mask,
  72. unsigned int *bb, unsigned int fc,
  73. unsigned long aob)
  74. {
  75. register unsigned long __fc asm("0") = fc;
  76. register unsigned long __schid asm("1") = schid;
  77. register unsigned long __mask asm("2") = mask;
  78. register unsigned long __aob asm("3") = aob;
  79. int cc;
  80. asm volatile(
  81. " siga 0\n"
  82. " ipm %0\n"
  83. " srl %0,28\n"
  84. : "=d" (cc), "+d" (__fc), "+d" (__aob)
  85. : "d" (__schid), "d" (__mask)
  86. : "cc");
  87. *bb = __fc >> 31;
  88. return cc;
  89. }
  90. static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
  91. {
  92. /* all done or next buffer state different */
  93. if (ccq == 0 || ccq == 32)
  94. return 0;
  95. /* no buffer processed */
  96. if (ccq == 97)
  97. return 1;
  98. /* not all buffers processed */
  99. if (ccq == 96)
  100. return 2;
  101. /* notify devices immediately */
  102. DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
  103. return -EIO;
  104. }
  105. /**
  106. * qdio_do_eqbs - extract buffer states for QEBSM
  107. * @q: queue to manipulate
  108. * @state: state of the extracted buffers
  109. * @start: buffer number to start at
  110. * @count: count of buffers to examine
  111. * @auto_ack: automatically acknowledge buffers
  112. *
  113. * Returns the number of successfully extracted equal buffer states.
  114. * Stops processing if a state is different from the last buffers state.
  115. */
  116. static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
  117. int start, int count, int auto_ack)
  118. {
  119. int rc, tmp_count = count, tmp_start = start, nr = q->nr, retried = 0;
  120. unsigned int ccq = 0;
  121. qperf_inc(q, eqbs);
  122. if (!q->is_input_q)
  123. nr += q->irq_ptr->nr_input_qs;
  124. again:
  125. ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
  126. auto_ack);
  127. rc = qdio_check_ccq(q, ccq);
  128. if (!rc)
  129. return count - tmp_count;
  130. if (rc == 1) {
  131. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
  132. goto again;
  133. }
  134. if (rc == 2) {
  135. qperf_inc(q, eqbs_partial);
  136. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS part:%02x",
  137. tmp_count);
  138. /*
  139. * Retry once, if that fails bail out and process the
  140. * extracted buffers before trying again.
  141. */
  142. if (!retried++)
  143. goto again;
  144. else
  145. return count - tmp_count;
  146. }
  147. DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
  148. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  149. q->handler(q->irq_ptr->cdev, QDIO_ERROR_GET_BUF_STATE,
  150. q->nr, q->first_to_kick, count, q->irq_ptr->int_parm);
  151. return 0;
  152. }
  153. /**
  154. * qdio_do_sqbs - set buffer states for QEBSM
  155. * @q: queue to manipulate
  156. * @state: new state of the buffers
  157. * @start: first buffer number to change
  158. * @count: how many buffers to change
  159. *
  160. * Returns the number of successfully changed buffers.
  161. * Does retrying until the specified count of buffer states is set or an
  162. * error occurs.
  163. */
  164. static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
  165. int count)
  166. {
  167. unsigned int ccq = 0;
  168. int tmp_count = count, tmp_start = start;
  169. int nr = q->nr;
  170. int rc;
  171. if (!count)
  172. return 0;
  173. qperf_inc(q, sqbs);
  174. if (!q->is_input_q)
  175. nr += q->irq_ptr->nr_input_qs;
  176. again:
  177. ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
  178. rc = qdio_check_ccq(q, ccq);
  179. if (!rc) {
  180. WARN_ON_ONCE(tmp_count);
  181. return count - tmp_count;
  182. }
  183. if (rc == 1 || rc == 2) {
  184. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
  185. qperf_inc(q, sqbs_partial);
  186. goto again;
  187. }
  188. DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
  189. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  190. q->handler(q->irq_ptr->cdev, QDIO_ERROR_SET_BUF_STATE,
  191. q->nr, q->first_to_kick, count, q->irq_ptr->int_parm);
  192. return 0;
  193. }
  194. /* returns number of examined buffers and their common state in *state */
  195. static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
  196. unsigned char *state, unsigned int count,
  197. int auto_ack, int merge_pending)
  198. {
  199. unsigned char __state = 0;
  200. int i;
  201. if (is_qebsm(q))
  202. return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
  203. for (i = 0; i < count; i++) {
  204. if (!__state) {
  205. __state = q->slsb.val[bufnr];
  206. if (merge_pending && __state == SLSB_P_OUTPUT_PENDING)
  207. __state = SLSB_P_OUTPUT_EMPTY;
  208. } else if (merge_pending) {
  209. if ((q->slsb.val[bufnr] & __state) != __state)
  210. break;
  211. } else if (q->slsb.val[bufnr] != __state)
  212. break;
  213. bufnr = next_buf(bufnr);
  214. }
  215. *state = __state;
  216. return i;
  217. }
  218. static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
  219. unsigned char *state, int auto_ack)
  220. {
  221. return get_buf_states(q, bufnr, state, 1, auto_ack, 0);
  222. }
  223. /* wrap-around safe setting of slsb states, returns number of changed buffers */
  224. static inline int set_buf_states(struct qdio_q *q, int bufnr,
  225. unsigned char state, int count)
  226. {
  227. int i;
  228. if (is_qebsm(q))
  229. return qdio_do_sqbs(q, state, bufnr, count);
  230. for (i = 0; i < count; i++) {
  231. xchg(&q->slsb.val[bufnr], state);
  232. bufnr = next_buf(bufnr);
  233. }
  234. return count;
  235. }
  236. static inline int set_buf_state(struct qdio_q *q, int bufnr,
  237. unsigned char state)
  238. {
  239. return set_buf_states(q, bufnr, state, 1);
  240. }
  241. /* set slsb states to initial state */
  242. static void qdio_init_buf_states(struct qdio_irq *irq_ptr)
  243. {
  244. struct qdio_q *q;
  245. int i;
  246. for_each_input_queue(irq_ptr, q, i)
  247. set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
  248. QDIO_MAX_BUFFERS_PER_Q);
  249. for_each_output_queue(irq_ptr, q, i)
  250. set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
  251. QDIO_MAX_BUFFERS_PER_Q);
  252. }
  253. static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
  254. unsigned int input)
  255. {
  256. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  257. unsigned int fc = QDIO_SIGA_SYNC;
  258. int cc;
  259. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
  260. qperf_inc(q, siga_sync);
  261. if (is_qebsm(q)) {
  262. schid = q->irq_ptr->sch_token;
  263. fc |= QDIO_SIGA_QEBSM_FLAG;
  264. }
  265. cc = do_siga_sync(schid, output, input, fc);
  266. if (unlikely(cc))
  267. DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
  268. return (cc) ? -EIO : 0;
  269. }
  270. static inline int qdio_siga_sync_q(struct qdio_q *q)
  271. {
  272. if (q->is_input_q)
  273. return qdio_siga_sync(q, 0, q->mask);
  274. else
  275. return qdio_siga_sync(q, q->mask, 0);
  276. }
  277. static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit,
  278. unsigned long aob)
  279. {
  280. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  281. unsigned int fc = QDIO_SIGA_WRITE;
  282. u64 start_time = 0;
  283. int retries = 0, cc;
  284. unsigned long laob = 0;
  285. if (q->u.out.use_cq && aob != 0) {
  286. fc = QDIO_SIGA_WRITEQ;
  287. laob = aob;
  288. }
  289. if (is_qebsm(q)) {
  290. schid = q->irq_ptr->sch_token;
  291. fc |= QDIO_SIGA_QEBSM_FLAG;
  292. }
  293. again:
  294. WARN_ON_ONCE((aob && queue_type(q) != QDIO_IQDIO_QFMT) ||
  295. (aob && fc != QDIO_SIGA_WRITEQ));
  296. cc = do_siga_output(schid, q->mask, busy_bit, fc, laob);
  297. /* hipersocket busy condition */
  298. if (unlikely(*busy_bit)) {
  299. retries++;
  300. if (!start_time) {
  301. start_time = get_clock();
  302. goto again;
  303. }
  304. if ((get_clock() - start_time) < QDIO_BUSY_BIT_PATIENCE)
  305. goto again;
  306. }
  307. if (retries) {
  308. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr,
  309. "%4x cc2 BB1:%1d", SCH_NO(q), q->nr);
  310. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries);
  311. }
  312. return cc;
  313. }
  314. static inline int qdio_siga_input(struct qdio_q *q)
  315. {
  316. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  317. unsigned int fc = QDIO_SIGA_READ;
  318. int cc;
  319. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
  320. qperf_inc(q, siga_read);
  321. if (is_qebsm(q)) {
  322. schid = q->irq_ptr->sch_token;
  323. fc |= QDIO_SIGA_QEBSM_FLAG;
  324. }
  325. cc = do_siga_input(schid, q->mask, fc);
  326. if (unlikely(cc))
  327. DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
  328. return (cc) ? -EIO : 0;
  329. }
  330. #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0)
  331. #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U)
  332. static inline void qdio_sync_queues(struct qdio_q *q)
  333. {
  334. /* PCI capable outbound queues will also be scanned so sync them too */
  335. if (pci_out_supported(q))
  336. qdio_siga_sync_all(q);
  337. else
  338. qdio_siga_sync_q(q);
  339. }
  340. int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
  341. unsigned char *state)
  342. {
  343. if (need_siga_sync(q))
  344. qdio_siga_sync_q(q);
  345. return get_buf_states(q, bufnr, state, 1, 0, 0);
  346. }
  347. static inline void qdio_stop_polling(struct qdio_q *q)
  348. {
  349. if (!q->u.in.polling)
  350. return;
  351. q->u.in.polling = 0;
  352. qperf_inc(q, stop_polling);
  353. /* show the card that we are not polling anymore */
  354. if (is_qebsm(q)) {
  355. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  356. q->u.in.ack_count);
  357. q->u.in.ack_count = 0;
  358. } else
  359. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  360. }
  361. static inline void account_sbals(struct qdio_q *q, int count)
  362. {
  363. int pos = 0;
  364. q->q_stats.nr_sbal_total += count;
  365. if (count == QDIO_MAX_BUFFERS_MASK) {
  366. q->q_stats.nr_sbals[7]++;
  367. return;
  368. }
  369. while (count >>= 1)
  370. pos++;
  371. q->q_stats.nr_sbals[pos]++;
  372. }
  373. static void process_buffer_error(struct qdio_q *q, int count)
  374. {
  375. unsigned char state = (q->is_input_q) ? SLSB_P_INPUT_NOT_INIT :
  376. SLSB_P_OUTPUT_NOT_INIT;
  377. q->qdio_error = QDIO_ERROR_SLSB_STATE;
  378. /* special handling for no target buffer empty */
  379. if ((!q->is_input_q &&
  380. (q->sbal[q->first_to_check]->element[15].sflags) == 0x10)) {
  381. qperf_inc(q, target_full);
  382. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
  383. q->first_to_check);
  384. goto set;
  385. }
  386. DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
  387. DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
  388. DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
  389. DBF_ERROR("F14:%2x F15:%2x",
  390. q->sbal[q->first_to_check]->element[14].sflags,
  391. q->sbal[q->first_to_check]->element[15].sflags);
  392. set:
  393. /*
  394. * Interrupts may be avoided as long as the error is present
  395. * so change the buffer state immediately to avoid starvation.
  396. */
  397. set_buf_states(q, q->first_to_check, state, count);
  398. }
  399. static inline void inbound_primed(struct qdio_q *q, int count)
  400. {
  401. int new;
  402. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %02x", count);
  403. /* for QEBSM the ACK was already set by EQBS */
  404. if (is_qebsm(q)) {
  405. if (!q->u.in.polling) {
  406. q->u.in.polling = 1;
  407. q->u.in.ack_count = count;
  408. q->u.in.ack_start = q->first_to_check;
  409. return;
  410. }
  411. /* delete the previous ACK's */
  412. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  413. q->u.in.ack_count);
  414. q->u.in.ack_count = count;
  415. q->u.in.ack_start = q->first_to_check;
  416. return;
  417. }
  418. /*
  419. * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
  420. * or by the next inbound run.
  421. */
  422. new = add_buf(q->first_to_check, count - 1);
  423. if (q->u.in.polling) {
  424. /* reset the previous ACK but first set the new one */
  425. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  426. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  427. } else {
  428. q->u.in.polling = 1;
  429. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  430. }
  431. q->u.in.ack_start = new;
  432. count--;
  433. if (!count)
  434. return;
  435. /* need to change ALL buffers to get more interrupts */
  436. set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
  437. }
  438. static int get_inbound_buffer_frontier(struct qdio_q *q)
  439. {
  440. int count, stop;
  441. unsigned char state = 0;
  442. q->timestamp = get_clock();
  443. /*
  444. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  445. * would return 0.
  446. */
  447. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  448. stop = add_buf(q->first_to_check, count);
  449. if (q->first_to_check == stop)
  450. goto out;
  451. /*
  452. * No siga sync here, as a PCI or we after a thin interrupt
  453. * already sync'ed the queues.
  454. */
  455. count = get_buf_states(q, q->first_to_check, &state, count, 1, 0);
  456. if (!count)
  457. goto out;
  458. switch (state) {
  459. case SLSB_P_INPUT_PRIMED:
  460. inbound_primed(q, count);
  461. q->first_to_check = add_buf(q->first_to_check, count);
  462. if (atomic_sub(count, &q->nr_buf_used) == 0)
  463. qperf_inc(q, inbound_queue_full);
  464. if (q->irq_ptr->perf_stat_enabled)
  465. account_sbals(q, count);
  466. break;
  467. case SLSB_P_INPUT_ERROR:
  468. process_buffer_error(q, count);
  469. q->first_to_check = add_buf(q->first_to_check, count);
  470. atomic_sub(count, &q->nr_buf_used);
  471. if (q->irq_ptr->perf_stat_enabled)
  472. account_sbals_error(q, count);
  473. break;
  474. case SLSB_CU_INPUT_EMPTY:
  475. case SLSB_P_INPUT_NOT_INIT:
  476. case SLSB_P_INPUT_ACK:
  477. if (q->irq_ptr->perf_stat_enabled)
  478. q->q_stats.nr_sbal_nop++;
  479. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop");
  480. break;
  481. default:
  482. WARN_ON_ONCE(1);
  483. }
  484. out:
  485. return q->first_to_check;
  486. }
  487. static int qdio_inbound_q_moved(struct qdio_q *q)
  488. {
  489. int bufnr;
  490. bufnr = get_inbound_buffer_frontier(q);
  491. if (bufnr != q->last_move) {
  492. q->last_move = bufnr;
  493. if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
  494. q->u.in.timestamp = get_clock();
  495. return 1;
  496. } else
  497. return 0;
  498. }
  499. static inline int qdio_inbound_q_done(struct qdio_q *q)
  500. {
  501. unsigned char state = 0;
  502. if (!atomic_read(&q->nr_buf_used))
  503. return 1;
  504. if (need_siga_sync(q))
  505. qdio_siga_sync_q(q);
  506. get_buf_state(q, q->first_to_check, &state, 0);
  507. if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
  508. /* more work coming */
  509. return 0;
  510. if (is_thinint_irq(q->irq_ptr))
  511. return 1;
  512. /* don't poll under z/VM */
  513. if (MACHINE_IS_VM)
  514. return 1;
  515. /*
  516. * At this point we know, that inbound first_to_check
  517. * has (probably) not moved (see qdio_inbound_processing).
  518. */
  519. if (get_clock() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
  520. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
  521. q->first_to_check);
  522. return 1;
  523. } else
  524. return 0;
  525. }
  526. static inline int contains_aobs(struct qdio_q *q)
  527. {
  528. return !q->is_input_q && q->u.out.use_cq;
  529. }
  530. static inline void qdio_trace_aob(struct qdio_irq *irq, struct qdio_q *q,
  531. int i, struct qaob *aob)
  532. {
  533. int tmp;
  534. DBF_DEV_EVENT(DBF_INFO, irq, "AOB%d:%lx", i,
  535. (unsigned long) virt_to_phys(aob));
  536. DBF_DEV_EVENT(DBF_INFO, irq, "RES00:%lx",
  537. (unsigned long) aob->res0[0]);
  538. DBF_DEV_EVENT(DBF_INFO, irq, "RES01:%lx",
  539. (unsigned long) aob->res0[1]);
  540. DBF_DEV_EVENT(DBF_INFO, irq, "RES02:%lx",
  541. (unsigned long) aob->res0[2]);
  542. DBF_DEV_EVENT(DBF_INFO, irq, "RES03:%lx",
  543. (unsigned long) aob->res0[3]);
  544. DBF_DEV_EVENT(DBF_INFO, irq, "RES04:%lx",
  545. (unsigned long) aob->res0[4]);
  546. DBF_DEV_EVENT(DBF_INFO, irq, "RES05:%lx",
  547. (unsigned long) aob->res0[5]);
  548. DBF_DEV_EVENT(DBF_INFO, irq, "RES1:%x", aob->res1);
  549. DBF_DEV_EVENT(DBF_INFO, irq, "RES2:%x", aob->res2);
  550. DBF_DEV_EVENT(DBF_INFO, irq, "RES3:%x", aob->res3);
  551. DBF_DEV_EVENT(DBF_INFO, irq, "AORC:%u", aob->aorc);
  552. DBF_DEV_EVENT(DBF_INFO, irq, "FLAGS:%u", aob->flags);
  553. DBF_DEV_EVENT(DBF_INFO, irq, "CBTBS:%u", aob->cbtbs);
  554. DBF_DEV_EVENT(DBF_INFO, irq, "SBC:%u", aob->sb_count);
  555. for (tmp = 0; tmp < QDIO_MAX_ELEMENTS_PER_BUFFER; ++tmp) {
  556. DBF_DEV_EVENT(DBF_INFO, irq, "SBA%d:%lx", tmp,
  557. (unsigned long) aob->sba[tmp]);
  558. DBF_DEV_EVENT(DBF_INFO, irq, "rSBA%d:%lx", tmp,
  559. (unsigned long) q->sbal[i]->element[tmp].addr);
  560. DBF_DEV_EVENT(DBF_INFO, irq, "DC%d:%u", tmp, aob->dcount[tmp]);
  561. DBF_DEV_EVENT(DBF_INFO, irq, "rDC%d:%u", tmp,
  562. q->sbal[i]->element[tmp].length);
  563. }
  564. DBF_DEV_EVENT(DBF_INFO, irq, "USER0:%lx", (unsigned long) aob->user0);
  565. for (tmp = 0; tmp < 2; ++tmp) {
  566. DBF_DEV_EVENT(DBF_INFO, irq, "RES4%d:%lx", tmp,
  567. (unsigned long) aob->res4[tmp]);
  568. }
  569. DBF_DEV_EVENT(DBF_INFO, irq, "USER1:%lx", (unsigned long) aob->user1);
  570. DBF_DEV_EVENT(DBF_INFO, irq, "USER2:%lx", (unsigned long) aob->user2);
  571. }
  572. static inline void qdio_handle_aobs(struct qdio_q *q, int start, int count)
  573. {
  574. unsigned char state = 0;
  575. int j, b = start;
  576. if (!contains_aobs(q))
  577. return;
  578. for (j = 0; j < count; ++j) {
  579. get_buf_state(q, b, &state, 0);
  580. if (state == SLSB_P_OUTPUT_PENDING) {
  581. struct qaob *aob = q->u.out.aobs[b];
  582. if (aob == NULL)
  583. continue;
  584. q->u.out.sbal_state[b].flags |=
  585. QDIO_OUTBUF_STATE_FLAG_PENDING;
  586. q->u.out.aobs[b] = NULL;
  587. } else if (state == SLSB_P_OUTPUT_EMPTY) {
  588. q->u.out.sbal_state[b].aob = NULL;
  589. }
  590. b = next_buf(b);
  591. }
  592. }
  593. static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q,
  594. int bufnr)
  595. {
  596. unsigned long phys_aob = 0;
  597. if (!q->use_cq)
  598. goto out;
  599. if (!q->aobs[bufnr]) {
  600. struct qaob *aob = qdio_allocate_aob();
  601. q->aobs[bufnr] = aob;
  602. }
  603. if (q->aobs[bufnr]) {
  604. q->sbal_state[bufnr].flags = QDIO_OUTBUF_STATE_FLAG_NONE;
  605. q->sbal_state[bufnr].aob = q->aobs[bufnr];
  606. q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user;
  607. phys_aob = virt_to_phys(q->aobs[bufnr]);
  608. WARN_ON_ONCE(phys_aob & 0xFF);
  609. }
  610. out:
  611. return phys_aob;
  612. }
  613. static void qdio_kick_handler(struct qdio_q *q)
  614. {
  615. int start = q->first_to_kick;
  616. int end = q->first_to_check;
  617. int count;
  618. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  619. return;
  620. count = sub_buf(end, start);
  621. if (q->is_input_q) {
  622. qperf_inc(q, inbound_handler);
  623. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
  624. } else {
  625. qperf_inc(q, outbound_handler);
  626. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
  627. start, count);
  628. }
  629. qdio_handle_aobs(q, start, count);
  630. q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
  631. q->irq_ptr->int_parm);
  632. /* for the next time */
  633. q->first_to_kick = end;
  634. q->qdio_error = 0;
  635. }
  636. static void __qdio_inbound_processing(struct qdio_q *q)
  637. {
  638. qperf_inc(q, tasklet_inbound);
  639. if (!qdio_inbound_q_moved(q))
  640. return;
  641. qdio_kick_handler(q);
  642. if (!qdio_inbound_q_done(q)) {
  643. /* means poll time is not yet over */
  644. qperf_inc(q, tasklet_inbound_resched);
  645. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  646. tasklet_schedule(&q->tasklet);
  647. return;
  648. }
  649. }
  650. qdio_stop_polling(q);
  651. /*
  652. * We need to check again to not lose initiative after
  653. * resetting the ACK state.
  654. */
  655. if (!qdio_inbound_q_done(q)) {
  656. qperf_inc(q, tasklet_inbound_resched2);
  657. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  658. tasklet_schedule(&q->tasklet);
  659. }
  660. }
  661. void qdio_inbound_processing(unsigned long data)
  662. {
  663. struct qdio_q *q = (struct qdio_q *)data;
  664. __qdio_inbound_processing(q);
  665. }
  666. static int get_outbound_buffer_frontier(struct qdio_q *q)
  667. {
  668. int count, stop;
  669. unsigned char state = 0;
  670. q->timestamp = get_clock();
  671. if (need_siga_sync(q))
  672. if (((queue_type(q) != QDIO_IQDIO_QFMT) &&
  673. !pci_out_supported(q)) ||
  674. (queue_type(q) == QDIO_IQDIO_QFMT &&
  675. multicast_outbound(q)))
  676. qdio_siga_sync_q(q);
  677. /*
  678. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  679. * would return 0.
  680. */
  681. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  682. stop = add_buf(q->first_to_check, count);
  683. if (q->first_to_check == stop)
  684. goto out;
  685. count = get_buf_states(q, q->first_to_check, &state, count, 0, 1);
  686. if (!count)
  687. goto out;
  688. switch (state) {
  689. case SLSB_P_OUTPUT_EMPTY:
  690. /* the adapter got it */
  691. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr,
  692. "out empty:%1d %02x", q->nr, count);
  693. atomic_sub(count, &q->nr_buf_used);
  694. q->first_to_check = add_buf(q->first_to_check, count);
  695. if (q->irq_ptr->perf_stat_enabled)
  696. account_sbals(q, count);
  697. break;
  698. case SLSB_P_OUTPUT_ERROR:
  699. process_buffer_error(q, count);
  700. q->first_to_check = add_buf(q->first_to_check, count);
  701. atomic_sub(count, &q->nr_buf_used);
  702. if (q->irq_ptr->perf_stat_enabled)
  703. account_sbals_error(q, count);
  704. break;
  705. case SLSB_CU_OUTPUT_PRIMED:
  706. /* the adapter has not fetched the output yet */
  707. if (q->irq_ptr->perf_stat_enabled)
  708. q->q_stats.nr_sbal_nop++;
  709. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d",
  710. q->nr);
  711. break;
  712. case SLSB_P_OUTPUT_NOT_INIT:
  713. case SLSB_P_OUTPUT_HALTED:
  714. break;
  715. default:
  716. WARN_ON_ONCE(1);
  717. }
  718. out:
  719. return q->first_to_check;
  720. }
  721. /* all buffers processed? */
  722. static inline int qdio_outbound_q_done(struct qdio_q *q)
  723. {
  724. return atomic_read(&q->nr_buf_used) == 0;
  725. }
  726. static inline int qdio_outbound_q_moved(struct qdio_q *q)
  727. {
  728. int bufnr;
  729. bufnr = get_outbound_buffer_frontier(q);
  730. if (bufnr != q->last_move) {
  731. q->last_move = bufnr;
  732. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
  733. return 1;
  734. } else
  735. return 0;
  736. }
  737. static int qdio_kick_outbound_q(struct qdio_q *q, unsigned long aob)
  738. {
  739. int retries = 0, cc;
  740. unsigned int busy_bit;
  741. if (!need_siga_out(q))
  742. return 0;
  743. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
  744. retry:
  745. qperf_inc(q, siga_write);
  746. cc = qdio_siga_output(q, &busy_bit, aob);
  747. switch (cc) {
  748. case 0:
  749. break;
  750. case 2:
  751. if (busy_bit) {
  752. while (++retries < QDIO_BUSY_BIT_RETRIES) {
  753. mdelay(QDIO_BUSY_BIT_RETRY_DELAY);
  754. goto retry;
  755. }
  756. DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr);
  757. cc = -EBUSY;
  758. } else {
  759. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
  760. cc = -ENOBUFS;
  761. }
  762. break;
  763. case 1:
  764. case 3:
  765. DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
  766. cc = -EIO;
  767. break;
  768. }
  769. if (retries) {
  770. DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr);
  771. DBF_ERROR("count:%u", retries);
  772. }
  773. return cc;
  774. }
  775. static void __qdio_outbound_processing(struct qdio_q *q)
  776. {
  777. qperf_inc(q, tasklet_outbound);
  778. WARN_ON_ONCE(atomic_read(&q->nr_buf_used) < 0);
  779. if (qdio_outbound_q_moved(q))
  780. qdio_kick_handler(q);
  781. if (queue_type(q) == QDIO_ZFCP_QFMT)
  782. if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
  783. goto sched;
  784. if (q->u.out.pci_out_enabled)
  785. return;
  786. /*
  787. * Now we know that queue type is either qeth without pci enabled
  788. * or HiperSockets. Make sure buffer switch from PRIMED to EMPTY
  789. * is noticed and outbound_handler is called after some time.
  790. */
  791. if (qdio_outbound_q_done(q))
  792. del_timer(&q->u.out.timer);
  793. else
  794. if (!timer_pending(&q->u.out.timer))
  795. mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
  796. return;
  797. sched:
  798. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  799. return;
  800. tasklet_schedule(&q->tasklet);
  801. }
  802. /* outbound tasklet */
  803. void qdio_outbound_processing(unsigned long data)
  804. {
  805. struct qdio_q *q = (struct qdio_q *)data;
  806. __qdio_outbound_processing(q);
  807. }
  808. void qdio_outbound_timer(unsigned long data)
  809. {
  810. struct qdio_q *q = (struct qdio_q *)data;
  811. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  812. return;
  813. tasklet_schedule(&q->tasklet);
  814. }
  815. static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
  816. {
  817. struct qdio_q *out;
  818. int i;
  819. if (!pci_out_supported(q))
  820. return;
  821. for_each_output_queue(q->irq_ptr, out, i)
  822. if (!qdio_outbound_q_done(out))
  823. tasklet_schedule(&out->tasklet);
  824. }
  825. static void __tiqdio_inbound_processing(struct qdio_q *q)
  826. {
  827. qperf_inc(q, tasklet_inbound);
  828. if (need_siga_sync(q) && need_siga_sync_after_ai(q))
  829. qdio_sync_queues(q);
  830. /*
  831. * The interrupt could be caused by a PCI request. Check the
  832. * PCI capable outbound queues.
  833. */
  834. qdio_check_outbound_after_thinint(q);
  835. if (!qdio_inbound_q_moved(q))
  836. return;
  837. qdio_kick_handler(q);
  838. if (!qdio_inbound_q_done(q)) {
  839. qperf_inc(q, tasklet_inbound_resched);
  840. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  841. tasklet_schedule(&q->tasklet);
  842. return;
  843. }
  844. }
  845. qdio_stop_polling(q);
  846. /*
  847. * We need to check again to not lose initiative after
  848. * resetting the ACK state.
  849. */
  850. if (!qdio_inbound_q_done(q)) {
  851. qperf_inc(q, tasklet_inbound_resched2);
  852. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  853. tasklet_schedule(&q->tasklet);
  854. }
  855. }
  856. void tiqdio_inbound_processing(unsigned long data)
  857. {
  858. struct qdio_q *q = (struct qdio_q *)data;
  859. __tiqdio_inbound_processing(q);
  860. }
  861. static inline void qdio_set_state(struct qdio_irq *irq_ptr,
  862. enum qdio_irq_states state)
  863. {
  864. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
  865. irq_ptr->state = state;
  866. mb();
  867. }
  868. static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
  869. {
  870. if (irb->esw.esw0.erw.cons) {
  871. DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
  872. DBF_ERROR_HEX(irb, 64);
  873. DBF_ERROR_HEX(irb->ecw, 64);
  874. }
  875. }
  876. /* PCI interrupt handler */
  877. static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
  878. {
  879. int i;
  880. struct qdio_q *q;
  881. if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  882. return;
  883. for_each_input_queue(irq_ptr, q, i) {
  884. if (q->u.in.queue_start_poll) {
  885. /* skip if polling is enabled or already in work */
  886. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  887. &q->u.in.queue_irq_state)) {
  888. qperf_inc(q, int_discarded);
  889. continue;
  890. }
  891. q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr,
  892. q->irq_ptr->int_parm);
  893. } else {
  894. tasklet_schedule(&q->tasklet);
  895. }
  896. }
  897. if (!pci_out_supported(q))
  898. return;
  899. for_each_output_queue(irq_ptr, q, i) {
  900. if (qdio_outbound_q_done(q))
  901. continue;
  902. if (need_siga_sync(q) && need_siga_sync_out_after_pci(q))
  903. qdio_siga_sync_q(q);
  904. tasklet_schedule(&q->tasklet);
  905. }
  906. }
  907. static void qdio_handle_activate_check(struct ccw_device *cdev,
  908. unsigned long intparm, int cstat, int dstat)
  909. {
  910. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  911. struct qdio_q *q;
  912. int count;
  913. DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
  914. DBF_ERROR("intp :%lx", intparm);
  915. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  916. if (irq_ptr->nr_input_qs) {
  917. q = irq_ptr->input_qs[0];
  918. } else if (irq_ptr->nr_output_qs) {
  919. q = irq_ptr->output_qs[0];
  920. } else {
  921. dump_stack();
  922. goto no_handler;
  923. }
  924. count = sub_buf(q->first_to_check, q->first_to_kick);
  925. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE,
  926. q->nr, q->first_to_kick, count, irq_ptr->int_parm);
  927. no_handler:
  928. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  929. /*
  930. * In case of z/VM LGR (Live Guest Migration) QDIO recovery will happen.
  931. * Therefore we call the LGR detection function here.
  932. */
  933. lgr_info_log();
  934. }
  935. static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
  936. int dstat)
  937. {
  938. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  939. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
  940. if (cstat)
  941. goto error;
  942. if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
  943. goto error;
  944. if (!(dstat & DEV_STAT_DEV_END))
  945. goto error;
  946. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
  947. return;
  948. error:
  949. DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
  950. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  951. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  952. }
  953. /* qdio interrupt handler */
  954. void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
  955. struct irb *irb)
  956. {
  957. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  958. int cstat, dstat;
  959. if (!intparm || !irq_ptr) {
  960. DBF_ERROR("qint:%4x", cdev->private->schid.sch_no);
  961. return;
  962. }
  963. if (irq_ptr->perf_stat_enabled)
  964. irq_ptr->perf_stat.qdio_int++;
  965. if (IS_ERR(irb)) {
  966. DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
  967. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  968. wake_up(&cdev->private->wait_q);
  969. return;
  970. }
  971. qdio_irq_check_sense(irq_ptr, irb);
  972. cstat = irb->scsw.cmd.cstat;
  973. dstat = irb->scsw.cmd.dstat;
  974. switch (irq_ptr->state) {
  975. case QDIO_IRQ_STATE_INACTIVE:
  976. qdio_establish_handle_irq(cdev, cstat, dstat);
  977. break;
  978. case QDIO_IRQ_STATE_CLEANUP:
  979. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  980. break;
  981. case QDIO_IRQ_STATE_ESTABLISHED:
  982. case QDIO_IRQ_STATE_ACTIVE:
  983. if (cstat & SCHN_STAT_PCI) {
  984. qdio_int_handler_pci(irq_ptr);
  985. return;
  986. }
  987. if (cstat || dstat)
  988. qdio_handle_activate_check(cdev, intparm, cstat,
  989. dstat);
  990. break;
  991. case QDIO_IRQ_STATE_STOPPED:
  992. break;
  993. default:
  994. WARN_ON_ONCE(1);
  995. }
  996. wake_up(&cdev->private->wait_q);
  997. }
  998. /**
  999. * qdio_get_ssqd_desc - get qdio subchannel description
  1000. * @cdev: ccw device to get description for
  1001. * @data: where to store the ssqd
  1002. *
  1003. * Returns 0 or an error code. The results of the chsc are stored in the
  1004. * specified structure.
  1005. */
  1006. int qdio_get_ssqd_desc(struct ccw_device *cdev,
  1007. struct qdio_ssqd_desc *data)
  1008. {
  1009. if (!cdev || !cdev->private)
  1010. return -EINVAL;
  1011. DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no);
  1012. return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data);
  1013. }
  1014. EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
  1015. static void qdio_shutdown_queues(struct ccw_device *cdev)
  1016. {
  1017. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1018. struct qdio_q *q;
  1019. int i;
  1020. for_each_input_queue(irq_ptr, q, i)
  1021. tasklet_kill(&q->tasklet);
  1022. for_each_output_queue(irq_ptr, q, i) {
  1023. del_timer(&q->u.out.timer);
  1024. tasklet_kill(&q->tasklet);
  1025. }
  1026. }
  1027. /**
  1028. * qdio_shutdown - shut down a qdio subchannel
  1029. * @cdev: associated ccw device
  1030. * @how: use halt or clear to shutdown
  1031. */
  1032. int qdio_shutdown(struct ccw_device *cdev, int how)
  1033. {
  1034. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1035. int rc;
  1036. unsigned long flags;
  1037. if (!irq_ptr)
  1038. return -ENODEV;
  1039. WARN_ON_ONCE(irqs_disabled());
  1040. DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no);
  1041. mutex_lock(&irq_ptr->setup_mutex);
  1042. /*
  1043. * Subchannel was already shot down. We cannot prevent being called
  1044. * twice since cio may trigger a shutdown asynchronously.
  1045. */
  1046. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1047. mutex_unlock(&irq_ptr->setup_mutex);
  1048. return 0;
  1049. }
  1050. /*
  1051. * Indicate that the device is going down. Scheduling the queue
  1052. * tasklets is forbidden from here on.
  1053. */
  1054. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  1055. tiqdio_remove_input_queues(irq_ptr);
  1056. qdio_shutdown_queues(cdev);
  1057. qdio_shutdown_debug_entries(irq_ptr, cdev);
  1058. /* cleanup subchannel */
  1059. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  1060. if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
  1061. rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
  1062. else
  1063. /* default behaviour is halt */
  1064. rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
  1065. if (rc) {
  1066. DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
  1067. DBF_ERROR("rc:%4d", rc);
  1068. goto no_cleanup;
  1069. }
  1070. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
  1071. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  1072. wait_event_interruptible_timeout(cdev->private->wait_q,
  1073. irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
  1074. irq_ptr->state == QDIO_IRQ_STATE_ERR,
  1075. 10 * HZ);
  1076. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  1077. no_cleanup:
  1078. qdio_shutdown_thinint(irq_ptr);
  1079. /* restore interrupt handler */
  1080. if ((void *)cdev->handler == (void *)qdio_int_handler)
  1081. cdev->handler = irq_ptr->orig_handler;
  1082. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  1083. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1084. mutex_unlock(&irq_ptr->setup_mutex);
  1085. if (rc)
  1086. return rc;
  1087. return 0;
  1088. }
  1089. EXPORT_SYMBOL_GPL(qdio_shutdown);
  1090. /**
  1091. * qdio_free - free data structures for a qdio subchannel
  1092. * @cdev: associated ccw device
  1093. */
  1094. int qdio_free(struct ccw_device *cdev)
  1095. {
  1096. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1097. if (!irq_ptr)
  1098. return -ENODEV;
  1099. DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no);
  1100. mutex_lock(&irq_ptr->setup_mutex);
  1101. if (irq_ptr->debug_area != NULL) {
  1102. debug_unregister(irq_ptr->debug_area);
  1103. irq_ptr->debug_area = NULL;
  1104. }
  1105. cdev->private->qdio_data = NULL;
  1106. mutex_unlock(&irq_ptr->setup_mutex);
  1107. qdio_release_memory(irq_ptr);
  1108. return 0;
  1109. }
  1110. EXPORT_SYMBOL_GPL(qdio_free);
  1111. /**
  1112. * qdio_allocate - allocate qdio queues and associated data
  1113. * @init_data: initialization data
  1114. */
  1115. int qdio_allocate(struct qdio_initialize *init_data)
  1116. {
  1117. struct qdio_irq *irq_ptr;
  1118. DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no);
  1119. if ((init_data->no_input_qs && !init_data->input_handler) ||
  1120. (init_data->no_output_qs && !init_data->output_handler))
  1121. return -EINVAL;
  1122. if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
  1123. (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
  1124. return -EINVAL;
  1125. if ((!init_data->input_sbal_addr_array) ||
  1126. (!init_data->output_sbal_addr_array))
  1127. return -EINVAL;
  1128. /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
  1129. irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1130. if (!irq_ptr)
  1131. goto out_err;
  1132. mutex_init(&irq_ptr->setup_mutex);
  1133. qdio_allocate_dbf(init_data, irq_ptr);
  1134. /*
  1135. * Allocate a page for the chsc calls in qdio_establish.
  1136. * Must be pre-allocated since a zfcp recovery will call
  1137. * qdio_establish. In case of low memory and swap on a zfcp disk
  1138. * we may not be able to allocate memory otherwise.
  1139. */
  1140. irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
  1141. if (!irq_ptr->chsc_page)
  1142. goto out_rel;
  1143. /* qdr is used in ccw1.cda which is u32 */
  1144. irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1145. if (!irq_ptr->qdr)
  1146. goto out_rel;
  1147. if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
  1148. init_data->no_output_qs))
  1149. goto out_rel;
  1150. init_data->cdev->private->qdio_data = irq_ptr;
  1151. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1152. return 0;
  1153. out_rel:
  1154. qdio_release_memory(irq_ptr);
  1155. out_err:
  1156. return -ENOMEM;
  1157. }
  1158. EXPORT_SYMBOL_GPL(qdio_allocate);
  1159. static void qdio_detect_hsicq(struct qdio_irq *irq_ptr)
  1160. {
  1161. struct qdio_q *q = irq_ptr->input_qs[0];
  1162. int i, use_cq = 0;
  1163. if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT)
  1164. use_cq = 1;
  1165. for_each_output_queue(irq_ptr, q, i) {
  1166. if (use_cq) {
  1167. if (qdio_enable_async_operation(&q->u.out) < 0) {
  1168. use_cq = 0;
  1169. continue;
  1170. }
  1171. } else
  1172. qdio_disable_async_operation(&q->u.out);
  1173. }
  1174. DBF_EVENT("use_cq:%d", use_cq);
  1175. }
  1176. /**
  1177. * qdio_establish - establish queues on a qdio subchannel
  1178. * @init_data: initialization data
  1179. */
  1180. int qdio_establish(struct qdio_initialize *init_data)
  1181. {
  1182. struct qdio_irq *irq_ptr;
  1183. struct ccw_device *cdev = init_data->cdev;
  1184. unsigned long saveflags;
  1185. int rc;
  1186. DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no);
  1187. irq_ptr = cdev->private->qdio_data;
  1188. if (!irq_ptr)
  1189. return -ENODEV;
  1190. if (cdev->private->state != DEV_STATE_ONLINE)
  1191. return -EINVAL;
  1192. mutex_lock(&irq_ptr->setup_mutex);
  1193. qdio_setup_irq(init_data);
  1194. rc = qdio_establish_thinint(irq_ptr);
  1195. if (rc) {
  1196. mutex_unlock(&irq_ptr->setup_mutex);
  1197. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1198. return rc;
  1199. }
  1200. /* establish q */
  1201. irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
  1202. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1203. irq_ptr->ccw.count = irq_ptr->equeue.count;
  1204. irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
  1205. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1206. ccw_device_set_options_mask(cdev, 0);
  1207. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
  1208. if (rc) {
  1209. DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
  1210. DBF_ERROR("rc:%4x", rc);
  1211. }
  1212. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1213. if (rc) {
  1214. mutex_unlock(&irq_ptr->setup_mutex);
  1215. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1216. return rc;
  1217. }
  1218. wait_event_interruptible_timeout(cdev->private->wait_q,
  1219. irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
  1220. irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
  1221. if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
  1222. mutex_unlock(&irq_ptr->setup_mutex);
  1223. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1224. return -EIO;
  1225. }
  1226. qdio_setup_ssqd_info(irq_ptr);
  1227. qdio_detect_hsicq(irq_ptr);
  1228. /* qebsm is now setup if available, initialize buffer states */
  1229. qdio_init_buf_states(irq_ptr);
  1230. mutex_unlock(&irq_ptr->setup_mutex);
  1231. qdio_print_subchannel_info(irq_ptr, cdev);
  1232. qdio_setup_debug_entries(irq_ptr, cdev);
  1233. return 0;
  1234. }
  1235. EXPORT_SYMBOL_GPL(qdio_establish);
  1236. /**
  1237. * qdio_activate - activate queues on a qdio subchannel
  1238. * @cdev: associated cdev
  1239. */
  1240. int qdio_activate(struct ccw_device *cdev)
  1241. {
  1242. struct qdio_irq *irq_ptr;
  1243. int rc;
  1244. unsigned long saveflags;
  1245. DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no);
  1246. irq_ptr = cdev->private->qdio_data;
  1247. if (!irq_ptr)
  1248. return -ENODEV;
  1249. if (cdev->private->state != DEV_STATE_ONLINE)
  1250. return -EINVAL;
  1251. mutex_lock(&irq_ptr->setup_mutex);
  1252. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1253. rc = -EBUSY;
  1254. goto out;
  1255. }
  1256. irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
  1257. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1258. irq_ptr->ccw.count = irq_ptr->aqueue.count;
  1259. irq_ptr->ccw.cda = 0;
  1260. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1261. ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
  1262. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
  1263. 0, DOIO_DENY_PREFETCH);
  1264. if (rc) {
  1265. DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
  1266. DBF_ERROR("rc:%4x", rc);
  1267. }
  1268. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1269. if (rc)
  1270. goto out;
  1271. if (is_thinint_irq(irq_ptr))
  1272. tiqdio_add_input_queues(irq_ptr);
  1273. /* wait for subchannel to become active */
  1274. msleep(5);
  1275. switch (irq_ptr->state) {
  1276. case QDIO_IRQ_STATE_STOPPED:
  1277. case QDIO_IRQ_STATE_ERR:
  1278. rc = -EIO;
  1279. break;
  1280. default:
  1281. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
  1282. rc = 0;
  1283. }
  1284. out:
  1285. mutex_unlock(&irq_ptr->setup_mutex);
  1286. return rc;
  1287. }
  1288. EXPORT_SYMBOL_GPL(qdio_activate);
  1289. static inline int buf_in_between(int bufnr, int start, int count)
  1290. {
  1291. int end = add_buf(start, count);
  1292. if (end > start) {
  1293. if (bufnr >= start && bufnr < end)
  1294. return 1;
  1295. else
  1296. return 0;
  1297. }
  1298. /* wrap-around case */
  1299. if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
  1300. (bufnr < end))
  1301. return 1;
  1302. else
  1303. return 0;
  1304. }
  1305. /**
  1306. * handle_inbound - reset processed input buffers
  1307. * @q: queue containing the buffers
  1308. * @callflags: flags
  1309. * @bufnr: first buffer to process
  1310. * @count: how many buffers are emptied
  1311. */
  1312. static int handle_inbound(struct qdio_q *q, unsigned int callflags,
  1313. int bufnr, int count)
  1314. {
  1315. int used, diff;
  1316. qperf_inc(q, inbound_call);
  1317. if (!q->u.in.polling)
  1318. goto set;
  1319. /* protect against stop polling setting an ACK for an emptied slsb */
  1320. if (count == QDIO_MAX_BUFFERS_PER_Q) {
  1321. /* overwriting everything, just delete polling status */
  1322. q->u.in.polling = 0;
  1323. q->u.in.ack_count = 0;
  1324. goto set;
  1325. } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
  1326. if (is_qebsm(q)) {
  1327. /* partial overwrite, just update ack_start */
  1328. diff = add_buf(bufnr, count);
  1329. diff = sub_buf(diff, q->u.in.ack_start);
  1330. q->u.in.ack_count -= diff;
  1331. if (q->u.in.ack_count <= 0) {
  1332. q->u.in.polling = 0;
  1333. q->u.in.ack_count = 0;
  1334. goto set;
  1335. }
  1336. q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
  1337. }
  1338. else
  1339. /* the only ACK will be deleted, so stop polling */
  1340. q->u.in.polling = 0;
  1341. }
  1342. set:
  1343. count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
  1344. used = atomic_add_return(count, &q->nr_buf_used) - count;
  1345. if (need_siga_in(q))
  1346. return qdio_siga_input(q);
  1347. return 0;
  1348. }
  1349. /**
  1350. * handle_outbound - process filled outbound buffers
  1351. * @q: queue containing the buffers
  1352. * @callflags: flags
  1353. * @bufnr: first buffer to process
  1354. * @count: how many buffers are filled
  1355. */
  1356. static int handle_outbound(struct qdio_q *q, unsigned int callflags,
  1357. int bufnr, int count)
  1358. {
  1359. unsigned char state = 0;
  1360. int used, rc = 0;
  1361. qperf_inc(q, outbound_call);
  1362. count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
  1363. used = atomic_add_return(count, &q->nr_buf_used);
  1364. if (used == QDIO_MAX_BUFFERS_PER_Q)
  1365. qperf_inc(q, outbound_queue_full);
  1366. if (callflags & QDIO_FLAG_PCI_OUT) {
  1367. q->u.out.pci_out_enabled = 1;
  1368. qperf_inc(q, pci_request_int);
  1369. } else
  1370. q->u.out.pci_out_enabled = 0;
  1371. if (queue_type(q) == QDIO_IQDIO_QFMT) {
  1372. unsigned long phys_aob = 0;
  1373. /* One SIGA-W per buffer required for unicast HSI */
  1374. WARN_ON_ONCE(count > 1 && !multicast_outbound(q));
  1375. phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr);
  1376. rc = qdio_kick_outbound_q(q, phys_aob);
  1377. } else if (need_siga_sync(q)) {
  1378. rc = qdio_siga_sync_q(q);
  1379. } else {
  1380. /* try to fast requeue buffers */
  1381. get_buf_state(q, prev_buf(bufnr), &state, 0);
  1382. if (state != SLSB_CU_OUTPUT_PRIMED)
  1383. rc = qdio_kick_outbound_q(q, 0);
  1384. else
  1385. qperf_inc(q, fast_requeue);
  1386. }
  1387. /* in case of SIGA errors we must process the error immediately */
  1388. if (used >= q->u.out.scan_threshold || rc)
  1389. tasklet_schedule(&q->tasklet);
  1390. else
  1391. /* free the SBALs in case of no further traffic */
  1392. if (!timer_pending(&q->u.out.timer))
  1393. mod_timer(&q->u.out.timer, jiffies + HZ);
  1394. return rc;
  1395. }
  1396. /**
  1397. * do_QDIO - process input or output buffers
  1398. * @cdev: associated ccw_device for the qdio subchannel
  1399. * @callflags: input or output and special flags from the program
  1400. * @q_nr: queue number
  1401. * @bufnr: buffer number
  1402. * @count: how many buffers to process
  1403. */
  1404. int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
  1405. int q_nr, unsigned int bufnr, unsigned int count)
  1406. {
  1407. struct qdio_irq *irq_ptr;
  1408. if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
  1409. return -EINVAL;
  1410. irq_ptr = cdev->private->qdio_data;
  1411. if (!irq_ptr)
  1412. return -ENODEV;
  1413. DBF_DEV_EVENT(DBF_INFO, irq_ptr,
  1414. "do%02x b:%02x c:%02x", callflags, bufnr, count);
  1415. if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
  1416. return -EIO;
  1417. if (!count)
  1418. return 0;
  1419. if (callflags & QDIO_FLAG_SYNC_INPUT)
  1420. return handle_inbound(irq_ptr->input_qs[q_nr],
  1421. callflags, bufnr, count);
  1422. else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
  1423. return handle_outbound(irq_ptr->output_qs[q_nr],
  1424. callflags, bufnr, count);
  1425. return -EINVAL;
  1426. }
  1427. EXPORT_SYMBOL_GPL(do_QDIO);
  1428. /**
  1429. * qdio_start_irq - process input buffers
  1430. * @cdev: associated ccw_device for the qdio subchannel
  1431. * @nr: input queue number
  1432. *
  1433. * Return codes
  1434. * 0 - success
  1435. * 1 - irqs not started since new data is available
  1436. */
  1437. int qdio_start_irq(struct ccw_device *cdev, int nr)
  1438. {
  1439. struct qdio_q *q;
  1440. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1441. if (!irq_ptr)
  1442. return -ENODEV;
  1443. q = irq_ptr->input_qs[nr];
  1444. clear_nonshared_ind(irq_ptr);
  1445. qdio_stop_polling(q);
  1446. clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state);
  1447. /*
  1448. * We need to check again to not lose initiative after
  1449. * resetting the ACK state.
  1450. */
  1451. if (test_nonshared_ind(irq_ptr))
  1452. goto rescan;
  1453. if (!qdio_inbound_q_done(q))
  1454. goto rescan;
  1455. return 0;
  1456. rescan:
  1457. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1458. &q->u.in.queue_irq_state))
  1459. return 0;
  1460. else
  1461. return 1;
  1462. }
  1463. EXPORT_SYMBOL(qdio_start_irq);
  1464. /**
  1465. * qdio_get_next_buffers - process input buffers
  1466. * @cdev: associated ccw_device for the qdio subchannel
  1467. * @nr: input queue number
  1468. * @bufnr: first filled buffer number
  1469. * @error: buffers are in error state
  1470. *
  1471. * Return codes
  1472. * < 0 - error
  1473. * = 0 - no new buffers found
  1474. * > 0 - number of processed buffers
  1475. */
  1476. int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
  1477. int *error)
  1478. {
  1479. struct qdio_q *q;
  1480. int start, end;
  1481. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1482. if (!irq_ptr)
  1483. return -ENODEV;
  1484. q = irq_ptr->input_qs[nr];
  1485. /*
  1486. * Cannot rely on automatic sync after interrupt since queues may
  1487. * also be examined without interrupt.
  1488. */
  1489. if (need_siga_sync(q))
  1490. qdio_sync_queues(q);
  1491. /* check the PCI capable outbound queues. */
  1492. qdio_check_outbound_after_thinint(q);
  1493. if (!qdio_inbound_q_moved(q))
  1494. return 0;
  1495. /* Note: upper-layer MUST stop processing immediately here ... */
  1496. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  1497. return -EIO;
  1498. start = q->first_to_kick;
  1499. end = q->first_to_check;
  1500. *bufnr = start;
  1501. *error = q->qdio_error;
  1502. /* for the next time */
  1503. q->first_to_kick = end;
  1504. q->qdio_error = 0;
  1505. return sub_buf(end, start);
  1506. }
  1507. EXPORT_SYMBOL(qdio_get_next_buffers);
  1508. /**
  1509. * qdio_stop_irq - disable interrupt processing for the device
  1510. * @cdev: associated ccw_device for the qdio subchannel
  1511. * @nr: input queue number
  1512. *
  1513. * Return codes
  1514. * 0 - interrupts were already disabled
  1515. * 1 - interrupts successfully disabled
  1516. */
  1517. int qdio_stop_irq(struct ccw_device *cdev, int nr)
  1518. {
  1519. struct qdio_q *q;
  1520. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1521. if (!irq_ptr)
  1522. return -ENODEV;
  1523. q = irq_ptr->input_qs[nr];
  1524. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1525. &q->u.in.queue_irq_state))
  1526. return 0;
  1527. else
  1528. return 1;
  1529. }
  1530. EXPORT_SYMBOL(qdio_stop_irq);
  1531. static int __init init_QDIO(void)
  1532. {
  1533. int rc;
  1534. rc = qdio_debug_init();
  1535. if (rc)
  1536. return rc;
  1537. rc = qdio_setup_init();
  1538. if (rc)
  1539. goto out_debug;
  1540. rc = tiqdio_allocate_memory();
  1541. if (rc)
  1542. goto out_cache;
  1543. rc = tiqdio_register_thinints();
  1544. if (rc)
  1545. goto out_ti;
  1546. return 0;
  1547. out_ti:
  1548. tiqdio_free_memory();
  1549. out_cache:
  1550. qdio_setup_exit();
  1551. out_debug:
  1552. qdio_debug_exit();
  1553. return rc;
  1554. }
  1555. static void __exit exit_QDIO(void)
  1556. {
  1557. tiqdio_unregister_thinints();
  1558. tiqdio_free_memory();
  1559. qdio_setup_exit();
  1560. qdio_debug_exit();
  1561. }
  1562. module_init(init_QDIO);
  1563. module_exit(exit_QDIO);