aerdrv_core.c 22 KB

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  1. /*
  2. * drivers/pci/pcie/aer/aerdrv_core.c
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * This file implements the core part of PCI-Express AER. When an pci-express
  9. * error is delivered, an error message will be collected and printed to
  10. * console, then, an error recovery procedure will be executed by following
  11. * the pci error recovery rules.
  12. *
  13. * Copyright (C) 2006 Intel Corp.
  14. * Tom Long Nguyen (tom.l.nguyen@intel.com)
  15. * Zhang Yanmin (yanmin.zhang@intel.com)
  16. *
  17. */
  18. #include <linux/module.h>
  19. #include <linux/pci.h>
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/pm.h>
  23. #include <linux/suspend.h>
  24. #include <linux/delay.h>
  25. #include <linux/slab.h>
  26. #include <linux/kfifo.h>
  27. #include "aerdrv.h"
  28. static bool forceload;
  29. static bool nosourceid;
  30. module_param(forceload, bool, 0);
  31. module_param(nosourceid, bool, 0);
  32. #define PCI_EXP_AER_FLAGS (PCI_EXP_DEVCTL_CERE | PCI_EXP_DEVCTL_NFERE | \
  33. PCI_EXP_DEVCTL_FERE | PCI_EXP_DEVCTL_URRE)
  34. int pci_enable_pcie_error_reporting(struct pci_dev *dev)
  35. {
  36. if (pcie_aer_get_firmware_first(dev))
  37. return -EIO;
  38. if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR))
  39. return -EIO;
  40. return pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_AER_FLAGS);
  41. }
  42. EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting);
  43. int pci_disable_pcie_error_reporting(struct pci_dev *dev)
  44. {
  45. if (pcie_aer_get_firmware_first(dev))
  46. return -EIO;
  47. return pcie_capability_clear_word(dev, PCI_EXP_DEVCTL,
  48. PCI_EXP_AER_FLAGS);
  49. }
  50. EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting);
  51. int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
  52. {
  53. int pos;
  54. u32 status;
  55. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  56. if (!pos)
  57. return -EIO;
  58. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
  59. if (status)
  60. pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status);
  61. return 0;
  62. }
  63. EXPORT_SYMBOL_GPL(pci_cleanup_aer_uncorrect_error_status);
  64. /**
  65. * add_error_device - list device to be handled
  66. * @e_info: pointer to error info
  67. * @dev: pointer to pci_dev to be added
  68. */
  69. static int add_error_device(struct aer_err_info *e_info, struct pci_dev *dev)
  70. {
  71. if (e_info->error_dev_num < AER_MAX_MULTI_ERR_DEVICES) {
  72. e_info->dev[e_info->error_dev_num] = dev;
  73. e_info->error_dev_num++;
  74. return 0;
  75. }
  76. return -ENOSPC;
  77. }
  78. #define PCI_BUS(x) (((x) >> 8) & 0xff)
  79. /**
  80. * is_error_source - check whether the device is source of reported error
  81. * @dev: pointer to pci_dev to be checked
  82. * @e_info: pointer to reported error info
  83. */
  84. static bool is_error_source(struct pci_dev *dev, struct aer_err_info *e_info)
  85. {
  86. int pos;
  87. u32 status, mask;
  88. u16 reg16;
  89. /*
  90. * When bus id is equal to 0, it might be a bad id
  91. * reported by root port.
  92. */
  93. if (!nosourceid && (PCI_BUS(e_info->id) != 0)) {
  94. /* Device ID match? */
  95. if (e_info->id == ((dev->bus->number << 8) | dev->devfn))
  96. return true;
  97. /* Continue id comparing if there is no multiple error */
  98. if (!e_info->multi_error_valid)
  99. return false;
  100. }
  101. /*
  102. * When either
  103. * 1) nosourceid==y;
  104. * 2) bus id is equal to 0. Some ports might lose the bus
  105. * id of error source id;
  106. * 3) There are multiple errors and prior id comparing fails;
  107. * We check AER status registers to find possible reporter.
  108. */
  109. if (atomic_read(&dev->enable_cnt) == 0)
  110. return false;
  111. /* Check if AER is enabled */
  112. pcie_capability_read_word(dev, PCI_EXP_DEVCTL, &reg16);
  113. if (!(reg16 & PCI_EXP_AER_FLAGS))
  114. return false;
  115. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  116. if (!pos)
  117. return false;
  118. /* Check if error is recorded */
  119. if (e_info->severity == AER_CORRECTABLE) {
  120. pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS, &status);
  121. pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK, &mask);
  122. } else {
  123. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
  124. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, &mask);
  125. }
  126. if (status & ~mask)
  127. return true;
  128. return false;
  129. }
  130. static int find_device_iter(struct pci_dev *dev, void *data)
  131. {
  132. struct aer_err_info *e_info = (struct aer_err_info *)data;
  133. if (is_error_source(dev, e_info)) {
  134. /* List this device */
  135. if (add_error_device(e_info, dev)) {
  136. /* We cannot handle more... Stop iteration */
  137. /* TODO: Should print error message here? */
  138. return 1;
  139. }
  140. /* If there is only a single error, stop iteration */
  141. if (!e_info->multi_error_valid)
  142. return 1;
  143. }
  144. return 0;
  145. }
  146. /**
  147. * find_source_device - search through device hierarchy for source device
  148. * @parent: pointer to Root Port pci_dev data structure
  149. * @e_info: including detailed error information such like id
  150. *
  151. * Return true if found.
  152. *
  153. * Invoked by DPC when error is detected at the Root Port.
  154. * Caller of this function must set id, severity, and multi_error_valid of
  155. * struct aer_err_info pointed by @e_info properly. This function must fill
  156. * e_info->error_dev_num and e_info->dev[], based on the given information.
  157. */
  158. static bool find_source_device(struct pci_dev *parent,
  159. struct aer_err_info *e_info)
  160. {
  161. struct pci_dev *dev = parent;
  162. int result;
  163. /* Must reset in this function */
  164. e_info->error_dev_num = 0;
  165. /* Is Root Port an agent that sends error message? */
  166. result = find_device_iter(dev, e_info);
  167. if (result)
  168. return true;
  169. pci_walk_bus(parent->subordinate, find_device_iter, e_info);
  170. if (!e_info->error_dev_num) {
  171. dev_printk(KERN_DEBUG, &parent->dev,
  172. "can't find device of ID%04x\n",
  173. e_info->id);
  174. return false;
  175. }
  176. return true;
  177. }
  178. static int report_error_detected(struct pci_dev *dev, void *data)
  179. {
  180. pci_ers_result_t vote;
  181. const struct pci_error_handlers *err_handler;
  182. struct aer_broadcast_data *result_data;
  183. result_data = (struct aer_broadcast_data *) data;
  184. device_lock(&dev->dev);
  185. dev->error_state = result_data->state;
  186. if (!dev->driver ||
  187. !dev->driver->err_handler ||
  188. !dev->driver->err_handler->error_detected) {
  189. if (result_data->state == pci_channel_io_frozen &&
  190. !(dev->hdr_type & PCI_HEADER_TYPE_BRIDGE)) {
  191. /*
  192. * In case of fatal recovery, if one of down-
  193. * stream device has no driver. We might be
  194. * unable to recover because a later insmod
  195. * of a driver for this device is unaware of
  196. * its hw state.
  197. */
  198. dev_printk(KERN_DEBUG, &dev->dev, "device has %s\n",
  199. dev->driver ?
  200. "no AER-aware driver" : "no driver");
  201. }
  202. /*
  203. * If there's any device in the subtree that does not
  204. * have an error_detected callback, returning
  205. * PCI_ERS_RESULT_NO_AER_DRIVER prevents calling of
  206. * the subsequent mmio_enabled/slot_reset/resume
  207. * callbacks of "any" device in the subtree. All the
  208. * devices in the subtree are left in the error state
  209. * without recovery.
  210. */
  211. if (!(dev->hdr_type & PCI_HEADER_TYPE_BRIDGE))
  212. vote = PCI_ERS_RESULT_NO_AER_DRIVER;
  213. else
  214. vote = PCI_ERS_RESULT_NONE;
  215. } else {
  216. err_handler = dev->driver->err_handler;
  217. vote = err_handler->error_detected(dev, result_data->state);
  218. }
  219. result_data->result = merge_result(result_data->result, vote);
  220. device_unlock(&dev->dev);
  221. return 0;
  222. }
  223. static int report_mmio_enabled(struct pci_dev *dev, void *data)
  224. {
  225. pci_ers_result_t vote;
  226. const struct pci_error_handlers *err_handler;
  227. struct aer_broadcast_data *result_data;
  228. result_data = (struct aer_broadcast_data *) data;
  229. device_lock(&dev->dev);
  230. if (!dev->driver ||
  231. !dev->driver->err_handler ||
  232. !dev->driver->err_handler->mmio_enabled)
  233. goto out;
  234. err_handler = dev->driver->err_handler;
  235. vote = err_handler->mmio_enabled(dev);
  236. result_data->result = merge_result(result_data->result, vote);
  237. out:
  238. device_unlock(&dev->dev);
  239. return 0;
  240. }
  241. static int report_slot_reset(struct pci_dev *dev, void *data)
  242. {
  243. pci_ers_result_t vote;
  244. const struct pci_error_handlers *err_handler;
  245. struct aer_broadcast_data *result_data;
  246. result_data = (struct aer_broadcast_data *) data;
  247. device_lock(&dev->dev);
  248. if (!dev->driver ||
  249. !dev->driver->err_handler ||
  250. !dev->driver->err_handler->slot_reset)
  251. goto out;
  252. err_handler = dev->driver->err_handler;
  253. vote = err_handler->slot_reset(dev);
  254. result_data->result = merge_result(result_data->result, vote);
  255. out:
  256. device_unlock(&dev->dev);
  257. return 0;
  258. }
  259. static int report_resume(struct pci_dev *dev, void *data)
  260. {
  261. const struct pci_error_handlers *err_handler;
  262. device_lock(&dev->dev);
  263. dev->error_state = pci_channel_io_normal;
  264. if (!dev->driver ||
  265. !dev->driver->err_handler ||
  266. !dev->driver->err_handler->resume)
  267. goto out;
  268. err_handler = dev->driver->err_handler;
  269. err_handler->resume(dev);
  270. out:
  271. device_unlock(&dev->dev);
  272. return 0;
  273. }
  274. /**
  275. * broadcast_error_message - handle message broadcast to downstream drivers
  276. * @dev: pointer to from where in a hierarchy message is broadcasted down
  277. * @state: error state
  278. * @error_mesg: message to print
  279. * @cb: callback to be broadcasted
  280. *
  281. * Invoked during error recovery process. Once being invoked, the content
  282. * of error severity will be broadcasted to all downstream drivers in a
  283. * hierarchy in question.
  284. */
  285. static pci_ers_result_t broadcast_error_message(struct pci_dev *dev,
  286. enum pci_channel_state state,
  287. char *error_mesg,
  288. int (*cb)(struct pci_dev *, void *))
  289. {
  290. struct aer_broadcast_data result_data;
  291. dev_printk(KERN_DEBUG, &dev->dev, "broadcast %s message\n", error_mesg);
  292. result_data.state = state;
  293. if (cb == report_error_detected)
  294. result_data.result = PCI_ERS_RESULT_CAN_RECOVER;
  295. else
  296. result_data.result = PCI_ERS_RESULT_RECOVERED;
  297. if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE) {
  298. /*
  299. * If the error is reported by a bridge, we think this error
  300. * is related to the downstream link of the bridge, so we
  301. * do error recovery on all subordinates of the bridge instead
  302. * of the bridge and clear the error status of the bridge.
  303. */
  304. if (cb == report_error_detected)
  305. dev->error_state = state;
  306. pci_walk_bus(dev->subordinate, cb, &result_data);
  307. if (cb == report_resume) {
  308. pci_cleanup_aer_uncorrect_error_status(dev);
  309. dev->error_state = pci_channel_io_normal;
  310. }
  311. } else {
  312. /*
  313. * If the error is reported by an end point, we think this
  314. * error is related to the upstream link of the end point.
  315. */
  316. pci_walk_bus(dev->bus, cb, &result_data);
  317. }
  318. return result_data.result;
  319. }
  320. /**
  321. * aer_do_secondary_bus_reset - perform secondary bus reset
  322. * @dev: pointer to bridge's pci_dev data structure
  323. *
  324. * Invoked when performing link reset at Root Port or Downstream Port.
  325. */
  326. void aer_do_secondary_bus_reset(struct pci_dev *dev)
  327. {
  328. u16 p2p_ctrl;
  329. /* Assert Secondary Bus Reset */
  330. pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &p2p_ctrl);
  331. p2p_ctrl |= PCI_BRIDGE_CTL_BUS_RESET;
  332. pci_write_config_word(dev, PCI_BRIDGE_CONTROL, p2p_ctrl);
  333. /*
  334. * we should send hot reset message for 2ms to allow it time to
  335. * propagate to all downstream ports
  336. */
  337. msleep(2);
  338. /* De-assert Secondary Bus Reset */
  339. p2p_ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET;
  340. pci_write_config_word(dev, PCI_BRIDGE_CONTROL, p2p_ctrl);
  341. /*
  342. * System software must wait for at least 100ms from the end
  343. * of a reset of one or more device before it is permitted
  344. * to issue Configuration Requests to those devices.
  345. */
  346. msleep(200);
  347. }
  348. /**
  349. * default_downstream_reset_link - default reset function for Downstream Port
  350. * @dev: pointer to downstream port's pci_dev data structure
  351. *
  352. * Invoked when performing link reset at Downstream Port w/ no aer driver.
  353. */
  354. static pci_ers_result_t default_downstream_reset_link(struct pci_dev *dev)
  355. {
  356. aer_do_secondary_bus_reset(dev);
  357. dev_printk(KERN_DEBUG, &dev->dev,
  358. "Downstream Port link has been reset\n");
  359. return PCI_ERS_RESULT_RECOVERED;
  360. }
  361. static int find_aer_service_iter(struct device *device, void *data)
  362. {
  363. struct pcie_port_service_driver *service_driver, **drv;
  364. drv = (struct pcie_port_service_driver **) data;
  365. if (device->bus == &pcie_port_bus_type && device->driver) {
  366. service_driver = to_service_driver(device->driver);
  367. if (service_driver->service == PCIE_PORT_SERVICE_AER) {
  368. *drv = service_driver;
  369. return 1;
  370. }
  371. }
  372. return 0;
  373. }
  374. static struct pcie_port_service_driver *find_aer_service(struct pci_dev *dev)
  375. {
  376. struct pcie_port_service_driver *drv = NULL;
  377. device_for_each_child(&dev->dev, &drv, find_aer_service_iter);
  378. return drv;
  379. }
  380. static pci_ers_result_t reset_link(struct pci_dev *dev)
  381. {
  382. struct pci_dev *udev;
  383. pci_ers_result_t status;
  384. struct pcie_port_service_driver *driver;
  385. if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE) {
  386. /* Reset this port for all subordinates */
  387. udev = dev;
  388. } else {
  389. /* Reset the upstream component (likely downstream port) */
  390. udev = dev->bus->self;
  391. }
  392. /* Use the aer driver of the component firstly */
  393. driver = find_aer_service(udev);
  394. if (driver && driver->reset_link) {
  395. status = driver->reset_link(udev);
  396. } else if (pci_pcie_type(udev) == PCI_EXP_TYPE_DOWNSTREAM) {
  397. status = default_downstream_reset_link(udev);
  398. } else {
  399. dev_printk(KERN_DEBUG, &dev->dev,
  400. "no link-reset support at upstream device %s\n",
  401. pci_name(udev));
  402. return PCI_ERS_RESULT_DISCONNECT;
  403. }
  404. if (status != PCI_ERS_RESULT_RECOVERED) {
  405. dev_printk(KERN_DEBUG, &dev->dev,
  406. "link reset at upstream device %s failed\n",
  407. pci_name(udev));
  408. return PCI_ERS_RESULT_DISCONNECT;
  409. }
  410. return status;
  411. }
  412. /**
  413. * do_recovery - handle nonfatal/fatal error recovery process
  414. * @dev: pointer to a pci_dev data structure of agent detecting an error
  415. * @severity: error severity type
  416. *
  417. * Invoked when an error is nonfatal/fatal. Once being invoked, broadcast
  418. * error detected message to all downstream drivers within a hierarchy in
  419. * question and return the returned code.
  420. */
  421. static void do_recovery(struct pci_dev *dev, int severity)
  422. {
  423. pci_ers_result_t status, result = PCI_ERS_RESULT_RECOVERED;
  424. enum pci_channel_state state;
  425. if (severity == AER_FATAL)
  426. state = pci_channel_io_frozen;
  427. else
  428. state = pci_channel_io_normal;
  429. status = broadcast_error_message(dev,
  430. state,
  431. "error_detected",
  432. report_error_detected);
  433. if (severity == AER_FATAL) {
  434. result = reset_link(dev);
  435. if (result != PCI_ERS_RESULT_RECOVERED)
  436. goto failed;
  437. }
  438. if (status == PCI_ERS_RESULT_CAN_RECOVER)
  439. status = broadcast_error_message(dev,
  440. state,
  441. "mmio_enabled",
  442. report_mmio_enabled);
  443. if (status == PCI_ERS_RESULT_NEED_RESET) {
  444. /*
  445. * TODO: Should call platform-specific
  446. * functions to reset slot before calling
  447. * drivers' slot_reset callbacks?
  448. */
  449. status = broadcast_error_message(dev,
  450. state,
  451. "slot_reset",
  452. report_slot_reset);
  453. }
  454. if (status != PCI_ERS_RESULT_RECOVERED)
  455. goto failed;
  456. broadcast_error_message(dev,
  457. state,
  458. "resume",
  459. report_resume);
  460. dev_info(&dev->dev, "AER: Device recovery successful\n");
  461. return;
  462. failed:
  463. /* TODO: Should kernel panic here? */
  464. dev_info(&dev->dev, "AER: Device recovery failed\n");
  465. }
  466. /**
  467. * handle_error_source - handle logging error into an event log
  468. * @aerdev: pointer to pcie_device data structure of the root port
  469. * @dev: pointer to pci_dev data structure of error source device
  470. * @info: comprehensive error information
  471. *
  472. * Invoked when an error being detected by Root Port.
  473. */
  474. static void handle_error_source(struct pcie_device *aerdev,
  475. struct pci_dev *dev,
  476. struct aer_err_info *info)
  477. {
  478. int pos;
  479. if (info->severity == AER_CORRECTABLE) {
  480. /*
  481. * Correctable error does not need software intevention.
  482. * No need to go through error recovery process.
  483. */
  484. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  485. if (pos)
  486. pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS,
  487. info->status);
  488. } else
  489. do_recovery(dev, info->severity);
  490. }
  491. #ifdef CONFIG_ACPI_APEI_PCIEAER
  492. static void aer_recover_work_func(struct work_struct *work);
  493. #define AER_RECOVER_RING_ORDER 4
  494. #define AER_RECOVER_RING_SIZE (1 << AER_RECOVER_RING_ORDER)
  495. struct aer_recover_entry
  496. {
  497. u8 bus;
  498. u8 devfn;
  499. u16 domain;
  500. int severity;
  501. };
  502. static DEFINE_KFIFO(aer_recover_ring, struct aer_recover_entry,
  503. AER_RECOVER_RING_SIZE);
  504. /*
  505. * Mutual exclusion for writers of aer_recover_ring, reader side don't
  506. * need lock, because there is only one reader and lock is not needed
  507. * between reader and writer.
  508. */
  509. static DEFINE_SPINLOCK(aer_recover_ring_lock);
  510. static DECLARE_WORK(aer_recover_work, aer_recover_work_func);
  511. void aer_recover_queue(int domain, unsigned int bus, unsigned int devfn,
  512. int severity)
  513. {
  514. unsigned long flags;
  515. struct aer_recover_entry entry = {
  516. .bus = bus,
  517. .devfn = devfn,
  518. .domain = domain,
  519. .severity = severity,
  520. };
  521. spin_lock_irqsave(&aer_recover_ring_lock, flags);
  522. if (kfifo_put(&aer_recover_ring, &entry))
  523. schedule_work(&aer_recover_work);
  524. else
  525. pr_err("AER recover: Buffer overflow when recovering AER for %04x:%02x:%02x:%x\n",
  526. domain, bus, PCI_SLOT(devfn), PCI_FUNC(devfn));
  527. spin_unlock_irqrestore(&aer_recover_ring_lock, flags);
  528. }
  529. EXPORT_SYMBOL_GPL(aer_recover_queue);
  530. static void aer_recover_work_func(struct work_struct *work)
  531. {
  532. struct aer_recover_entry entry;
  533. struct pci_dev *pdev;
  534. while (kfifo_get(&aer_recover_ring, &entry)) {
  535. pdev = pci_get_domain_bus_and_slot(entry.domain, entry.bus,
  536. entry.devfn);
  537. if (!pdev) {
  538. pr_err("AER recover: Can not find pci_dev for %04x:%02x:%02x:%x\n",
  539. entry.domain, entry.bus,
  540. PCI_SLOT(entry.devfn), PCI_FUNC(entry.devfn));
  541. continue;
  542. }
  543. do_recovery(pdev, entry.severity);
  544. }
  545. }
  546. #endif
  547. /**
  548. * get_device_error_info - read error status from dev and store it to info
  549. * @dev: pointer to the device expected to have a error record
  550. * @info: pointer to structure to store the error record
  551. *
  552. * Return 1 on success, 0 on error.
  553. *
  554. * Note that @info is reused among all error devices. Clear fields properly.
  555. */
  556. static int get_device_error_info(struct pci_dev *dev, struct aer_err_info *info)
  557. {
  558. int pos, temp;
  559. /* Must reset in this function */
  560. info->status = 0;
  561. info->tlp_header_valid = 0;
  562. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  563. /* The device might not support AER */
  564. if (!pos)
  565. return 1;
  566. if (info->severity == AER_CORRECTABLE) {
  567. pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS,
  568. &info->status);
  569. pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK,
  570. &info->mask);
  571. if (!(info->status & ~info->mask))
  572. return 0;
  573. } else if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE ||
  574. info->severity == AER_NONFATAL) {
  575. /* Link is still healthy for IO reads */
  576. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS,
  577. &info->status);
  578. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_MASK,
  579. &info->mask);
  580. if (!(info->status & ~info->mask))
  581. return 0;
  582. /* Get First Error Pointer */
  583. pci_read_config_dword(dev, pos + PCI_ERR_CAP, &temp);
  584. info->first_error = PCI_ERR_CAP_FEP(temp);
  585. if (info->status & AER_LOG_TLP_MASKS) {
  586. info->tlp_header_valid = 1;
  587. pci_read_config_dword(dev,
  588. pos + PCI_ERR_HEADER_LOG, &info->tlp.dw0);
  589. pci_read_config_dword(dev,
  590. pos + PCI_ERR_HEADER_LOG + 4, &info->tlp.dw1);
  591. pci_read_config_dword(dev,
  592. pos + PCI_ERR_HEADER_LOG + 8, &info->tlp.dw2);
  593. pci_read_config_dword(dev,
  594. pos + PCI_ERR_HEADER_LOG + 12, &info->tlp.dw3);
  595. }
  596. }
  597. return 1;
  598. }
  599. static inline void aer_process_err_devices(struct pcie_device *p_device,
  600. struct aer_err_info *e_info)
  601. {
  602. int i;
  603. /* Report all before handle them, not to lost records by reset etc. */
  604. for (i = 0; i < e_info->error_dev_num && e_info->dev[i]; i++) {
  605. if (get_device_error_info(e_info->dev[i], e_info))
  606. aer_print_error(e_info->dev[i], e_info);
  607. }
  608. for (i = 0; i < e_info->error_dev_num && e_info->dev[i]; i++) {
  609. if (get_device_error_info(e_info->dev[i], e_info))
  610. handle_error_source(p_device, e_info->dev[i], e_info);
  611. }
  612. }
  613. /**
  614. * aer_isr_one_error - consume an error detected by root port
  615. * @p_device: pointer to error root port service device
  616. * @e_src: pointer to an error source
  617. */
  618. static void aer_isr_one_error(struct pcie_device *p_device,
  619. struct aer_err_source *e_src)
  620. {
  621. struct aer_err_info *e_info;
  622. /* struct aer_err_info might be big, so we allocate it with slab */
  623. e_info = kmalloc(sizeof(struct aer_err_info), GFP_KERNEL);
  624. if (!e_info) {
  625. dev_printk(KERN_DEBUG, &p_device->port->dev,
  626. "Can't allocate mem when processing AER errors\n");
  627. return;
  628. }
  629. /*
  630. * There is a possibility that both correctable error and
  631. * uncorrectable error being logged. Report correctable error first.
  632. */
  633. if (e_src->status & PCI_ERR_ROOT_COR_RCV) {
  634. e_info->id = ERR_COR_ID(e_src->id);
  635. e_info->severity = AER_CORRECTABLE;
  636. if (e_src->status & PCI_ERR_ROOT_MULTI_COR_RCV)
  637. e_info->multi_error_valid = 1;
  638. else
  639. e_info->multi_error_valid = 0;
  640. aer_print_port_info(p_device->port, e_info);
  641. if (find_source_device(p_device->port, e_info))
  642. aer_process_err_devices(p_device, e_info);
  643. }
  644. if (e_src->status & PCI_ERR_ROOT_UNCOR_RCV) {
  645. e_info->id = ERR_UNCOR_ID(e_src->id);
  646. if (e_src->status & PCI_ERR_ROOT_FATAL_RCV)
  647. e_info->severity = AER_FATAL;
  648. else
  649. e_info->severity = AER_NONFATAL;
  650. if (e_src->status & PCI_ERR_ROOT_MULTI_UNCOR_RCV)
  651. e_info->multi_error_valid = 1;
  652. else
  653. e_info->multi_error_valid = 0;
  654. aer_print_port_info(p_device->port, e_info);
  655. if (find_source_device(p_device->port, e_info))
  656. aer_process_err_devices(p_device, e_info);
  657. }
  658. kfree(e_info);
  659. }
  660. /**
  661. * get_e_source - retrieve an error source
  662. * @rpc: pointer to the root port which holds an error
  663. * @e_src: pointer to store retrieved error source
  664. *
  665. * Return 1 if an error source is retrieved, otherwise 0.
  666. *
  667. * Invoked by DPC handler to consume an error.
  668. */
  669. static int get_e_source(struct aer_rpc *rpc, struct aer_err_source *e_src)
  670. {
  671. unsigned long flags;
  672. /* Lock access to Root error producer/consumer index */
  673. spin_lock_irqsave(&rpc->e_lock, flags);
  674. if (rpc->prod_idx == rpc->cons_idx) {
  675. spin_unlock_irqrestore(&rpc->e_lock, flags);
  676. return 0;
  677. }
  678. *e_src = rpc->e_sources[rpc->cons_idx];
  679. rpc->cons_idx++;
  680. if (rpc->cons_idx == AER_ERROR_SOURCES_MAX)
  681. rpc->cons_idx = 0;
  682. spin_unlock_irqrestore(&rpc->e_lock, flags);
  683. return 1;
  684. }
  685. /**
  686. * aer_isr - consume errors detected by root port
  687. * @work: definition of this work item
  688. *
  689. * Invoked, as DPC, when root port records new detected error
  690. */
  691. void aer_isr(struct work_struct *work)
  692. {
  693. struct aer_rpc *rpc = container_of(work, struct aer_rpc, dpc_handler);
  694. struct pcie_device *p_device = rpc->rpd;
  695. struct aer_err_source uninitialized_var(e_src);
  696. mutex_lock(&rpc->rpc_mutex);
  697. while (get_e_source(rpc, &e_src))
  698. aer_isr_one_error(p_device, &e_src);
  699. mutex_unlock(&rpc->rpc_mutex);
  700. wake_up(&rpc->wait_release);
  701. }
  702. /**
  703. * aer_init - provide AER initialization
  704. * @dev: pointer to AER pcie device
  705. *
  706. * Invoked when AER service driver is loaded.
  707. */
  708. int aer_init(struct pcie_device *dev)
  709. {
  710. if (forceload) {
  711. dev_printk(KERN_DEBUG, &dev->device,
  712. "aerdrv forceload requested.\n");
  713. pcie_aer_force_firmware_first(dev->port, 0);
  714. }
  715. return 0;
  716. }