parport_serial.c 19 KB

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  1. /*
  2. * Support for common PCI multi-I/O cards (which is most of them)
  3. *
  4. * Copyright (C) 2001 Tim Waugh <twaugh@redhat.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. *
  11. *
  12. * Multi-function PCI cards are supposed to present separate logical
  13. * devices on the bus. A common thing to do seems to be to just use
  14. * one logical device with lots of base address registers for both
  15. * parallel ports and serial ports. This driver is for dealing with
  16. * that.
  17. *
  18. */
  19. #include <linux/types.h>
  20. #include <linux/module.h>
  21. #include <linux/init.h>
  22. #include <linux/slab.h>
  23. #include <linux/pci.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/parport.h>
  26. #include <linux/parport_pc.h>
  27. #include <linux/8250_pci.h>
  28. enum parport_pc_pci_cards {
  29. titan_110l = 0,
  30. titan_210l,
  31. netmos_9xx5_combo,
  32. netmos_9855,
  33. netmos_9855_2p,
  34. netmos_9900,
  35. netmos_9900_2p,
  36. netmos_99xx_1p,
  37. avlab_1s1p,
  38. avlab_1s2p,
  39. avlab_2s1p,
  40. siig_1s1p_10x,
  41. siig_2s1p_10x,
  42. siig_2p1s_20x,
  43. siig_1s1p_20x,
  44. siig_2s1p_20x,
  45. timedia_4078a,
  46. timedia_4079h,
  47. timedia_4085h,
  48. timedia_4088a,
  49. timedia_4089a,
  50. timedia_4095a,
  51. timedia_4096a,
  52. timedia_4078u,
  53. timedia_4079a,
  54. timedia_4085u,
  55. timedia_4079r,
  56. timedia_4079s,
  57. timedia_4079d,
  58. timedia_4079e,
  59. timedia_4079f,
  60. timedia_9079a,
  61. timedia_9079b,
  62. timedia_9079c,
  63. wch_ch353_2s1p,
  64. };
  65. /* each element directly indexed from enum list, above */
  66. struct parport_pc_pci {
  67. int numports;
  68. struct { /* BAR (base address registers) numbers in the config
  69. space header */
  70. int lo;
  71. int hi; /* -1 if not there, >6 for offset-method (max
  72. BAR is 6) */
  73. } addr[4];
  74. /* If set, this is called immediately after pci_enable_device.
  75. * If it returns non-zero, no probing will take place and the
  76. * ports will not be used. */
  77. int (*preinit_hook) (struct pci_dev *pdev, struct parport_pc_pci *card,
  78. int autoirq, int autodma);
  79. /* If set, this is called after probing for ports. If 'failed'
  80. * is non-zero we couldn't use any of the ports. */
  81. void (*postinit_hook) (struct pci_dev *pdev,
  82. struct parport_pc_pci *card, int failed);
  83. };
  84. static int netmos_parallel_init(struct pci_dev *dev, struct parport_pc_pci *par,
  85. int autoirq, int autodma)
  86. {
  87. /* the rule described below doesn't hold for this device */
  88. if (dev->device == PCI_DEVICE_ID_NETMOS_9835 &&
  89. dev->subsystem_vendor == PCI_VENDOR_ID_IBM &&
  90. dev->subsystem_device == 0x0299)
  91. return -ENODEV;
  92. if (dev->device == PCI_DEVICE_ID_NETMOS_9912) {
  93. par->numports = 1;
  94. } else {
  95. /*
  96. * Netmos uses the subdevice ID to indicate the number of parallel
  97. * and serial ports. The form is 0x00PS, where <P> is the number of
  98. * parallel ports and <S> is the number of serial ports.
  99. */
  100. par->numports = (dev->subsystem_device & 0xf0) >> 4;
  101. if (par->numports > ARRAY_SIZE(par->addr))
  102. par->numports = ARRAY_SIZE(par->addr);
  103. }
  104. return 0;
  105. }
  106. static struct parport_pc_pci cards[] = {
  107. /* titan_110l */ { 1, { { 3, -1 }, } },
  108. /* titan_210l */ { 1, { { 3, -1 }, } },
  109. /* netmos_9xx5_combo */ { 1, { { 2, -1 }, }, netmos_parallel_init },
  110. /* netmos_9855 */ { 1, { { 0, -1 }, }, netmos_parallel_init },
  111. /* netmos_9855_2p */ { 2, { { 0, -1 }, { 2, -1 }, } },
  112. /* netmos_9900 */ {1, { { 3, 4 }, }, netmos_parallel_init },
  113. /* netmos_9900_2p */ {2, { { 0, 1 }, { 3, 4 }, } },
  114. /* netmos_99xx_1p */ {1, { { 0, 1 }, } },
  115. /* avlab_1s1p */ { 1, { { 1, 2}, } },
  116. /* avlab_1s2p */ { 2, { { 1, 2}, { 3, 4 },} },
  117. /* avlab_2s1p */ { 1, { { 2, 3}, } },
  118. /* siig_1s1p_10x */ { 1, { { 3, 4 }, } },
  119. /* siig_2s1p_10x */ { 1, { { 4, 5 }, } },
  120. /* siig_2p1s_20x */ { 2, { { 1, 2 }, { 3, 4 }, } },
  121. /* siig_1s1p_20x */ { 1, { { 1, 2 }, } },
  122. /* siig_2s1p_20x */ { 1, { { 2, 3 }, } },
  123. /* timedia_4078a */ { 1, { { 2, -1 }, } },
  124. /* timedia_4079h */ { 1, { { 2, 3 }, } },
  125. /* timedia_4085h */ { 2, { { 2, -1 }, { 4, -1 }, } },
  126. /* timedia_4088a */ { 2, { { 2, 3 }, { 4, 5 }, } },
  127. /* timedia_4089a */ { 2, { { 2, 3 }, { 4, 5 }, } },
  128. /* timedia_4095a */ { 2, { { 2, 3 }, { 4, 5 }, } },
  129. /* timedia_4096a */ { 2, { { 2, 3 }, { 4, 5 }, } },
  130. /* timedia_4078u */ { 1, { { 2, -1 }, } },
  131. /* timedia_4079a */ { 1, { { 2, 3 }, } },
  132. /* timedia_4085u */ { 2, { { 2, -1 }, { 4, -1 }, } },
  133. /* timedia_4079r */ { 1, { { 2, 3 }, } },
  134. /* timedia_4079s */ { 1, { { 2, 3 }, } },
  135. /* timedia_4079d */ { 1, { { 2, 3 }, } },
  136. /* timedia_4079e */ { 1, { { 2, 3 }, } },
  137. /* timedia_4079f */ { 1, { { 2, 3 }, } },
  138. /* timedia_9079a */ { 1, { { 2, 3 }, } },
  139. /* timedia_9079b */ { 1, { { 2, 3 }, } },
  140. /* timedia_9079c */ { 1, { { 2, 3 }, } },
  141. /* wch_ch353_2s1p*/ { 1, { { 2, -1}, } },
  142. };
  143. static struct pci_device_id parport_serial_pci_tbl[] = {
  144. /* PCI cards */
  145. { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_110L,
  146. PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_110l },
  147. { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_210L,
  148. PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_210l },
  149. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9735,
  150. PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo },
  151. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9745,
  152. PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo },
  153. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9835,
  154. PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo },
  155. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9845,
  156. PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo },
  157. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855,
  158. 0x1000, 0x0020, 0, 0, netmos_9855_2p },
  159. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855,
  160. 0x1000, 0x0022, 0, 0, netmos_9855_2p },
  161. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855,
  162. PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9855 },
  163. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900,
  164. 0xA000, 0x3011, 0, 0, netmos_9900 },
  165. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900,
  166. 0xA000, 0x3012, 0, 0, netmos_9900 },
  167. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900,
  168. 0xA000, 0x3020, 0, 0, netmos_9900_2p },
  169. { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9912,
  170. 0xA000, 0x2000, 0, 0, netmos_99xx_1p },
  171. /* PCI_VENDOR_ID_AVLAB/Intek21 has another bunch of cards ...*/
  172. { PCI_VENDOR_ID_AFAVLAB, 0x2110,
  173. PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p },
  174. { PCI_VENDOR_ID_AFAVLAB, 0x2111,
  175. PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p },
  176. { PCI_VENDOR_ID_AFAVLAB, 0x2112,
  177. PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p },
  178. { PCI_VENDOR_ID_AFAVLAB, 0x2140,
  179. PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p },
  180. { PCI_VENDOR_ID_AFAVLAB, 0x2141,
  181. PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p },
  182. { PCI_VENDOR_ID_AFAVLAB, 0x2142,
  183. PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p },
  184. { PCI_VENDOR_ID_AFAVLAB, 0x2160,
  185. PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p },
  186. { PCI_VENDOR_ID_AFAVLAB, 0x2161,
  187. PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p },
  188. { PCI_VENDOR_ID_AFAVLAB, 0x2162,
  189. PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p },
  190. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_550,
  191. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x },
  192. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_650,
  193. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x },
  194. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_850,
  195. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x },
  196. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_550,
  197. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x },
  198. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_650,
  199. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x },
  200. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_850,
  201. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x },
  202. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_550,
  203. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x },
  204. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_650,
  205. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x },
  206. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_850,
  207. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x },
  208. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_550,
  209. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x },
  210. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_650,
  211. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_20x },
  212. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_850,
  213. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_20x },
  214. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_550,
  215. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x },
  216. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_650,
  217. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x },
  218. { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_850,
  219. PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x },
  220. /* PCI_VENDOR_ID_TIMEDIA/SUNIX has many differing cards ...*/
  221. { 0x1409, 0x7168, 0x1409, 0x4078, 0, 0, timedia_4078a },
  222. { 0x1409, 0x7168, 0x1409, 0x4079, 0, 0, timedia_4079h },
  223. { 0x1409, 0x7168, 0x1409, 0x4085, 0, 0, timedia_4085h },
  224. { 0x1409, 0x7168, 0x1409, 0x4088, 0, 0, timedia_4088a },
  225. { 0x1409, 0x7168, 0x1409, 0x4089, 0, 0, timedia_4089a },
  226. { 0x1409, 0x7168, 0x1409, 0x4095, 0, 0, timedia_4095a },
  227. { 0x1409, 0x7168, 0x1409, 0x4096, 0, 0, timedia_4096a },
  228. { 0x1409, 0x7168, 0x1409, 0x5078, 0, 0, timedia_4078u },
  229. { 0x1409, 0x7168, 0x1409, 0x5079, 0, 0, timedia_4079a },
  230. { 0x1409, 0x7168, 0x1409, 0x5085, 0, 0, timedia_4085u },
  231. { 0x1409, 0x7168, 0x1409, 0x6079, 0, 0, timedia_4079r },
  232. { 0x1409, 0x7168, 0x1409, 0x7079, 0, 0, timedia_4079s },
  233. { 0x1409, 0x7168, 0x1409, 0x8079, 0, 0, timedia_4079d },
  234. { 0x1409, 0x7168, 0x1409, 0x9079, 0, 0, timedia_4079e },
  235. { 0x1409, 0x7168, 0x1409, 0xa079, 0, 0, timedia_4079f },
  236. { 0x1409, 0x7168, 0x1409, 0xb079, 0, 0, timedia_9079a },
  237. { 0x1409, 0x7168, 0x1409, 0xc079, 0, 0, timedia_9079b },
  238. { 0x1409, 0x7168, 0x1409, 0xd079, 0, 0, timedia_9079c },
  239. /* WCH CARDS */
  240. { 0x4348, 0x7053, 0x4348, 0x3253, 0, 0, wch_ch353_2s1p},
  241. { 0, } /* terminate list */
  242. };
  243. MODULE_DEVICE_TABLE(pci,parport_serial_pci_tbl);
  244. /*
  245. * This table describes the serial "geometry" of these boards. Any
  246. * quirks for these can be found in drivers/serial/8250_pci.c
  247. *
  248. * Cards not tested are marked n/t
  249. * If you have one of these cards and it works for you, please tell me..
  250. */
  251. static struct pciserial_board pci_parport_serial_boards[] = {
  252. [titan_110l] = {
  253. .flags = FL_BASE1 | FL_BASE_BARS,
  254. .num_ports = 1,
  255. .base_baud = 921600,
  256. .uart_offset = 8,
  257. },
  258. [titan_210l] = {
  259. .flags = FL_BASE1 | FL_BASE_BARS,
  260. .num_ports = 2,
  261. .base_baud = 921600,
  262. .uart_offset = 8,
  263. },
  264. [netmos_9xx5_combo] = {
  265. .flags = FL_BASE0 | FL_BASE_BARS,
  266. .num_ports = 1,
  267. .base_baud = 115200,
  268. .uart_offset = 8,
  269. },
  270. [netmos_9855] = {
  271. .flags = FL_BASE2 | FL_BASE_BARS,
  272. .num_ports = 1,
  273. .base_baud = 115200,
  274. .uart_offset = 8,
  275. },
  276. [netmos_9855_2p] = {
  277. .flags = FL_BASE4 | FL_BASE_BARS,
  278. .num_ports = 1,
  279. .base_baud = 115200,
  280. .uart_offset = 8,
  281. },
  282. [netmos_9900] = { /* n/t */
  283. .flags = FL_BASE0 | FL_BASE_BARS,
  284. .num_ports = 1,
  285. .base_baud = 115200,
  286. .uart_offset = 8,
  287. },
  288. [netmos_9900_2p] = { /* parallel only */ /* n/t */
  289. .flags = FL_BASE0,
  290. .num_ports = 0,
  291. .base_baud = 115200,
  292. .uart_offset = 8,
  293. },
  294. [netmos_99xx_1p] = { /* parallel only */ /* n/t */
  295. .flags = FL_BASE0,
  296. .num_ports = 0,
  297. .base_baud = 115200,
  298. .uart_offset = 8,
  299. },
  300. [avlab_1s1p] = { /* n/t */
  301. .flags = FL_BASE0 | FL_BASE_BARS,
  302. .num_ports = 1,
  303. .base_baud = 115200,
  304. .uart_offset = 8,
  305. },
  306. [avlab_1s2p] = { /* n/t */
  307. .flags = FL_BASE0 | FL_BASE_BARS,
  308. .num_ports = 1,
  309. .base_baud = 115200,
  310. .uart_offset = 8,
  311. },
  312. [avlab_2s1p] = { /* n/t */
  313. .flags = FL_BASE0 | FL_BASE_BARS,
  314. .num_ports = 2,
  315. .base_baud = 115200,
  316. .uart_offset = 8,
  317. },
  318. [siig_1s1p_10x] = {
  319. .flags = FL_BASE2,
  320. .num_ports = 1,
  321. .base_baud = 460800,
  322. .uart_offset = 8,
  323. },
  324. [siig_2s1p_10x] = {
  325. .flags = FL_BASE2,
  326. .num_ports = 1,
  327. .base_baud = 921600,
  328. .uart_offset = 8,
  329. },
  330. [siig_2p1s_20x] = {
  331. .flags = FL_BASE0,
  332. .num_ports = 1,
  333. .base_baud = 921600,
  334. .uart_offset = 8,
  335. },
  336. [siig_1s1p_20x] = {
  337. .flags = FL_BASE0,
  338. .num_ports = 1,
  339. .base_baud = 921600,
  340. .uart_offset = 8,
  341. },
  342. [siig_2s1p_20x] = {
  343. .flags = FL_BASE0,
  344. .num_ports = 1,
  345. .base_baud = 921600,
  346. .uart_offset = 8,
  347. },
  348. [timedia_4078a] = {
  349. .flags = FL_BASE0|FL_BASE_BARS,
  350. .num_ports = 1,
  351. .base_baud = 921600,
  352. .uart_offset = 8,
  353. },
  354. [timedia_4079h] = {
  355. .flags = FL_BASE0|FL_BASE_BARS,
  356. .num_ports = 1,
  357. .base_baud = 921600,
  358. .uart_offset = 8,
  359. },
  360. [timedia_4085h] = {
  361. .flags = FL_BASE0|FL_BASE_BARS,
  362. .num_ports = 1,
  363. .base_baud = 921600,
  364. .uart_offset = 8,
  365. },
  366. [timedia_4088a] = {
  367. .flags = FL_BASE0|FL_BASE_BARS,
  368. .num_ports = 1,
  369. .base_baud = 921600,
  370. .uart_offset = 8,
  371. },
  372. [timedia_4089a] = {
  373. .flags = FL_BASE0|FL_BASE_BARS,
  374. .num_ports = 1,
  375. .base_baud = 921600,
  376. .uart_offset = 8,
  377. },
  378. [timedia_4095a] = {
  379. .flags = FL_BASE0|FL_BASE_BARS,
  380. .num_ports = 1,
  381. .base_baud = 921600,
  382. .uart_offset = 8,
  383. },
  384. [timedia_4096a] = {
  385. .flags = FL_BASE0|FL_BASE_BARS,
  386. .num_ports = 1,
  387. .base_baud = 921600,
  388. .uart_offset = 8,
  389. },
  390. [timedia_4078u] = {
  391. .flags = FL_BASE0|FL_BASE_BARS,
  392. .num_ports = 1,
  393. .base_baud = 921600,
  394. .uart_offset = 8,
  395. },
  396. [timedia_4079a] = {
  397. .flags = FL_BASE0|FL_BASE_BARS,
  398. .num_ports = 1,
  399. .base_baud = 921600,
  400. .uart_offset = 8,
  401. },
  402. [timedia_4085u] = {
  403. .flags = FL_BASE0|FL_BASE_BARS,
  404. .num_ports = 1,
  405. .base_baud = 921600,
  406. .uart_offset = 8,
  407. },
  408. [timedia_4079r] = {
  409. .flags = FL_BASE0|FL_BASE_BARS,
  410. .num_ports = 1,
  411. .base_baud = 921600,
  412. .uart_offset = 8,
  413. },
  414. [timedia_4079s] = {
  415. .flags = FL_BASE0|FL_BASE_BARS,
  416. .num_ports = 1,
  417. .base_baud = 921600,
  418. .uart_offset = 8,
  419. },
  420. [timedia_4079d] = {
  421. .flags = FL_BASE0|FL_BASE_BARS,
  422. .num_ports = 1,
  423. .base_baud = 921600,
  424. .uart_offset = 8,
  425. },
  426. [timedia_4079e] = {
  427. .flags = FL_BASE0|FL_BASE_BARS,
  428. .num_ports = 1,
  429. .base_baud = 921600,
  430. .uart_offset = 8,
  431. },
  432. [timedia_4079f] = {
  433. .flags = FL_BASE0|FL_BASE_BARS,
  434. .num_ports = 1,
  435. .base_baud = 921600,
  436. .uart_offset = 8,
  437. },
  438. [timedia_9079a] = {
  439. .flags = FL_BASE0|FL_BASE_BARS,
  440. .num_ports = 1,
  441. .base_baud = 921600,
  442. .uart_offset = 8,
  443. },
  444. [timedia_9079b] = {
  445. .flags = FL_BASE0|FL_BASE_BARS,
  446. .num_ports = 1,
  447. .base_baud = 921600,
  448. .uart_offset = 8,
  449. },
  450. [timedia_9079c] = {
  451. .flags = FL_BASE0|FL_BASE_BARS,
  452. .num_ports = 1,
  453. .base_baud = 921600,
  454. .uart_offset = 8,
  455. },
  456. [wch_ch353_2s1p] = {
  457. .flags = FL_BASE0|FL_BASE_BARS,
  458. .num_ports = 2,
  459. .base_baud = 115200,
  460. .uart_offset = 8,
  461. },
  462. };
  463. struct parport_serial_private {
  464. struct serial_private *serial;
  465. int num_par;
  466. struct parport *port[PARPORT_MAX];
  467. struct parport_pc_pci par;
  468. };
  469. /* Register the serial port(s) of a PCI card. */
  470. static int serial_register(struct pci_dev *dev, const struct pci_device_id *id)
  471. {
  472. struct parport_serial_private *priv = pci_get_drvdata (dev);
  473. struct pciserial_board *board;
  474. struct serial_private *serial;
  475. board = &pci_parport_serial_boards[id->driver_data];
  476. if (board->num_ports == 0)
  477. return 0;
  478. serial = pciserial_init_ports(dev, board);
  479. if (IS_ERR(serial))
  480. return PTR_ERR(serial);
  481. priv->serial = serial;
  482. return 0;
  483. }
  484. /* Register the parallel port(s) of a PCI card. */
  485. static int parport_register(struct pci_dev *dev, const struct pci_device_id *id)
  486. {
  487. struct parport_pc_pci *card;
  488. struct parport_serial_private *priv = pci_get_drvdata (dev);
  489. int n, success = 0;
  490. priv->par = cards[id->driver_data];
  491. card = &priv->par;
  492. if (card->preinit_hook &&
  493. card->preinit_hook (dev, card, PARPORT_IRQ_NONE, PARPORT_DMA_NONE))
  494. return -ENODEV;
  495. for (n = 0; n < card->numports; n++) {
  496. struct parport *port;
  497. int lo = card->addr[n].lo;
  498. int hi = card->addr[n].hi;
  499. unsigned long io_lo, io_hi;
  500. int irq;
  501. if (priv->num_par == ARRAY_SIZE (priv->port)) {
  502. printk (KERN_WARNING
  503. "parport_serial: %s: only %zu parallel ports "
  504. "supported (%d reported)\n", pci_name (dev),
  505. ARRAY_SIZE(priv->port), card->numports);
  506. break;
  507. }
  508. io_lo = pci_resource_start (dev, lo);
  509. io_hi = 0;
  510. if ((hi >= 0) && (hi <= 6))
  511. io_hi = pci_resource_start (dev, hi);
  512. else if (hi > 6)
  513. io_lo += hi; /* Reinterpret the meaning of
  514. "hi" as an offset (see SYBA
  515. def.) */
  516. /* TODO: test if sharing interrupts works */
  517. irq = dev->irq;
  518. if (irq == IRQ_NONE) {
  519. dev_dbg(&dev->dev,
  520. "PCI parallel port detected: I/O at %#lx(%#lx)\n",
  521. io_lo, io_hi);
  522. irq = PARPORT_IRQ_NONE;
  523. } else {
  524. dev_dbg(&dev->dev,
  525. "PCI parallel port detected: I/O at %#lx(%#lx), IRQ %d\n",
  526. io_lo, io_hi, irq);
  527. }
  528. port = parport_pc_probe_port (io_lo, io_hi, irq,
  529. PARPORT_DMA_NONE, &dev->dev, IRQF_SHARED);
  530. if (port) {
  531. priv->port[priv->num_par++] = port;
  532. success = 1;
  533. }
  534. }
  535. if (card->postinit_hook)
  536. card->postinit_hook (dev, card, !success);
  537. return 0;
  538. }
  539. static int parport_serial_pci_probe(struct pci_dev *dev,
  540. const struct pci_device_id *id)
  541. {
  542. struct parport_serial_private *priv;
  543. int err;
  544. priv = kzalloc (sizeof *priv, GFP_KERNEL);
  545. if (!priv)
  546. return -ENOMEM;
  547. pci_set_drvdata (dev, priv);
  548. err = pci_enable_device (dev);
  549. if (err) {
  550. pci_set_drvdata (dev, NULL);
  551. kfree (priv);
  552. return err;
  553. }
  554. if (parport_register (dev, id)) {
  555. pci_set_drvdata (dev, NULL);
  556. kfree (priv);
  557. return -ENODEV;
  558. }
  559. if (serial_register (dev, id)) {
  560. int i;
  561. for (i = 0; i < priv->num_par; i++)
  562. parport_pc_unregister_port (priv->port[i]);
  563. pci_set_drvdata (dev, NULL);
  564. kfree (priv);
  565. return -ENODEV;
  566. }
  567. return 0;
  568. }
  569. static void parport_serial_pci_remove(struct pci_dev *dev)
  570. {
  571. struct parport_serial_private *priv = pci_get_drvdata (dev);
  572. int i;
  573. pci_set_drvdata(dev, NULL);
  574. // Serial ports
  575. if (priv->serial)
  576. pciserial_remove_ports(priv->serial);
  577. // Parallel ports
  578. for (i = 0; i < priv->num_par; i++)
  579. parport_pc_unregister_port (priv->port[i]);
  580. kfree (priv);
  581. return;
  582. }
  583. #ifdef CONFIG_PM
  584. static int parport_serial_pci_suspend(struct pci_dev *dev, pm_message_t state)
  585. {
  586. struct parport_serial_private *priv = pci_get_drvdata(dev);
  587. if (priv->serial)
  588. pciserial_suspend_ports(priv->serial);
  589. /* FIXME: What about parport? */
  590. pci_save_state(dev);
  591. pci_set_power_state(dev, pci_choose_state(dev, state));
  592. return 0;
  593. }
  594. static int parport_serial_pci_resume(struct pci_dev *dev)
  595. {
  596. struct parport_serial_private *priv = pci_get_drvdata(dev);
  597. int err;
  598. pci_set_power_state(dev, PCI_D0);
  599. pci_restore_state(dev);
  600. /*
  601. * The device may have been disabled. Re-enable it.
  602. */
  603. err = pci_enable_device(dev);
  604. if (err) {
  605. printk(KERN_ERR "parport_serial: %s: error enabling "
  606. "device for resume (%d)\n", pci_name(dev), err);
  607. return err;
  608. }
  609. if (priv->serial)
  610. pciserial_resume_ports(priv->serial);
  611. /* FIXME: What about parport? */
  612. return 0;
  613. }
  614. #endif
  615. static struct pci_driver parport_serial_pci_driver = {
  616. .name = "parport_serial",
  617. .id_table = parport_serial_pci_tbl,
  618. .probe = parport_serial_pci_probe,
  619. .remove = parport_serial_pci_remove,
  620. #ifdef CONFIG_PM
  621. .suspend = parport_serial_pci_suspend,
  622. .resume = parport_serial_pci_resume,
  623. #endif
  624. };
  625. static int __init parport_serial_init (void)
  626. {
  627. return pci_register_driver (&parport_serial_pci_driver);
  628. }
  629. static void __exit parport_serial_exit (void)
  630. {
  631. pci_unregister_driver (&parport_serial_pci_driver);
  632. return;
  633. }
  634. MODULE_AUTHOR("Tim Waugh <twaugh@redhat.com>");
  635. MODULE_DESCRIPTION("Driver for common parallel+serial multi-I/O PCI cards");
  636. MODULE_LICENSE("GPL");
  637. module_init(parport_serial_init);
  638. module_exit(parport_serial_exit);