11n.c 22 KB

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  1. /*
  2. * Marvell Wireless LAN device driver: 802.11n
  3. *
  4. * Copyright (C) 2011, Marvell International Ltd.
  5. *
  6. * This software file (the "File") is distributed by Marvell International
  7. * Ltd. under the terms of the GNU General Public License Version 2, June 1991
  8. * (the "License"). You may use, redistribute and/or modify this File in
  9. * accordance with the terms and conditions of the License, a copy of which
  10. * is available by writing to the Free Software Foundation, Inc.,
  11. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
  12. * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
  13. *
  14. * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
  15. * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
  16. * ARE EXPRESSLY DISCLAIMED. The License provides additional details about
  17. * this warranty disclaimer.
  18. */
  19. #include "decl.h"
  20. #include "ioctl.h"
  21. #include "util.h"
  22. #include "fw.h"
  23. #include "main.h"
  24. #include "wmm.h"
  25. #include "11n.h"
  26. /*
  27. * Fills HT capability information field, AMPDU Parameters field, HT extended
  28. * capability field, and supported MCS set fields.
  29. *
  30. * HT capability information field, AMPDU Parameters field, supported MCS set
  31. * fields are retrieved from cfg80211 stack
  32. *
  33. * RD responder bit to set to clear in the extended capability header.
  34. */
  35. void
  36. mwifiex_fill_cap_info(struct mwifiex_private *priv, u8 radio_type,
  37. struct mwifiex_ie_types_htcap *ht_cap)
  38. {
  39. uint16_t ht_ext_cap = le16_to_cpu(ht_cap->ht_cap.extended_ht_cap_info);
  40. struct ieee80211_supported_band *sband =
  41. priv->wdev->wiphy->bands[radio_type];
  42. ht_cap->ht_cap.ampdu_params_info =
  43. (sband->ht_cap.ampdu_factor &
  44. IEEE80211_HT_AMPDU_PARM_FACTOR) |
  45. ((sband->ht_cap.ampdu_density <<
  46. IEEE80211_HT_AMPDU_PARM_DENSITY_SHIFT) &
  47. IEEE80211_HT_AMPDU_PARM_DENSITY);
  48. memcpy((u8 *) &ht_cap->ht_cap.mcs, &sband->ht_cap.mcs,
  49. sizeof(sband->ht_cap.mcs));
  50. if (priv->bss_mode == NL80211_IFTYPE_STATION ||
  51. sband->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40)
  52. /* Set MCS32 for infra mode or ad-hoc mode with 40MHz support */
  53. SETHT_MCS32(ht_cap->ht_cap.mcs.rx_mask);
  54. /* Clear RD responder bit */
  55. ht_ext_cap &= ~IEEE80211_HT_EXT_CAP_RD_RESPONDER;
  56. ht_cap->ht_cap.cap_info = cpu_to_le16(sband->ht_cap.cap);
  57. ht_cap->ht_cap.extended_ht_cap_info = cpu_to_le16(ht_ext_cap);
  58. }
  59. /*
  60. * This function returns the pointer to an entry in BA Stream
  61. * table which matches the requested BA status.
  62. */
  63. static struct mwifiex_tx_ba_stream_tbl *
  64. mwifiex_get_ba_status(struct mwifiex_private *priv,
  65. enum mwifiex_ba_status ba_status)
  66. {
  67. struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
  68. unsigned long flags;
  69. spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
  70. list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
  71. if (tx_ba_tsr_tbl->ba_status == ba_status) {
  72. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock,
  73. flags);
  74. return tx_ba_tsr_tbl;
  75. }
  76. }
  77. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
  78. return NULL;
  79. }
  80. /*
  81. * This function handles the command response of delete a block
  82. * ack request.
  83. *
  84. * The function checks the response success status and takes action
  85. * accordingly (send an add BA request in case of success, or recreate
  86. * the deleted stream in case of failure, if the add BA was also
  87. * initiated by us).
  88. */
  89. int mwifiex_ret_11n_delba(struct mwifiex_private *priv,
  90. struct host_cmd_ds_command *resp)
  91. {
  92. int tid;
  93. struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl;
  94. struct host_cmd_ds_11n_delba *del_ba = &resp->params.del_ba;
  95. uint16_t del_ba_param_set = le16_to_cpu(del_ba->del_ba_param_set);
  96. tid = del_ba_param_set >> DELBA_TID_POS;
  97. if (del_ba->del_result == BA_RESULT_SUCCESS) {
  98. mwifiex_del_ba_tbl(priv, tid, del_ba->peer_mac_addr,
  99. TYPE_DELBA_SENT,
  100. INITIATOR_BIT(del_ba_param_set));
  101. tx_ba_tbl = mwifiex_get_ba_status(priv, BA_SETUP_INPROGRESS);
  102. if (tx_ba_tbl)
  103. mwifiex_send_addba(priv, tx_ba_tbl->tid,
  104. tx_ba_tbl->ra);
  105. } else { /*
  106. * In case of failure, recreate the deleted stream in case
  107. * we initiated the ADDBA
  108. */
  109. if (!INITIATOR_BIT(del_ba_param_set))
  110. return 0;
  111. mwifiex_create_ba_tbl(priv, del_ba->peer_mac_addr, tid,
  112. BA_SETUP_INPROGRESS);
  113. tx_ba_tbl = mwifiex_get_ba_status(priv, BA_SETUP_INPROGRESS);
  114. if (tx_ba_tbl)
  115. mwifiex_del_ba_tbl(priv, tx_ba_tbl->tid, tx_ba_tbl->ra,
  116. TYPE_DELBA_SENT, true);
  117. }
  118. return 0;
  119. }
  120. /*
  121. * This function handles the command response of add a block
  122. * ack request.
  123. *
  124. * Handling includes changing the header fields to CPU formats, checking
  125. * the response success status and taking actions accordingly (delete the
  126. * BA stream table in case of failure).
  127. */
  128. int mwifiex_ret_11n_addba_req(struct mwifiex_private *priv,
  129. struct host_cmd_ds_command *resp)
  130. {
  131. int tid;
  132. struct host_cmd_ds_11n_addba_rsp *add_ba_rsp = &resp->params.add_ba_rsp;
  133. struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl;
  134. add_ba_rsp->ssn = cpu_to_le16((le16_to_cpu(add_ba_rsp->ssn))
  135. & SSN_MASK);
  136. tid = (le16_to_cpu(add_ba_rsp->block_ack_param_set)
  137. & IEEE80211_ADDBA_PARAM_TID_MASK)
  138. >> BLOCKACKPARAM_TID_POS;
  139. if (le16_to_cpu(add_ba_rsp->status_code) == BA_RESULT_SUCCESS) {
  140. tx_ba_tbl = mwifiex_get_ba_tbl(priv, tid,
  141. add_ba_rsp->peer_mac_addr);
  142. if (tx_ba_tbl) {
  143. dev_dbg(priv->adapter->dev, "info: BA stream complete\n");
  144. tx_ba_tbl->ba_status = BA_SETUP_COMPLETE;
  145. } else {
  146. dev_err(priv->adapter->dev, "BA stream not created\n");
  147. }
  148. } else {
  149. mwifiex_del_ba_tbl(priv, tid, add_ba_rsp->peer_mac_addr,
  150. TYPE_DELBA_SENT, true);
  151. if (add_ba_rsp->add_rsp_result != BA_RESULT_TIMEOUT)
  152. priv->aggr_prio_tbl[tid].ampdu_ap =
  153. BA_STREAM_NOT_ALLOWED;
  154. }
  155. return 0;
  156. }
  157. /*
  158. * This function prepares command of reconfigure Tx buffer.
  159. *
  160. * Preparation includes -
  161. * - Setting command ID, action and proper size
  162. * - Setting Tx buffer size (for SET only)
  163. * - Ensuring correct endian-ness
  164. */
  165. int mwifiex_cmd_recfg_tx_buf(struct mwifiex_private *priv,
  166. struct host_cmd_ds_command *cmd, int cmd_action,
  167. u16 *buf_size)
  168. {
  169. struct host_cmd_ds_txbuf_cfg *tx_buf = &cmd->params.tx_buf;
  170. u16 action = (u16) cmd_action;
  171. cmd->command = cpu_to_le16(HostCmd_CMD_RECONFIGURE_TX_BUFF);
  172. cmd->size =
  173. cpu_to_le16(sizeof(struct host_cmd_ds_txbuf_cfg) + S_DS_GEN);
  174. tx_buf->action = cpu_to_le16(action);
  175. switch (action) {
  176. case HostCmd_ACT_GEN_SET:
  177. dev_dbg(priv->adapter->dev, "cmd: set tx_buf=%d\n", *buf_size);
  178. tx_buf->buff_size = cpu_to_le16(*buf_size);
  179. break;
  180. case HostCmd_ACT_GEN_GET:
  181. default:
  182. tx_buf->buff_size = 0;
  183. break;
  184. }
  185. return 0;
  186. }
  187. /*
  188. * This function prepares command of AMSDU aggregation control.
  189. *
  190. * Preparation includes -
  191. * - Setting command ID, action and proper size
  192. * - Setting AMSDU control parameters (for SET only)
  193. * - Ensuring correct endian-ness
  194. */
  195. int mwifiex_cmd_amsdu_aggr_ctrl(struct host_cmd_ds_command *cmd,
  196. int cmd_action,
  197. struct mwifiex_ds_11n_amsdu_aggr_ctrl *aa_ctrl)
  198. {
  199. struct host_cmd_ds_amsdu_aggr_ctrl *amsdu_ctrl =
  200. &cmd->params.amsdu_aggr_ctrl;
  201. u16 action = (u16) cmd_action;
  202. cmd->command = cpu_to_le16(HostCmd_CMD_AMSDU_AGGR_CTRL);
  203. cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_amsdu_aggr_ctrl)
  204. + S_DS_GEN);
  205. amsdu_ctrl->action = cpu_to_le16(action);
  206. switch (action) {
  207. case HostCmd_ACT_GEN_SET:
  208. amsdu_ctrl->enable = cpu_to_le16(aa_ctrl->enable);
  209. amsdu_ctrl->curr_buf_size = 0;
  210. break;
  211. case HostCmd_ACT_GEN_GET:
  212. default:
  213. amsdu_ctrl->curr_buf_size = 0;
  214. break;
  215. }
  216. return 0;
  217. }
  218. /*
  219. * This function prepares 11n configuration command.
  220. *
  221. * Preparation includes -
  222. * - Setting command ID, action and proper size
  223. * - Setting HT Tx capability and HT Tx information fields
  224. * - Ensuring correct endian-ness
  225. */
  226. int mwifiex_cmd_11n_cfg(struct host_cmd_ds_command *cmd, u16 cmd_action,
  227. struct mwifiex_ds_11n_tx_cfg *txcfg)
  228. {
  229. struct host_cmd_ds_11n_cfg *htcfg = &cmd->params.htcfg;
  230. cmd->command = cpu_to_le16(HostCmd_CMD_11N_CFG);
  231. cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_11n_cfg) + S_DS_GEN);
  232. htcfg->action = cpu_to_le16(cmd_action);
  233. htcfg->ht_tx_cap = cpu_to_le16(txcfg->tx_htcap);
  234. htcfg->ht_tx_info = cpu_to_le16(txcfg->tx_htinfo);
  235. return 0;
  236. }
  237. /*
  238. * This function appends an 11n TLV to a buffer.
  239. *
  240. * Buffer allocation is responsibility of the calling
  241. * function. No size validation is made here.
  242. *
  243. * The function fills up the following sections, if applicable -
  244. * - HT capability IE
  245. * - HT information IE (with channel list)
  246. * - 20/40 BSS Coexistence IE
  247. * - HT Extended Capabilities IE
  248. */
  249. int
  250. mwifiex_cmd_append_11n_tlv(struct mwifiex_private *priv,
  251. struct mwifiex_bssdescriptor *bss_desc,
  252. u8 **buffer)
  253. {
  254. struct mwifiex_ie_types_htcap *ht_cap;
  255. struct mwifiex_ie_types_htinfo *ht_info;
  256. struct mwifiex_ie_types_chan_list_param_set *chan_list;
  257. struct mwifiex_ie_types_2040bssco *bss_co_2040;
  258. struct mwifiex_ie_types_extcap *ext_cap;
  259. int ret_len = 0;
  260. struct ieee80211_supported_band *sband;
  261. u8 radio_type;
  262. if (!buffer || !*buffer)
  263. return ret_len;
  264. radio_type = mwifiex_band_to_radio_type((u8) bss_desc->bss_band);
  265. sband = priv->wdev->wiphy->bands[radio_type];
  266. if (bss_desc->bcn_ht_cap) {
  267. ht_cap = (struct mwifiex_ie_types_htcap *) *buffer;
  268. memset(ht_cap, 0, sizeof(struct mwifiex_ie_types_htcap));
  269. ht_cap->header.type = cpu_to_le16(WLAN_EID_HT_CAPABILITY);
  270. ht_cap->header.len =
  271. cpu_to_le16(sizeof(struct ieee80211_ht_cap));
  272. memcpy((u8 *) ht_cap + sizeof(struct mwifiex_ie_types_header),
  273. (u8 *) bss_desc->bcn_ht_cap +
  274. sizeof(struct ieee_types_header),
  275. le16_to_cpu(ht_cap->header.len));
  276. mwifiex_fill_cap_info(priv, radio_type, ht_cap);
  277. *buffer += sizeof(struct mwifiex_ie_types_htcap);
  278. ret_len += sizeof(struct mwifiex_ie_types_htcap);
  279. }
  280. if (bss_desc->bcn_ht_oper) {
  281. if (priv->bss_mode == NL80211_IFTYPE_ADHOC) {
  282. ht_info = (struct mwifiex_ie_types_htinfo *) *buffer;
  283. memset(ht_info, 0,
  284. sizeof(struct mwifiex_ie_types_htinfo));
  285. ht_info->header.type =
  286. cpu_to_le16(WLAN_EID_HT_OPERATION);
  287. ht_info->header.len =
  288. cpu_to_le16(
  289. sizeof(struct ieee80211_ht_operation));
  290. memcpy((u8 *) ht_info +
  291. sizeof(struct mwifiex_ie_types_header),
  292. (u8 *) bss_desc->bcn_ht_oper +
  293. sizeof(struct ieee_types_header),
  294. le16_to_cpu(ht_info->header.len));
  295. if (!(sband->ht_cap.cap &
  296. IEEE80211_HT_CAP_SUP_WIDTH_20_40))
  297. ht_info->ht_oper.ht_param &=
  298. ~(IEEE80211_HT_PARAM_CHAN_WIDTH_ANY |
  299. IEEE80211_HT_PARAM_CHA_SEC_OFFSET);
  300. *buffer += sizeof(struct mwifiex_ie_types_htinfo);
  301. ret_len += sizeof(struct mwifiex_ie_types_htinfo);
  302. }
  303. chan_list =
  304. (struct mwifiex_ie_types_chan_list_param_set *) *buffer;
  305. memset(chan_list, 0,
  306. sizeof(struct mwifiex_ie_types_chan_list_param_set));
  307. chan_list->header.type = cpu_to_le16(TLV_TYPE_CHANLIST);
  308. chan_list->header.len = cpu_to_le16(
  309. sizeof(struct mwifiex_ie_types_chan_list_param_set) -
  310. sizeof(struct mwifiex_ie_types_header));
  311. chan_list->chan_scan_param[0].chan_number =
  312. bss_desc->bcn_ht_oper->primary_chan;
  313. chan_list->chan_scan_param[0].radio_type =
  314. mwifiex_band_to_radio_type((u8) bss_desc->bss_band);
  315. if (sband->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40 &&
  316. bss_desc->bcn_ht_oper->ht_param &
  317. IEEE80211_HT_PARAM_CHAN_WIDTH_ANY)
  318. SET_SECONDARYCHAN(chan_list->chan_scan_param[0].
  319. radio_type,
  320. (bss_desc->bcn_ht_oper->ht_param &
  321. IEEE80211_HT_PARAM_CHA_SEC_OFFSET));
  322. *buffer += sizeof(struct mwifiex_ie_types_chan_list_param_set);
  323. ret_len += sizeof(struct mwifiex_ie_types_chan_list_param_set);
  324. }
  325. if (bss_desc->bcn_bss_co_2040) {
  326. bss_co_2040 = (struct mwifiex_ie_types_2040bssco *) *buffer;
  327. memset(bss_co_2040, 0,
  328. sizeof(struct mwifiex_ie_types_2040bssco));
  329. bss_co_2040->header.type = cpu_to_le16(WLAN_EID_BSS_COEX_2040);
  330. bss_co_2040->header.len =
  331. cpu_to_le16(sizeof(bss_co_2040->bss_co_2040));
  332. memcpy((u8 *) bss_co_2040 +
  333. sizeof(struct mwifiex_ie_types_header),
  334. bss_desc->bcn_bss_co_2040 +
  335. sizeof(struct ieee_types_header),
  336. le16_to_cpu(bss_co_2040->header.len));
  337. *buffer += sizeof(struct mwifiex_ie_types_2040bssco);
  338. ret_len += sizeof(struct mwifiex_ie_types_2040bssco);
  339. }
  340. if (bss_desc->bcn_ext_cap) {
  341. ext_cap = (struct mwifiex_ie_types_extcap *) *buffer;
  342. memset(ext_cap, 0, sizeof(struct mwifiex_ie_types_extcap));
  343. ext_cap->header.type = cpu_to_le16(WLAN_EID_EXT_CAPABILITY);
  344. ext_cap->header.len = cpu_to_le16(sizeof(ext_cap->ext_cap));
  345. memcpy((u8 *)ext_cap + sizeof(struct mwifiex_ie_types_header),
  346. bss_desc->bcn_ext_cap + sizeof(struct ieee_types_header),
  347. le16_to_cpu(ext_cap->header.len));
  348. *buffer += sizeof(struct mwifiex_ie_types_extcap);
  349. ret_len += sizeof(struct mwifiex_ie_types_extcap);
  350. }
  351. return ret_len;
  352. }
  353. /*
  354. * This function reconfigures the Tx buffer size in firmware.
  355. *
  356. * This function prepares a firmware command and issues it, if
  357. * the current Tx buffer size is different from the one requested.
  358. * Maximum configurable Tx buffer size is limited by the HT capability
  359. * field value.
  360. */
  361. void
  362. mwifiex_cfg_tx_buf(struct mwifiex_private *priv,
  363. struct mwifiex_bssdescriptor *bss_desc)
  364. {
  365. u16 max_amsdu = MWIFIEX_TX_DATA_BUF_SIZE_2K;
  366. u16 tx_buf, curr_tx_buf_size = 0;
  367. if (bss_desc->bcn_ht_cap) {
  368. if (le16_to_cpu(bss_desc->bcn_ht_cap->cap_info) &
  369. IEEE80211_HT_CAP_MAX_AMSDU)
  370. max_amsdu = MWIFIEX_TX_DATA_BUF_SIZE_8K;
  371. else
  372. max_amsdu = MWIFIEX_TX_DATA_BUF_SIZE_4K;
  373. }
  374. tx_buf = min(priv->adapter->max_tx_buf_size, max_amsdu);
  375. dev_dbg(priv->adapter->dev, "info: max_amsdu=%d, max_tx_buf=%d\n",
  376. max_amsdu, priv->adapter->max_tx_buf_size);
  377. if (priv->adapter->curr_tx_buf_size <= MWIFIEX_TX_DATA_BUF_SIZE_2K)
  378. curr_tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K;
  379. else if (priv->adapter->curr_tx_buf_size <= MWIFIEX_TX_DATA_BUF_SIZE_4K)
  380. curr_tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K;
  381. else if (priv->adapter->curr_tx_buf_size <= MWIFIEX_TX_DATA_BUF_SIZE_8K)
  382. curr_tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_8K;
  383. if (curr_tx_buf_size != tx_buf)
  384. mwifiex_send_cmd_async(priv, HostCmd_CMD_RECONFIGURE_TX_BUFF,
  385. HostCmd_ACT_GEN_SET, 0, &tx_buf);
  386. }
  387. /*
  388. * This function checks if the given pointer is valid entry of
  389. * Tx BA Stream table.
  390. */
  391. static int mwifiex_is_tx_ba_stream_ptr_valid(struct mwifiex_private *priv,
  392. struct mwifiex_tx_ba_stream_tbl *tx_tbl_ptr)
  393. {
  394. struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
  395. list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
  396. if (tx_ba_tsr_tbl == tx_tbl_ptr)
  397. return true;
  398. }
  399. return false;
  400. }
  401. /*
  402. * This function deletes the given entry in Tx BA Stream table.
  403. *
  404. * The function also performs a validity check on the supplied
  405. * pointer before trying to delete.
  406. */
  407. void mwifiex_11n_delete_tx_ba_stream_tbl_entry(struct mwifiex_private *priv,
  408. struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl)
  409. {
  410. if (!tx_ba_tsr_tbl &&
  411. mwifiex_is_tx_ba_stream_ptr_valid(priv, tx_ba_tsr_tbl))
  412. return;
  413. dev_dbg(priv->adapter->dev, "info: tx_ba_tsr_tbl %p\n", tx_ba_tsr_tbl);
  414. list_del(&tx_ba_tsr_tbl->list);
  415. kfree(tx_ba_tsr_tbl);
  416. }
  417. /*
  418. * This function deletes all the entries in Tx BA Stream table.
  419. */
  420. void mwifiex_11n_delete_all_tx_ba_stream_tbl(struct mwifiex_private *priv)
  421. {
  422. int i;
  423. struct mwifiex_tx_ba_stream_tbl *del_tbl_ptr, *tmp_node;
  424. unsigned long flags;
  425. spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
  426. list_for_each_entry_safe(del_tbl_ptr, tmp_node,
  427. &priv->tx_ba_stream_tbl_ptr, list)
  428. mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, del_tbl_ptr);
  429. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
  430. INIT_LIST_HEAD(&priv->tx_ba_stream_tbl_ptr);
  431. for (i = 0; i < MAX_NUM_TID; ++i)
  432. priv->aggr_prio_tbl[i].ampdu_ap =
  433. priv->aggr_prio_tbl[i].ampdu_user;
  434. }
  435. /*
  436. * This function returns the pointer to an entry in BA Stream
  437. * table which matches the given RA/TID pair.
  438. */
  439. struct mwifiex_tx_ba_stream_tbl *
  440. mwifiex_get_ba_tbl(struct mwifiex_private *priv, int tid, u8 *ra)
  441. {
  442. struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
  443. unsigned long flags;
  444. spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
  445. list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
  446. if (!memcmp(tx_ba_tsr_tbl->ra, ra, ETH_ALEN) &&
  447. tx_ba_tsr_tbl->tid == tid) {
  448. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock,
  449. flags);
  450. return tx_ba_tsr_tbl;
  451. }
  452. }
  453. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
  454. return NULL;
  455. }
  456. /*
  457. * This function creates an entry in Tx BA stream table for the
  458. * given RA/TID pair.
  459. */
  460. void mwifiex_create_ba_tbl(struct mwifiex_private *priv, u8 *ra, int tid,
  461. enum mwifiex_ba_status ba_status)
  462. {
  463. struct mwifiex_tx_ba_stream_tbl *new_node;
  464. unsigned long flags;
  465. if (!mwifiex_get_ba_tbl(priv, tid, ra)) {
  466. new_node = kzalloc(sizeof(struct mwifiex_tx_ba_stream_tbl),
  467. GFP_ATOMIC);
  468. if (!new_node) {
  469. dev_err(priv->adapter->dev,
  470. "%s: failed to alloc new_node\n", __func__);
  471. return;
  472. }
  473. INIT_LIST_HEAD(&new_node->list);
  474. new_node->tid = tid;
  475. new_node->ba_status = ba_status;
  476. memcpy(new_node->ra, ra, ETH_ALEN);
  477. spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
  478. list_add_tail(&new_node->list, &priv->tx_ba_stream_tbl_ptr);
  479. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
  480. }
  481. }
  482. /*
  483. * This function sends an add BA request to the given TID/RA pair.
  484. */
  485. int mwifiex_send_addba(struct mwifiex_private *priv, int tid, u8 *peer_mac)
  486. {
  487. struct host_cmd_ds_11n_addba_req add_ba_req;
  488. static u8 dialog_tok;
  489. int ret;
  490. dev_dbg(priv->adapter->dev, "cmd: %s: tid %d\n", __func__, tid);
  491. add_ba_req.block_ack_param_set = cpu_to_le16(
  492. (u16) ((tid << BLOCKACKPARAM_TID_POS) |
  493. (priv->add_ba_param.
  494. tx_win_size << BLOCKACKPARAM_WINSIZE_POS) |
  495. IMMEDIATE_BLOCK_ACK));
  496. add_ba_req.block_ack_tmo = cpu_to_le16((u16)priv->add_ba_param.timeout);
  497. ++dialog_tok;
  498. if (dialog_tok == 0)
  499. dialog_tok = 1;
  500. add_ba_req.dialog_token = dialog_tok;
  501. memcpy(&add_ba_req.peer_mac_addr, peer_mac, ETH_ALEN);
  502. /* We don't wait for the response of this command */
  503. ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_11N_ADDBA_REQ,
  504. 0, 0, &add_ba_req);
  505. return ret;
  506. }
  507. /*
  508. * This function sends a delete BA request to the given TID/RA pair.
  509. */
  510. int mwifiex_send_delba(struct mwifiex_private *priv, int tid, u8 *peer_mac,
  511. int initiator)
  512. {
  513. struct host_cmd_ds_11n_delba delba;
  514. int ret;
  515. uint16_t del_ba_param_set;
  516. memset(&delba, 0, sizeof(delba));
  517. delba.del_ba_param_set = cpu_to_le16(tid << DELBA_TID_POS);
  518. del_ba_param_set = le16_to_cpu(delba.del_ba_param_set);
  519. if (initiator)
  520. del_ba_param_set |= IEEE80211_DELBA_PARAM_INITIATOR_MASK;
  521. else
  522. del_ba_param_set &= ~IEEE80211_DELBA_PARAM_INITIATOR_MASK;
  523. memcpy(&delba.peer_mac_addr, peer_mac, ETH_ALEN);
  524. /* We don't wait for the response of this command */
  525. ret = mwifiex_send_cmd_async(priv, HostCmd_CMD_11N_DELBA,
  526. HostCmd_ACT_GEN_SET, 0, &delba);
  527. return ret;
  528. }
  529. /*
  530. * This function handles the command response of a delete BA request.
  531. */
  532. void mwifiex_11n_delete_ba_stream(struct mwifiex_private *priv, u8 *del_ba)
  533. {
  534. struct host_cmd_ds_11n_delba *cmd_del_ba =
  535. (struct host_cmd_ds_11n_delba *) del_ba;
  536. uint16_t del_ba_param_set = le16_to_cpu(cmd_del_ba->del_ba_param_set);
  537. int tid;
  538. tid = del_ba_param_set >> DELBA_TID_POS;
  539. mwifiex_del_ba_tbl(priv, tid, cmd_del_ba->peer_mac_addr,
  540. TYPE_DELBA_RECEIVE, INITIATOR_BIT(del_ba_param_set));
  541. }
  542. /*
  543. * This function retrieves the Rx reordering table.
  544. */
  545. int mwifiex_get_rx_reorder_tbl(struct mwifiex_private *priv,
  546. struct mwifiex_ds_rx_reorder_tbl *buf)
  547. {
  548. int i;
  549. struct mwifiex_ds_rx_reorder_tbl *rx_reo_tbl = buf;
  550. struct mwifiex_rx_reorder_tbl *rx_reorder_tbl_ptr;
  551. int count = 0;
  552. unsigned long flags;
  553. spin_lock_irqsave(&priv->rx_reorder_tbl_lock, flags);
  554. list_for_each_entry(rx_reorder_tbl_ptr, &priv->rx_reorder_tbl_ptr,
  555. list) {
  556. rx_reo_tbl->tid = (u16) rx_reorder_tbl_ptr->tid;
  557. memcpy(rx_reo_tbl->ta, rx_reorder_tbl_ptr->ta, ETH_ALEN);
  558. rx_reo_tbl->start_win = rx_reorder_tbl_ptr->start_win;
  559. rx_reo_tbl->win_size = rx_reorder_tbl_ptr->win_size;
  560. for (i = 0; i < rx_reorder_tbl_ptr->win_size; ++i) {
  561. if (rx_reorder_tbl_ptr->rx_reorder_ptr[i])
  562. rx_reo_tbl->buffer[i] = true;
  563. else
  564. rx_reo_tbl->buffer[i] = false;
  565. }
  566. rx_reo_tbl++;
  567. count++;
  568. if (count >= MWIFIEX_MAX_RX_BASTREAM_SUPPORTED)
  569. break;
  570. }
  571. spin_unlock_irqrestore(&priv->rx_reorder_tbl_lock, flags);
  572. return count;
  573. }
  574. /*
  575. * This function retrieves the Tx BA stream table.
  576. */
  577. int mwifiex_get_tx_ba_stream_tbl(struct mwifiex_private *priv,
  578. struct mwifiex_ds_tx_ba_stream_tbl *buf)
  579. {
  580. struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
  581. struct mwifiex_ds_tx_ba_stream_tbl *rx_reo_tbl = buf;
  582. int count = 0;
  583. unsigned long flags;
  584. spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
  585. list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
  586. rx_reo_tbl->tid = (u16) tx_ba_tsr_tbl->tid;
  587. dev_dbg(priv->adapter->dev, "data: %s tid=%d\n",
  588. __func__, rx_reo_tbl->tid);
  589. memcpy(rx_reo_tbl->ra, tx_ba_tsr_tbl->ra, ETH_ALEN);
  590. rx_reo_tbl++;
  591. count++;
  592. if (count >= MWIFIEX_MAX_TX_BASTREAM_SUPPORTED)
  593. break;
  594. }
  595. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
  596. return count;
  597. }
  598. /*
  599. * This function retrieves the entry for specific tx BA stream table by RA and
  600. * deletes it.
  601. */
  602. void mwifiex_del_tx_ba_stream_tbl_by_ra(struct mwifiex_private *priv, u8 *ra)
  603. {
  604. struct mwifiex_tx_ba_stream_tbl *tbl, *tmp;
  605. unsigned long flags;
  606. if (!ra)
  607. return;
  608. spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
  609. list_for_each_entry_safe(tbl, tmp, &priv->tx_ba_stream_tbl_ptr, list) {
  610. if (!memcmp(tbl->ra, ra, ETH_ALEN)) {
  611. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock,
  612. flags);
  613. mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, tbl);
  614. spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags);
  615. }
  616. }
  617. spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags);
  618. return;
  619. }