3945-mac.c 105 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/pci-aspm.h>
  35. #include <linux/slab.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/delay.h>
  38. #include <linux/sched.h>
  39. #include <linux/skbuff.h>
  40. #include <linux/netdevice.h>
  41. #include <linux/firmware.h>
  42. #include <linux/etherdevice.h>
  43. #include <linux/if_arp.h>
  44. #include <net/ieee80211_radiotap.h>
  45. #include <net/mac80211.h>
  46. #include <asm/div64.h>
  47. #define DRV_NAME "iwl3945"
  48. #include "commands.h"
  49. #include "common.h"
  50. #include "3945.h"
  51. #include "iwl-spectrum.h"
  52. /*
  53. * module name, copyright, version, etc.
  54. */
  55. #define DRV_DESCRIPTION \
  56. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  57. #ifdef CONFIG_IWLEGACY_DEBUG
  58. #define VD "d"
  59. #else
  60. #define VD
  61. #endif
  62. /*
  63. * add "s" to indicate spectrum measurement included.
  64. * we add it here to be consistent with previous releases in which
  65. * this was configurable.
  66. */
  67. #define DRV_VERSION IWLWIFI_VERSION VD "s"
  68. #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
  69. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  70. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  71. MODULE_VERSION(DRV_VERSION);
  72. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  73. MODULE_LICENSE("GPL");
  74. /* module parameters */
  75. struct il_mod_params il3945_mod_params = {
  76. .sw_crypto = 1,
  77. .restart_fw = 1,
  78. .disable_hw_scan = 1,
  79. /* the rest are 0 by default */
  80. };
  81. /**
  82. * il3945_get_antenna_flags - Get antenna flags for RXON command
  83. * @il: eeprom and antenna fields are used to determine antenna flags
  84. *
  85. * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  86. * il3945_mod_params.antenna specifies the antenna diversity mode:
  87. *
  88. * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  89. * IL_ANTENNA_MAIN - Force MAIN antenna
  90. * IL_ANTENNA_AUX - Force AUX antenna
  91. */
  92. __le32
  93. il3945_get_antenna_flags(const struct il_priv *il)
  94. {
  95. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  96. switch (il3945_mod_params.antenna) {
  97. case IL_ANTENNA_DIVERSITY:
  98. return 0;
  99. case IL_ANTENNA_MAIN:
  100. if (eeprom->antenna_switch_type)
  101. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  102. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  103. case IL_ANTENNA_AUX:
  104. if (eeprom->antenna_switch_type)
  105. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  106. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  107. }
  108. /* bad antenna selector value */
  109. IL_ERR("Bad antenna selector value (0x%x)\n",
  110. il3945_mod_params.antenna);
  111. return 0; /* "diversity" is default if error */
  112. }
  113. static int
  114. il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
  115. struct ieee80211_key_conf *keyconf, u8 sta_id)
  116. {
  117. unsigned long flags;
  118. __le16 key_flags = 0;
  119. int ret;
  120. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  121. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  122. if (sta_id == il->hw_params.bcast_id)
  123. key_flags |= STA_KEY_MULTICAST_MSK;
  124. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  125. keyconf->hw_key_idx = keyconf->keyidx;
  126. key_flags &= ~STA_KEY_FLG_INVALID;
  127. spin_lock_irqsave(&il->sta_lock, flags);
  128. il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
  129. il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  130. memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
  131. memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
  132. if ((il->stations[sta_id].sta.key.
  133. key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
  134. il->stations[sta_id].sta.key.key_offset =
  135. il_get_free_ucode_key_idx(il);
  136. /* else, we are overriding an existing key => no need to allocated room
  137. * in uCode. */
  138. WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  139. "no space for a new key");
  140. il->stations[sta_id].sta.key.key_flags = key_flags;
  141. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  142. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  143. D_INFO("hwcrypto: modify ucode station key info\n");
  144. ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
  145. spin_unlock_irqrestore(&il->sta_lock, flags);
  146. return ret;
  147. }
  148. static int
  149. il3945_set_tkip_dynamic_key_info(struct il_priv *il,
  150. struct ieee80211_key_conf *keyconf, u8 sta_id)
  151. {
  152. return -EOPNOTSUPP;
  153. }
  154. static int
  155. il3945_set_wep_dynamic_key_info(struct il_priv *il,
  156. struct ieee80211_key_conf *keyconf, u8 sta_id)
  157. {
  158. return -EOPNOTSUPP;
  159. }
  160. static int
  161. il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
  162. {
  163. unsigned long flags;
  164. struct il_addsta_cmd sta_cmd;
  165. spin_lock_irqsave(&il->sta_lock, flags);
  166. memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
  167. memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
  168. il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  169. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  170. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  171. memcpy(&sta_cmd, &il->stations[sta_id].sta,
  172. sizeof(struct il_addsta_cmd));
  173. spin_unlock_irqrestore(&il->sta_lock, flags);
  174. D_INFO("hwcrypto: clear ucode station key info\n");
  175. return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  176. }
  177. static int
  178. il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
  179. u8 sta_id)
  180. {
  181. int ret = 0;
  182. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  183. switch (keyconf->cipher) {
  184. case WLAN_CIPHER_SUITE_CCMP:
  185. ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
  186. break;
  187. case WLAN_CIPHER_SUITE_TKIP:
  188. ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
  189. break;
  190. case WLAN_CIPHER_SUITE_WEP40:
  191. case WLAN_CIPHER_SUITE_WEP104:
  192. ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
  193. break;
  194. default:
  195. IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher);
  196. ret = -EINVAL;
  197. }
  198. D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
  199. keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
  200. return ret;
  201. }
  202. static int
  203. il3945_remove_static_key(struct il_priv *il)
  204. {
  205. int ret = -EOPNOTSUPP;
  206. return ret;
  207. }
  208. static int
  209. il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key)
  210. {
  211. if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  212. key->cipher == WLAN_CIPHER_SUITE_WEP104)
  213. return -EOPNOTSUPP;
  214. IL_ERR("Static key invalid: cipher %x\n", key->cipher);
  215. return -EINVAL;
  216. }
  217. static void
  218. il3945_clear_free_frames(struct il_priv *il)
  219. {
  220. struct list_head *element;
  221. D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
  222. while (!list_empty(&il->free_frames)) {
  223. element = il->free_frames.next;
  224. list_del(element);
  225. kfree(list_entry(element, struct il3945_frame, list));
  226. il->frames_count--;
  227. }
  228. if (il->frames_count) {
  229. IL_WARN("%d frames still in use. Did we lose one?\n",
  230. il->frames_count);
  231. il->frames_count = 0;
  232. }
  233. }
  234. static struct il3945_frame *
  235. il3945_get_free_frame(struct il_priv *il)
  236. {
  237. struct il3945_frame *frame;
  238. struct list_head *element;
  239. if (list_empty(&il->free_frames)) {
  240. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  241. if (!frame) {
  242. IL_ERR("Could not allocate frame!\n");
  243. return NULL;
  244. }
  245. il->frames_count++;
  246. return frame;
  247. }
  248. element = il->free_frames.next;
  249. list_del(element);
  250. return list_entry(element, struct il3945_frame, list);
  251. }
  252. static void
  253. il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
  254. {
  255. memset(frame, 0, sizeof(*frame));
  256. list_add(&frame->list, &il->free_frames);
  257. }
  258. unsigned int
  259. il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
  260. int left)
  261. {
  262. if (!il_is_associated(il) || !il->beacon_skb)
  263. return 0;
  264. if (il->beacon_skb->len > left)
  265. return 0;
  266. memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
  267. return il->beacon_skb->len;
  268. }
  269. static int
  270. il3945_send_beacon_cmd(struct il_priv *il)
  271. {
  272. struct il3945_frame *frame;
  273. unsigned int frame_size;
  274. int rc;
  275. u8 rate;
  276. frame = il3945_get_free_frame(il);
  277. if (!frame) {
  278. IL_ERR("Could not obtain free frame buffer for beacon "
  279. "command.\n");
  280. return -ENOMEM;
  281. }
  282. rate = il_get_lowest_plcp(il);
  283. frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
  284. rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
  285. il3945_free_frame(il, frame);
  286. return rc;
  287. }
  288. static void
  289. il3945_unset_hw_params(struct il_priv *il)
  290. {
  291. if (il->_3945.shared_virt)
  292. dma_free_coherent(&il->pci_dev->dev,
  293. sizeof(struct il3945_shared),
  294. il->_3945.shared_virt, il->_3945.shared_phys);
  295. }
  296. static void
  297. il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
  298. struct il_device_cmd *cmd,
  299. struct sk_buff *skb_frag, int sta_id)
  300. {
  301. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  302. struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
  303. tx_cmd->sec_ctl = 0;
  304. switch (keyinfo->cipher) {
  305. case WLAN_CIPHER_SUITE_CCMP:
  306. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  307. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  308. D_TX("tx_cmd with AES hwcrypto\n");
  309. break;
  310. case WLAN_CIPHER_SUITE_TKIP:
  311. break;
  312. case WLAN_CIPHER_SUITE_WEP104:
  313. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  314. /* fall through */
  315. case WLAN_CIPHER_SUITE_WEP40:
  316. tx_cmd->sec_ctl |=
  317. TX_CMD_SEC_WEP | (info->control.hw_key->
  318. hw_key_idx & TX_CMD_SEC_MSK) <<
  319. TX_CMD_SEC_SHIFT;
  320. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  321. D_TX("Configuring packet for WEP encryption " "with key %d\n",
  322. info->control.hw_key->hw_key_idx);
  323. break;
  324. default:
  325. IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
  326. break;
  327. }
  328. }
  329. /*
  330. * handle build C_TX command notification.
  331. */
  332. static void
  333. il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd,
  334. struct ieee80211_tx_info *info,
  335. struct ieee80211_hdr *hdr, u8 std_id)
  336. {
  337. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  338. __le32 tx_flags = tx_cmd->tx_flags;
  339. __le16 fc = hdr->frame_control;
  340. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  341. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  342. tx_flags |= TX_CMD_FLG_ACK_MSK;
  343. if (ieee80211_is_mgmt(fc))
  344. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  345. if (ieee80211_is_probe_resp(fc) &&
  346. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  347. tx_flags |= TX_CMD_FLG_TSF_MSK;
  348. } else {
  349. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  350. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  351. }
  352. tx_cmd->sta_id = std_id;
  353. if (ieee80211_has_morefrags(fc))
  354. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  355. if (ieee80211_is_data_qos(fc)) {
  356. u8 *qc = ieee80211_get_qos_ctl(hdr);
  357. tx_cmd->tid_tspec = qc[0] & 0xf;
  358. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  359. } else {
  360. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  361. }
  362. il_tx_cmd_protection(il, info, fc, &tx_flags);
  363. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  364. if (ieee80211_is_mgmt(fc)) {
  365. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  366. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  367. else
  368. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  369. } else {
  370. tx_cmd->timeout.pm_frame_timeout = 0;
  371. }
  372. tx_cmd->driver_txop = 0;
  373. tx_cmd->tx_flags = tx_flags;
  374. tx_cmd->next_frame_len = 0;
  375. }
  376. /*
  377. * start C_TX command process
  378. */
  379. static int
  380. il3945_tx_skb(struct il_priv *il,
  381. struct ieee80211_sta *sta,
  382. struct sk_buff *skb)
  383. {
  384. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  385. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  386. struct il3945_tx_cmd *tx_cmd;
  387. struct il_tx_queue *txq = NULL;
  388. struct il_queue *q = NULL;
  389. struct il_device_cmd *out_cmd;
  390. struct il_cmd_meta *out_meta;
  391. dma_addr_t phys_addr;
  392. dma_addr_t txcmd_phys;
  393. int txq_id = skb_get_queue_mapping(skb);
  394. u16 len, idx, hdr_len;
  395. u8 id;
  396. u8 unicast;
  397. u8 sta_id;
  398. u8 tid = 0;
  399. __le16 fc;
  400. u8 wait_write_ptr = 0;
  401. unsigned long flags;
  402. spin_lock_irqsave(&il->lock, flags);
  403. if (il_is_rfkill(il)) {
  404. D_DROP("Dropping - RF KILL\n");
  405. goto drop_unlock;
  406. }
  407. if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) ==
  408. IL_INVALID_RATE) {
  409. IL_ERR("ERROR: No TX rate available.\n");
  410. goto drop_unlock;
  411. }
  412. unicast = !is_multicast_ether_addr(hdr->addr1);
  413. id = 0;
  414. fc = hdr->frame_control;
  415. #ifdef CONFIG_IWLEGACY_DEBUG
  416. if (ieee80211_is_auth(fc))
  417. D_TX("Sending AUTH frame\n");
  418. else if (ieee80211_is_assoc_req(fc))
  419. D_TX("Sending ASSOC frame\n");
  420. else if (ieee80211_is_reassoc_req(fc))
  421. D_TX("Sending REASSOC frame\n");
  422. #endif
  423. spin_unlock_irqrestore(&il->lock, flags);
  424. hdr_len = ieee80211_hdrlen(fc);
  425. /* Find idx into station table for destination station */
  426. sta_id = il_sta_id_or_broadcast(il, sta);
  427. if (sta_id == IL_INVALID_STATION) {
  428. D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
  429. goto drop;
  430. }
  431. D_RATE("station Id %d\n", sta_id);
  432. if (ieee80211_is_data_qos(fc)) {
  433. u8 *qc = ieee80211_get_qos_ctl(hdr);
  434. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  435. if (unlikely(tid >= MAX_TID_COUNT))
  436. goto drop;
  437. }
  438. /* Descriptor for chosen Tx queue */
  439. txq = &il->txq[txq_id];
  440. q = &txq->q;
  441. if ((il_queue_space(q) < q->high_mark))
  442. goto drop;
  443. spin_lock_irqsave(&il->lock, flags);
  444. idx = il_get_cmd_idx(q, q->write_ptr, 0);
  445. txq->skbs[q->write_ptr] = skb;
  446. /* Init first empty entry in queue's array of Tx/cmd buffers */
  447. out_cmd = txq->cmd[idx];
  448. out_meta = &txq->meta[idx];
  449. tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
  450. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  451. memset(tx_cmd, 0, sizeof(*tx_cmd));
  452. /*
  453. * Set up the Tx-command (not MAC!) header.
  454. * Store the chosen Tx queue and TFD idx within the sequence field;
  455. * after Tx, uCode's Tx response will return this value so driver can
  456. * locate the frame within the tx queue and do post-tx processing.
  457. */
  458. out_cmd->hdr.cmd = C_TX;
  459. out_cmd->hdr.sequence =
  460. cpu_to_le16((u16)
  461. (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
  462. /* Copy MAC header from skb into command buffer */
  463. memcpy(tx_cmd->hdr, hdr, hdr_len);
  464. if (info->control.hw_key)
  465. il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
  466. /* TODO need this for burst mode later on */
  467. il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
  468. il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id);
  469. /* Total # bytes to be transmitted */
  470. len = (u16) skb->len;
  471. tx_cmd->len = cpu_to_le16(len);
  472. il_update_stats(il, true, fc, len);
  473. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  474. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  475. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  476. txq->need_update = 1;
  477. } else {
  478. wait_write_ptr = 1;
  479. txq->need_update = 0;
  480. }
  481. D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
  482. D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
  483. il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  484. il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr,
  485. ieee80211_hdrlen(fc));
  486. /*
  487. * Use the first empty entry in this queue's command buffer array
  488. * to contain the Tx command and MAC header concatenated together
  489. * (payload data will be in another buffer).
  490. * Size of this varies, due to varying MAC header length.
  491. * If end is not dword aligned, we'll have 2 extra bytes at the end
  492. * of the MAC header (device reads on dword boundaries).
  493. * We'll tell device about this padding later.
  494. */
  495. len =
  496. sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) +
  497. hdr_len;
  498. len = (len + 3) & ~3;
  499. /* Physical address of this Tx command's header (not MAC header!),
  500. * within command buffer array. */
  501. txcmd_phys =
  502. pci_map_single(il->pci_dev, &out_cmd->hdr, len, PCI_DMA_TODEVICE);
  503. /* we do not map meta data ... so we can safely access address to
  504. * provide to unmap command*/
  505. dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
  506. dma_unmap_len_set(out_meta, len, len);
  507. /* Add buffer containing Tx command and MAC(!) header to TFD's
  508. * first entry */
  509. il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, len, 1, 0);
  510. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  511. * if any (802.11 null frames have no payload). */
  512. len = skb->len - hdr_len;
  513. if (len) {
  514. phys_addr =
  515. pci_map_single(il->pci_dev, skb->data + hdr_len, len,
  516. PCI_DMA_TODEVICE);
  517. il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, len, 0,
  518. U32_PAD(len));
  519. }
  520. /* Tell device the write idx *just past* this latest filled TFD */
  521. q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
  522. il_txq_update_write_ptr(il, txq);
  523. spin_unlock_irqrestore(&il->lock, flags);
  524. if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
  525. if (wait_write_ptr) {
  526. spin_lock_irqsave(&il->lock, flags);
  527. txq->need_update = 1;
  528. il_txq_update_write_ptr(il, txq);
  529. spin_unlock_irqrestore(&il->lock, flags);
  530. }
  531. il_stop_queue(il, txq);
  532. }
  533. return 0;
  534. drop_unlock:
  535. spin_unlock_irqrestore(&il->lock, flags);
  536. drop:
  537. return -1;
  538. }
  539. static int
  540. il3945_get_measurement(struct il_priv *il,
  541. struct ieee80211_measurement_params *params, u8 type)
  542. {
  543. struct il_spectrum_cmd spectrum;
  544. struct il_rx_pkt *pkt;
  545. struct il_host_cmd cmd = {
  546. .id = C_SPECTRUM_MEASUREMENT,
  547. .data = (void *)&spectrum,
  548. .flags = CMD_WANT_SKB,
  549. };
  550. u32 add_time = le64_to_cpu(params->start_time);
  551. int rc;
  552. int spectrum_resp_status;
  553. int duration = le16_to_cpu(params->duration);
  554. if (il_is_associated(il))
  555. add_time =
  556. il_usecs_to_beacons(il,
  557. le64_to_cpu(params->start_time) -
  558. il->_3945.last_tsf,
  559. le16_to_cpu(il->timing.beacon_interval));
  560. memset(&spectrum, 0, sizeof(spectrum));
  561. spectrum.channel_count = cpu_to_le16(1);
  562. spectrum.flags =
  563. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  564. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  565. cmd.len = sizeof(spectrum);
  566. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  567. if (il_is_associated(il))
  568. spectrum.start_time =
  569. il_add_beacon_time(il, il->_3945.last_beacon_time, add_time,
  570. le16_to_cpu(il->timing.beacon_interval));
  571. else
  572. spectrum.start_time = 0;
  573. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  574. spectrum.channels[0].channel = params->channel;
  575. spectrum.channels[0].type = type;
  576. if (il->active.flags & RXON_FLG_BAND_24G_MSK)
  577. spectrum.flags |=
  578. RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
  579. RXON_FLG_TGG_PROTECT_MSK;
  580. rc = il_send_cmd_sync(il, &cmd);
  581. if (rc)
  582. return rc;
  583. pkt = (struct il_rx_pkt *)cmd.reply_page;
  584. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  585. IL_ERR("Bad return from N_RX_ON_ASSOC command\n");
  586. rc = -EIO;
  587. }
  588. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  589. switch (spectrum_resp_status) {
  590. case 0: /* Command will be handled */
  591. if (pkt->u.spectrum.id != 0xff) {
  592. D_INFO("Replaced existing measurement: %d\n",
  593. pkt->u.spectrum.id);
  594. il->measurement_status &= ~MEASUREMENT_READY;
  595. }
  596. il->measurement_status |= MEASUREMENT_ACTIVE;
  597. rc = 0;
  598. break;
  599. case 1: /* Command will not be handled */
  600. rc = -EAGAIN;
  601. break;
  602. }
  603. il_free_pages(il, cmd.reply_page);
  604. return rc;
  605. }
  606. static void
  607. il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
  608. {
  609. struct il_rx_pkt *pkt = rxb_addr(rxb);
  610. struct il_alive_resp *palive;
  611. struct delayed_work *pwork;
  612. palive = &pkt->u.alive_frame;
  613. D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
  614. palive->is_valid, palive->ver_type, palive->ver_subtype);
  615. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  616. D_INFO("Initialization Alive received.\n");
  617. memcpy(&il->card_alive_init, &pkt->u.alive_frame,
  618. sizeof(struct il_alive_resp));
  619. pwork = &il->init_alive_start;
  620. } else {
  621. D_INFO("Runtime Alive received.\n");
  622. memcpy(&il->card_alive, &pkt->u.alive_frame,
  623. sizeof(struct il_alive_resp));
  624. pwork = &il->alive_start;
  625. il3945_disable_events(il);
  626. }
  627. /* We delay the ALIVE response by 5ms to
  628. * give the HW RF Kill time to activate... */
  629. if (palive->is_valid == UCODE_VALID_OK)
  630. queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
  631. else
  632. IL_WARN("uCode did not respond OK.\n");
  633. }
  634. static void
  635. il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb)
  636. {
  637. #ifdef CONFIG_IWLEGACY_DEBUG
  638. struct il_rx_pkt *pkt = rxb_addr(rxb);
  639. #endif
  640. D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status);
  641. }
  642. static void
  643. il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
  644. {
  645. struct il_rx_pkt *pkt = rxb_addr(rxb);
  646. struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  647. #ifdef CONFIG_IWLEGACY_DEBUG
  648. u8 rate = beacon->beacon_notify_hdr.rate;
  649. D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n",
  650. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  651. beacon->beacon_notify_hdr.failure_frame,
  652. le32_to_cpu(beacon->ibss_mgr_status),
  653. le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
  654. #endif
  655. il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
  656. }
  657. /* Handle notification from uCode that card's power state is changing
  658. * due to software, hardware, or critical temperature RFKILL */
  659. static void
  660. il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
  661. {
  662. struct il_rx_pkt *pkt = rxb_addr(rxb);
  663. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  664. unsigned long status = il->status;
  665. IL_WARN("Card state received: HW:%s SW:%s\n",
  666. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  667. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  668. _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  669. if (flags & HW_CARD_DISABLED)
  670. set_bit(S_RFKILL, &il->status);
  671. else
  672. clear_bit(S_RFKILL, &il->status);
  673. il_scan_cancel(il);
  674. if ((test_bit(S_RFKILL, &status) !=
  675. test_bit(S_RFKILL, &il->status)))
  676. wiphy_rfkill_set_hw_state(il->hw->wiphy,
  677. test_bit(S_RFKILL, &il->status));
  678. else
  679. wake_up(&il->wait_command_queue);
  680. }
  681. /**
  682. * il3945_setup_handlers - Initialize Rx handler callbacks
  683. *
  684. * Setup the RX handlers for each of the reply types sent from the uCode
  685. * to the host.
  686. *
  687. * This function chains into the hardware specific files for them to setup
  688. * any hardware specific handlers as well.
  689. */
  690. static void
  691. il3945_setup_handlers(struct il_priv *il)
  692. {
  693. il->handlers[N_ALIVE] = il3945_hdl_alive;
  694. il->handlers[C_ADD_STA] = il3945_hdl_add_sta;
  695. il->handlers[N_ERROR] = il_hdl_error;
  696. il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
  697. il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
  698. il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
  699. il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
  700. il->handlers[N_BEACON] = il3945_hdl_beacon;
  701. /*
  702. * The same handler is used for both the REPLY to a discrete
  703. * stats request from the host as well as for the periodic
  704. * stats notifications (after received beacons) from the uCode.
  705. */
  706. il->handlers[C_STATS] = il3945_hdl_c_stats;
  707. il->handlers[N_STATS] = il3945_hdl_stats;
  708. il_setup_rx_scan_handlers(il);
  709. il->handlers[N_CARD_STATE] = il3945_hdl_card_state;
  710. /* Set up hardware specific Rx handlers */
  711. il3945_hw_handler_setup(il);
  712. }
  713. /************************** RX-FUNCTIONS ****************************/
  714. /*
  715. * Rx theory of operation
  716. *
  717. * The host allocates 32 DMA target addresses and passes the host address
  718. * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
  719. * 0 to 31
  720. *
  721. * Rx Queue Indexes
  722. * The host/firmware share two idx registers for managing the Rx buffers.
  723. *
  724. * The READ idx maps to the first position that the firmware may be writing
  725. * to -- the driver can read up to (but not including) this position and get
  726. * good data.
  727. * The READ idx is managed by the firmware once the card is enabled.
  728. *
  729. * The WRITE idx maps to the last position the driver has read from -- the
  730. * position preceding WRITE is the last slot the firmware can place a packet.
  731. *
  732. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  733. * WRITE = READ.
  734. *
  735. * During initialization, the host sets up the READ queue position to the first
  736. * IDX position, and WRITE to the last (READ - 1 wrapped)
  737. *
  738. * When the firmware places a packet in a buffer, it will advance the READ idx
  739. * and fire the RX interrupt. The driver can then query the READ idx and
  740. * process as many packets as possible, moving the WRITE idx forward as it
  741. * resets the Rx queue buffers with new memory.
  742. *
  743. * The management in the driver is as follows:
  744. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  745. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  746. * to replenish the iwl->rxq->rx_free.
  747. * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  748. * iwl->rxq is replenished and the READ IDX is updated (updating the
  749. * 'processed' and 'read' driver idxes as well)
  750. * + A received packet is processed and handed to the kernel network stack,
  751. * detached from the iwl->rxq. The driver 'processed' idx is updated.
  752. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  753. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  754. * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
  755. * were enough free buffers and RX_STALLED is set it is cleared.
  756. *
  757. *
  758. * Driver sequence:
  759. *
  760. * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  761. * il3945_rx_queue_restock
  762. * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  763. * queue, updates firmware pointers, and updates
  764. * the WRITE idx. If insufficient rx_free buffers
  765. * are available, schedules il3945_rx_replenish
  766. *
  767. * -- enable interrupts --
  768. * ISR - il3945_rx() Detach il_rx_bufs from pool up to the
  769. * READ IDX, detaching the SKB from the pool.
  770. * Moves the packet buffer from queue to rx_used.
  771. * Calls il3945_rx_queue_restock to refill any empty
  772. * slots.
  773. * ...
  774. *
  775. */
  776. /**
  777. * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  778. */
  779. static inline __le32
  780. il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
  781. {
  782. return cpu_to_le32((u32) dma_addr);
  783. }
  784. /**
  785. * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
  786. *
  787. * If there are slots in the RX queue that need to be restocked,
  788. * and we have free pre-allocated buffers, fill the ranks as much
  789. * as we can, pulling from rx_free.
  790. *
  791. * This moves the 'write' idx forward to catch up with 'processed', and
  792. * also updates the memory address in the firmware to reference the new
  793. * target buffer.
  794. */
  795. static void
  796. il3945_rx_queue_restock(struct il_priv *il)
  797. {
  798. struct il_rx_queue *rxq = &il->rxq;
  799. struct list_head *element;
  800. struct il_rx_buf *rxb;
  801. unsigned long flags;
  802. int write;
  803. spin_lock_irqsave(&rxq->lock, flags);
  804. write = rxq->write & ~0x7;
  805. while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
  806. /* Get next free Rx buffer, remove from free list */
  807. element = rxq->rx_free.next;
  808. rxb = list_entry(element, struct il_rx_buf, list);
  809. list_del(element);
  810. /* Point to Rx buffer via next RBD in circular buffer */
  811. rxq->bd[rxq->write] =
  812. il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
  813. rxq->queue[rxq->write] = rxb;
  814. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  815. rxq->free_count--;
  816. }
  817. spin_unlock_irqrestore(&rxq->lock, flags);
  818. /* If the pre-allocated buffer pool is dropping low, schedule to
  819. * refill it */
  820. if (rxq->free_count <= RX_LOW_WATERMARK)
  821. queue_work(il->workqueue, &il->rx_replenish);
  822. /* If we've added more space for the firmware to place data, tell it.
  823. * Increment device's write pointer in multiples of 8. */
  824. if (rxq->write_actual != (rxq->write & ~0x7) ||
  825. abs(rxq->write - rxq->read) > 7) {
  826. spin_lock_irqsave(&rxq->lock, flags);
  827. rxq->need_update = 1;
  828. spin_unlock_irqrestore(&rxq->lock, flags);
  829. il_rx_queue_update_write_ptr(il, rxq);
  830. }
  831. }
  832. /**
  833. * il3945_rx_replenish - Move all used packet from rx_used to rx_free
  834. *
  835. * When moving to rx_free an SKB is allocated for the slot.
  836. *
  837. * Also restock the Rx queue via il3945_rx_queue_restock.
  838. * This is called as a scheduled work item (except for during initialization)
  839. */
  840. static void
  841. il3945_rx_allocate(struct il_priv *il, gfp_t priority)
  842. {
  843. struct il_rx_queue *rxq = &il->rxq;
  844. struct list_head *element;
  845. struct il_rx_buf *rxb;
  846. struct page *page;
  847. unsigned long flags;
  848. gfp_t gfp_mask = priority;
  849. while (1) {
  850. spin_lock_irqsave(&rxq->lock, flags);
  851. if (list_empty(&rxq->rx_used)) {
  852. spin_unlock_irqrestore(&rxq->lock, flags);
  853. return;
  854. }
  855. spin_unlock_irqrestore(&rxq->lock, flags);
  856. if (rxq->free_count > RX_LOW_WATERMARK)
  857. gfp_mask |= __GFP_NOWARN;
  858. if (il->hw_params.rx_page_order > 0)
  859. gfp_mask |= __GFP_COMP;
  860. /* Alloc a new receive buffer */
  861. page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
  862. if (!page) {
  863. if (net_ratelimit())
  864. D_INFO("Failed to allocate SKB buffer.\n");
  865. if (rxq->free_count <= RX_LOW_WATERMARK &&
  866. net_ratelimit())
  867. IL_ERR("Failed to allocate SKB buffer with %0x."
  868. "Only %u free buffers remaining.\n",
  869. priority, rxq->free_count);
  870. /* We don't reschedule replenish work here -- we will
  871. * call the restock method and if it still needs
  872. * more buffers it will schedule replenish */
  873. break;
  874. }
  875. spin_lock_irqsave(&rxq->lock, flags);
  876. if (list_empty(&rxq->rx_used)) {
  877. spin_unlock_irqrestore(&rxq->lock, flags);
  878. __free_pages(page, il->hw_params.rx_page_order);
  879. return;
  880. }
  881. element = rxq->rx_used.next;
  882. rxb = list_entry(element, struct il_rx_buf, list);
  883. list_del(element);
  884. spin_unlock_irqrestore(&rxq->lock, flags);
  885. rxb->page = page;
  886. /* Get physical address of RB/SKB */
  887. rxb->page_dma =
  888. pci_map_page(il->pci_dev, page, 0,
  889. PAGE_SIZE << il->hw_params.rx_page_order,
  890. PCI_DMA_FROMDEVICE);
  891. spin_lock_irqsave(&rxq->lock, flags);
  892. list_add_tail(&rxb->list, &rxq->rx_free);
  893. rxq->free_count++;
  894. il->alloc_rxb_page++;
  895. spin_unlock_irqrestore(&rxq->lock, flags);
  896. }
  897. }
  898. void
  899. il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
  900. {
  901. unsigned long flags;
  902. int i;
  903. spin_lock_irqsave(&rxq->lock, flags);
  904. INIT_LIST_HEAD(&rxq->rx_free);
  905. INIT_LIST_HEAD(&rxq->rx_used);
  906. /* Fill the rx_used queue with _all_ of the Rx buffers */
  907. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  908. /* In the reset function, these buffers may have been allocated
  909. * to an SKB, so we need to unmap and free potential storage */
  910. if (rxq->pool[i].page != NULL) {
  911. pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
  912. PAGE_SIZE << il->hw_params.rx_page_order,
  913. PCI_DMA_FROMDEVICE);
  914. __il_free_pages(il, rxq->pool[i].page);
  915. rxq->pool[i].page = NULL;
  916. }
  917. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  918. }
  919. /* Set us so that we have processed and used all buffers, but have
  920. * not restocked the Rx queue with fresh buffers */
  921. rxq->read = rxq->write = 0;
  922. rxq->write_actual = 0;
  923. rxq->free_count = 0;
  924. spin_unlock_irqrestore(&rxq->lock, flags);
  925. }
  926. void
  927. il3945_rx_replenish(void *data)
  928. {
  929. struct il_priv *il = data;
  930. unsigned long flags;
  931. il3945_rx_allocate(il, GFP_KERNEL);
  932. spin_lock_irqsave(&il->lock, flags);
  933. il3945_rx_queue_restock(il);
  934. spin_unlock_irqrestore(&il->lock, flags);
  935. }
  936. static void
  937. il3945_rx_replenish_now(struct il_priv *il)
  938. {
  939. il3945_rx_allocate(il, GFP_ATOMIC);
  940. il3945_rx_queue_restock(il);
  941. }
  942. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  943. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  944. * This free routine walks the list of POOL entries and if SKB is set to
  945. * non NULL it is unmapped and freed
  946. */
  947. static void
  948. il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
  949. {
  950. int i;
  951. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  952. if (rxq->pool[i].page != NULL) {
  953. pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
  954. PAGE_SIZE << il->hw_params.rx_page_order,
  955. PCI_DMA_FROMDEVICE);
  956. __il_free_pages(il, rxq->pool[i].page);
  957. rxq->pool[i].page = NULL;
  958. }
  959. }
  960. dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  961. rxq->bd_dma);
  962. dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
  963. rxq->rb_stts, rxq->rb_stts_dma);
  964. rxq->bd = NULL;
  965. rxq->rb_stts = NULL;
  966. }
  967. /* Convert linear signal-to-noise ratio into dB */
  968. static u8 ratio2dB[100] = {
  969. /* 0 1 2 3 4 5 6 7 8 9 */
  970. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  971. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  972. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  973. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  974. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  975. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  976. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  977. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  978. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  979. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  980. };
  981. /* Calculates a relative dB value from a ratio of linear
  982. * (i.e. not dB) signal levels.
  983. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  984. int
  985. il3945_calc_db_from_ratio(int sig_ratio)
  986. {
  987. /* 1000:1 or higher just report as 60 dB */
  988. if (sig_ratio >= 1000)
  989. return 60;
  990. /* 100:1 or higher, divide by 10 and use table,
  991. * add 20 dB to make up for divide by 10 */
  992. if (sig_ratio >= 100)
  993. return 20 + (int)ratio2dB[sig_ratio / 10];
  994. /* We shouldn't see this */
  995. if (sig_ratio < 1)
  996. return 0;
  997. /* Use table for ratios 1:1 - 99:1 */
  998. return (int)ratio2dB[sig_ratio];
  999. }
  1000. /**
  1001. * il3945_rx_handle - Main entry function for receiving responses from uCode
  1002. *
  1003. * Uses the il->handlers callback function array to invoke
  1004. * the appropriate handlers, including command responses,
  1005. * frame-received notifications, and other notifications.
  1006. */
  1007. static void
  1008. il3945_rx_handle(struct il_priv *il)
  1009. {
  1010. struct il_rx_buf *rxb;
  1011. struct il_rx_pkt *pkt;
  1012. struct il_rx_queue *rxq = &il->rxq;
  1013. u32 r, i;
  1014. int reclaim;
  1015. unsigned long flags;
  1016. u8 fill_rx = 0;
  1017. u32 count = 8;
  1018. int total_empty = 0;
  1019. /* uCode's read idx (stored in shared DRAM) indicates the last Rx
  1020. * buffer that the driver may process (last buffer filled by ucode). */
  1021. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1022. i = rxq->read;
  1023. /* calculate total frames need to be restock after handling RX */
  1024. total_empty = r - rxq->write_actual;
  1025. if (total_empty < 0)
  1026. total_empty += RX_QUEUE_SIZE;
  1027. if (total_empty > (RX_QUEUE_SIZE / 2))
  1028. fill_rx = 1;
  1029. /* Rx interrupt, but nothing sent from uCode */
  1030. if (i == r)
  1031. D_RX("r = %d, i = %d\n", r, i);
  1032. while (i != r) {
  1033. int len;
  1034. rxb = rxq->queue[i];
  1035. /* If an RXB doesn't have a Rx queue slot associated with it,
  1036. * then a bug has been introduced in the queue refilling
  1037. * routines -- catch it here */
  1038. BUG_ON(rxb == NULL);
  1039. rxq->queue[i] = NULL;
  1040. pci_unmap_page(il->pci_dev, rxb->page_dma,
  1041. PAGE_SIZE << il->hw_params.rx_page_order,
  1042. PCI_DMA_FROMDEVICE);
  1043. pkt = rxb_addr(rxb);
  1044. len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
  1045. len += sizeof(u32); /* account for status word */
  1046. /* Reclaim a command buffer only if this packet is a response
  1047. * to a (driver-originated) command.
  1048. * If the packet (e.g. Rx frame) originated from uCode,
  1049. * there is no command buffer to reclaim.
  1050. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1051. * but apparently a few don't get set; catch them here. */
  1052. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1053. pkt->hdr.cmd != N_STATS && pkt->hdr.cmd != C_TX;
  1054. /* Based on type of command response or notification,
  1055. * handle those that need handling via function in
  1056. * handlers table. See il3945_setup_handlers() */
  1057. if (il->handlers[pkt->hdr.cmd]) {
  1058. D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
  1059. il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1060. il->isr_stats.handlers[pkt->hdr.cmd]++;
  1061. il->handlers[pkt->hdr.cmd] (il, rxb);
  1062. } else {
  1063. /* No handling needed */
  1064. D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
  1065. i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1066. }
  1067. /*
  1068. * XXX: After here, we should always check rxb->page
  1069. * against NULL before touching it or its virtual
  1070. * memory (pkt). Because some handler might have
  1071. * already taken or freed the pages.
  1072. */
  1073. if (reclaim) {
  1074. /* Invoke any callbacks, transfer the buffer to caller,
  1075. * and fire off the (possibly) blocking il_send_cmd()
  1076. * as we reclaim the driver command queue */
  1077. if (rxb->page)
  1078. il_tx_cmd_complete(il, rxb);
  1079. else
  1080. IL_WARN("Claim null rxb?\n");
  1081. }
  1082. /* Reuse the page if possible. For notification packets and
  1083. * SKBs that fail to Rx correctly, add them back into the
  1084. * rx_free list for reuse later. */
  1085. spin_lock_irqsave(&rxq->lock, flags);
  1086. if (rxb->page != NULL) {
  1087. rxb->page_dma =
  1088. pci_map_page(il->pci_dev, rxb->page, 0,
  1089. PAGE_SIZE << il->hw_params.
  1090. rx_page_order, PCI_DMA_FROMDEVICE);
  1091. list_add_tail(&rxb->list, &rxq->rx_free);
  1092. rxq->free_count++;
  1093. } else
  1094. list_add_tail(&rxb->list, &rxq->rx_used);
  1095. spin_unlock_irqrestore(&rxq->lock, flags);
  1096. i = (i + 1) & RX_QUEUE_MASK;
  1097. /* If there are a lot of unused frames,
  1098. * restock the Rx queue so ucode won't assert. */
  1099. if (fill_rx) {
  1100. count++;
  1101. if (count >= 8) {
  1102. rxq->read = i;
  1103. il3945_rx_replenish_now(il);
  1104. count = 0;
  1105. }
  1106. }
  1107. }
  1108. /* Backtrack one entry */
  1109. rxq->read = i;
  1110. if (fill_rx)
  1111. il3945_rx_replenish_now(il);
  1112. else
  1113. il3945_rx_queue_restock(il);
  1114. }
  1115. /* call this function to flush any scheduled tasklet */
  1116. static inline void
  1117. il3945_synchronize_irq(struct il_priv *il)
  1118. {
  1119. /* wait to make sure we flush pending tasklet */
  1120. synchronize_irq(il->pci_dev->irq);
  1121. tasklet_kill(&il->irq_tasklet);
  1122. }
  1123. static const char *
  1124. il3945_desc_lookup(int i)
  1125. {
  1126. switch (i) {
  1127. case 1:
  1128. return "FAIL";
  1129. case 2:
  1130. return "BAD_PARAM";
  1131. case 3:
  1132. return "BAD_CHECKSUM";
  1133. case 4:
  1134. return "NMI_INTERRUPT";
  1135. case 5:
  1136. return "SYSASSERT";
  1137. case 6:
  1138. return "FATAL_ERROR";
  1139. }
  1140. return "UNKNOWN";
  1141. }
  1142. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1143. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1144. void
  1145. il3945_dump_nic_error_log(struct il_priv *il)
  1146. {
  1147. u32 i;
  1148. u32 desc, time, count, base, data1;
  1149. u32 blink1, blink2, ilink1, ilink2;
  1150. base = le32_to_cpu(il->card_alive.error_event_table_ptr);
  1151. if (!il3945_hw_valid_rtc_data_addr(base)) {
  1152. IL_ERR("Not valid error log pointer 0x%08X\n", base);
  1153. return;
  1154. }
  1155. count = il_read_targ_mem(il, base);
  1156. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1157. IL_ERR("Start IWL Error Log Dump:\n");
  1158. IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
  1159. }
  1160. IL_ERR("Desc Time asrtPC blink2 "
  1161. "ilink1 nmiPC Line\n");
  1162. for (i = ERROR_START_OFFSET;
  1163. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1164. i += ERROR_ELEM_SIZE) {
  1165. desc = il_read_targ_mem(il, base + i);
  1166. time = il_read_targ_mem(il, base + i + 1 * sizeof(u32));
  1167. blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32));
  1168. blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32));
  1169. ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32));
  1170. ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32));
  1171. data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32));
  1172. IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1173. il3945_desc_lookup(desc), desc, time, blink1, blink2,
  1174. ilink1, ilink2, data1);
  1175. }
  1176. }
  1177. static void
  1178. il3945_irq_tasklet(struct il_priv *il)
  1179. {
  1180. u32 inta, handled = 0;
  1181. u32 inta_fh;
  1182. unsigned long flags;
  1183. #ifdef CONFIG_IWLEGACY_DEBUG
  1184. u32 inta_mask;
  1185. #endif
  1186. spin_lock_irqsave(&il->lock, flags);
  1187. /* Ack/clear/reset pending uCode interrupts.
  1188. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1189. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1190. inta = _il_rd(il, CSR_INT);
  1191. _il_wr(il, CSR_INT, inta);
  1192. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1193. * Any new interrupts that happen after this, either while we're
  1194. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1195. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1196. _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
  1197. #ifdef CONFIG_IWLEGACY_DEBUG
  1198. if (il_get_debug_level(il) & IL_DL_ISR) {
  1199. /* just for debug */
  1200. inta_mask = _il_rd(il, CSR_INT_MASK);
  1201. D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
  1202. inta_mask, inta_fh);
  1203. }
  1204. #endif
  1205. spin_unlock_irqrestore(&il->lock, flags);
  1206. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1207. * atomic, make sure that inta covers all the interrupts that
  1208. * we've discovered, even if FH interrupt came in just after
  1209. * reading CSR_INT. */
  1210. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1211. inta |= CSR_INT_BIT_FH_RX;
  1212. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1213. inta |= CSR_INT_BIT_FH_TX;
  1214. /* Now service all interrupt bits discovered above. */
  1215. if (inta & CSR_INT_BIT_HW_ERR) {
  1216. IL_ERR("Hardware error detected. Restarting.\n");
  1217. /* Tell the device to stop sending interrupts */
  1218. il_disable_interrupts(il);
  1219. il->isr_stats.hw++;
  1220. il_irq_handle_error(il);
  1221. handled |= CSR_INT_BIT_HW_ERR;
  1222. return;
  1223. }
  1224. #ifdef CONFIG_IWLEGACY_DEBUG
  1225. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1226. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1227. if (inta & CSR_INT_BIT_SCD) {
  1228. D_ISR("Scheduler finished to transmit "
  1229. "the frame/frames.\n");
  1230. il->isr_stats.sch++;
  1231. }
  1232. /* Alive notification via Rx interrupt will do the real work */
  1233. if (inta & CSR_INT_BIT_ALIVE) {
  1234. D_ISR("Alive interrupt\n");
  1235. il->isr_stats.alive++;
  1236. }
  1237. }
  1238. #endif
  1239. /* Safely ignore these bits for debug checks below */
  1240. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1241. /* Error detected by uCode */
  1242. if (inta & CSR_INT_BIT_SW_ERR) {
  1243. IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n",
  1244. inta);
  1245. il->isr_stats.sw++;
  1246. il_irq_handle_error(il);
  1247. handled |= CSR_INT_BIT_SW_ERR;
  1248. }
  1249. /* uCode wakes up after power-down sleep */
  1250. if (inta & CSR_INT_BIT_WAKEUP) {
  1251. D_ISR("Wakeup interrupt\n");
  1252. il_rx_queue_update_write_ptr(il, &il->rxq);
  1253. il_txq_update_write_ptr(il, &il->txq[0]);
  1254. il_txq_update_write_ptr(il, &il->txq[1]);
  1255. il_txq_update_write_ptr(il, &il->txq[2]);
  1256. il_txq_update_write_ptr(il, &il->txq[3]);
  1257. il_txq_update_write_ptr(il, &il->txq[4]);
  1258. il_txq_update_write_ptr(il, &il->txq[5]);
  1259. il->isr_stats.wakeup++;
  1260. handled |= CSR_INT_BIT_WAKEUP;
  1261. }
  1262. /* All uCode command responses, including Tx command responses,
  1263. * Rx "responses" (frame-received notification), and other
  1264. * notifications from uCode come through here*/
  1265. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1266. il3945_rx_handle(il);
  1267. il->isr_stats.rx++;
  1268. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1269. }
  1270. if (inta & CSR_INT_BIT_FH_TX) {
  1271. D_ISR("Tx interrupt\n");
  1272. il->isr_stats.tx++;
  1273. _il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
  1274. il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0);
  1275. handled |= CSR_INT_BIT_FH_TX;
  1276. }
  1277. if (inta & ~handled) {
  1278. IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1279. il->isr_stats.unhandled++;
  1280. }
  1281. if (inta & ~il->inta_mask) {
  1282. IL_WARN("Disabled INTA bits 0x%08x were pending\n",
  1283. inta & ~il->inta_mask);
  1284. IL_WARN(" with inta_fh = 0x%08x\n", inta_fh);
  1285. }
  1286. /* Re-enable all interrupts */
  1287. /* only Re-enable if disabled by irq */
  1288. if (test_bit(S_INT_ENABLED, &il->status))
  1289. il_enable_interrupts(il);
  1290. #ifdef CONFIG_IWLEGACY_DEBUG
  1291. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1292. inta = _il_rd(il, CSR_INT);
  1293. inta_mask = _il_rd(il, CSR_INT_MASK);
  1294. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1295. D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1296. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1297. }
  1298. #endif
  1299. }
  1300. static int
  1301. il3945_get_channels_for_scan(struct il_priv *il, enum ieee80211_band band,
  1302. u8 is_active, u8 n_probes,
  1303. struct il3945_scan_channel *scan_ch,
  1304. struct ieee80211_vif *vif)
  1305. {
  1306. struct ieee80211_channel *chan;
  1307. const struct ieee80211_supported_band *sband;
  1308. const struct il_channel_info *ch_info;
  1309. u16 passive_dwell = 0;
  1310. u16 active_dwell = 0;
  1311. int added, i;
  1312. sband = il_get_hw_mode(il, band);
  1313. if (!sband)
  1314. return 0;
  1315. active_dwell = il_get_active_dwell_time(il, band, n_probes);
  1316. passive_dwell = il_get_passive_dwell_time(il, band, vif);
  1317. if (passive_dwell <= active_dwell)
  1318. passive_dwell = active_dwell + 1;
  1319. for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
  1320. chan = il->scan_request->channels[i];
  1321. if (chan->band != band)
  1322. continue;
  1323. scan_ch->channel = chan->hw_value;
  1324. ch_info = il_get_channel_info(il, band, scan_ch->channel);
  1325. if (!il_is_channel_valid(ch_info)) {
  1326. D_SCAN("Channel %d is INVALID for this band.\n",
  1327. scan_ch->channel);
  1328. continue;
  1329. }
  1330. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1331. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1332. /* If passive , set up for auto-switch
  1333. * and use long active_dwell time.
  1334. */
  1335. if (!is_active || il_is_channel_passive(ch_info) ||
  1336. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1337. scan_ch->type = 0; /* passive */
  1338. if (IL_UCODE_API(il->ucode_ver) == 1)
  1339. scan_ch->active_dwell =
  1340. cpu_to_le16(passive_dwell - 1);
  1341. } else {
  1342. scan_ch->type = 1; /* active */
  1343. }
  1344. /* Set direct probe bits. These may be used both for active
  1345. * scan channels (probes gets sent right away),
  1346. * or for passive channels (probes get se sent only after
  1347. * hearing clear Rx packet).*/
  1348. if (IL_UCODE_API(il->ucode_ver) >= 2) {
  1349. if (n_probes)
  1350. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1351. } else {
  1352. /* uCode v1 does not allow setting direct probe bits on
  1353. * passive channel. */
  1354. if ((scan_ch->type & 1) && n_probes)
  1355. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1356. }
  1357. /* Set txpower levels to defaults */
  1358. scan_ch->tpc.dsp_atten = 110;
  1359. /* scan_pwr_info->tpc.dsp_atten; */
  1360. /*scan_pwr_info->tpc.tx_gain; */
  1361. if (band == IEEE80211_BAND_5GHZ)
  1362. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1363. else {
  1364. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1365. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1366. * power level:
  1367. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1368. */
  1369. }
  1370. D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel,
  1371. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1372. (scan_ch->type & 1) ? active_dwell : passive_dwell);
  1373. scan_ch++;
  1374. added++;
  1375. }
  1376. D_SCAN("total channels to scan %d\n", added);
  1377. return added;
  1378. }
  1379. static void
  1380. il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
  1381. {
  1382. int i;
  1383. for (i = 0; i < RATE_COUNT_LEGACY; i++) {
  1384. rates[i].bitrate = il3945_rates[i].ieee * 5;
  1385. rates[i].hw_value = i; /* Rate scaling will work on idxes */
  1386. rates[i].hw_value_short = i;
  1387. rates[i].flags = 0;
  1388. if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
  1389. /*
  1390. * If CCK != 1M then set short preamble rate flag.
  1391. */
  1392. rates[i].flags |=
  1393. (il3945_rates[i].plcp ==
  1394. 10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1395. }
  1396. }
  1397. }
  1398. /******************************************************************************
  1399. *
  1400. * uCode download functions
  1401. *
  1402. ******************************************************************************/
  1403. static void
  1404. il3945_dealloc_ucode_pci(struct il_priv *il)
  1405. {
  1406. il_free_fw_desc(il->pci_dev, &il->ucode_code);
  1407. il_free_fw_desc(il->pci_dev, &il->ucode_data);
  1408. il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1409. il_free_fw_desc(il->pci_dev, &il->ucode_init);
  1410. il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
  1411. il_free_fw_desc(il->pci_dev, &il->ucode_boot);
  1412. }
  1413. /**
  1414. * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1415. * looking at all data.
  1416. */
  1417. static int
  1418. il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
  1419. {
  1420. u32 val;
  1421. u32 save_len = len;
  1422. int rc = 0;
  1423. u32 errcnt;
  1424. D_INFO("ucode inst image size is %u\n", len);
  1425. il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND);
  1426. errcnt = 0;
  1427. for (; len > 0; len -= sizeof(u32), image++) {
  1428. /* read data comes through single port, auto-incr addr */
  1429. /* NOTE: Use the debugless read so we don't flood kernel log
  1430. * if IL_DL_IO is set */
  1431. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1432. if (val != le32_to_cpu(*image)) {
  1433. IL_ERR("uCode INST section is invalid at "
  1434. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1435. save_len - len, val, le32_to_cpu(*image));
  1436. rc = -EIO;
  1437. errcnt++;
  1438. if (errcnt >= 20)
  1439. break;
  1440. }
  1441. }
  1442. if (!errcnt)
  1443. D_INFO("ucode image in INSTRUCTION memory is good\n");
  1444. return rc;
  1445. }
  1446. /**
  1447. * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1448. * using sample data 100 bytes apart. If these sample points are good,
  1449. * it's a pretty good bet that everything between them is good, too.
  1450. */
  1451. static int
  1452. il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
  1453. {
  1454. u32 val;
  1455. int rc = 0;
  1456. u32 errcnt = 0;
  1457. u32 i;
  1458. D_INFO("ucode inst image size is %u\n", len);
  1459. for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
  1460. /* read data comes through single port, auto-incr addr */
  1461. /* NOTE: Use the debugless read so we don't flood kernel log
  1462. * if IL_DL_IO is set */
  1463. il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND);
  1464. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1465. if (val != le32_to_cpu(*image)) {
  1466. #if 0 /* Enable this if you want to see details */
  1467. IL_ERR("uCode INST section is invalid at "
  1468. "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val,
  1469. *image);
  1470. #endif
  1471. rc = -EIO;
  1472. errcnt++;
  1473. if (errcnt >= 3)
  1474. break;
  1475. }
  1476. }
  1477. return rc;
  1478. }
  1479. /**
  1480. * il3945_verify_ucode - determine which instruction image is in SRAM,
  1481. * and verify its contents
  1482. */
  1483. static int
  1484. il3945_verify_ucode(struct il_priv *il)
  1485. {
  1486. __le32 *image;
  1487. u32 len;
  1488. int rc = 0;
  1489. /* Try bootstrap */
  1490. image = (__le32 *) il->ucode_boot.v_addr;
  1491. len = il->ucode_boot.len;
  1492. rc = il3945_verify_inst_sparse(il, image, len);
  1493. if (rc == 0) {
  1494. D_INFO("Bootstrap uCode is good in inst SRAM\n");
  1495. return 0;
  1496. }
  1497. /* Try initialize */
  1498. image = (__le32 *) il->ucode_init.v_addr;
  1499. len = il->ucode_init.len;
  1500. rc = il3945_verify_inst_sparse(il, image, len);
  1501. if (rc == 0) {
  1502. D_INFO("Initialize uCode is good in inst SRAM\n");
  1503. return 0;
  1504. }
  1505. /* Try runtime/protocol */
  1506. image = (__le32 *) il->ucode_code.v_addr;
  1507. len = il->ucode_code.len;
  1508. rc = il3945_verify_inst_sparse(il, image, len);
  1509. if (rc == 0) {
  1510. D_INFO("Runtime uCode is good in inst SRAM\n");
  1511. return 0;
  1512. }
  1513. IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1514. /* Since nothing seems to match, show first several data entries in
  1515. * instruction SRAM, so maybe visual inspection will give a clue.
  1516. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1517. image = (__le32 *) il->ucode_boot.v_addr;
  1518. len = il->ucode_boot.len;
  1519. rc = il3945_verify_inst_full(il, image, len);
  1520. return rc;
  1521. }
  1522. static void
  1523. il3945_nic_start(struct il_priv *il)
  1524. {
  1525. /* Remove all resets to allow NIC to operate */
  1526. _il_wr(il, CSR_RESET, 0);
  1527. }
  1528. #define IL3945_UCODE_GET(item) \
  1529. static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
  1530. { \
  1531. return le32_to_cpu(ucode->v1.item); \
  1532. }
  1533. static u32
  1534. il3945_ucode_get_header_size(u32 api_ver)
  1535. {
  1536. return 24;
  1537. }
  1538. static u8 *
  1539. il3945_ucode_get_data(const struct il_ucode_header *ucode)
  1540. {
  1541. return (u8 *) ucode->v1.data;
  1542. }
  1543. IL3945_UCODE_GET(inst_size);
  1544. IL3945_UCODE_GET(data_size);
  1545. IL3945_UCODE_GET(init_size);
  1546. IL3945_UCODE_GET(init_data_size);
  1547. IL3945_UCODE_GET(boot_size);
  1548. /**
  1549. * il3945_read_ucode - Read uCode images from disk file.
  1550. *
  1551. * Copy into buffers for card to fetch via bus-mastering
  1552. */
  1553. static int
  1554. il3945_read_ucode(struct il_priv *il)
  1555. {
  1556. const struct il_ucode_header *ucode;
  1557. int ret = -EINVAL, idx;
  1558. const struct firmware *ucode_raw;
  1559. /* firmware file name contains uCode/driver compatibility version */
  1560. const char *name_pre = il->cfg->fw_name_pre;
  1561. const unsigned int api_max = il->cfg->ucode_api_max;
  1562. const unsigned int api_min = il->cfg->ucode_api_min;
  1563. char buf[25];
  1564. u8 *src;
  1565. size_t len;
  1566. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1567. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1568. * request_firmware() is synchronous, file is in memory on return. */
  1569. for (idx = api_max; idx >= api_min; idx--) {
  1570. sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
  1571. ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
  1572. if (ret < 0) {
  1573. IL_ERR("%s firmware file req failed: %d\n", buf, ret);
  1574. if (ret == -ENOENT)
  1575. continue;
  1576. else
  1577. goto error;
  1578. } else {
  1579. if (idx < api_max)
  1580. IL_ERR("Loaded firmware %s, "
  1581. "which is deprecated. "
  1582. " Please use API v%u instead.\n", buf,
  1583. api_max);
  1584. D_INFO("Got firmware '%s' file "
  1585. "(%zd bytes) from disk\n", buf, ucode_raw->size);
  1586. break;
  1587. }
  1588. }
  1589. if (ret < 0)
  1590. goto error;
  1591. /* Make sure that we got at least our header! */
  1592. if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
  1593. IL_ERR("File size way too small!\n");
  1594. ret = -EINVAL;
  1595. goto err_release;
  1596. }
  1597. /* Data from ucode file: header followed by uCode images */
  1598. ucode = (struct il_ucode_header *)ucode_raw->data;
  1599. il->ucode_ver = le32_to_cpu(ucode->ver);
  1600. api_ver = IL_UCODE_API(il->ucode_ver);
  1601. inst_size = il3945_ucode_get_inst_size(ucode);
  1602. data_size = il3945_ucode_get_data_size(ucode);
  1603. init_size = il3945_ucode_get_init_size(ucode);
  1604. init_data_size = il3945_ucode_get_init_data_size(ucode);
  1605. boot_size = il3945_ucode_get_boot_size(ucode);
  1606. src = il3945_ucode_get_data(ucode);
  1607. /* api_ver should match the api version forming part of the
  1608. * firmware filename ... but we don't check for that and only rely
  1609. * on the API version read from firmware header from here on forward */
  1610. if (api_ver < api_min || api_ver > api_max) {
  1611. IL_ERR("Driver unable to support your firmware API. "
  1612. "Driver supports v%u, firmware is v%u.\n", api_max,
  1613. api_ver);
  1614. il->ucode_ver = 0;
  1615. ret = -EINVAL;
  1616. goto err_release;
  1617. }
  1618. if (api_ver != api_max)
  1619. IL_ERR("Firmware has old API version. Expected %u, "
  1620. "got %u. New firmware can be obtained "
  1621. "from http://www.intellinuxwireless.org.\n", api_max,
  1622. api_ver);
  1623. IL_INFO("loaded firmware version %u.%u.%u.%u\n",
  1624. IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
  1625. IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
  1626. snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
  1627. "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
  1628. IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
  1629. IL_UCODE_SERIAL(il->ucode_ver));
  1630. D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
  1631. D_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
  1632. D_INFO("f/w package hdr runtime data size = %u\n", data_size);
  1633. D_INFO("f/w package hdr init inst size = %u\n", init_size);
  1634. D_INFO("f/w package hdr init data size = %u\n", init_data_size);
  1635. D_INFO("f/w package hdr boot inst size = %u\n", boot_size);
  1636. /* Verify size of file vs. image size info in file's header */
  1637. if (ucode_raw->size !=
  1638. il3945_ucode_get_header_size(api_ver) + inst_size + data_size +
  1639. init_size + init_data_size + boot_size) {
  1640. D_INFO("uCode file size %zd does not match expected size\n",
  1641. ucode_raw->size);
  1642. ret = -EINVAL;
  1643. goto err_release;
  1644. }
  1645. /* Verify that uCode images will fit in card's SRAM */
  1646. if (inst_size > IL39_MAX_INST_SIZE) {
  1647. D_INFO("uCode instr len %d too large to fit in\n", inst_size);
  1648. ret = -EINVAL;
  1649. goto err_release;
  1650. }
  1651. if (data_size > IL39_MAX_DATA_SIZE) {
  1652. D_INFO("uCode data len %d too large to fit in\n", data_size);
  1653. ret = -EINVAL;
  1654. goto err_release;
  1655. }
  1656. if (init_size > IL39_MAX_INST_SIZE) {
  1657. D_INFO("uCode init instr len %d too large to fit in\n",
  1658. init_size);
  1659. ret = -EINVAL;
  1660. goto err_release;
  1661. }
  1662. if (init_data_size > IL39_MAX_DATA_SIZE) {
  1663. D_INFO("uCode init data len %d too large to fit in\n",
  1664. init_data_size);
  1665. ret = -EINVAL;
  1666. goto err_release;
  1667. }
  1668. if (boot_size > IL39_MAX_BSM_SIZE) {
  1669. D_INFO("uCode boot instr len %d too large to fit in\n",
  1670. boot_size);
  1671. ret = -EINVAL;
  1672. goto err_release;
  1673. }
  1674. /* Allocate ucode buffers for card's bus-master loading ... */
  1675. /* Runtime instructions and 2 copies of data:
  1676. * 1) unmodified from disk
  1677. * 2) backup cache for save/restore during power-downs */
  1678. il->ucode_code.len = inst_size;
  1679. il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
  1680. il->ucode_data.len = data_size;
  1681. il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
  1682. il->ucode_data_backup.len = data_size;
  1683. il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1684. if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
  1685. !il->ucode_data_backup.v_addr)
  1686. goto err_pci_alloc;
  1687. /* Initialization instructions and data */
  1688. if (init_size && init_data_size) {
  1689. il->ucode_init.len = init_size;
  1690. il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
  1691. il->ucode_init_data.len = init_data_size;
  1692. il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
  1693. if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
  1694. goto err_pci_alloc;
  1695. }
  1696. /* Bootstrap (instructions only, no data) */
  1697. if (boot_size) {
  1698. il->ucode_boot.len = boot_size;
  1699. il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
  1700. if (!il->ucode_boot.v_addr)
  1701. goto err_pci_alloc;
  1702. }
  1703. /* Copy images into buffers for card's bus-master reads ... */
  1704. /* Runtime instructions (first block of data in file) */
  1705. len = inst_size;
  1706. D_INFO("Copying (but not loading) uCode instr len %zd\n", len);
  1707. memcpy(il->ucode_code.v_addr, src, len);
  1708. src += len;
  1709. D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1710. il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
  1711. /* Runtime data (2nd block)
  1712. * NOTE: Copy into backup buffer will be done in il3945_up() */
  1713. len = data_size;
  1714. D_INFO("Copying (but not loading) uCode data len %zd\n", len);
  1715. memcpy(il->ucode_data.v_addr, src, len);
  1716. memcpy(il->ucode_data_backup.v_addr, src, len);
  1717. src += len;
  1718. /* Initialization instructions (3rd block) */
  1719. if (init_size) {
  1720. len = init_size;
  1721. D_INFO("Copying (but not loading) init instr len %zd\n", len);
  1722. memcpy(il->ucode_init.v_addr, src, len);
  1723. src += len;
  1724. }
  1725. /* Initialization data (4th block) */
  1726. if (init_data_size) {
  1727. len = init_data_size;
  1728. D_INFO("Copying (but not loading) init data len %zd\n", len);
  1729. memcpy(il->ucode_init_data.v_addr, src, len);
  1730. src += len;
  1731. }
  1732. /* Bootstrap instructions (5th block) */
  1733. len = boot_size;
  1734. D_INFO("Copying (but not loading) boot instr len %zd\n", len);
  1735. memcpy(il->ucode_boot.v_addr, src, len);
  1736. /* We have our copies now, allow OS release its copies */
  1737. release_firmware(ucode_raw);
  1738. return 0;
  1739. err_pci_alloc:
  1740. IL_ERR("failed to allocate pci memory\n");
  1741. ret = -ENOMEM;
  1742. il3945_dealloc_ucode_pci(il);
  1743. err_release:
  1744. release_firmware(ucode_raw);
  1745. error:
  1746. return ret;
  1747. }
  1748. /**
  1749. * il3945_set_ucode_ptrs - Set uCode address location
  1750. *
  1751. * Tell initialization uCode where to find runtime uCode.
  1752. *
  1753. * BSM registers initially contain pointers to initialization uCode.
  1754. * We need to replace them to load runtime uCode inst and data,
  1755. * and to save runtime data when powering down.
  1756. */
  1757. static int
  1758. il3945_set_ucode_ptrs(struct il_priv *il)
  1759. {
  1760. dma_addr_t pinst;
  1761. dma_addr_t pdata;
  1762. /* bits 31:0 for 3945 */
  1763. pinst = il->ucode_code.p_addr;
  1764. pdata = il->ucode_data_backup.p_addr;
  1765. /* Tell bootstrap uCode where to find image to load */
  1766. il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
  1767. il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
  1768. il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
  1769. /* Inst byte count must be last to set up, bit 31 signals uCode
  1770. * that all new ptr/size info is in place */
  1771. il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
  1772. il->ucode_code.len | BSM_DRAM_INST_LOAD);
  1773. D_INFO("Runtime uCode pointers are set.\n");
  1774. return 0;
  1775. }
  1776. /**
  1777. * il3945_init_alive_start - Called after N_ALIVE notification received
  1778. *
  1779. * Called after N_ALIVE notification received from "initialize" uCode.
  1780. *
  1781. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  1782. */
  1783. static void
  1784. il3945_init_alive_start(struct il_priv *il)
  1785. {
  1786. /* Check alive response for "valid" sign from uCode */
  1787. if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
  1788. /* We had an error bringing up the hardware, so take it
  1789. * all the way back down so we can try again */
  1790. D_INFO("Initialize Alive failed.\n");
  1791. goto restart;
  1792. }
  1793. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  1794. * This is a paranoid check, because we would not have gotten the
  1795. * "initialize" alive if code weren't properly loaded. */
  1796. if (il3945_verify_ucode(il)) {
  1797. /* Runtime instruction load was bad;
  1798. * take it all the way back down so we can try again */
  1799. D_INFO("Bad \"initialize\" uCode load.\n");
  1800. goto restart;
  1801. }
  1802. /* Send pointers to protocol/runtime uCode image ... init code will
  1803. * load and launch runtime uCode, which will send us another "Alive"
  1804. * notification. */
  1805. D_INFO("Initialization Alive received.\n");
  1806. if (il3945_set_ucode_ptrs(il)) {
  1807. /* Runtime instruction load won't happen;
  1808. * take it all the way back down so we can try again */
  1809. D_INFO("Couldn't set up uCode pointers.\n");
  1810. goto restart;
  1811. }
  1812. return;
  1813. restart:
  1814. queue_work(il->workqueue, &il->restart);
  1815. }
  1816. /**
  1817. * il3945_alive_start - called after N_ALIVE notification received
  1818. * from protocol/runtime uCode (initialization uCode's
  1819. * Alive gets handled by il3945_init_alive_start()).
  1820. */
  1821. static void
  1822. il3945_alive_start(struct il_priv *il)
  1823. {
  1824. int thermal_spin = 0;
  1825. u32 rfkill;
  1826. D_INFO("Runtime Alive received.\n");
  1827. if (il->card_alive.is_valid != UCODE_VALID_OK) {
  1828. /* We had an error bringing up the hardware, so take it
  1829. * all the way back down so we can try again */
  1830. D_INFO("Alive failed.\n");
  1831. goto restart;
  1832. }
  1833. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  1834. * This is a paranoid check, because we would not have gotten the
  1835. * "runtime" alive if code weren't properly loaded. */
  1836. if (il3945_verify_ucode(il)) {
  1837. /* Runtime instruction load was bad;
  1838. * take it all the way back down so we can try again */
  1839. D_INFO("Bad runtime uCode load.\n");
  1840. goto restart;
  1841. }
  1842. rfkill = il_rd_prph(il, APMG_RFKILL_REG);
  1843. D_INFO("RFKILL status: 0x%x\n", rfkill);
  1844. if (rfkill & 0x1) {
  1845. clear_bit(S_RFKILL, &il->status);
  1846. /* if RFKILL is not on, then wait for thermal
  1847. * sensor in adapter to kick in */
  1848. while (il3945_hw_get_temperature(il) == 0) {
  1849. thermal_spin++;
  1850. udelay(10);
  1851. }
  1852. if (thermal_spin)
  1853. D_INFO("Thermal calibration took %dus\n",
  1854. thermal_spin * 10);
  1855. } else
  1856. set_bit(S_RFKILL, &il->status);
  1857. /* After the ALIVE response, we can send commands to 3945 uCode */
  1858. set_bit(S_ALIVE, &il->status);
  1859. /* Enable watchdog to monitor the driver tx queues */
  1860. il_setup_watchdog(il);
  1861. if (il_is_rfkill(il))
  1862. return;
  1863. ieee80211_wake_queues(il->hw);
  1864. il->active_rate = RATES_MASK_3945;
  1865. il_power_update_mode(il, true);
  1866. if (il_is_associated(il)) {
  1867. struct il3945_rxon_cmd *active_rxon =
  1868. (struct il3945_rxon_cmd *)(&il->active);
  1869. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  1870. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1871. } else {
  1872. /* Initialize our rx_config data */
  1873. il_connection_init_rx_config(il);
  1874. }
  1875. /* Configure Bluetooth device coexistence support */
  1876. il_send_bt_config(il);
  1877. set_bit(S_READY, &il->status);
  1878. /* Configure the adapter for unassociated operation */
  1879. il3945_commit_rxon(il);
  1880. il3945_reg_txpower_periodic(il);
  1881. D_INFO("ALIVE processing complete.\n");
  1882. wake_up(&il->wait_command_queue);
  1883. return;
  1884. restart:
  1885. queue_work(il->workqueue, &il->restart);
  1886. }
  1887. static void il3945_cancel_deferred_work(struct il_priv *il);
  1888. static void
  1889. __il3945_down(struct il_priv *il)
  1890. {
  1891. unsigned long flags;
  1892. int exit_pending;
  1893. D_INFO(DRV_NAME " is going down\n");
  1894. il_scan_cancel_timeout(il, 200);
  1895. exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
  1896. /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
  1897. * to prevent rearm timer */
  1898. del_timer_sync(&il->watchdog);
  1899. /* Station information will now be cleared in device */
  1900. il_clear_ucode_stations(il);
  1901. il_dealloc_bcast_stations(il);
  1902. il_clear_driver_stations(il);
  1903. /* Unblock any waiting calls */
  1904. wake_up_all(&il->wait_command_queue);
  1905. /* Wipe out the EXIT_PENDING status bit if we are not actually
  1906. * exiting the module */
  1907. if (!exit_pending)
  1908. clear_bit(S_EXIT_PENDING, &il->status);
  1909. /* stop and reset the on-board processor */
  1910. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  1911. /* tell the device to stop sending interrupts */
  1912. spin_lock_irqsave(&il->lock, flags);
  1913. il_disable_interrupts(il);
  1914. spin_unlock_irqrestore(&il->lock, flags);
  1915. il3945_synchronize_irq(il);
  1916. if (il->mac80211_registered)
  1917. ieee80211_stop_queues(il->hw);
  1918. /* If we have not previously called il3945_init() then
  1919. * clear all bits but the RF Kill bits and return */
  1920. if (!il_is_init(il)) {
  1921. il->status =
  1922. test_bit(S_RFKILL, &il->status) << S_RFKILL |
  1923. test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
  1924. test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
  1925. goto exit;
  1926. }
  1927. /* ...otherwise clear out all the status bits but the RF Kill
  1928. * bit and continue taking the NIC down. */
  1929. il->status &=
  1930. test_bit(S_RFKILL, &il->status) << S_RFKILL |
  1931. test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
  1932. test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR |
  1933. test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
  1934. /*
  1935. * We disabled and synchronized interrupt, and priv->mutex is taken, so
  1936. * here is the only thread which will program device registers, but
  1937. * still have lockdep assertions, so we are taking reg_lock.
  1938. */
  1939. spin_lock_irq(&il->reg_lock);
  1940. /* FIXME: il_grab_nic_access if rfkill is off ? */
  1941. il3945_hw_txq_ctx_stop(il);
  1942. il3945_hw_rxq_stop(il);
  1943. /* Power-down device's busmaster DMA clocks */
  1944. _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  1945. udelay(5);
  1946. /* Stop the device, and put it in low power state */
  1947. _il_apm_stop(il);
  1948. spin_unlock_irq(&il->reg_lock);
  1949. il3945_hw_txq_ctx_free(il);
  1950. exit:
  1951. memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
  1952. if (il->beacon_skb)
  1953. dev_kfree_skb(il->beacon_skb);
  1954. il->beacon_skb = NULL;
  1955. /* clear out any free frames */
  1956. il3945_clear_free_frames(il);
  1957. }
  1958. static void
  1959. il3945_down(struct il_priv *il)
  1960. {
  1961. mutex_lock(&il->mutex);
  1962. __il3945_down(il);
  1963. mutex_unlock(&il->mutex);
  1964. il3945_cancel_deferred_work(il);
  1965. }
  1966. #define MAX_HW_RESTARTS 5
  1967. static int
  1968. il3945_alloc_bcast_station(struct il_priv *il)
  1969. {
  1970. unsigned long flags;
  1971. u8 sta_id;
  1972. spin_lock_irqsave(&il->sta_lock, flags);
  1973. sta_id = il_prep_station(il, il_bcast_addr, false, NULL);
  1974. if (sta_id == IL_INVALID_STATION) {
  1975. IL_ERR("Unable to prepare broadcast station\n");
  1976. spin_unlock_irqrestore(&il->sta_lock, flags);
  1977. return -EINVAL;
  1978. }
  1979. il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
  1980. il->stations[sta_id].used |= IL_STA_BCAST;
  1981. spin_unlock_irqrestore(&il->sta_lock, flags);
  1982. return 0;
  1983. }
  1984. static int
  1985. __il3945_up(struct il_priv *il)
  1986. {
  1987. int rc, i;
  1988. rc = il3945_alloc_bcast_station(il);
  1989. if (rc)
  1990. return rc;
  1991. if (test_bit(S_EXIT_PENDING, &il->status)) {
  1992. IL_WARN("Exit pending; will not bring the NIC up\n");
  1993. return -EIO;
  1994. }
  1995. if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
  1996. IL_ERR("ucode not available for device bring up\n");
  1997. return -EIO;
  1998. }
  1999. /* If platform's RF_KILL switch is NOT set to KILL */
  2000. if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2001. clear_bit(S_RFKILL, &il->status);
  2002. else {
  2003. set_bit(S_RFKILL, &il->status);
  2004. IL_WARN("Radio disabled by HW RF Kill switch\n");
  2005. return -ENODEV;
  2006. }
  2007. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2008. rc = il3945_hw_nic_init(il);
  2009. if (rc) {
  2010. IL_ERR("Unable to int nic\n");
  2011. return rc;
  2012. }
  2013. /* make sure rfkill handshake bits are cleared */
  2014. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2015. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2016. /* clear (again), then enable host interrupts */
  2017. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2018. il_enable_interrupts(il);
  2019. /* really make sure rfkill handshake bits are cleared */
  2020. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2021. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2022. /* Copy original ucode data image from disk into backup cache.
  2023. * This will be used to initialize the on-board processor's
  2024. * data SRAM for a clean start when the runtime program first loads. */
  2025. memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
  2026. il->ucode_data.len);
  2027. /* We return success when we resume from suspend and rf_kill is on. */
  2028. if (test_bit(S_RFKILL, &il->status))
  2029. return 0;
  2030. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2031. /* load bootstrap state machine,
  2032. * load bootstrap program into processor's memory,
  2033. * prepare to load the "initialize" uCode */
  2034. rc = il->ops->load_ucode(il);
  2035. if (rc) {
  2036. IL_ERR("Unable to set up bootstrap uCode: %d\n", rc);
  2037. continue;
  2038. }
  2039. /* start card; "initialize" will load runtime ucode */
  2040. il3945_nic_start(il);
  2041. D_INFO(DRV_NAME " is coming up\n");
  2042. return 0;
  2043. }
  2044. set_bit(S_EXIT_PENDING, &il->status);
  2045. __il3945_down(il);
  2046. clear_bit(S_EXIT_PENDING, &il->status);
  2047. /* tried to restart and config the device for as long as our
  2048. * patience could withstand */
  2049. IL_ERR("Unable to initialize device after %d attempts.\n", i);
  2050. return -EIO;
  2051. }
  2052. /*****************************************************************************
  2053. *
  2054. * Workqueue callbacks
  2055. *
  2056. *****************************************************************************/
  2057. static void
  2058. il3945_bg_init_alive_start(struct work_struct *data)
  2059. {
  2060. struct il_priv *il =
  2061. container_of(data, struct il_priv, init_alive_start.work);
  2062. mutex_lock(&il->mutex);
  2063. if (test_bit(S_EXIT_PENDING, &il->status))
  2064. goto out;
  2065. il3945_init_alive_start(il);
  2066. out:
  2067. mutex_unlock(&il->mutex);
  2068. }
  2069. static void
  2070. il3945_bg_alive_start(struct work_struct *data)
  2071. {
  2072. struct il_priv *il =
  2073. container_of(data, struct il_priv, alive_start.work);
  2074. mutex_lock(&il->mutex);
  2075. if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL)
  2076. goto out;
  2077. il3945_alive_start(il);
  2078. out:
  2079. mutex_unlock(&il->mutex);
  2080. }
  2081. /*
  2082. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2083. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2084. * *is* readable even when device has been SW_RESET into low power mode
  2085. * (e.g. during RF KILL).
  2086. */
  2087. static void
  2088. il3945_rfkill_poll(struct work_struct *data)
  2089. {
  2090. struct il_priv *il =
  2091. container_of(data, struct il_priv, _3945.rfkill_poll.work);
  2092. bool old_rfkill = test_bit(S_RFKILL, &il->status);
  2093. bool new_rfkill =
  2094. !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2095. if (new_rfkill != old_rfkill) {
  2096. if (new_rfkill)
  2097. set_bit(S_RFKILL, &il->status);
  2098. else
  2099. clear_bit(S_RFKILL, &il->status);
  2100. wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
  2101. D_RF_KILL("RF_KILL bit toggled to %s.\n",
  2102. new_rfkill ? "disable radio" : "enable radio");
  2103. }
  2104. /* Keep this running, even if radio now enabled. This will be
  2105. * cancelled in mac_start() if system decides to start again */
  2106. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2107. round_jiffies_relative(2 * HZ));
  2108. }
  2109. int
  2110. il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
  2111. {
  2112. struct il_host_cmd cmd = {
  2113. .id = C_SCAN,
  2114. .len = sizeof(struct il3945_scan_cmd),
  2115. .flags = CMD_SIZE_HUGE,
  2116. };
  2117. struct il3945_scan_cmd *scan;
  2118. u8 n_probes = 0;
  2119. enum ieee80211_band band;
  2120. bool is_active = false;
  2121. int ret;
  2122. u16 len;
  2123. lockdep_assert_held(&il->mutex);
  2124. if (!il->scan_cmd) {
  2125. il->scan_cmd =
  2126. kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE,
  2127. GFP_KERNEL);
  2128. if (!il->scan_cmd) {
  2129. D_SCAN("Fail to allocate scan memory\n");
  2130. return -ENOMEM;
  2131. }
  2132. }
  2133. scan = il->scan_cmd;
  2134. memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
  2135. scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
  2136. scan->quiet_time = IL_ACTIVE_QUIET_TIME;
  2137. if (il_is_associated(il)) {
  2138. u16 interval;
  2139. u32 extra;
  2140. u32 suspend_time = 100;
  2141. u32 scan_suspend_time = 100;
  2142. D_INFO("Scanning while associated...\n");
  2143. interval = vif->bss_conf.beacon_int;
  2144. scan->suspend_time = 0;
  2145. scan->max_out_time = cpu_to_le32(200 * 1024);
  2146. if (!interval)
  2147. interval = suspend_time;
  2148. /*
  2149. * suspend time format:
  2150. * 0-19: beacon interval in usec (time before exec.)
  2151. * 20-23: 0
  2152. * 24-31: number of beacons (suspend between channels)
  2153. */
  2154. extra = (suspend_time / interval) << 24;
  2155. scan_suspend_time =
  2156. 0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024));
  2157. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2158. D_SCAN("suspend_time 0x%X beacon interval %d\n",
  2159. scan_suspend_time, interval);
  2160. }
  2161. if (il->scan_request->n_ssids) {
  2162. int i, p = 0;
  2163. D_SCAN("Kicking off active scan\n");
  2164. for (i = 0; i < il->scan_request->n_ssids; i++) {
  2165. /* always does wildcard anyway */
  2166. if (!il->scan_request->ssids[i].ssid_len)
  2167. continue;
  2168. scan->direct_scan[p].id = WLAN_EID_SSID;
  2169. scan->direct_scan[p].len =
  2170. il->scan_request->ssids[i].ssid_len;
  2171. memcpy(scan->direct_scan[p].ssid,
  2172. il->scan_request->ssids[i].ssid,
  2173. il->scan_request->ssids[i].ssid_len);
  2174. n_probes++;
  2175. p++;
  2176. }
  2177. is_active = true;
  2178. } else
  2179. D_SCAN("Kicking off passive scan.\n");
  2180. /* We don't build a direct scan probe request; the uCode will do
  2181. * that based on the direct_mask added to each channel entry */
  2182. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2183. scan->tx_cmd.sta_id = il->hw_params.bcast_id;
  2184. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2185. /* flags + rate selection */
  2186. switch (il->scan_band) {
  2187. case IEEE80211_BAND_2GHZ:
  2188. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2189. scan->tx_cmd.rate = RATE_1M_PLCP;
  2190. band = IEEE80211_BAND_2GHZ;
  2191. break;
  2192. case IEEE80211_BAND_5GHZ:
  2193. scan->tx_cmd.rate = RATE_6M_PLCP;
  2194. band = IEEE80211_BAND_5GHZ;
  2195. break;
  2196. default:
  2197. IL_WARN("Invalid scan band\n");
  2198. return -EIO;
  2199. }
  2200. /*
  2201. * If active scaning is requested but a certain channel is marked
  2202. * passive, we can do active scanning if we detect transmissions. For
  2203. * passive only scanning disable switching to active on any channel.
  2204. */
  2205. scan->good_CRC_th =
  2206. is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
  2207. len =
  2208. il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
  2209. vif->addr, il->scan_request->ie,
  2210. il->scan_request->ie_len,
  2211. IL_MAX_SCAN_SIZE - sizeof(*scan));
  2212. scan->tx_cmd.len = cpu_to_le16(len);
  2213. /* select Rx antennas */
  2214. scan->flags |= il3945_get_antenna_flags(il);
  2215. scan->channel_count =
  2216. il3945_get_channels_for_scan(il, band, is_active, n_probes,
  2217. (void *)&scan->data[len], vif);
  2218. if (scan->channel_count == 0) {
  2219. D_SCAN("channel count %d\n", scan->channel_count);
  2220. return -EIO;
  2221. }
  2222. cmd.len +=
  2223. le16_to_cpu(scan->tx_cmd.len) +
  2224. scan->channel_count * sizeof(struct il3945_scan_channel);
  2225. cmd.data = scan;
  2226. scan->len = cpu_to_le16(cmd.len);
  2227. set_bit(S_SCAN_HW, &il->status);
  2228. ret = il_send_cmd_sync(il, &cmd);
  2229. if (ret)
  2230. clear_bit(S_SCAN_HW, &il->status);
  2231. return ret;
  2232. }
  2233. void
  2234. il3945_post_scan(struct il_priv *il)
  2235. {
  2236. /*
  2237. * Since setting the RXON may have been deferred while
  2238. * performing the scan, fire one off if needed
  2239. */
  2240. if (memcmp(&il->staging, &il->active, sizeof(il->staging)))
  2241. il3945_commit_rxon(il);
  2242. }
  2243. static void
  2244. il3945_bg_restart(struct work_struct *data)
  2245. {
  2246. struct il_priv *il = container_of(data, struct il_priv, restart);
  2247. if (test_bit(S_EXIT_PENDING, &il->status))
  2248. return;
  2249. if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
  2250. mutex_lock(&il->mutex);
  2251. il->is_open = 0;
  2252. mutex_unlock(&il->mutex);
  2253. il3945_down(il);
  2254. ieee80211_restart_hw(il->hw);
  2255. } else {
  2256. il3945_down(il);
  2257. mutex_lock(&il->mutex);
  2258. if (test_bit(S_EXIT_PENDING, &il->status)) {
  2259. mutex_unlock(&il->mutex);
  2260. return;
  2261. }
  2262. __il3945_up(il);
  2263. mutex_unlock(&il->mutex);
  2264. }
  2265. }
  2266. static void
  2267. il3945_bg_rx_replenish(struct work_struct *data)
  2268. {
  2269. struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
  2270. mutex_lock(&il->mutex);
  2271. if (test_bit(S_EXIT_PENDING, &il->status))
  2272. goto out;
  2273. il3945_rx_replenish(il);
  2274. out:
  2275. mutex_unlock(&il->mutex);
  2276. }
  2277. void
  2278. il3945_post_associate(struct il_priv *il)
  2279. {
  2280. int rc = 0;
  2281. struct ieee80211_conf *conf = NULL;
  2282. if (!il->vif || !il->is_open)
  2283. return;
  2284. D_ASSOC("Associated as %d to: %pM\n", il->vif->bss_conf.aid,
  2285. il->active.bssid_addr);
  2286. if (test_bit(S_EXIT_PENDING, &il->status))
  2287. return;
  2288. il_scan_cancel_timeout(il, 200);
  2289. conf = &il->hw->conf;
  2290. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2291. il3945_commit_rxon(il);
  2292. rc = il_send_rxon_timing(il);
  2293. if (rc)
  2294. IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n");
  2295. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2296. il->staging.assoc_id = cpu_to_le16(il->vif->bss_conf.aid);
  2297. D_ASSOC("assoc id %d beacon interval %d\n", il->vif->bss_conf.aid,
  2298. il->vif->bss_conf.beacon_int);
  2299. if (il->vif->bss_conf.use_short_preamble)
  2300. il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2301. else
  2302. il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2303. if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2304. if (il->vif->bss_conf.use_short_slot)
  2305. il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2306. else
  2307. il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2308. }
  2309. il3945_commit_rxon(il);
  2310. switch (il->vif->type) {
  2311. case NL80211_IFTYPE_STATION:
  2312. il3945_rate_scale_init(il->hw, IL_AP_ID);
  2313. break;
  2314. case NL80211_IFTYPE_ADHOC:
  2315. il3945_send_beacon_cmd(il);
  2316. break;
  2317. default:
  2318. IL_ERR("%s Should not be called in %d mode\n", __func__,
  2319. il->vif->type);
  2320. break;
  2321. }
  2322. }
  2323. /*****************************************************************************
  2324. *
  2325. * mac80211 entry point functions
  2326. *
  2327. *****************************************************************************/
  2328. #define UCODE_READY_TIMEOUT (2 * HZ)
  2329. static int
  2330. il3945_mac_start(struct ieee80211_hw *hw)
  2331. {
  2332. struct il_priv *il = hw->priv;
  2333. int ret;
  2334. /* we should be verifying the device is ready to be opened */
  2335. mutex_lock(&il->mutex);
  2336. D_MAC80211("enter\n");
  2337. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2338. * ucode filename and max sizes are card-specific. */
  2339. if (!il->ucode_code.len) {
  2340. ret = il3945_read_ucode(il);
  2341. if (ret) {
  2342. IL_ERR("Could not read microcode: %d\n", ret);
  2343. mutex_unlock(&il->mutex);
  2344. goto out_release_irq;
  2345. }
  2346. }
  2347. ret = __il3945_up(il);
  2348. mutex_unlock(&il->mutex);
  2349. if (ret)
  2350. goto out_release_irq;
  2351. D_INFO("Start UP work.\n");
  2352. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2353. * mac80211 will not be run successfully. */
  2354. ret = wait_event_timeout(il->wait_command_queue,
  2355. test_bit(S_READY, &il->status),
  2356. UCODE_READY_TIMEOUT);
  2357. if (!ret) {
  2358. if (!test_bit(S_READY, &il->status)) {
  2359. IL_ERR("Wait for START_ALIVE timeout after %dms.\n",
  2360. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2361. ret = -ETIMEDOUT;
  2362. goto out_release_irq;
  2363. }
  2364. }
  2365. /* ucode is running and will send rfkill notifications,
  2366. * no need to poll the killswitch state anymore */
  2367. cancel_delayed_work(&il->_3945.rfkill_poll);
  2368. il->is_open = 1;
  2369. D_MAC80211("leave\n");
  2370. return 0;
  2371. out_release_irq:
  2372. il->is_open = 0;
  2373. D_MAC80211("leave - failed\n");
  2374. return ret;
  2375. }
  2376. static void
  2377. il3945_mac_stop(struct ieee80211_hw *hw)
  2378. {
  2379. struct il_priv *il = hw->priv;
  2380. D_MAC80211("enter\n");
  2381. if (!il->is_open) {
  2382. D_MAC80211("leave - skip\n");
  2383. return;
  2384. }
  2385. il->is_open = 0;
  2386. il3945_down(il);
  2387. flush_workqueue(il->workqueue);
  2388. /* start polling the killswitch state again */
  2389. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2390. round_jiffies_relative(2 * HZ));
  2391. D_MAC80211("leave\n");
  2392. }
  2393. static void
  2394. il3945_mac_tx(struct ieee80211_hw *hw,
  2395. struct ieee80211_tx_control *control,
  2396. struct sk_buff *skb)
  2397. {
  2398. struct il_priv *il = hw->priv;
  2399. D_MAC80211("enter\n");
  2400. D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2401. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2402. if (il3945_tx_skb(il, control->sta, skb))
  2403. dev_kfree_skb_any(skb);
  2404. D_MAC80211("leave\n");
  2405. }
  2406. void
  2407. il3945_config_ap(struct il_priv *il)
  2408. {
  2409. struct ieee80211_vif *vif = il->vif;
  2410. int rc = 0;
  2411. if (test_bit(S_EXIT_PENDING, &il->status))
  2412. return;
  2413. /* The following should be done only at AP bring up */
  2414. if (!(il_is_associated(il))) {
  2415. /* RXON - unassoc (to set timing command) */
  2416. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2417. il3945_commit_rxon(il);
  2418. /* RXON Timing */
  2419. rc = il_send_rxon_timing(il);
  2420. if (rc)
  2421. IL_WARN("C_RXON_TIMING failed - "
  2422. "Attempting to continue.\n");
  2423. il->staging.assoc_id = 0;
  2424. if (vif->bss_conf.use_short_preamble)
  2425. il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2426. else
  2427. il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2428. if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2429. if (vif->bss_conf.use_short_slot)
  2430. il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2431. else
  2432. il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2433. }
  2434. /* restore RXON assoc */
  2435. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2436. il3945_commit_rxon(il);
  2437. }
  2438. il3945_send_beacon_cmd(il);
  2439. }
  2440. static int
  2441. il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2442. struct ieee80211_vif *vif, struct ieee80211_sta *sta,
  2443. struct ieee80211_key_conf *key)
  2444. {
  2445. struct il_priv *il = hw->priv;
  2446. int ret = 0;
  2447. u8 sta_id = IL_INVALID_STATION;
  2448. u8 static_key;
  2449. D_MAC80211("enter\n");
  2450. if (il3945_mod_params.sw_crypto) {
  2451. D_MAC80211("leave - hwcrypto disabled\n");
  2452. return -EOPNOTSUPP;
  2453. }
  2454. /*
  2455. * To support IBSS RSN, don't program group keys in IBSS, the
  2456. * hardware will then not attempt to decrypt the frames.
  2457. */
  2458. if (vif->type == NL80211_IFTYPE_ADHOC &&
  2459. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  2460. D_MAC80211("leave - IBSS RSN\n");
  2461. return -EOPNOTSUPP;
  2462. }
  2463. static_key = !il_is_associated(il);
  2464. if (!static_key) {
  2465. sta_id = il_sta_id_or_broadcast(il, sta);
  2466. if (sta_id == IL_INVALID_STATION) {
  2467. D_MAC80211("leave - station not found\n");
  2468. return -EINVAL;
  2469. }
  2470. }
  2471. mutex_lock(&il->mutex);
  2472. il_scan_cancel_timeout(il, 100);
  2473. switch (cmd) {
  2474. case SET_KEY:
  2475. if (static_key)
  2476. ret = il3945_set_static_key(il, key);
  2477. else
  2478. ret = il3945_set_dynamic_key(il, key, sta_id);
  2479. D_MAC80211("enable hwcrypto key\n");
  2480. break;
  2481. case DISABLE_KEY:
  2482. if (static_key)
  2483. ret = il3945_remove_static_key(il);
  2484. else
  2485. ret = il3945_clear_sta_key_info(il, sta_id);
  2486. D_MAC80211("disable hwcrypto key\n");
  2487. break;
  2488. default:
  2489. ret = -EINVAL;
  2490. }
  2491. D_MAC80211("leave ret %d\n", ret);
  2492. mutex_unlock(&il->mutex);
  2493. return ret;
  2494. }
  2495. static int
  2496. il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2497. struct ieee80211_sta *sta)
  2498. {
  2499. struct il_priv *il = hw->priv;
  2500. struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
  2501. int ret;
  2502. bool is_ap = vif->type == NL80211_IFTYPE_STATION;
  2503. u8 sta_id;
  2504. mutex_lock(&il->mutex);
  2505. D_INFO("station %pM\n", sta->addr);
  2506. sta_priv->common.sta_id = IL_INVALID_STATION;
  2507. ret = il_add_station_common(il, sta->addr, is_ap, sta, &sta_id);
  2508. if (ret) {
  2509. IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
  2510. /* Should we return success if return code is EEXIST ? */
  2511. mutex_unlock(&il->mutex);
  2512. return ret;
  2513. }
  2514. sta_priv->common.sta_id = sta_id;
  2515. /* Initialize rate scaling */
  2516. D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
  2517. il3945_rs_rate_init(il, sta, sta_id);
  2518. mutex_unlock(&il->mutex);
  2519. return 0;
  2520. }
  2521. static void
  2522. il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
  2523. unsigned int *total_flags, u64 multicast)
  2524. {
  2525. struct il_priv *il = hw->priv;
  2526. __le32 filter_or = 0, filter_nand = 0;
  2527. #define CHK(test, flag) do { \
  2528. if (*total_flags & (test)) \
  2529. filter_or |= (flag); \
  2530. else \
  2531. filter_nand |= (flag); \
  2532. } while (0)
  2533. D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
  2534. *total_flags);
  2535. CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
  2536. CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
  2537. CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
  2538. #undef CHK
  2539. mutex_lock(&il->mutex);
  2540. il->staging.filter_flags &= ~filter_nand;
  2541. il->staging.filter_flags |= filter_or;
  2542. /*
  2543. * Not committing directly because hardware can perform a scan,
  2544. * but even if hw is ready, committing here breaks for some reason,
  2545. * we'll eventually commit the filter flags change anyway.
  2546. */
  2547. mutex_unlock(&il->mutex);
  2548. /*
  2549. * Receiving all multicast frames is always enabled by the
  2550. * default flags setup in il_connection_init_rx_config()
  2551. * since we currently do not support programming multicast
  2552. * filters into the device.
  2553. */
  2554. *total_flags &=
  2555. FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  2556. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  2557. }
  2558. /*****************************************************************************
  2559. *
  2560. * sysfs attributes
  2561. *
  2562. *****************************************************************************/
  2563. #ifdef CONFIG_IWLEGACY_DEBUG
  2564. /*
  2565. * The following adds a new attribute to the sysfs representation
  2566. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2567. * used for controlling the debug level.
  2568. *
  2569. * See the level definitions in iwl for details.
  2570. *
  2571. * The debug_level being managed using sysfs below is a per device debug
  2572. * level that is used instead of the global debug level if it (the per
  2573. * device debug level) is set.
  2574. */
  2575. static ssize_t
  2576. il3945_show_debug_level(struct device *d, struct device_attribute *attr,
  2577. char *buf)
  2578. {
  2579. struct il_priv *il = dev_get_drvdata(d);
  2580. return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
  2581. }
  2582. static ssize_t
  2583. il3945_store_debug_level(struct device *d, struct device_attribute *attr,
  2584. const char *buf, size_t count)
  2585. {
  2586. struct il_priv *il = dev_get_drvdata(d);
  2587. unsigned long val;
  2588. int ret;
  2589. ret = strict_strtoul(buf, 0, &val);
  2590. if (ret)
  2591. IL_INFO("%s is not in hex or decimal form.\n", buf);
  2592. else
  2593. il->debug_level = val;
  2594. return strnlen(buf, count);
  2595. }
  2596. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, il3945_show_debug_level,
  2597. il3945_store_debug_level);
  2598. #endif /* CONFIG_IWLEGACY_DEBUG */
  2599. static ssize_t
  2600. il3945_show_temperature(struct device *d, struct device_attribute *attr,
  2601. char *buf)
  2602. {
  2603. struct il_priv *il = dev_get_drvdata(d);
  2604. if (!il_is_alive(il))
  2605. return -EAGAIN;
  2606. return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
  2607. }
  2608. static DEVICE_ATTR(temperature, S_IRUGO, il3945_show_temperature, NULL);
  2609. static ssize_t
  2610. il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
  2611. {
  2612. struct il_priv *il = dev_get_drvdata(d);
  2613. return sprintf(buf, "%d\n", il->tx_power_user_lmt);
  2614. }
  2615. static ssize_t
  2616. il3945_store_tx_power(struct device *d, struct device_attribute *attr,
  2617. const char *buf, size_t count)
  2618. {
  2619. struct il_priv *il = dev_get_drvdata(d);
  2620. char *p = (char *)buf;
  2621. u32 val;
  2622. val = simple_strtoul(p, &p, 10);
  2623. if (p == buf)
  2624. IL_INFO(": %s is not in decimal form.\n", buf);
  2625. else
  2626. il3945_hw_reg_set_txpower(il, val);
  2627. return count;
  2628. }
  2629. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il3945_show_tx_power,
  2630. il3945_store_tx_power);
  2631. static ssize_t
  2632. il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf)
  2633. {
  2634. struct il_priv *il = dev_get_drvdata(d);
  2635. return sprintf(buf, "0x%04X\n", il->active.flags);
  2636. }
  2637. static ssize_t
  2638. il3945_store_flags(struct device *d, struct device_attribute *attr,
  2639. const char *buf, size_t count)
  2640. {
  2641. struct il_priv *il = dev_get_drvdata(d);
  2642. u32 flags = simple_strtoul(buf, NULL, 0);
  2643. mutex_lock(&il->mutex);
  2644. if (le32_to_cpu(il->staging.flags) != flags) {
  2645. /* Cancel any currently running scans... */
  2646. if (il_scan_cancel_timeout(il, 100))
  2647. IL_WARN("Could not cancel scan.\n");
  2648. else {
  2649. D_INFO("Committing rxon.flags = 0x%04X\n", flags);
  2650. il->staging.flags = cpu_to_le32(flags);
  2651. il3945_commit_rxon(il);
  2652. }
  2653. }
  2654. mutex_unlock(&il->mutex);
  2655. return count;
  2656. }
  2657. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, il3945_show_flags,
  2658. il3945_store_flags);
  2659. static ssize_t
  2660. il3945_show_filter_flags(struct device *d, struct device_attribute *attr,
  2661. char *buf)
  2662. {
  2663. struct il_priv *il = dev_get_drvdata(d);
  2664. return sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.filter_flags));
  2665. }
  2666. static ssize_t
  2667. il3945_store_filter_flags(struct device *d, struct device_attribute *attr,
  2668. const char *buf, size_t count)
  2669. {
  2670. struct il_priv *il = dev_get_drvdata(d);
  2671. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2672. mutex_lock(&il->mutex);
  2673. if (le32_to_cpu(il->staging.filter_flags) != filter_flags) {
  2674. /* Cancel any currently running scans... */
  2675. if (il_scan_cancel_timeout(il, 100))
  2676. IL_WARN("Could not cancel scan.\n");
  2677. else {
  2678. D_INFO("Committing rxon.filter_flags = " "0x%04X\n",
  2679. filter_flags);
  2680. il->staging.filter_flags = cpu_to_le32(filter_flags);
  2681. il3945_commit_rxon(il);
  2682. }
  2683. }
  2684. mutex_unlock(&il->mutex);
  2685. return count;
  2686. }
  2687. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, il3945_show_filter_flags,
  2688. il3945_store_filter_flags);
  2689. static ssize_t
  2690. il3945_show_measurement(struct device *d, struct device_attribute *attr,
  2691. char *buf)
  2692. {
  2693. struct il_priv *il = dev_get_drvdata(d);
  2694. struct il_spectrum_notification measure_report;
  2695. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2696. u8 *data = (u8 *) &measure_report;
  2697. unsigned long flags;
  2698. spin_lock_irqsave(&il->lock, flags);
  2699. if (!(il->measurement_status & MEASUREMENT_READY)) {
  2700. spin_unlock_irqrestore(&il->lock, flags);
  2701. return 0;
  2702. }
  2703. memcpy(&measure_report, &il->measure_report, size);
  2704. il->measurement_status = 0;
  2705. spin_unlock_irqrestore(&il->lock, flags);
  2706. while (size && PAGE_SIZE - len) {
  2707. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2708. PAGE_SIZE - len, 1);
  2709. len = strlen(buf);
  2710. if (PAGE_SIZE - len)
  2711. buf[len++] = '\n';
  2712. ofs += 16;
  2713. size -= min(size, 16U);
  2714. }
  2715. return len;
  2716. }
  2717. static ssize_t
  2718. il3945_store_measurement(struct device *d, struct device_attribute *attr,
  2719. const char *buf, size_t count)
  2720. {
  2721. struct il_priv *il = dev_get_drvdata(d);
  2722. struct ieee80211_measurement_params params = {
  2723. .channel = le16_to_cpu(il->active.channel),
  2724. .start_time = cpu_to_le64(il->_3945.last_tsf),
  2725. .duration = cpu_to_le16(1),
  2726. };
  2727. u8 type = IL_MEASURE_BASIC;
  2728. u8 buffer[32];
  2729. u8 channel;
  2730. if (count) {
  2731. char *p = buffer;
  2732. strncpy(buffer, buf, min(sizeof(buffer), count));
  2733. channel = simple_strtoul(p, NULL, 0);
  2734. if (channel)
  2735. params.channel = channel;
  2736. p = buffer;
  2737. while (*p && *p != ' ')
  2738. p++;
  2739. if (*p)
  2740. type = simple_strtoul(p + 1, NULL, 0);
  2741. }
  2742. D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n",
  2743. type, params.channel, buf);
  2744. il3945_get_measurement(il, &params, type);
  2745. return count;
  2746. }
  2747. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, il3945_show_measurement,
  2748. il3945_store_measurement);
  2749. static ssize_t
  2750. il3945_store_retry_rate(struct device *d, struct device_attribute *attr,
  2751. const char *buf, size_t count)
  2752. {
  2753. struct il_priv *il = dev_get_drvdata(d);
  2754. il->retry_rate = simple_strtoul(buf, NULL, 0);
  2755. if (il->retry_rate <= 0)
  2756. il->retry_rate = 1;
  2757. return count;
  2758. }
  2759. static ssize_t
  2760. il3945_show_retry_rate(struct device *d, struct device_attribute *attr,
  2761. char *buf)
  2762. {
  2763. struct il_priv *il = dev_get_drvdata(d);
  2764. return sprintf(buf, "%d", il->retry_rate);
  2765. }
  2766. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, il3945_show_retry_rate,
  2767. il3945_store_retry_rate);
  2768. static ssize_t
  2769. il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf)
  2770. {
  2771. /* all this shit doesn't belong into sysfs anyway */
  2772. return 0;
  2773. }
  2774. static DEVICE_ATTR(channels, S_IRUSR, il3945_show_channels, NULL);
  2775. static ssize_t
  2776. il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf)
  2777. {
  2778. struct il_priv *il = dev_get_drvdata(d);
  2779. if (!il_is_alive(il))
  2780. return -EAGAIN;
  2781. return sprintf(buf, "%d\n", il3945_mod_params.antenna);
  2782. }
  2783. static ssize_t
  2784. il3945_store_antenna(struct device *d, struct device_attribute *attr,
  2785. const char *buf, size_t count)
  2786. {
  2787. struct il_priv *il __maybe_unused = dev_get_drvdata(d);
  2788. int ant;
  2789. if (count == 0)
  2790. return 0;
  2791. if (sscanf(buf, "%1i", &ant) != 1) {
  2792. D_INFO("not in hex or decimal form.\n");
  2793. return count;
  2794. }
  2795. if (ant >= 0 && ant <= 2) {
  2796. D_INFO("Setting antenna select to %d.\n", ant);
  2797. il3945_mod_params.antenna = (enum il3945_antenna)ant;
  2798. } else
  2799. D_INFO("Bad antenna select value %d.\n", ant);
  2800. return count;
  2801. }
  2802. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, il3945_show_antenna,
  2803. il3945_store_antenna);
  2804. static ssize_t
  2805. il3945_show_status(struct device *d, struct device_attribute *attr, char *buf)
  2806. {
  2807. struct il_priv *il = dev_get_drvdata(d);
  2808. if (!il_is_alive(il))
  2809. return -EAGAIN;
  2810. return sprintf(buf, "0x%08x\n", (int)il->status);
  2811. }
  2812. static DEVICE_ATTR(status, S_IRUGO, il3945_show_status, NULL);
  2813. static ssize_t
  2814. il3945_dump_error_log(struct device *d, struct device_attribute *attr,
  2815. const char *buf, size_t count)
  2816. {
  2817. struct il_priv *il = dev_get_drvdata(d);
  2818. char *p = (char *)buf;
  2819. if (p[0] == '1')
  2820. il3945_dump_nic_error_log(il);
  2821. return strnlen(buf, count);
  2822. }
  2823. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, il3945_dump_error_log);
  2824. /*****************************************************************************
  2825. *
  2826. * driver setup and tear down
  2827. *
  2828. *****************************************************************************/
  2829. static void
  2830. il3945_setup_deferred_work(struct il_priv *il)
  2831. {
  2832. il->workqueue = create_singlethread_workqueue(DRV_NAME);
  2833. init_waitqueue_head(&il->wait_command_queue);
  2834. INIT_WORK(&il->restart, il3945_bg_restart);
  2835. INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
  2836. INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
  2837. INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
  2838. INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
  2839. il_setup_scan_deferred_work(il);
  2840. il3945_hw_setup_deferred_work(il);
  2841. init_timer(&il->watchdog);
  2842. il->watchdog.data = (unsigned long)il;
  2843. il->watchdog.function = il_bg_watchdog;
  2844. tasklet_init(&il->irq_tasklet,
  2845. (void (*)(unsigned long))il3945_irq_tasklet,
  2846. (unsigned long)il);
  2847. }
  2848. static void
  2849. il3945_cancel_deferred_work(struct il_priv *il)
  2850. {
  2851. il3945_hw_cancel_deferred_work(il);
  2852. cancel_delayed_work_sync(&il->init_alive_start);
  2853. cancel_delayed_work(&il->alive_start);
  2854. il_cancel_scan_deferred_work(il);
  2855. }
  2856. static struct attribute *il3945_sysfs_entries[] = {
  2857. &dev_attr_antenna.attr,
  2858. &dev_attr_channels.attr,
  2859. &dev_attr_dump_errors.attr,
  2860. &dev_attr_flags.attr,
  2861. &dev_attr_filter_flags.attr,
  2862. &dev_attr_measurement.attr,
  2863. &dev_attr_retry_rate.attr,
  2864. &dev_attr_status.attr,
  2865. &dev_attr_temperature.attr,
  2866. &dev_attr_tx_power.attr,
  2867. #ifdef CONFIG_IWLEGACY_DEBUG
  2868. &dev_attr_debug_level.attr,
  2869. #endif
  2870. NULL
  2871. };
  2872. static struct attribute_group il3945_attribute_group = {
  2873. .name = NULL, /* put in device directory */
  2874. .attrs = il3945_sysfs_entries,
  2875. };
  2876. struct ieee80211_ops il3945_mac_ops = {
  2877. .tx = il3945_mac_tx,
  2878. .start = il3945_mac_start,
  2879. .stop = il3945_mac_stop,
  2880. .add_interface = il_mac_add_interface,
  2881. .remove_interface = il_mac_remove_interface,
  2882. .change_interface = il_mac_change_interface,
  2883. .config = il_mac_config,
  2884. .configure_filter = il3945_configure_filter,
  2885. .set_key = il3945_mac_set_key,
  2886. .conf_tx = il_mac_conf_tx,
  2887. .reset_tsf = il_mac_reset_tsf,
  2888. .bss_info_changed = il_mac_bss_info_changed,
  2889. .hw_scan = il_mac_hw_scan,
  2890. .sta_add = il3945_mac_sta_add,
  2891. .sta_remove = il_mac_sta_remove,
  2892. .tx_last_beacon = il_mac_tx_last_beacon,
  2893. };
  2894. static int
  2895. il3945_init_drv(struct il_priv *il)
  2896. {
  2897. int ret;
  2898. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  2899. il->retry_rate = 1;
  2900. il->beacon_skb = NULL;
  2901. spin_lock_init(&il->sta_lock);
  2902. spin_lock_init(&il->hcmd_lock);
  2903. INIT_LIST_HEAD(&il->free_frames);
  2904. mutex_init(&il->mutex);
  2905. il->ieee_channels = NULL;
  2906. il->ieee_rates = NULL;
  2907. il->band = IEEE80211_BAND_2GHZ;
  2908. il->iw_mode = NL80211_IFTYPE_STATION;
  2909. il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
  2910. /* initialize force reset */
  2911. il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
  2912. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  2913. IL_WARN("Unsupported EEPROM version: 0x%04X\n",
  2914. eeprom->version);
  2915. ret = -EINVAL;
  2916. goto err;
  2917. }
  2918. ret = il_init_channel_map(il);
  2919. if (ret) {
  2920. IL_ERR("initializing regulatory failed: %d\n", ret);
  2921. goto err;
  2922. }
  2923. /* Set up txpower settings in driver for all channels */
  2924. if (il3945_txpower_set_from_eeprom(il)) {
  2925. ret = -EIO;
  2926. goto err_free_channel_map;
  2927. }
  2928. ret = il_init_geos(il);
  2929. if (ret) {
  2930. IL_ERR("initializing geos failed: %d\n", ret);
  2931. goto err_free_channel_map;
  2932. }
  2933. il3945_init_hw_rates(il, il->ieee_rates);
  2934. return 0;
  2935. err_free_channel_map:
  2936. il_free_channel_map(il);
  2937. err:
  2938. return ret;
  2939. }
  2940. #define IL3945_MAX_PROBE_REQUEST 200
  2941. static int
  2942. il3945_setup_mac(struct il_priv *il)
  2943. {
  2944. int ret;
  2945. struct ieee80211_hw *hw = il->hw;
  2946. hw->rate_control_algorithm = "iwl-3945-rs";
  2947. hw->sta_data_size = sizeof(struct il3945_sta_priv);
  2948. hw->vif_data_size = sizeof(struct il_vif_priv);
  2949. /* Tell mac80211 our characteristics */
  2950. hw->flags = IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_SPECTRUM_MGMT;
  2951. hw->wiphy->interface_modes =
  2952. BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
  2953. hw->wiphy->flags |=
  2954. WIPHY_FLAG_CUSTOM_REGULATORY | WIPHY_FLAG_DISABLE_BEACON_HINTS |
  2955. WIPHY_FLAG_IBSS_RSN;
  2956. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  2957. /* we create the 802.11 header and a zero-length SSID element */
  2958. hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
  2959. /* Default value; 4 EDCA QOS priorities */
  2960. hw->queues = 4;
  2961. if (il->bands[IEEE80211_BAND_2GHZ].n_channels)
  2962. il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  2963. &il->bands[IEEE80211_BAND_2GHZ];
  2964. if (il->bands[IEEE80211_BAND_5GHZ].n_channels)
  2965. il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  2966. &il->bands[IEEE80211_BAND_5GHZ];
  2967. il_leds_init(il);
  2968. ret = ieee80211_register_hw(il->hw);
  2969. if (ret) {
  2970. IL_ERR("Failed to register hw (error %d)\n", ret);
  2971. return ret;
  2972. }
  2973. il->mac80211_registered = 1;
  2974. return 0;
  2975. }
  2976. static int
  2977. il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  2978. {
  2979. int err = 0;
  2980. struct il_priv *il;
  2981. struct ieee80211_hw *hw;
  2982. struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
  2983. struct il3945_eeprom *eeprom;
  2984. unsigned long flags;
  2985. /***********************
  2986. * 1. Allocating HW data
  2987. * ********************/
  2988. hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il3945_mac_ops);
  2989. if (!hw) {
  2990. err = -ENOMEM;
  2991. goto out;
  2992. }
  2993. il = hw->priv;
  2994. il->hw = hw;
  2995. SET_IEEE80211_DEV(hw, &pdev->dev);
  2996. il->cmd_queue = IL39_CMD_QUEUE_NUM;
  2997. /*
  2998. * Disabling hardware scan means that mac80211 will perform scans
  2999. * "the hard way", rather than using device's scan.
  3000. */
  3001. if (il3945_mod_params.disable_hw_scan) {
  3002. D_INFO("Disabling hw_scan\n");
  3003. il3945_mac_ops.hw_scan = NULL;
  3004. }
  3005. D_INFO("*** LOAD DRIVER ***\n");
  3006. il->cfg = cfg;
  3007. il->ops = &il3945_ops;
  3008. #ifdef CONFIG_IWLEGACY_DEBUGFS
  3009. il->debugfs_ops = &il3945_debugfs_ops;
  3010. #endif
  3011. il->pci_dev = pdev;
  3012. il->inta_mask = CSR_INI_SET_MASK;
  3013. /***************************
  3014. * 2. Initializing PCI bus
  3015. * *************************/
  3016. pci_disable_link_state(pdev,
  3017. PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
  3018. PCIE_LINK_STATE_CLKPM);
  3019. if (pci_enable_device(pdev)) {
  3020. err = -ENODEV;
  3021. goto out_ieee80211_free_hw;
  3022. }
  3023. pci_set_master(pdev);
  3024. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3025. if (!err)
  3026. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3027. if (err) {
  3028. IL_WARN("No suitable DMA available.\n");
  3029. goto out_pci_disable_device;
  3030. }
  3031. pci_set_drvdata(pdev, il);
  3032. err = pci_request_regions(pdev, DRV_NAME);
  3033. if (err)
  3034. goto out_pci_disable_device;
  3035. /***********************
  3036. * 3. Read REV Register
  3037. * ********************/
  3038. il->hw_base = pci_ioremap_bar(pdev, 0);
  3039. if (!il->hw_base) {
  3040. err = -ENODEV;
  3041. goto out_pci_release_regions;
  3042. }
  3043. D_INFO("pci_resource_len = 0x%08llx\n",
  3044. (unsigned long long)pci_resource_len(pdev, 0));
  3045. D_INFO("pci_resource_base = %p\n", il->hw_base);
  3046. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3047. * PCI Tx retries from interfering with C3 CPU state */
  3048. pci_write_config_byte(pdev, 0x41, 0x00);
  3049. /* these spin locks will be used in apm_init and EEPROM access
  3050. * we should init now
  3051. */
  3052. spin_lock_init(&il->reg_lock);
  3053. spin_lock_init(&il->lock);
  3054. /*
  3055. * stop and reset the on-board processor just in case it is in a
  3056. * strange state ... like being left stranded by a primary kernel
  3057. * and this is now the kdump kernel trying to start up
  3058. */
  3059. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3060. /***********************
  3061. * 4. Read EEPROM
  3062. * ********************/
  3063. /* Read the EEPROM */
  3064. err = il_eeprom_init(il);
  3065. if (err) {
  3066. IL_ERR("Unable to init EEPROM\n");
  3067. goto out_iounmap;
  3068. }
  3069. /* MAC Address location in EEPROM same for 3945/4965 */
  3070. eeprom = (struct il3945_eeprom *)il->eeprom;
  3071. D_INFO("MAC address: %pM\n", eeprom->mac_address);
  3072. SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
  3073. /***********************
  3074. * 5. Setup HW Constants
  3075. * ********************/
  3076. /* Device-specific setup */
  3077. if (il3945_hw_set_hw_params(il)) {
  3078. IL_ERR("failed to set hw settings\n");
  3079. goto out_eeprom_free;
  3080. }
  3081. /***********************
  3082. * 6. Setup il
  3083. * ********************/
  3084. err = il3945_init_drv(il);
  3085. if (err) {
  3086. IL_ERR("initializing driver failed\n");
  3087. goto out_unset_hw_params;
  3088. }
  3089. IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name);
  3090. /***********************
  3091. * 7. Setup Services
  3092. * ********************/
  3093. spin_lock_irqsave(&il->lock, flags);
  3094. il_disable_interrupts(il);
  3095. spin_unlock_irqrestore(&il->lock, flags);
  3096. pci_enable_msi(il->pci_dev);
  3097. err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
  3098. if (err) {
  3099. IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
  3100. goto out_disable_msi;
  3101. }
  3102. err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
  3103. if (err) {
  3104. IL_ERR("failed to create sysfs device attributes\n");
  3105. goto out_release_irq;
  3106. }
  3107. il_set_rxon_channel(il, &il->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3108. il3945_setup_deferred_work(il);
  3109. il3945_setup_handlers(il);
  3110. il_power_initialize(il);
  3111. /*********************************
  3112. * 8. Setup and Register mac80211
  3113. * *******************************/
  3114. il_enable_interrupts(il);
  3115. err = il3945_setup_mac(il);
  3116. if (err)
  3117. goto out_remove_sysfs;
  3118. err = il_dbgfs_register(il, DRV_NAME);
  3119. if (err)
  3120. IL_ERR("failed to create debugfs files. Ignoring error: %d\n",
  3121. err);
  3122. /* Start monitoring the killswitch */
  3123. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ);
  3124. return 0;
  3125. out_remove_sysfs:
  3126. destroy_workqueue(il->workqueue);
  3127. il->workqueue = NULL;
  3128. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3129. out_release_irq:
  3130. free_irq(il->pci_dev->irq, il);
  3131. out_disable_msi:
  3132. pci_disable_msi(il->pci_dev);
  3133. il_free_geos(il);
  3134. il_free_channel_map(il);
  3135. out_unset_hw_params:
  3136. il3945_unset_hw_params(il);
  3137. out_eeprom_free:
  3138. il_eeprom_free(il);
  3139. out_iounmap:
  3140. iounmap(il->hw_base);
  3141. out_pci_release_regions:
  3142. pci_release_regions(pdev);
  3143. out_pci_disable_device:
  3144. pci_set_drvdata(pdev, NULL);
  3145. pci_disable_device(pdev);
  3146. out_ieee80211_free_hw:
  3147. ieee80211_free_hw(il->hw);
  3148. out:
  3149. return err;
  3150. }
  3151. static void
  3152. il3945_pci_remove(struct pci_dev *pdev)
  3153. {
  3154. struct il_priv *il = pci_get_drvdata(pdev);
  3155. unsigned long flags;
  3156. if (!il)
  3157. return;
  3158. D_INFO("*** UNLOAD DRIVER ***\n");
  3159. il_dbgfs_unregister(il);
  3160. set_bit(S_EXIT_PENDING, &il->status);
  3161. il_leds_exit(il);
  3162. if (il->mac80211_registered) {
  3163. ieee80211_unregister_hw(il->hw);
  3164. il->mac80211_registered = 0;
  3165. } else {
  3166. il3945_down(il);
  3167. }
  3168. /*
  3169. * Make sure device is reset to low power before unloading driver.
  3170. * This may be redundant with il_down(), but there are paths to
  3171. * run il_down() without calling apm_ops.stop(), and there are
  3172. * paths to avoid running il_down() at all before leaving driver.
  3173. * This (inexpensive) call *makes sure* device is reset.
  3174. */
  3175. il_apm_stop(il);
  3176. /* make sure we flush any pending irq or
  3177. * tasklet for the driver
  3178. */
  3179. spin_lock_irqsave(&il->lock, flags);
  3180. il_disable_interrupts(il);
  3181. spin_unlock_irqrestore(&il->lock, flags);
  3182. il3945_synchronize_irq(il);
  3183. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3184. cancel_delayed_work_sync(&il->_3945.rfkill_poll);
  3185. il3945_dealloc_ucode_pci(il);
  3186. if (il->rxq.bd)
  3187. il3945_rx_queue_free(il, &il->rxq);
  3188. il3945_hw_txq_ctx_free(il);
  3189. il3945_unset_hw_params(il);
  3190. /*netif_stop_queue(dev); */
  3191. flush_workqueue(il->workqueue);
  3192. /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
  3193. * il->workqueue... so we can't take down the workqueue
  3194. * until now... */
  3195. destroy_workqueue(il->workqueue);
  3196. il->workqueue = NULL;
  3197. free_irq(pdev->irq, il);
  3198. pci_disable_msi(pdev);
  3199. iounmap(il->hw_base);
  3200. pci_release_regions(pdev);
  3201. pci_disable_device(pdev);
  3202. pci_set_drvdata(pdev, NULL);
  3203. il_free_channel_map(il);
  3204. il_free_geos(il);
  3205. kfree(il->scan_cmd);
  3206. if (il->beacon_skb)
  3207. dev_kfree_skb(il->beacon_skb);
  3208. ieee80211_free_hw(il->hw);
  3209. }
  3210. /*****************************************************************************
  3211. *
  3212. * driver and module entry point
  3213. *
  3214. *****************************************************************************/
  3215. static struct pci_driver il3945_driver = {
  3216. .name = DRV_NAME,
  3217. .id_table = il3945_hw_card_ids,
  3218. .probe = il3945_pci_probe,
  3219. .remove = il3945_pci_remove,
  3220. .driver.pm = IL_LEGACY_PM_OPS,
  3221. };
  3222. static int __init
  3223. il3945_init(void)
  3224. {
  3225. int ret;
  3226. pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3227. pr_info(DRV_COPYRIGHT "\n");
  3228. ret = il3945_rate_control_register();
  3229. if (ret) {
  3230. pr_err("Unable to register rate control algorithm: %d\n", ret);
  3231. return ret;
  3232. }
  3233. ret = pci_register_driver(&il3945_driver);
  3234. if (ret) {
  3235. pr_err("Unable to initialize PCI module\n");
  3236. goto error_register;
  3237. }
  3238. return ret;
  3239. error_register:
  3240. il3945_rate_control_unregister();
  3241. return ret;
  3242. }
  3243. static void __exit
  3244. il3945_exit(void)
  3245. {
  3246. pci_unregister_driver(&il3945_driver);
  3247. il3945_rate_control_unregister();
  3248. }
  3249. MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
  3250. module_param_named(antenna, il3945_mod_params.antenna, int, S_IRUGO);
  3251. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3252. module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, S_IRUGO);
  3253. MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])");
  3254. module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int,
  3255. S_IRUGO);
  3256. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
  3257. #ifdef CONFIG_IWLEGACY_DEBUG
  3258. module_param_named(debug, il_debug_level, uint, S_IRUGO | S_IWUSR);
  3259. MODULE_PARM_DESC(debug, "debug output mask");
  3260. #endif
  3261. module_param_named(fw_restart, il3945_mod_params.restart_fw, int, S_IRUGO);
  3262. MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
  3263. module_exit(il3945_exit);
  3264. module_init(il3945_init);