enic_main.c 63 KB

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  1. /*
  2. * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. *
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/string.h>
  22. #include <linux/errno.h>
  23. #include <linux/types.h>
  24. #include <linux/init.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/workqueue.h>
  27. #include <linux/pci.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/etherdevice.h>
  30. #include <linux/if.h>
  31. #include <linux/if_ether.h>
  32. #include <linux/if_vlan.h>
  33. #include <linux/ethtool.h>
  34. #include <linux/in.h>
  35. #include <linux/ip.h>
  36. #include <linux/ipv6.h>
  37. #include <linux/tcp.h>
  38. #include <linux/rtnetlink.h>
  39. #include <linux/prefetch.h>
  40. #include <net/ip6_checksum.h>
  41. #include "cq_enet_desc.h"
  42. #include "vnic_dev.h"
  43. #include "vnic_intr.h"
  44. #include "vnic_stats.h"
  45. #include "vnic_vic.h"
  46. #include "enic_res.h"
  47. #include "enic.h"
  48. #include "enic_dev.h"
  49. #include "enic_pp.h"
  50. #define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
  51. #define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
  52. #define MAX_TSO (1 << 16)
  53. #define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
  54. #define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
  55. #define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
  56. #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF 0x0071 /* enet SRIOV VF */
  57. /* Supported devices */
  58. static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
  59. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
  60. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
  61. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) },
  62. { 0, } /* end of table */
  63. };
  64. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  65. MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
  66. MODULE_LICENSE("GPL");
  67. MODULE_VERSION(DRV_VERSION);
  68. MODULE_DEVICE_TABLE(pci, enic_id_table);
  69. struct enic_stat {
  70. char name[ETH_GSTRING_LEN];
  71. unsigned int offset;
  72. };
  73. #define ENIC_TX_STAT(stat) \
  74. { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
  75. #define ENIC_RX_STAT(stat) \
  76. { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
  77. static const struct enic_stat enic_tx_stats[] = {
  78. ENIC_TX_STAT(tx_frames_ok),
  79. ENIC_TX_STAT(tx_unicast_frames_ok),
  80. ENIC_TX_STAT(tx_multicast_frames_ok),
  81. ENIC_TX_STAT(tx_broadcast_frames_ok),
  82. ENIC_TX_STAT(tx_bytes_ok),
  83. ENIC_TX_STAT(tx_unicast_bytes_ok),
  84. ENIC_TX_STAT(tx_multicast_bytes_ok),
  85. ENIC_TX_STAT(tx_broadcast_bytes_ok),
  86. ENIC_TX_STAT(tx_drops),
  87. ENIC_TX_STAT(tx_errors),
  88. ENIC_TX_STAT(tx_tso),
  89. };
  90. static const struct enic_stat enic_rx_stats[] = {
  91. ENIC_RX_STAT(rx_frames_ok),
  92. ENIC_RX_STAT(rx_frames_total),
  93. ENIC_RX_STAT(rx_unicast_frames_ok),
  94. ENIC_RX_STAT(rx_multicast_frames_ok),
  95. ENIC_RX_STAT(rx_broadcast_frames_ok),
  96. ENIC_RX_STAT(rx_bytes_ok),
  97. ENIC_RX_STAT(rx_unicast_bytes_ok),
  98. ENIC_RX_STAT(rx_multicast_bytes_ok),
  99. ENIC_RX_STAT(rx_broadcast_bytes_ok),
  100. ENIC_RX_STAT(rx_drop),
  101. ENIC_RX_STAT(rx_no_bufs),
  102. ENIC_RX_STAT(rx_errors),
  103. ENIC_RX_STAT(rx_rss),
  104. ENIC_RX_STAT(rx_crc_errors),
  105. ENIC_RX_STAT(rx_frames_64),
  106. ENIC_RX_STAT(rx_frames_127),
  107. ENIC_RX_STAT(rx_frames_255),
  108. ENIC_RX_STAT(rx_frames_511),
  109. ENIC_RX_STAT(rx_frames_1023),
  110. ENIC_RX_STAT(rx_frames_1518),
  111. ENIC_RX_STAT(rx_frames_to_max),
  112. };
  113. static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
  114. static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
  115. int enic_is_dynamic(struct enic *enic)
  116. {
  117. return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
  118. }
  119. int enic_sriov_enabled(struct enic *enic)
  120. {
  121. return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0;
  122. }
  123. static int enic_is_sriov_vf(struct enic *enic)
  124. {
  125. return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
  126. }
  127. int enic_is_valid_vf(struct enic *enic, int vf)
  128. {
  129. #ifdef CONFIG_PCI_IOV
  130. return vf >= 0 && vf < enic->num_vfs;
  131. #else
  132. return 0;
  133. #endif
  134. }
  135. static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq)
  136. {
  137. return rq;
  138. }
  139. static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)
  140. {
  141. return enic->rq_count + wq;
  142. }
  143. static inline unsigned int enic_legacy_io_intr(void)
  144. {
  145. return 0;
  146. }
  147. static inline unsigned int enic_legacy_err_intr(void)
  148. {
  149. return 1;
  150. }
  151. static inline unsigned int enic_legacy_notify_intr(void)
  152. {
  153. return 2;
  154. }
  155. static inline unsigned int enic_msix_rq_intr(struct enic *enic, unsigned int rq)
  156. {
  157. return enic->cq[enic_cq_rq(enic, rq)].interrupt_offset;
  158. }
  159. static inline unsigned int enic_msix_wq_intr(struct enic *enic, unsigned int wq)
  160. {
  161. return enic->cq[enic_cq_wq(enic, wq)].interrupt_offset;
  162. }
  163. static inline unsigned int enic_msix_err_intr(struct enic *enic)
  164. {
  165. return enic->rq_count + enic->wq_count;
  166. }
  167. static inline unsigned int enic_msix_notify_intr(struct enic *enic)
  168. {
  169. return enic->rq_count + enic->wq_count + 1;
  170. }
  171. static int enic_get_settings(struct net_device *netdev,
  172. struct ethtool_cmd *ecmd)
  173. {
  174. struct enic *enic = netdev_priv(netdev);
  175. ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
  176. ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
  177. ecmd->port = PORT_FIBRE;
  178. ecmd->transceiver = XCVR_EXTERNAL;
  179. if (netif_carrier_ok(netdev)) {
  180. ethtool_cmd_speed_set(ecmd, vnic_dev_port_speed(enic->vdev));
  181. ecmd->duplex = DUPLEX_FULL;
  182. } else {
  183. ethtool_cmd_speed_set(ecmd, -1);
  184. ecmd->duplex = -1;
  185. }
  186. ecmd->autoneg = AUTONEG_DISABLE;
  187. return 0;
  188. }
  189. static void enic_get_drvinfo(struct net_device *netdev,
  190. struct ethtool_drvinfo *drvinfo)
  191. {
  192. struct enic *enic = netdev_priv(netdev);
  193. struct vnic_devcmd_fw_info *fw_info;
  194. enic_dev_fw_info(enic, &fw_info);
  195. strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
  196. strlcpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
  197. strlcpy(drvinfo->fw_version, fw_info->fw_version,
  198. sizeof(drvinfo->fw_version));
  199. strlcpy(drvinfo->bus_info, pci_name(enic->pdev),
  200. sizeof(drvinfo->bus_info));
  201. }
  202. static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
  203. {
  204. unsigned int i;
  205. switch (stringset) {
  206. case ETH_SS_STATS:
  207. for (i = 0; i < enic_n_tx_stats; i++) {
  208. memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
  209. data += ETH_GSTRING_LEN;
  210. }
  211. for (i = 0; i < enic_n_rx_stats; i++) {
  212. memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
  213. data += ETH_GSTRING_LEN;
  214. }
  215. break;
  216. }
  217. }
  218. static int enic_get_sset_count(struct net_device *netdev, int sset)
  219. {
  220. switch (sset) {
  221. case ETH_SS_STATS:
  222. return enic_n_tx_stats + enic_n_rx_stats;
  223. default:
  224. return -EOPNOTSUPP;
  225. }
  226. }
  227. static void enic_get_ethtool_stats(struct net_device *netdev,
  228. struct ethtool_stats *stats, u64 *data)
  229. {
  230. struct enic *enic = netdev_priv(netdev);
  231. struct vnic_stats *vstats;
  232. unsigned int i;
  233. enic_dev_stats_dump(enic, &vstats);
  234. for (i = 0; i < enic_n_tx_stats; i++)
  235. *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
  236. for (i = 0; i < enic_n_rx_stats; i++)
  237. *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
  238. }
  239. static u32 enic_get_msglevel(struct net_device *netdev)
  240. {
  241. struct enic *enic = netdev_priv(netdev);
  242. return enic->msg_enable;
  243. }
  244. static void enic_set_msglevel(struct net_device *netdev, u32 value)
  245. {
  246. struct enic *enic = netdev_priv(netdev);
  247. enic->msg_enable = value;
  248. }
  249. static int enic_get_coalesce(struct net_device *netdev,
  250. struct ethtool_coalesce *ecmd)
  251. {
  252. struct enic *enic = netdev_priv(netdev);
  253. ecmd->tx_coalesce_usecs = enic->tx_coalesce_usecs;
  254. ecmd->rx_coalesce_usecs = enic->rx_coalesce_usecs;
  255. return 0;
  256. }
  257. static int enic_set_coalesce(struct net_device *netdev,
  258. struct ethtool_coalesce *ecmd)
  259. {
  260. struct enic *enic = netdev_priv(netdev);
  261. u32 tx_coalesce_usecs;
  262. u32 rx_coalesce_usecs;
  263. unsigned int i, intr;
  264. tx_coalesce_usecs = min_t(u32, ecmd->tx_coalesce_usecs,
  265. vnic_dev_get_intr_coal_timer_max(enic->vdev));
  266. rx_coalesce_usecs = min_t(u32, ecmd->rx_coalesce_usecs,
  267. vnic_dev_get_intr_coal_timer_max(enic->vdev));
  268. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  269. case VNIC_DEV_INTR_MODE_INTX:
  270. if (tx_coalesce_usecs != rx_coalesce_usecs)
  271. return -EINVAL;
  272. intr = enic_legacy_io_intr();
  273. vnic_intr_coalescing_timer_set(&enic->intr[intr],
  274. tx_coalesce_usecs);
  275. break;
  276. case VNIC_DEV_INTR_MODE_MSI:
  277. if (tx_coalesce_usecs != rx_coalesce_usecs)
  278. return -EINVAL;
  279. vnic_intr_coalescing_timer_set(&enic->intr[0],
  280. tx_coalesce_usecs);
  281. break;
  282. case VNIC_DEV_INTR_MODE_MSIX:
  283. for (i = 0; i < enic->wq_count; i++) {
  284. intr = enic_msix_wq_intr(enic, i);
  285. vnic_intr_coalescing_timer_set(&enic->intr[intr],
  286. tx_coalesce_usecs);
  287. }
  288. for (i = 0; i < enic->rq_count; i++) {
  289. intr = enic_msix_rq_intr(enic, i);
  290. vnic_intr_coalescing_timer_set(&enic->intr[intr],
  291. rx_coalesce_usecs);
  292. }
  293. break;
  294. default:
  295. break;
  296. }
  297. enic->tx_coalesce_usecs = tx_coalesce_usecs;
  298. enic->rx_coalesce_usecs = rx_coalesce_usecs;
  299. return 0;
  300. }
  301. static const struct ethtool_ops enic_ethtool_ops = {
  302. .get_settings = enic_get_settings,
  303. .get_drvinfo = enic_get_drvinfo,
  304. .get_msglevel = enic_get_msglevel,
  305. .set_msglevel = enic_set_msglevel,
  306. .get_link = ethtool_op_get_link,
  307. .get_strings = enic_get_strings,
  308. .get_sset_count = enic_get_sset_count,
  309. .get_ethtool_stats = enic_get_ethtool_stats,
  310. .get_coalesce = enic_get_coalesce,
  311. .set_coalesce = enic_set_coalesce,
  312. };
  313. static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
  314. {
  315. struct enic *enic = vnic_dev_priv(wq->vdev);
  316. if (buf->sop)
  317. pci_unmap_single(enic->pdev, buf->dma_addr,
  318. buf->len, PCI_DMA_TODEVICE);
  319. else
  320. pci_unmap_page(enic->pdev, buf->dma_addr,
  321. buf->len, PCI_DMA_TODEVICE);
  322. if (buf->os_buf)
  323. dev_kfree_skb_any(buf->os_buf);
  324. }
  325. static void enic_wq_free_buf(struct vnic_wq *wq,
  326. struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
  327. {
  328. enic_free_wq_buf(wq, buf);
  329. }
  330. static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  331. u8 type, u16 q_number, u16 completed_index, void *opaque)
  332. {
  333. struct enic *enic = vnic_dev_priv(vdev);
  334. spin_lock(&enic->wq_lock[q_number]);
  335. vnic_wq_service(&enic->wq[q_number], cq_desc,
  336. completed_index, enic_wq_free_buf,
  337. opaque);
  338. if (netif_queue_stopped(enic->netdev) &&
  339. vnic_wq_desc_avail(&enic->wq[q_number]) >=
  340. (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
  341. netif_wake_queue(enic->netdev);
  342. spin_unlock(&enic->wq_lock[q_number]);
  343. return 0;
  344. }
  345. static void enic_log_q_error(struct enic *enic)
  346. {
  347. unsigned int i;
  348. u32 error_status;
  349. for (i = 0; i < enic->wq_count; i++) {
  350. error_status = vnic_wq_error_status(&enic->wq[i]);
  351. if (error_status)
  352. netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
  353. i, error_status);
  354. }
  355. for (i = 0; i < enic->rq_count; i++) {
  356. error_status = vnic_rq_error_status(&enic->rq[i]);
  357. if (error_status)
  358. netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
  359. i, error_status);
  360. }
  361. }
  362. static void enic_msglvl_check(struct enic *enic)
  363. {
  364. u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
  365. if (msg_enable != enic->msg_enable) {
  366. netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
  367. enic->msg_enable, msg_enable);
  368. enic->msg_enable = msg_enable;
  369. }
  370. }
  371. static void enic_mtu_check(struct enic *enic)
  372. {
  373. u32 mtu = vnic_dev_mtu(enic->vdev);
  374. struct net_device *netdev = enic->netdev;
  375. if (mtu && mtu != enic->port_mtu) {
  376. enic->port_mtu = mtu;
  377. if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
  378. mtu = max_t(int, ENIC_MIN_MTU,
  379. min_t(int, ENIC_MAX_MTU, mtu));
  380. if (mtu != netdev->mtu)
  381. schedule_work(&enic->change_mtu_work);
  382. } else {
  383. if (mtu < netdev->mtu)
  384. netdev_warn(netdev,
  385. "interface MTU (%d) set higher "
  386. "than switch port MTU (%d)\n",
  387. netdev->mtu, mtu);
  388. }
  389. }
  390. }
  391. static void enic_link_check(struct enic *enic)
  392. {
  393. int link_status = vnic_dev_link_status(enic->vdev);
  394. int carrier_ok = netif_carrier_ok(enic->netdev);
  395. if (link_status && !carrier_ok) {
  396. netdev_info(enic->netdev, "Link UP\n");
  397. netif_carrier_on(enic->netdev);
  398. } else if (!link_status && carrier_ok) {
  399. netdev_info(enic->netdev, "Link DOWN\n");
  400. netif_carrier_off(enic->netdev);
  401. }
  402. }
  403. static void enic_notify_check(struct enic *enic)
  404. {
  405. enic_msglvl_check(enic);
  406. enic_mtu_check(enic);
  407. enic_link_check(enic);
  408. }
  409. #define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
  410. static irqreturn_t enic_isr_legacy(int irq, void *data)
  411. {
  412. struct net_device *netdev = data;
  413. struct enic *enic = netdev_priv(netdev);
  414. unsigned int io_intr = enic_legacy_io_intr();
  415. unsigned int err_intr = enic_legacy_err_intr();
  416. unsigned int notify_intr = enic_legacy_notify_intr();
  417. u32 pba;
  418. vnic_intr_mask(&enic->intr[io_intr]);
  419. pba = vnic_intr_legacy_pba(enic->legacy_pba);
  420. if (!pba) {
  421. vnic_intr_unmask(&enic->intr[io_intr]);
  422. return IRQ_NONE; /* not our interrupt */
  423. }
  424. if (ENIC_TEST_INTR(pba, notify_intr)) {
  425. vnic_intr_return_all_credits(&enic->intr[notify_intr]);
  426. enic_notify_check(enic);
  427. }
  428. if (ENIC_TEST_INTR(pba, err_intr)) {
  429. vnic_intr_return_all_credits(&enic->intr[err_intr]);
  430. enic_log_q_error(enic);
  431. /* schedule recovery from WQ/RQ error */
  432. schedule_work(&enic->reset);
  433. return IRQ_HANDLED;
  434. }
  435. if (ENIC_TEST_INTR(pba, io_intr)) {
  436. if (napi_schedule_prep(&enic->napi[0]))
  437. __napi_schedule(&enic->napi[0]);
  438. } else {
  439. vnic_intr_unmask(&enic->intr[io_intr]);
  440. }
  441. return IRQ_HANDLED;
  442. }
  443. static irqreturn_t enic_isr_msi(int irq, void *data)
  444. {
  445. struct enic *enic = data;
  446. /* With MSI, there is no sharing of interrupts, so this is
  447. * our interrupt and there is no need to ack it. The device
  448. * is not providing per-vector masking, so the OS will not
  449. * write to PCI config space to mask/unmask the interrupt.
  450. * We're using mask_on_assertion for MSI, so the device
  451. * automatically masks the interrupt when the interrupt is
  452. * generated. Later, when exiting polling, the interrupt
  453. * will be unmasked (see enic_poll).
  454. *
  455. * Also, the device uses the same PCIe Traffic Class (TC)
  456. * for Memory Write data and MSI, so there are no ordering
  457. * issues; the MSI will always arrive at the Root Complex
  458. * _after_ corresponding Memory Writes (i.e. descriptor
  459. * writes).
  460. */
  461. napi_schedule(&enic->napi[0]);
  462. return IRQ_HANDLED;
  463. }
  464. static irqreturn_t enic_isr_msix_rq(int irq, void *data)
  465. {
  466. struct napi_struct *napi = data;
  467. /* schedule NAPI polling for RQ cleanup */
  468. napi_schedule(napi);
  469. return IRQ_HANDLED;
  470. }
  471. static irqreturn_t enic_isr_msix_wq(int irq, void *data)
  472. {
  473. struct enic *enic = data;
  474. unsigned int cq = enic_cq_wq(enic, 0);
  475. unsigned int intr = enic_msix_wq_intr(enic, 0);
  476. unsigned int wq_work_to_do = -1; /* no limit */
  477. unsigned int wq_work_done;
  478. wq_work_done = vnic_cq_service(&enic->cq[cq],
  479. wq_work_to_do, enic_wq_service, NULL);
  480. vnic_intr_return_credits(&enic->intr[intr],
  481. wq_work_done,
  482. 1 /* unmask intr */,
  483. 1 /* reset intr timer */);
  484. return IRQ_HANDLED;
  485. }
  486. static irqreturn_t enic_isr_msix_err(int irq, void *data)
  487. {
  488. struct enic *enic = data;
  489. unsigned int intr = enic_msix_err_intr(enic);
  490. vnic_intr_return_all_credits(&enic->intr[intr]);
  491. enic_log_q_error(enic);
  492. /* schedule recovery from WQ/RQ error */
  493. schedule_work(&enic->reset);
  494. return IRQ_HANDLED;
  495. }
  496. static irqreturn_t enic_isr_msix_notify(int irq, void *data)
  497. {
  498. struct enic *enic = data;
  499. unsigned int intr = enic_msix_notify_intr(enic);
  500. vnic_intr_return_all_credits(&enic->intr[intr]);
  501. enic_notify_check(enic);
  502. return IRQ_HANDLED;
  503. }
  504. static inline void enic_queue_wq_skb_cont(struct enic *enic,
  505. struct vnic_wq *wq, struct sk_buff *skb,
  506. unsigned int len_left, int loopback)
  507. {
  508. const skb_frag_t *frag;
  509. /* Queue additional data fragments */
  510. for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
  511. len_left -= skb_frag_size(frag);
  512. enic_queue_wq_desc_cont(wq, skb,
  513. skb_frag_dma_map(&enic->pdev->dev,
  514. frag, 0, skb_frag_size(frag),
  515. DMA_TO_DEVICE),
  516. skb_frag_size(frag),
  517. (len_left == 0), /* EOP? */
  518. loopback);
  519. }
  520. }
  521. static inline void enic_queue_wq_skb_vlan(struct enic *enic,
  522. struct vnic_wq *wq, struct sk_buff *skb,
  523. int vlan_tag_insert, unsigned int vlan_tag, int loopback)
  524. {
  525. unsigned int head_len = skb_headlen(skb);
  526. unsigned int len_left = skb->len - head_len;
  527. int eop = (len_left == 0);
  528. /* Queue the main skb fragment. The fragments are no larger
  529. * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
  530. * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
  531. * per fragment is queued.
  532. */
  533. enic_queue_wq_desc(wq, skb,
  534. pci_map_single(enic->pdev, skb->data,
  535. head_len, PCI_DMA_TODEVICE),
  536. head_len,
  537. vlan_tag_insert, vlan_tag,
  538. eop, loopback);
  539. if (!eop)
  540. enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
  541. }
  542. static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
  543. struct vnic_wq *wq, struct sk_buff *skb,
  544. int vlan_tag_insert, unsigned int vlan_tag, int loopback)
  545. {
  546. unsigned int head_len = skb_headlen(skb);
  547. unsigned int len_left = skb->len - head_len;
  548. unsigned int hdr_len = skb_checksum_start_offset(skb);
  549. unsigned int csum_offset = hdr_len + skb->csum_offset;
  550. int eop = (len_left == 0);
  551. /* Queue the main skb fragment. The fragments are no larger
  552. * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
  553. * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
  554. * per fragment is queued.
  555. */
  556. enic_queue_wq_desc_csum_l4(wq, skb,
  557. pci_map_single(enic->pdev, skb->data,
  558. head_len, PCI_DMA_TODEVICE),
  559. head_len,
  560. csum_offset,
  561. hdr_len,
  562. vlan_tag_insert, vlan_tag,
  563. eop, loopback);
  564. if (!eop)
  565. enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
  566. }
  567. static inline void enic_queue_wq_skb_tso(struct enic *enic,
  568. struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
  569. int vlan_tag_insert, unsigned int vlan_tag, int loopback)
  570. {
  571. unsigned int frag_len_left = skb_headlen(skb);
  572. unsigned int len_left = skb->len - frag_len_left;
  573. unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  574. int eop = (len_left == 0);
  575. unsigned int len;
  576. dma_addr_t dma_addr;
  577. unsigned int offset = 0;
  578. skb_frag_t *frag;
  579. /* Preload TCP csum field with IP pseudo hdr calculated
  580. * with IP length set to zero. HW will later add in length
  581. * to each TCP segment resulting from the TSO.
  582. */
  583. if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
  584. ip_hdr(skb)->check = 0;
  585. tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
  586. ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
  587. } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
  588. tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
  589. &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
  590. }
  591. /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
  592. * for the main skb fragment
  593. */
  594. while (frag_len_left) {
  595. len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
  596. dma_addr = pci_map_single(enic->pdev, skb->data + offset,
  597. len, PCI_DMA_TODEVICE);
  598. enic_queue_wq_desc_tso(wq, skb,
  599. dma_addr,
  600. len,
  601. mss, hdr_len,
  602. vlan_tag_insert, vlan_tag,
  603. eop && (len == frag_len_left), loopback);
  604. frag_len_left -= len;
  605. offset += len;
  606. }
  607. if (eop)
  608. return;
  609. /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
  610. * for additional data fragments
  611. */
  612. for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
  613. len_left -= skb_frag_size(frag);
  614. frag_len_left = skb_frag_size(frag);
  615. offset = 0;
  616. while (frag_len_left) {
  617. len = min(frag_len_left,
  618. (unsigned int)WQ_ENET_MAX_DESC_LEN);
  619. dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag,
  620. offset, len,
  621. DMA_TO_DEVICE);
  622. enic_queue_wq_desc_cont(wq, skb,
  623. dma_addr,
  624. len,
  625. (len_left == 0) &&
  626. (len == frag_len_left), /* EOP? */
  627. loopback);
  628. frag_len_left -= len;
  629. offset += len;
  630. }
  631. }
  632. }
  633. static inline void enic_queue_wq_skb(struct enic *enic,
  634. struct vnic_wq *wq, struct sk_buff *skb)
  635. {
  636. unsigned int mss = skb_shinfo(skb)->gso_size;
  637. unsigned int vlan_tag = 0;
  638. int vlan_tag_insert = 0;
  639. int loopback = 0;
  640. if (vlan_tx_tag_present(skb)) {
  641. /* VLAN tag from trunking driver */
  642. vlan_tag_insert = 1;
  643. vlan_tag = vlan_tx_tag_get(skb);
  644. } else if (enic->loop_enable) {
  645. vlan_tag = enic->loop_tag;
  646. loopback = 1;
  647. }
  648. if (mss)
  649. enic_queue_wq_skb_tso(enic, wq, skb, mss,
  650. vlan_tag_insert, vlan_tag, loopback);
  651. else if (skb->ip_summed == CHECKSUM_PARTIAL)
  652. enic_queue_wq_skb_csum_l4(enic, wq, skb,
  653. vlan_tag_insert, vlan_tag, loopback);
  654. else
  655. enic_queue_wq_skb_vlan(enic, wq, skb,
  656. vlan_tag_insert, vlan_tag, loopback);
  657. }
  658. /* netif_tx_lock held, process context with BHs disabled, or BH */
  659. static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
  660. struct net_device *netdev)
  661. {
  662. struct enic *enic = netdev_priv(netdev);
  663. struct vnic_wq *wq = &enic->wq[0];
  664. unsigned long flags;
  665. if (skb->len <= 0) {
  666. dev_kfree_skb(skb);
  667. return NETDEV_TX_OK;
  668. }
  669. /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
  670. * which is very likely. In the off chance it's going to take
  671. * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
  672. */
  673. if (skb_shinfo(skb)->gso_size == 0 &&
  674. skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
  675. skb_linearize(skb)) {
  676. dev_kfree_skb(skb);
  677. return NETDEV_TX_OK;
  678. }
  679. spin_lock_irqsave(&enic->wq_lock[0], flags);
  680. if (vnic_wq_desc_avail(wq) <
  681. skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
  682. netif_stop_queue(netdev);
  683. /* This is a hard error, log it */
  684. netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
  685. spin_unlock_irqrestore(&enic->wq_lock[0], flags);
  686. return NETDEV_TX_BUSY;
  687. }
  688. enic_queue_wq_skb(enic, wq, skb);
  689. if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
  690. netif_stop_queue(netdev);
  691. spin_unlock_irqrestore(&enic->wq_lock[0], flags);
  692. return NETDEV_TX_OK;
  693. }
  694. /* dev_base_lock rwlock held, nominally process context */
  695. static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev,
  696. struct rtnl_link_stats64 *net_stats)
  697. {
  698. struct enic *enic = netdev_priv(netdev);
  699. struct vnic_stats *stats;
  700. enic_dev_stats_dump(enic, &stats);
  701. net_stats->tx_packets = stats->tx.tx_frames_ok;
  702. net_stats->tx_bytes = stats->tx.tx_bytes_ok;
  703. net_stats->tx_errors = stats->tx.tx_errors;
  704. net_stats->tx_dropped = stats->tx.tx_drops;
  705. net_stats->rx_packets = stats->rx.rx_frames_ok;
  706. net_stats->rx_bytes = stats->rx.rx_bytes_ok;
  707. net_stats->rx_errors = stats->rx.rx_errors;
  708. net_stats->multicast = stats->rx.rx_multicast_frames_ok;
  709. net_stats->rx_over_errors = enic->rq_truncated_pkts;
  710. net_stats->rx_crc_errors = enic->rq_bad_fcs;
  711. net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
  712. return net_stats;
  713. }
  714. void enic_reset_addr_lists(struct enic *enic)
  715. {
  716. enic->mc_count = 0;
  717. enic->uc_count = 0;
  718. enic->flags = 0;
  719. }
  720. static int enic_set_mac_addr(struct net_device *netdev, char *addr)
  721. {
  722. struct enic *enic = netdev_priv(netdev);
  723. if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
  724. if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
  725. return -EADDRNOTAVAIL;
  726. } else {
  727. if (!is_valid_ether_addr(addr))
  728. return -EADDRNOTAVAIL;
  729. }
  730. memcpy(netdev->dev_addr, addr, netdev->addr_len);
  731. netdev->addr_assign_type &= ~NET_ADDR_RANDOM;
  732. return 0;
  733. }
  734. static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
  735. {
  736. struct enic *enic = netdev_priv(netdev);
  737. struct sockaddr *saddr = p;
  738. char *addr = saddr->sa_data;
  739. int err;
  740. if (netif_running(enic->netdev)) {
  741. err = enic_dev_del_station_addr(enic);
  742. if (err)
  743. return err;
  744. }
  745. err = enic_set_mac_addr(netdev, addr);
  746. if (err)
  747. return err;
  748. if (netif_running(enic->netdev)) {
  749. err = enic_dev_add_station_addr(enic);
  750. if (err)
  751. return err;
  752. }
  753. return err;
  754. }
  755. static int enic_set_mac_address(struct net_device *netdev, void *p)
  756. {
  757. struct sockaddr *saddr = p;
  758. char *addr = saddr->sa_data;
  759. struct enic *enic = netdev_priv(netdev);
  760. int err;
  761. err = enic_dev_del_station_addr(enic);
  762. if (err)
  763. return err;
  764. err = enic_set_mac_addr(netdev, addr);
  765. if (err)
  766. return err;
  767. return enic_dev_add_station_addr(enic);
  768. }
  769. static void enic_update_multicast_addr_list(struct enic *enic)
  770. {
  771. struct net_device *netdev = enic->netdev;
  772. struct netdev_hw_addr *ha;
  773. unsigned int mc_count = netdev_mc_count(netdev);
  774. u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
  775. unsigned int i, j;
  776. if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS) {
  777. netdev_warn(netdev, "Registering only %d out of %d "
  778. "multicast addresses\n",
  779. ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
  780. mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
  781. }
  782. /* Is there an easier way? Trying to minimize to
  783. * calls to add/del multicast addrs. We keep the
  784. * addrs from the last call in enic->mc_addr and
  785. * look for changes to add/del.
  786. */
  787. i = 0;
  788. netdev_for_each_mc_addr(ha, netdev) {
  789. if (i == mc_count)
  790. break;
  791. memcpy(mc_addr[i++], ha->addr, ETH_ALEN);
  792. }
  793. for (i = 0; i < enic->mc_count; i++) {
  794. for (j = 0; j < mc_count; j++)
  795. if (ether_addr_equal(enic->mc_addr[i], mc_addr[j]))
  796. break;
  797. if (j == mc_count)
  798. enic_dev_del_addr(enic, enic->mc_addr[i]);
  799. }
  800. for (i = 0; i < mc_count; i++) {
  801. for (j = 0; j < enic->mc_count; j++)
  802. if (ether_addr_equal(mc_addr[i], enic->mc_addr[j]))
  803. break;
  804. if (j == enic->mc_count)
  805. enic_dev_add_addr(enic, mc_addr[i]);
  806. }
  807. /* Save the list to compare against next time
  808. */
  809. for (i = 0; i < mc_count; i++)
  810. memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
  811. enic->mc_count = mc_count;
  812. }
  813. static void enic_update_unicast_addr_list(struct enic *enic)
  814. {
  815. struct net_device *netdev = enic->netdev;
  816. struct netdev_hw_addr *ha;
  817. unsigned int uc_count = netdev_uc_count(netdev);
  818. u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN];
  819. unsigned int i, j;
  820. if (uc_count > ENIC_UNICAST_PERFECT_FILTERS) {
  821. netdev_warn(netdev, "Registering only %d out of %d "
  822. "unicast addresses\n",
  823. ENIC_UNICAST_PERFECT_FILTERS, uc_count);
  824. uc_count = ENIC_UNICAST_PERFECT_FILTERS;
  825. }
  826. /* Is there an easier way? Trying to minimize to
  827. * calls to add/del unicast addrs. We keep the
  828. * addrs from the last call in enic->uc_addr and
  829. * look for changes to add/del.
  830. */
  831. i = 0;
  832. netdev_for_each_uc_addr(ha, netdev) {
  833. if (i == uc_count)
  834. break;
  835. memcpy(uc_addr[i++], ha->addr, ETH_ALEN);
  836. }
  837. for (i = 0; i < enic->uc_count; i++) {
  838. for (j = 0; j < uc_count; j++)
  839. if (ether_addr_equal(enic->uc_addr[i], uc_addr[j]))
  840. break;
  841. if (j == uc_count)
  842. enic_dev_del_addr(enic, enic->uc_addr[i]);
  843. }
  844. for (i = 0; i < uc_count; i++) {
  845. for (j = 0; j < enic->uc_count; j++)
  846. if (ether_addr_equal(uc_addr[i], enic->uc_addr[j]))
  847. break;
  848. if (j == enic->uc_count)
  849. enic_dev_add_addr(enic, uc_addr[i]);
  850. }
  851. /* Save the list to compare against next time
  852. */
  853. for (i = 0; i < uc_count; i++)
  854. memcpy(enic->uc_addr[i], uc_addr[i], ETH_ALEN);
  855. enic->uc_count = uc_count;
  856. }
  857. /* netif_tx_lock held, BHs disabled */
  858. static void enic_set_rx_mode(struct net_device *netdev)
  859. {
  860. struct enic *enic = netdev_priv(netdev);
  861. int directed = 1;
  862. int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
  863. int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
  864. int promisc = (netdev->flags & IFF_PROMISC) ||
  865. netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
  866. int allmulti = (netdev->flags & IFF_ALLMULTI) ||
  867. netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
  868. unsigned int flags = netdev->flags |
  869. (allmulti ? IFF_ALLMULTI : 0) |
  870. (promisc ? IFF_PROMISC : 0);
  871. if (enic->flags != flags) {
  872. enic->flags = flags;
  873. enic_dev_packet_filter(enic, directed,
  874. multicast, broadcast, promisc, allmulti);
  875. }
  876. if (!promisc) {
  877. enic_update_unicast_addr_list(enic);
  878. if (!allmulti)
  879. enic_update_multicast_addr_list(enic);
  880. }
  881. }
  882. /* netif_tx_lock held, BHs disabled */
  883. static void enic_tx_timeout(struct net_device *netdev)
  884. {
  885. struct enic *enic = netdev_priv(netdev);
  886. schedule_work(&enic->reset);
  887. }
  888. static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
  889. {
  890. struct enic *enic = netdev_priv(netdev);
  891. struct enic_port_profile *pp;
  892. int err;
  893. ENIC_PP_BY_INDEX(enic, vf, pp, &err);
  894. if (err)
  895. return err;
  896. if (is_valid_ether_addr(mac) || is_zero_ether_addr(mac)) {
  897. if (vf == PORT_SELF_VF) {
  898. memcpy(pp->vf_mac, mac, ETH_ALEN);
  899. return 0;
  900. } else {
  901. /*
  902. * For sriov vf's set the mac in hw
  903. */
  904. ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
  905. vnic_dev_set_mac_addr, mac);
  906. return enic_dev_status_to_errno(err);
  907. }
  908. } else
  909. return -EINVAL;
  910. }
  911. static int enic_set_vf_port(struct net_device *netdev, int vf,
  912. struct nlattr *port[])
  913. {
  914. struct enic *enic = netdev_priv(netdev);
  915. struct enic_port_profile prev_pp;
  916. struct enic_port_profile *pp;
  917. int err = 0, restore_pp = 1;
  918. ENIC_PP_BY_INDEX(enic, vf, pp, &err);
  919. if (err)
  920. return err;
  921. if (!port[IFLA_PORT_REQUEST])
  922. return -EOPNOTSUPP;
  923. memcpy(&prev_pp, pp, sizeof(*enic->pp));
  924. memset(pp, 0, sizeof(*enic->pp));
  925. pp->set |= ENIC_SET_REQUEST;
  926. pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]);
  927. if (port[IFLA_PORT_PROFILE]) {
  928. pp->set |= ENIC_SET_NAME;
  929. memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]),
  930. PORT_PROFILE_MAX);
  931. }
  932. if (port[IFLA_PORT_INSTANCE_UUID]) {
  933. pp->set |= ENIC_SET_INSTANCE;
  934. memcpy(pp->instance_uuid,
  935. nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
  936. }
  937. if (port[IFLA_PORT_HOST_UUID]) {
  938. pp->set |= ENIC_SET_HOST;
  939. memcpy(pp->host_uuid,
  940. nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
  941. }
  942. if (vf == PORT_SELF_VF) {
  943. /* Special case handling: mac came from IFLA_VF_MAC */
  944. if (!is_zero_ether_addr(prev_pp.vf_mac))
  945. memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN);
  946. if (is_zero_ether_addr(netdev->dev_addr))
  947. eth_hw_addr_random(netdev);
  948. } else {
  949. /* SR-IOV VF: get mac from adapter */
  950. ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
  951. vnic_dev_get_mac_addr, pp->mac_addr);
  952. if (err) {
  953. netdev_err(netdev, "Error getting mac for vf %d\n", vf);
  954. memcpy(pp, &prev_pp, sizeof(*pp));
  955. return enic_dev_status_to_errno(err);
  956. }
  957. }
  958. err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp);
  959. if (err) {
  960. if (restore_pp) {
  961. /* Things are still the way they were: Implicit
  962. * DISASSOCIATE failed
  963. */
  964. memcpy(pp, &prev_pp, sizeof(*pp));
  965. } else {
  966. memset(pp, 0, sizeof(*pp));
  967. if (vf == PORT_SELF_VF)
  968. memset(netdev->dev_addr, 0, ETH_ALEN);
  969. }
  970. } else {
  971. /* Set flag to indicate that the port assoc/disassoc
  972. * request has been sent out to fw
  973. */
  974. pp->set |= ENIC_PORT_REQUEST_APPLIED;
  975. /* If DISASSOCIATE, clean up all assigned/saved macaddresses */
  976. if (pp->request == PORT_REQUEST_DISASSOCIATE) {
  977. memset(pp->mac_addr, 0, ETH_ALEN);
  978. if (vf == PORT_SELF_VF)
  979. memset(netdev->dev_addr, 0, ETH_ALEN);
  980. }
  981. }
  982. if (vf == PORT_SELF_VF)
  983. memset(pp->vf_mac, 0, ETH_ALEN);
  984. return err;
  985. }
  986. static int enic_get_vf_port(struct net_device *netdev, int vf,
  987. struct sk_buff *skb)
  988. {
  989. struct enic *enic = netdev_priv(netdev);
  990. u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
  991. struct enic_port_profile *pp;
  992. int err;
  993. ENIC_PP_BY_INDEX(enic, vf, pp, &err);
  994. if (err)
  995. return err;
  996. if (!(pp->set & ENIC_PORT_REQUEST_APPLIED))
  997. return -ENODATA;
  998. err = enic_process_get_pp_request(enic, vf, pp->request, &response);
  999. if (err)
  1000. return err;
  1001. if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp->request) ||
  1002. nla_put_u16(skb, IFLA_PORT_RESPONSE, response) ||
  1003. ((pp->set & ENIC_SET_NAME) &&
  1004. nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp->name)) ||
  1005. ((pp->set & ENIC_SET_INSTANCE) &&
  1006. nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
  1007. pp->instance_uuid)) ||
  1008. ((pp->set & ENIC_SET_HOST) &&
  1009. nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp->host_uuid)))
  1010. goto nla_put_failure;
  1011. return 0;
  1012. nla_put_failure:
  1013. return -EMSGSIZE;
  1014. }
  1015. static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
  1016. {
  1017. struct enic *enic = vnic_dev_priv(rq->vdev);
  1018. if (!buf->os_buf)
  1019. return;
  1020. pci_unmap_single(enic->pdev, buf->dma_addr,
  1021. buf->len, PCI_DMA_FROMDEVICE);
  1022. dev_kfree_skb_any(buf->os_buf);
  1023. }
  1024. static int enic_rq_alloc_buf(struct vnic_rq *rq)
  1025. {
  1026. struct enic *enic = vnic_dev_priv(rq->vdev);
  1027. struct net_device *netdev = enic->netdev;
  1028. struct sk_buff *skb;
  1029. unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
  1030. unsigned int os_buf_index = 0;
  1031. dma_addr_t dma_addr;
  1032. skb = netdev_alloc_skb_ip_align(netdev, len);
  1033. if (!skb)
  1034. return -ENOMEM;
  1035. dma_addr = pci_map_single(enic->pdev, skb->data,
  1036. len, PCI_DMA_FROMDEVICE);
  1037. enic_queue_rq_desc(rq, skb, os_buf_index,
  1038. dma_addr, len);
  1039. return 0;
  1040. }
  1041. static void enic_rq_indicate_buf(struct vnic_rq *rq,
  1042. struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
  1043. int skipped, void *opaque)
  1044. {
  1045. struct enic *enic = vnic_dev_priv(rq->vdev);
  1046. struct net_device *netdev = enic->netdev;
  1047. struct sk_buff *skb;
  1048. u8 type, color, eop, sop, ingress_port, vlan_stripped;
  1049. u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
  1050. u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
  1051. u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
  1052. u8 packet_error;
  1053. u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
  1054. u32 rss_hash;
  1055. if (skipped)
  1056. return;
  1057. skb = buf->os_buf;
  1058. prefetch(skb->data - NET_IP_ALIGN);
  1059. pci_unmap_single(enic->pdev, buf->dma_addr,
  1060. buf->len, PCI_DMA_FROMDEVICE);
  1061. cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
  1062. &type, &color, &q_number, &completed_index,
  1063. &ingress_port, &fcoe, &eop, &sop, &rss_type,
  1064. &csum_not_calc, &rss_hash, &bytes_written,
  1065. &packet_error, &vlan_stripped, &vlan_tci, &checksum,
  1066. &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
  1067. &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
  1068. &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
  1069. &fcs_ok);
  1070. if (packet_error) {
  1071. if (!fcs_ok) {
  1072. if (bytes_written > 0)
  1073. enic->rq_bad_fcs++;
  1074. else if (bytes_written == 0)
  1075. enic->rq_truncated_pkts++;
  1076. }
  1077. dev_kfree_skb_any(skb);
  1078. return;
  1079. }
  1080. if (eop && bytes_written > 0) {
  1081. /* Good receive
  1082. */
  1083. skb_put(skb, bytes_written);
  1084. skb->protocol = eth_type_trans(skb, netdev);
  1085. if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc) {
  1086. skb->csum = htons(checksum);
  1087. skb->ip_summed = CHECKSUM_COMPLETE;
  1088. }
  1089. if (vlan_stripped)
  1090. __vlan_hwaccel_put_tag(skb, vlan_tci);
  1091. if (netdev->features & NETIF_F_GRO)
  1092. napi_gro_receive(&enic->napi[q_number], skb);
  1093. else
  1094. netif_receive_skb(skb);
  1095. } else {
  1096. /* Buffer overflow
  1097. */
  1098. dev_kfree_skb_any(skb);
  1099. }
  1100. }
  1101. static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  1102. u8 type, u16 q_number, u16 completed_index, void *opaque)
  1103. {
  1104. struct enic *enic = vnic_dev_priv(vdev);
  1105. vnic_rq_service(&enic->rq[q_number], cq_desc,
  1106. completed_index, VNIC_RQ_RETURN_DESC,
  1107. enic_rq_indicate_buf, opaque);
  1108. return 0;
  1109. }
  1110. static int enic_poll(struct napi_struct *napi, int budget)
  1111. {
  1112. struct net_device *netdev = napi->dev;
  1113. struct enic *enic = netdev_priv(netdev);
  1114. unsigned int cq_rq = enic_cq_rq(enic, 0);
  1115. unsigned int cq_wq = enic_cq_wq(enic, 0);
  1116. unsigned int intr = enic_legacy_io_intr();
  1117. unsigned int rq_work_to_do = budget;
  1118. unsigned int wq_work_to_do = -1; /* no limit */
  1119. unsigned int work_done, rq_work_done, wq_work_done;
  1120. int err;
  1121. /* Service RQ (first) and WQ
  1122. */
  1123. rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
  1124. rq_work_to_do, enic_rq_service, NULL);
  1125. wq_work_done = vnic_cq_service(&enic->cq[cq_wq],
  1126. wq_work_to_do, enic_wq_service, NULL);
  1127. /* Accumulate intr event credits for this polling
  1128. * cycle. An intr event is the completion of a
  1129. * a WQ or RQ packet.
  1130. */
  1131. work_done = rq_work_done + wq_work_done;
  1132. if (work_done > 0)
  1133. vnic_intr_return_credits(&enic->intr[intr],
  1134. work_done,
  1135. 0 /* don't unmask intr */,
  1136. 0 /* don't reset intr timer */);
  1137. err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
  1138. /* Buffer allocation failed. Stay in polling
  1139. * mode so we can try to fill the ring again.
  1140. */
  1141. if (err)
  1142. rq_work_done = rq_work_to_do;
  1143. if (rq_work_done < rq_work_to_do) {
  1144. /* Some work done, but not enough to stay in polling,
  1145. * exit polling
  1146. */
  1147. napi_complete(napi);
  1148. vnic_intr_unmask(&enic->intr[intr]);
  1149. }
  1150. return rq_work_done;
  1151. }
  1152. static int enic_poll_msix(struct napi_struct *napi, int budget)
  1153. {
  1154. struct net_device *netdev = napi->dev;
  1155. struct enic *enic = netdev_priv(netdev);
  1156. unsigned int rq = (napi - &enic->napi[0]);
  1157. unsigned int cq = enic_cq_rq(enic, rq);
  1158. unsigned int intr = enic_msix_rq_intr(enic, rq);
  1159. unsigned int work_to_do = budget;
  1160. unsigned int work_done;
  1161. int err;
  1162. /* Service RQ
  1163. */
  1164. work_done = vnic_cq_service(&enic->cq[cq],
  1165. work_to_do, enic_rq_service, NULL);
  1166. /* Return intr event credits for this polling
  1167. * cycle. An intr event is the completion of a
  1168. * RQ packet.
  1169. */
  1170. if (work_done > 0)
  1171. vnic_intr_return_credits(&enic->intr[intr],
  1172. work_done,
  1173. 0 /* don't unmask intr */,
  1174. 0 /* don't reset intr timer */);
  1175. err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
  1176. /* Buffer allocation failed. Stay in polling mode
  1177. * so we can try to fill the ring again.
  1178. */
  1179. if (err)
  1180. work_done = work_to_do;
  1181. if (work_done < work_to_do) {
  1182. /* Some work done, but not enough to stay in polling,
  1183. * exit polling
  1184. */
  1185. napi_complete(napi);
  1186. vnic_intr_unmask(&enic->intr[intr]);
  1187. }
  1188. return work_done;
  1189. }
  1190. static void enic_notify_timer(unsigned long data)
  1191. {
  1192. struct enic *enic = (struct enic *)data;
  1193. enic_notify_check(enic);
  1194. mod_timer(&enic->notify_timer,
  1195. round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
  1196. }
  1197. static void enic_free_intr(struct enic *enic)
  1198. {
  1199. struct net_device *netdev = enic->netdev;
  1200. unsigned int i;
  1201. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1202. case VNIC_DEV_INTR_MODE_INTX:
  1203. free_irq(enic->pdev->irq, netdev);
  1204. break;
  1205. case VNIC_DEV_INTR_MODE_MSI:
  1206. free_irq(enic->pdev->irq, enic);
  1207. break;
  1208. case VNIC_DEV_INTR_MODE_MSIX:
  1209. for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
  1210. if (enic->msix[i].requested)
  1211. free_irq(enic->msix_entry[i].vector,
  1212. enic->msix[i].devid);
  1213. break;
  1214. default:
  1215. break;
  1216. }
  1217. }
  1218. static int enic_request_intr(struct enic *enic)
  1219. {
  1220. struct net_device *netdev = enic->netdev;
  1221. unsigned int i, intr;
  1222. int err = 0;
  1223. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1224. case VNIC_DEV_INTR_MODE_INTX:
  1225. err = request_irq(enic->pdev->irq, enic_isr_legacy,
  1226. IRQF_SHARED, netdev->name, netdev);
  1227. break;
  1228. case VNIC_DEV_INTR_MODE_MSI:
  1229. err = request_irq(enic->pdev->irq, enic_isr_msi,
  1230. 0, netdev->name, enic);
  1231. break;
  1232. case VNIC_DEV_INTR_MODE_MSIX:
  1233. for (i = 0; i < enic->rq_count; i++) {
  1234. intr = enic_msix_rq_intr(enic, i);
  1235. sprintf(enic->msix[intr].devname,
  1236. "%.11s-rx-%d", netdev->name, i);
  1237. enic->msix[intr].isr = enic_isr_msix_rq;
  1238. enic->msix[intr].devid = &enic->napi[i];
  1239. }
  1240. for (i = 0; i < enic->wq_count; i++) {
  1241. intr = enic_msix_wq_intr(enic, i);
  1242. sprintf(enic->msix[intr].devname,
  1243. "%.11s-tx-%d", netdev->name, i);
  1244. enic->msix[intr].isr = enic_isr_msix_wq;
  1245. enic->msix[intr].devid = enic;
  1246. }
  1247. intr = enic_msix_err_intr(enic);
  1248. sprintf(enic->msix[intr].devname,
  1249. "%.11s-err", netdev->name);
  1250. enic->msix[intr].isr = enic_isr_msix_err;
  1251. enic->msix[intr].devid = enic;
  1252. intr = enic_msix_notify_intr(enic);
  1253. sprintf(enic->msix[intr].devname,
  1254. "%.11s-notify", netdev->name);
  1255. enic->msix[intr].isr = enic_isr_msix_notify;
  1256. enic->msix[intr].devid = enic;
  1257. for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
  1258. enic->msix[i].requested = 0;
  1259. for (i = 0; i < enic->intr_count; i++) {
  1260. err = request_irq(enic->msix_entry[i].vector,
  1261. enic->msix[i].isr, 0,
  1262. enic->msix[i].devname,
  1263. enic->msix[i].devid);
  1264. if (err) {
  1265. enic_free_intr(enic);
  1266. break;
  1267. }
  1268. enic->msix[i].requested = 1;
  1269. }
  1270. break;
  1271. default:
  1272. break;
  1273. }
  1274. return err;
  1275. }
  1276. static void enic_synchronize_irqs(struct enic *enic)
  1277. {
  1278. unsigned int i;
  1279. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1280. case VNIC_DEV_INTR_MODE_INTX:
  1281. case VNIC_DEV_INTR_MODE_MSI:
  1282. synchronize_irq(enic->pdev->irq);
  1283. break;
  1284. case VNIC_DEV_INTR_MODE_MSIX:
  1285. for (i = 0; i < enic->intr_count; i++)
  1286. synchronize_irq(enic->msix_entry[i].vector);
  1287. break;
  1288. default:
  1289. break;
  1290. }
  1291. }
  1292. static int enic_dev_notify_set(struct enic *enic)
  1293. {
  1294. int err;
  1295. spin_lock(&enic->devcmd_lock);
  1296. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1297. case VNIC_DEV_INTR_MODE_INTX:
  1298. err = vnic_dev_notify_set(enic->vdev,
  1299. enic_legacy_notify_intr());
  1300. break;
  1301. case VNIC_DEV_INTR_MODE_MSIX:
  1302. err = vnic_dev_notify_set(enic->vdev,
  1303. enic_msix_notify_intr(enic));
  1304. break;
  1305. default:
  1306. err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
  1307. break;
  1308. }
  1309. spin_unlock(&enic->devcmd_lock);
  1310. return err;
  1311. }
  1312. static void enic_notify_timer_start(struct enic *enic)
  1313. {
  1314. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1315. case VNIC_DEV_INTR_MODE_MSI:
  1316. mod_timer(&enic->notify_timer, jiffies);
  1317. break;
  1318. default:
  1319. /* Using intr for notification for INTx/MSI-X */
  1320. break;
  1321. }
  1322. }
  1323. /* rtnl lock is held, process context */
  1324. static int enic_open(struct net_device *netdev)
  1325. {
  1326. struct enic *enic = netdev_priv(netdev);
  1327. unsigned int i;
  1328. int err;
  1329. err = enic_request_intr(enic);
  1330. if (err) {
  1331. netdev_err(netdev, "Unable to request irq.\n");
  1332. return err;
  1333. }
  1334. err = enic_dev_notify_set(enic);
  1335. if (err) {
  1336. netdev_err(netdev,
  1337. "Failed to alloc notify buffer, aborting.\n");
  1338. goto err_out_free_intr;
  1339. }
  1340. for (i = 0; i < enic->rq_count; i++) {
  1341. vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
  1342. /* Need at least one buffer on ring to get going */
  1343. if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
  1344. netdev_err(netdev, "Unable to alloc receive buffers\n");
  1345. err = -ENOMEM;
  1346. goto err_out_notify_unset;
  1347. }
  1348. }
  1349. for (i = 0; i < enic->wq_count; i++)
  1350. vnic_wq_enable(&enic->wq[i]);
  1351. for (i = 0; i < enic->rq_count; i++)
  1352. vnic_rq_enable(&enic->rq[i]);
  1353. if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
  1354. enic_dev_add_station_addr(enic);
  1355. enic_set_rx_mode(netdev);
  1356. netif_wake_queue(netdev);
  1357. for (i = 0; i < enic->rq_count; i++)
  1358. napi_enable(&enic->napi[i]);
  1359. enic_dev_enable(enic);
  1360. for (i = 0; i < enic->intr_count; i++)
  1361. vnic_intr_unmask(&enic->intr[i]);
  1362. enic_notify_timer_start(enic);
  1363. return 0;
  1364. err_out_notify_unset:
  1365. enic_dev_notify_unset(enic);
  1366. err_out_free_intr:
  1367. enic_free_intr(enic);
  1368. return err;
  1369. }
  1370. /* rtnl lock is held, process context */
  1371. static int enic_stop(struct net_device *netdev)
  1372. {
  1373. struct enic *enic = netdev_priv(netdev);
  1374. unsigned int i;
  1375. int err;
  1376. for (i = 0; i < enic->intr_count; i++) {
  1377. vnic_intr_mask(&enic->intr[i]);
  1378. (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
  1379. }
  1380. enic_synchronize_irqs(enic);
  1381. del_timer_sync(&enic->notify_timer);
  1382. enic_dev_disable(enic);
  1383. for (i = 0; i < enic->rq_count; i++)
  1384. napi_disable(&enic->napi[i]);
  1385. netif_carrier_off(netdev);
  1386. netif_tx_disable(netdev);
  1387. if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
  1388. enic_dev_del_station_addr(enic);
  1389. for (i = 0; i < enic->wq_count; i++) {
  1390. err = vnic_wq_disable(&enic->wq[i]);
  1391. if (err)
  1392. return err;
  1393. }
  1394. for (i = 0; i < enic->rq_count; i++) {
  1395. err = vnic_rq_disable(&enic->rq[i]);
  1396. if (err)
  1397. return err;
  1398. }
  1399. enic_dev_notify_unset(enic);
  1400. enic_free_intr(enic);
  1401. for (i = 0; i < enic->wq_count; i++)
  1402. vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
  1403. for (i = 0; i < enic->rq_count; i++)
  1404. vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
  1405. for (i = 0; i < enic->cq_count; i++)
  1406. vnic_cq_clean(&enic->cq[i]);
  1407. for (i = 0; i < enic->intr_count; i++)
  1408. vnic_intr_clean(&enic->intr[i]);
  1409. return 0;
  1410. }
  1411. static int enic_change_mtu(struct net_device *netdev, int new_mtu)
  1412. {
  1413. struct enic *enic = netdev_priv(netdev);
  1414. int running = netif_running(netdev);
  1415. if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
  1416. return -EINVAL;
  1417. if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
  1418. return -EOPNOTSUPP;
  1419. if (running)
  1420. enic_stop(netdev);
  1421. netdev->mtu = new_mtu;
  1422. if (netdev->mtu > enic->port_mtu)
  1423. netdev_warn(netdev,
  1424. "interface MTU (%d) set higher than port MTU (%d)\n",
  1425. netdev->mtu, enic->port_mtu);
  1426. if (running)
  1427. enic_open(netdev);
  1428. return 0;
  1429. }
  1430. static void enic_change_mtu_work(struct work_struct *work)
  1431. {
  1432. struct enic *enic = container_of(work, struct enic, change_mtu_work);
  1433. struct net_device *netdev = enic->netdev;
  1434. int new_mtu = vnic_dev_mtu(enic->vdev);
  1435. int err;
  1436. unsigned int i;
  1437. new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu));
  1438. rtnl_lock();
  1439. /* Stop RQ */
  1440. del_timer_sync(&enic->notify_timer);
  1441. for (i = 0; i < enic->rq_count; i++)
  1442. napi_disable(&enic->napi[i]);
  1443. vnic_intr_mask(&enic->intr[0]);
  1444. enic_synchronize_irqs(enic);
  1445. err = vnic_rq_disable(&enic->rq[0]);
  1446. if (err) {
  1447. netdev_err(netdev, "Unable to disable RQ.\n");
  1448. return;
  1449. }
  1450. vnic_rq_clean(&enic->rq[0], enic_free_rq_buf);
  1451. vnic_cq_clean(&enic->cq[0]);
  1452. vnic_intr_clean(&enic->intr[0]);
  1453. /* Fill RQ with new_mtu-sized buffers */
  1454. netdev->mtu = new_mtu;
  1455. vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
  1456. /* Need at least one buffer on ring to get going */
  1457. if (vnic_rq_desc_used(&enic->rq[0]) == 0) {
  1458. netdev_err(netdev, "Unable to alloc receive buffers.\n");
  1459. return;
  1460. }
  1461. /* Start RQ */
  1462. vnic_rq_enable(&enic->rq[0]);
  1463. napi_enable(&enic->napi[0]);
  1464. vnic_intr_unmask(&enic->intr[0]);
  1465. enic_notify_timer_start(enic);
  1466. rtnl_unlock();
  1467. netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);
  1468. }
  1469. #ifdef CONFIG_NET_POLL_CONTROLLER
  1470. static void enic_poll_controller(struct net_device *netdev)
  1471. {
  1472. struct enic *enic = netdev_priv(netdev);
  1473. struct vnic_dev *vdev = enic->vdev;
  1474. unsigned int i, intr;
  1475. switch (vnic_dev_get_intr_mode(vdev)) {
  1476. case VNIC_DEV_INTR_MODE_MSIX:
  1477. for (i = 0; i < enic->rq_count; i++) {
  1478. intr = enic_msix_rq_intr(enic, i);
  1479. enic_isr_msix_rq(enic->msix_entry[intr].vector,
  1480. &enic->napi[i]);
  1481. }
  1482. for (i = 0; i < enic->wq_count; i++) {
  1483. intr = enic_msix_wq_intr(enic, i);
  1484. enic_isr_msix_wq(enic->msix_entry[intr].vector, enic);
  1485. }
  1486. break;
  1487. case VNIC_DEV_INTR_MODE_MSI:
  1488. enic_isr_msi(enic->pdev->irq, enic);
  1489. break;
  1490. case VNIC_DEV_INTR_MODE_INTX:
  1491. enic_isr_legacy(enic->pdev->irq, netdev);
  1492. break;
  1493. default:
  1494. break;
  1495. }
  1496. }
  1497. #endif
  1498. static int enic_dev_wait(struct vnic_dev *vdev,
  1499. int (*start)(struct vnic_dev *, int),
  1500. int (*finished)(struct vnic_dev *, int *),
  1501. int arg)
  1502. {
  1503. unsigned long time;
  1504. int done;
  1505. int err;
  1506. BUG_ON(in_interrupt());
  1507. err = start(vdev, arg);
  1508. if (err)
  1509. return err;
  1510. /* Wait for func to complete...2 seconds max
  1511. */
  1512. time = jiffies + (HZ * 2);
  1513. do {
  1514. err = finished(vdev, &done);
  1515. if (err)
  1516. return err;
  1517. if (done)
  1518. return 0;
  1519. schedule_timeout_uninterruptible(HZ / 10);
  1520. } while (time_after(time, jiffies));
  1521. return -ETIMEDOUT;
  1522. }
  1523. static int enic_dev_open(struct enic *enic)
  1524. {
  1525. int err;
  1526. err = enic_dev_wait(enic->vdev, vnic_dev_open,
  1527. vnic_dev_open_done, 0);
  1528. if (err)
  1529. dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
  1530. err);
  1531. return err;
  1532. }
  1533. static int enic_dev_hang_reset(struct enic *enic)
  1534. {
  1535. int err;
  1536. err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
  1537. vnic_dev_hang_reset_done, 0);
  1538. if (err)
  1539. netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
  1540. err);
  1541. return err;
  1542. }
  1543. static int enic_set_rsskey(struct enic *enic)
  1544. {
  1545. dma_addr_t rss_key_buf_pa;
  1546. union vnic_rss_key *rss_key_buf_va = NULL;
  1547. union vnic_rss_key rss_key = {
  1548. .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101},
  1549. .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101},
  1550. .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115},
  1551. .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108},
  1552. };
  1553. int err;
  1554. rss_key_buf_va = pci_alloc_consistent(enic->pdev,
  1555. sizeof(union vnic_rss_key), &rss_key_buf_pa);
  1556. if (!rss_key_buf_va)
  1557. return -ENOMEM;
  1558. memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
  1559. spin_lock(&enic->devcmd_lock);
  1560. err = enic_set_rss_key(enic,
  1561. rss_key_buf_pa,
  1562. sizeof(union vnic_rss_key));
  1563. spin_unlock(&enic->devcmd_lock);
  1564. pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
  1565. rss_key_buf_va, rss_key_buf_pa);
  1566. return err;
  1567. }
  1568. static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
  1569. {
  1570. dma_addr_t rss_cpu_buf_pa;
  1571. union vnic_rss_cpu *rss_cpu_buf_va = NULL;
  1572. unsigned int i;
  1573. int err;
  1574. rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
  1575. sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
  1576. if (!rss_cpu_buf_va)
  1577. return -ENOMEM;
  1578. for (i = 0; i < (1 << rss_hash_bits); i++)
  1579. (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
  1580. spin_lock(&enic->devcmd_lock);
  1581. err = enic_set_rss_cpu(enic,
  1582. rss_cpu_buf_pa,
  1583. sizeof(union vnic_rss_cpu));
  1584. spin_unlock(&enic->devcmd_lock);
  1585. pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
  1586. rss_cpu_buf_va, rss_cpu_buf_pa);
  1587. return err;
  1588. }
  1589. static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
  1590. u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
  1591. {
  1592. const u8 tso_ipid_split_en = 0;
  1593. const u8 ig_vlan_strip_en = 1;
  1594. int err;
  1595. /* Enable VLAN tag stripping.
  1596. */
  1597. spin_lock(&enic->devcmd_lock);
  1598. err = enic_set_nic_cfg(enic,
  1599. rss_default_cpu, rss_hash_type,
  1600. rss_hash_bits, rss_base_cpu,
  1601. rss_enable, tso_ipid_split_en,
  1602. ig_vlan_strip_en);
  1603. spin_unlock(&enic->devcmd_lock);
  1604. return err;
  1605. }
  1606. static int enic_set_rss_nic_cfg(struct enic *enic)
  1607. {
  1608. struct device *dev = enic_get_dev(enic);
  1609. const u8 rss_default_cpu = 0;
  1610. const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
  1611. NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
  1612. NIC_CFG_RSS_HASH_TYPE_IPV6 |
  1613. NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
  1614. const u8 rss_hash_bits = 7;
  1615. const u8 rss_base_cpu = 0;
  1616. u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
  1617. if (rss_enable) {
  1618. if (!enic_set_rsskey(enic)) {
  1619. if (enic_set_rsscpu(enic, rss_hash_bits)) {
  1620. rss_enable = 0;
  1621. dev_warn(dev, "RSS disabled, "
  1622. "Failed to set RSS cpu indirection table.");
  1623. }
  1624. } else {
  1625. rss_enable = 0;
  1626. dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
  1627. }
  1628. }
  1629. return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
  1630. rss_hash_bits, rss_base_cpu, rss_enable);
  1631. }
  1632. static void enic_reset(struct work_struct *work)
  1633. {
  1634. struct enic *enic = container_of(work, struct enic, reset);
  1635. if (!netif_running(enic->netdev))
  1636. return;
  1637. rtnl_lock();
  1638. enic_dev_hang_notify(enic);
  1639. enic_stop(enic->netdev);
  1640. enic_dev_hang_reset(enic);
  1641. enic_reset_addr_lists(enic);
  1642. enic_init_vnic_resources(enic);
  1643. enic_set_rss_nic_cfg(enic);
  1644. enic_dev_set_ig_vlan_rewrite_mode(enic);
  1645. enic_open(enic->netdev);
  1646. rtnl_unlock();
  1647. }
  1648. static int enic_set_intr_mode(struct enic *enic)
  1649. {
  1650. unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
  1651. unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
  1652. unsigned int i;
  1653. /* Set interrupt mode (INTx, MSI, MSI-X) depending
  1654. * on system capabilities.
  1655. *
  1656. * Try MSI-X first
  1657. *
  1658. * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
  1659. * (the second to last INTR is used for WQ/RQ errors)
  1660. * (the last INTR is used for notifications)
  1661. */
  1662. BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
  1663. for (i = 0; i < n + m + 2; i++)
  1664. enic->msix_entry[i].entry = i;
  1665. /* Use multiple RQs if RSS is enabled
  1666. */
  1667. if (ENIC_SETTING(enic, RSS) &&
  1668. enic->config.intr_mode < 1 &&
  1669. enic->rq_count >= n &&
  1670. enic->wq_count >= m &&
  1671. enic->cq_count >= n + m &&
  1672. enic->intr_count >= n + m + 2) {
  1673. if (!pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
  1674. enic->rq_count = n;
  1675. enic->wq_count = m;
  1676. enic->cq_count = n + m;
  1677. enic->intr_count = n + m + 2;
  1678. vnic_dev_set_intr_mode(enic->vdev,
  1679. VNIC_DEV_INTR_MODE_MSIX);
  1680. return 0;
  1681. }
  1682. }
  1683. if (enic->config.intr_mode < 1 &&
  1684. enic->rq_count >= 1 &&
  1685. enic->wq_count >= m &&
  1686. enic->cq_count >= 1 + m &&
  1687. enic->intr_count >= 1 + m + 2) {
  1688. if (!pci_enable_msix(enic->pdev, enic->msix_entry, 1 + m + 2)) {
  1689. enic->rq_count = 1;
  1690. enic->wq_count = m;
  1691. enic->cq_count = 1 + m;
  1692. enic->intr_count = 1 + m + 2;
  1693. vnic_dev_set_intr_mode(enic->vdev,
  1694. VNIC_DEV_INTR_MODE_MSIX);
  1695. return 0;
  1696. }
  1697. }
  1698. /* Next try MSI
  1699. *
  1700. * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
  1701. */
  1702. if (enic->config.intr_mode < 2 &&
  1703. enic->rq_count >= 1 &&
  1704. enic->wq_count >= 1 &&
  1705. enic->cq_count >= 2 &&
  1706. enic->intr_count >= 1 &&
  1707. !pci_enable_msi(enic->pdev)) {
  1708. enic->rq_count = 1;
  1709. enic->wq_count = 1;
  1710. enic->cq_count = 2;
  1711. enic->intr_count = 1;
  1712. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
  1713. return 0;
  1714. }
  1715. /* Next try INTx
  1716. *
  1717. * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
  1718. * (the first INTR is used for WQ/RQ)
  1719. * (the second INTR is used for WQ/RQ errors)
  1720. * (the last INTR is used for notifications)
  1721. */
  1722. if (enic->config.intr_mode < 3 &&
  1723. enic->rq_count >= 1 &&
  1724. enic->wq_count >= 1 &&
  1725. enic->cq_count >= 2 &&
  1726. enic->intr_count >= 3) {
  1727. enic->rq_count = 1;
  1728. enic->wq_count = 1;
  1729. enic->cq_count = 2;
  1730. enic->intr_count = 3;
  1731. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
  1732. return 0;
  1733. }
  1734. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
  1735. return -EINVAL;
  1736. }
  1737. static void enic_clear_intr_mode(struct enic *enic)
  1738. {
  1739. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1740. case VNIC_DEV_INTR_MODE_MSIX:
  1741. pci_disable_msix(enic->pdev);
  1742. break;
  1743. case VNIC_DEV_INTR_MODE_MSI:
  1744. pci_disable_msi(enic->pdev);
  1745. break;
  1746. default:
  1747. break;
  1748. }
  1749. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
  1750. }
  1751. static const struct net_device_ops enic_netdev_dynamic_ops = {
  1752. .ndo_open = enic_open,
  1753. .ndo_stop = enic_stop,
  1754. .ndo_start_xmit = enic_hard_start_xmit,
  1755. .ndo_get_stats64 = enic_get_stats,
  1756. .ndo_validate_addr = eth_validate_addr,
  1757. .ndo_set_rx_mode = enic_set_rx_mode,
  1758. .ndo_set_mac_address = enic_set_mac_address_dynamic,
  1759. .ndo_change_mtu = enic_change_mtu,
  1760. .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
  1761. .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
  1762. .ndo_tx_timeout = enic_tx_timeout,
  1763. .ndo_set_vf_port = enic_set_vf_port,
  1764. .ndo_get_vf_port = enic_get_vf_port,
  1765. .ndo_set_vf_mac = enic_set_vf_mac,
  1766. #ifdef CONFIG_NET_POLL_CONTROLLER
  1767. .ndo_poll_controller = enic_poll_controller,
  1768. #endif
  1769. };
  1770. static const struct net_device_ops enic_netdev_ops = {
  1771. .ndo_open = enic_open,
  1772. .ndo_stop = enic_stop,
  1773. .ndo_start_xmit = enic_hard_start_xmit,
  1774. .ndo_get_stats64 = enic_get_stats,
  1775. .ndo_validate_addr = eth_validate_addr,
  1776. .ndo_set_mac_address = enic_set_mac_address,
  1777. .ndo_set_rx_mode = enic_set_rx_mode,
  1778. .ndo_change_mtu = enic_change_mtu,
  1779. .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
  1780. .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
  1781. .ndo_tx_timeout = enic_tx_timeout,
  1782. .ndo_set_vf_port = enic_set_vf_port,
  1783. .ndo_get_vf_port = enic_get_vf_port,
  1784. .ndo_set_vf_mac = enic_set_vf_mac,
  1785. #ifdef CONFIG_NET_POLL_CONTROLLER
  1786. .ndo_poll_controller = enic_poll_controller,
  1787. #endif
  1788. };
  1789. static void enic_dev_deinit(struct enic *enic)
  1790. {
  1791. unsigned int i;
  1792. for (i = 0; i < enic->rq_count; i++)
  1793. netif_napi_del(&enic->napi[i]);
  1794. enic_free_vnic_resources(enic);
  1795. enic_clear_intr_mode(enic);
  1796. }
  1797. static int enic_dev_init(struct enic *enic)
  1798. {
  1799. struct device *dev = enic_get_dev(enic);
  1800. struct net_device *netdev = enic->netdev;
  1801. unsigned int i;
  1802. int err;
  1803. /* Get interrupt coalesce timer info */
  1804. err = enic_dev_intr_coal_timer_info(enic);
  1805. if (err) {
  1806. dev_warn(dev, "Using default conversion factor for "
  1807. "interrupt coalesce timer\n");
  1808. vnic_dev_intr_coal_timer_info_default(enic->vdev);
  1809. }
  1810. /* Get vNIC configuration
  1811. */
  1812. err = enic_get_vnic_config(enic);
  1813. if (err) {
  1814. dev_err(dev, "Get vNIC configuration failed, aborting\n");
  1815. return err;
  1816. }
  1817. /* Get available resource counts
  1818. */
  1819. enic_get_res_counts(enic);
  1820. /* Set interrupt mode based on resource counts and system
  1821. * capabilities
  1822. */
  1823. err = enic_set_intr_mode(enic);
  1824. if (err) {
  1825. dev_err(dev, "Failed to set intr mode based on resource "
  1826. "counts and system capabilities, aborting\n");
  1827. return err;
  1828. }
  1829. /* Allocate and configure vNIC resources
  1830. */
  1831. err = enic_alloc_vnic_resources(enic);
  1832. if (err) {
  1833. dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
  1834. goto err_out_free_vnic_resources;
  1835. }
  1836. enic_init_vnic_resources(enic);
  1837. err = enic_set_rss_nic_cfg(enic);
  1838. if (err) {
  1839. dev_err(dev, "Failed to config nic, aborting\n");
  1840. goto err_out_free_vnic_resources;
  1841. }
  1842. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1843. default:
  1844. netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
  1845. break;
  1846. case VNIC_DEV_INTR_MODE_MSIX:
  1847. for (i = 0; i < enic->rq_count; i++)
  1848. netif_napi_add(netdev, &enic->napi[i],
  1849. enic_poll_msix, 64);
  1850. break;
  1851. }
  1852. return 0;
  1853. err_out_free_vnic_resources:
  1854. enic_clear_intr_mode(enic);
  1855. enic_free_vnic_resources(enic);
  1856. return err;
  1857. }
  1858. static void enic_iounmap(struct enic *enic)
  1859. {
  1860. unsigned int i;
  1861. for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
  1862. if (enic->bar[i].vaddr)
  1863. iounmap(enic->bar[i].vaddr);
  1864. }
  1865. static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  1866. {
  1867. struct device *dev = &pdev->dev;
  1868. struct net_device *netdev;
  1869. struct enic *enic;
  1870. int using_dac = 0;
  1871. unsigned int i;
  1872. int err;
  1873. #ifdef CONFIG_PCI_IOV
  1874. int pos = 0;
  1875. #endif
  1876. int num_pps = 1;
  1877. /* Allocate net device structure and initialize. Private
  1878. * instance data is initialized to zero.
  1879. */
  1880. netdev = alloc_etherdev(sizeof(struct enic));
  1881. if (!netdev)
  1882. return -ENOMEM;
  1883. pci_set_drvdata(pdev, netdev);
  1884. SET_NETDEV_DEV(netdev, &pdev->dev);
  1885. enic = netdev_priv(netdev);
  1886. enic->netdev = netdev;
  1887. enic->pdev = pdev;
  1888. /* Setup PCI resources
  1889. */
  1890. err = pci_enable_device_mem(pdev);
  1891. if (err) {
  1892. dev_err(dev, "Cannot enable PCI device, aborting\n");
  1893. goto err_out_free_netdev;
  1894. }
  1895. err = pci_request_regions(pdev, DRV_NAME);
  1896. if (err) {
  1897. dev_err(dev, "Cannot request PCI regions, aborting\n");
  1898. goto err_out_disable_device;
  1899. }
  1900. pci_set_master(pdev);
  1901. /* Query PCI controller on system for DMA addressing
  1902. * limitation for the device. Try 40-bit first, and
  1903. * fail to 32-bit.
  1904. */
  1905. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
  1906. if (err) {
  1907. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1908. if (err) {
  1909. dev_err(dev, "No usable DMA configuration, aborting\n");
  1910. goto err_out_release_regions;
  1911. }
  1912. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  1913. if (err) {
  1914. dev_err(dev, "Unable to obtain %u-bit DMA "
  1915. "for consistent allocations, aborting\n", 32);
  1916. goto err_out_release_regions;
  1917. }
  1918. } else {
  1919. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
  1920. if (err) {
  1921. dev_err(dev, "Unable to obtain %u-bit DMA "
  1922. "for consistent allocations, aborting\n", 40);
  1923. goto err_out_release_regions;
  1924. }
  1925. using_dac = 1;
  1926. }
  1927. /* Map vNIC resources from BAR0-5
  1928. */
  1929. for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
  1930. if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
  1931. continue;
  1932. enic->bar[i].len = pci_resource_len(pdev, i);
  1933. enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
  1934. if (!enic->bar[i].vaddr) {
  1935. dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
  1936. err = -ENODEV;
  1937. goto err_out_iounmap;
  1938. }
  1939. enic->bar[i].bus_addr = pci_resource_start(pdev, i);
  1940. }
  1941. /* Register vNIC device
  1942. */
  1943. enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
  1944. ARRAY_SIZE(enic->bar));
  1945. if (!enic->vdev) {
  1946. dev_err(dev, "vNIC registration failed, aborting\n");
  1947. err = -ENODEV;
  1948. goto err_out_iounmap;
  1949. }
  1950. #ifdef CONFIG_PCI_IOV
  1951. /* Get number of subvnics */
  1952. pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
  1953. if (pos) {
  1954. pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF,
  1955. &enic->num_vfs);
  1956. if (enic->num_vfs) {
  1957. err = pci_enable_sriov(pdev, enic->num_vfs);
  1958. if (err) {
  1959. dev_err(dev, "SRIOV enable failed, aborting."
  1960. " pci_enable_sriov() returned %d\n",
  1961. err);
  1962. goto err_out_vnic_unregister;
  1963. }
  1964. enic->priv_flags |= ENIC_SRIOV_ENABLED;
  1965. num_pps = enic->num_vfs;
  1966. }
  1967. }
  1968. #endif
  1969. /* Allocate structure for port profiles */
  1970. enic->pp = kcalloc(num_pps, sizeof(*enic->pp), GFP_KERNEL);
  1971. if (!enic->pp) {
  1972. err = -ENOMEM;
  1973. goto err_out_disable_sriov_pp;
  1974. }
  1975. /* Issue device open to get device in known state
  1976. */
  1977. err = enic_dev_open(enic);
  1978. if (err) {
  1979. dev_err(dev, "vNIC dev open failed, aborting\n");
  1980. goto err_out_disable_sriov;
  1981. }
  1982. /* Setup devcmd lock
  1983. */
  1984. spin_lock_init(&enic->devcmd_lock);
  1985. /*
  1986. * Set ingress vlan rewrite mode before vnic initialization
  1987. */
  1988. err = enic_dev_set_ig_vlan_rewrite_mode(enic);
  1989. if (err) {
  1990. dev_err(dev,
  1991. "Failed to set ingress vlan rewrite mode, aborting.\n");
  1992. goto err_out_dev_close;
  1993. }
  1994. /* Issue device init to initialize the vnic-to-switch link.
  1995. * We'll start with carrier off and wait for link UP
  1996. * notification later to turn on carrier. We don't need
  1997. * to wait here for the vnic-to-switch link initialization
  1998. * to complete; link UP notification is the indication that
  1999. * the process is complete.
  2000. */
  2001. netif_carrier_off(netdev);
  2002. /* Do not call dev_init for a dynamic vnic.
  2003. * For a dynamic vnic, init_prov_info will be
  2004. * called later by an upper layer.
  2005. */
  2006. if (!enic_is_dynamic(enic)) {
  2007. err = vnic_dev_init(enic->vdev, 0);
  2008. if (err) {
  2009. dev_err(dev, "vNIC dev init failed, aborting\n");
  2010. goto err_out_dev_close;
  2011. }
  2012. }
  2013. err = enic_dev_init(enic);
  2014. if (err) {
  2015. dev_err(dev, "Device initialization failed, aborting\n");
  2016. goto err_out_dev_close;
  2017. }
  2018. /* Setup notification timer, HW reset task, and wq locks
  2019. */
  2020. init_timer(&enic->notify_timer);
  2021. enic->notify_timer.function = enic_notify_timer;
  2022. enic->notify_timer.data = (unsigned long)enic;
  2023. INIT_WORK(&enic->reset, enic_reset);
  2024. INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work);
  2025. for (i = 0; i < enic->wq_count; i++)
  2026. spin_lock_init(&enic->wq_lock[i]);
  2027. /* Register net device
  2028. */
  2029. enic->port_mtu = enic->config.mtu;
  2030. (void)enic_change_mtu(netdev, enic->port_mtu);
  2031. err = enic_set_mac_addr(netdev, enic->mac_addr);
  2032. if (err) {
  2033. dev_err(dev, "Invalid MAC address, aborting\n");
  2034. goto err_out_dev_deinit;
  2035. }
  2036. enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
  2037. enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
  2038. if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
  2039. netdev->netdev_ops = &enic_netdev_dynamic_ops;
  2040. else
  2041. netdev->netdev_ops = &enic_netdev_ops;
  2042. netdev->watchdog_timeo = 2 * HZ;
  2043. netdev->ethtool_ops = &enic_ethtool_ops;
  2044. netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
  2045. if (ENIC_SETTING(enic, LOOP)) {
  2046. netdev->features &= ~NETIF_F_HW_VLAN_TX;
  2047. enic->loop_enable = 1;
  2048. enic->loop_tag = enic->config.loop_tag;
  2049. dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
  2050. }
  2051. if (ENIC_SETTING(enic, TXCSUM))
  2052. netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
  2053. if (ENIC_SETTING(enic, TSO))
  2054. netdev->hw_features |= NETIF_F_TSO |
  2055. NETIF_F_TSO6 | NETIF_F_TSO_ECN;
  2056. if (ENIC_SETTING(enic, RXCSUM))
  2057. netdev->hw_features |= NETIF_F_RXCSUM;
  2058. netdev->features |= netdev->hw_features;
  2059. if (using_dac)
  2060. netdev->features |= NETIF_F_HIGHDMA;
  2061. netdev->priv_flags |= IFF_UNICAST_FLT;
  2062. err = register_netdev(netdev);
  2063. if (err) {
  2064. dev_err(dev, "Cannot register net device, aborting\n");
  2065. goto err_out_dev_deinit;
  2066. }
  2067. return 0;
  2068. err_out_dev_deinit:
  2069. enic_dev_deinit(enic);
  2070. err_out_dev_close:
  2071. vnic_dev_close(enic->vdev);
  2072. err_out_disable_sriov:
  2073. kfree(enic->pp);
  2074. err_out_disable_sriov_pp:
  2075. #ifdef CONFIG_PCI_IOV
  2076. if (enic_sriov_enabled(enic)) {
  2077. pci_disable_sriov(pdev);
  2078. enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
  2079. }
  2080. err_out_vnic_unregister:
  2081. #endif
  2082. vnic_dev_unregister(enic->vdev);
  2083. err_out_iounmap:
  2084. enic_iounmap(enic);
  2085. err_out_release_regions:
  2086. pci_release_regions(pdev);
  2087. err_out_disable_device:
  2088. pci_disable_device(pdev);
  2089. err_out_free_netdev:
  2090. pci_set_drvdata(pdev, NULL);
  2091. free_netdev(netdev);
  2092. return err;
  2093. }
  2094. static void enic_remove(struct pci_dev *pdev)
  2095. {
  2096. struct net_device *netdev = pci_get_drvdata(pdev);
  2097. if (netdev) {
  2098. struct enic *enic = netdev_priv(netdev);
  2099. cancel_work_sync(&enic->reset);
  2100. cancel_work_sync(&enic->change_mtu_work);
  2101. unregister_netdev(netdev);
  2102. enic_dev_deinit(enic);
  2103. vnic_dev_close(enic->vdev);
  2104. #ifdef CONFIG_PCI_IOV
  2105. if (enic_sriov_enabled(enic)) {
  2106. pci_disable_sriov(pdev);
  2107. enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
  2108. }
  2109. #endif
  2110. kfree(enic->pp);
  2111. vnic_dev_unregister(enic->vdev);
  2112. enic_iounmap(enic);
  2113. pci_release_regions(pdev);
  2114. pci_disable_device(pdev);
  2115. pci_set_drvdata(pdev, NULL);
  2116. free_netdev(netdev);
  2117. }
  2118. }
  2119. static struct pci_driver enic_driver = {
  2120. .name = DRV_NAME,
  2121. .id_table = enic_id_table,
  2122. .probe = enic_probe,
  2123. .remove = enic_remove,
  2124. };
  2125. static int __init enic_init_module(void)
  2126. {
  2127. pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
  2128. return pci_register_driver(&enic_driver);
  2129. }
  2130. static void __exit enic_cleanup_module(void)
  2131. {
  2132. pci_unregister_driver(&enic_driver);
  2133. }
  2134. module_init(enic_init_module);
  2135. module_exit(enic_cleanup_module);