arizona-core.c 15 KB

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  1. /*
  2. * Arizona core driver
  3. *
  4. * Copyright 2012 Wolfson Microelectronics plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/err.h>
  14. #include <linux/gpio.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/mfd/core.h>
  17. #include <linux/module.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/regmap.h>
  20. #include <linux/regulator/consumer.h>
  21. #include <linux/slab.h>
  22. #include <linux/mfd/arizona/core.h>
  23. #include <linux/mfd/arizona/registers.h>
  24. #include "arizona.h"
  25. static const char *wm5102_core_supplies[] = {
  26. "AVDD",
  27. "DBVDD1",
  28. };
  29. int arizona_clk32k_enable(struct arizona *arizona)
  30. {
  31. int ret = 0;
  32. mutex_lock(&arizona->clk_lock);
  33. arizona->clk32k_ref++;
  34. if (arizona->clk32k_ref == 1)
  35. ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  36. ARIZONA_CLK_32K_ENA,
  37. ARIZONA_CLK_32K_ENA);
  38. if (ret != 0)
  39. arizona->clk32k_ref--;
  40. mutex_unlock(&arizona->clk_lock);
  41. return ret;
  42. }
  43. EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
  44. int arizona_clk32k_disable(struct arizona *arizona)
  45. {
  46. int ret = 0;
  47. mutex_lock(&arizona->clk_lock);
  48. BUG_ON(arizona->clk32k_ref <= 0);
  49. arizona->clk32k_ref--;
  50. if (arizona->clk32k_ref == 0)
  51. regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  52. ARIZONA_CLK_32K_ENA, 0);
  53. mutex_unlock(&arizona->clk_lock);
  54. return ret;
  55. }
  56. EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
  57. static irqreturn_t arizona_clkgen_err(int irq, void *data)
  58. {
  59. struct arizona *arizona = data;
  60. dev_err(arizona->dev, "CLKGEN error\n");
  61. return IRQ_HANDLED;
  62. }
  63. static irqreturn_t arizona_underclocked(int irq, void *data)
  64. {
  65. struct arizona *arizona = data;
  66. unsigned int val;
  67. int ret;
  68. ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
  69. &val);
  70. if (ret != 0) {
  71. dev_err(arizona->dev, "Failed to read underclock status: %d\n",
  72. ret);
  73. return IRQ_NONE;
  74. }
  75. if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
  76. dev_err(arizona->dev, "AIF3 underclocked\n");
  77. if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
  78. dev_err(arizona->dev, "AIF2 underclocked\n");
  79. if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
  80. dev_err(arizona->dev, "AIF1 underclocked\n");
  81. if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
  82. dev_err(arizona->dev, "ISRC2 underclocked\n");
  83. if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
  84. dev_err(arizona->dev, "ISRC1 underclocked\n");
  85. if (val & ARIZONA_FX_UNDERCLOCKED_STS)
  86. dev_err(arizona->dev, "FX underclocked\n");
  87. if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
  88. dev_err(arizona->dev, "ASRC underclocked\n");
  89. if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
  90. dev_err(arizona->dev, "DAC underclocked\n");
  91. if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
  92. dev_err(arizona->dev, "ADC underclocked\n");
  93. if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
  94. dev_err(arizona->dev, "Mixer underclocked\n");
  95. return IRQ_HANDLED;
  96. }
  97. static irqreturn_t arizona_overclocked(int irq, void *data)
  98. {
  99. struct arizona *arizona = data;
  100. unsigned int val[2];
  101. int ret;
  102. ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
  103. &val[0], 2);
  104. if (ret != 0) {
  105. dev_err(arizona->dev, "Failed to read overclock status: %d\n",
  106. ret);
  107. return IRQ_NONE;
  108. }
  109. if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
  110. dev_err(arizona->dev, "PWM overclocked\n");
  111. if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
  112. dev_err(arizona->dev, "FX core overclocked\n");
  113. if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
  114. dev_err(arizona->dev, "DAC SYS overclocked\n");
  115. if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
  116. dev_err(arizona->dev, "DAC WARP overclocked\n");
  117. if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
  118. dev_err(arizona->dev, "ADC overclocked\n");
  119. if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
  120. dev_err(arizona->dev, "Mixer overclocked\n");
  121. if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
  122. dev_err(arizona->dev, "AIF3 overclocked\n");
  123. if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
  124. dev_err(arizona->dev, "AIF2 overclocked\n");
  125. if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
  126. dev_err(arizona->dev, "AIF1 overclocked\n");
  127. if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
  128. dev_err(arizona->dev, "Pad control overclocked\n");
  129. if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
  130. dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
  131. if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
  132. dev_err(arizona->dev, "Slimbus async overclocked\n");
  133. if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
  134. dev_err(arizona->dev, "Slimbus sync overclocked\n");
  135. if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
  136. dev_err(arizona->dev, "ASRC async system overclocked\n");
  137. if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
  138. dev_err(arizona->dev, "ASRC async WARP overclocked\n");
  139. if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
  140. dev_err(arizona->dev, "ASRC sync system overclocked\n");
  141. if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
  142. dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
  143. if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
  144. dev_err(arizona->dev, "DSP1 overclocked\n");
  145. if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
  146. dev_err(arizona->dev, "ISRC2 overclocked\n");
  147. if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
  148. dev_err(arizona->dev, "ISRC1 overclocked\n");
  149. return IRQ_HANDLED;
  150. }
  151. static int arizona_wait_for_boot(struct arizona *arizona)
  152. {
  153. unsigned int reg;
  154. int ret, i;
  155. /*
  156. * We can't use an interrupt as we need to runtime resume to do so,
  157. * we won't race with the interrupt handler as it'll be blocked on
  158. * runtime resume.
  159. */
  160. for (i = 0; i < 5; i++) {
  161. msleep(1);
  162. ret = regmap_read(arizona->regmap,
  163. ARIZONA_INTERRUPT_RAW_STATUS_5, &reg);
  164. if (ret != 0) {
  165. dev_err(arizona->dev, "Failed to read boot state: %d\n",
  166. ret);
  167. continue;
  168. }
  169. if (reg & ARIZONA_BOOT_DONE_STS)
  170. break;
  171. }
  172. if (reg & ARIZONA_BOOT_DONE_STS) {
  173. regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
  174. ARIZONA_BOOT_DONE_STS);
  175. } else {
  176. dev_err(arizona->dev, "Device boot timed out: %x\n", reg);
  177. return -ETIMEDOUT;
  178. }
  179. pm_runtime_mark_last_busy(arizona->dev);
  180. return 0;
  181. }
  182. #ifdef CONFIG_PM_RUNTIME
  183. static int arizona_runtime_resume(struct device *dev)
  184. {
  185. struct arizona *arizona = dev_get_drvdata(dev);
  186. int ret;
  187. dev_dbg(arizona->dev, "Leaving AoD mode\n");
  188. ret = regulator_enable(arizona->dcvdd);
  189. if (ret != 0) {
  190. dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
  191. return ret;
  192. }
  193. regcache_cache_only(arizona->regmap, false);
  194. ret = arizona_wait_for_boot(arizona);
  195. if (ret != 0) {
  196. regulator_disable(arizona->dcvdd);
  197. return ret;
  198. }
  199. regcache_sync(arizona->regmap);
  200. return 0;
  201. }
  202. static int arizona_runtime_suspend(struct device *dev)
  203. {
  204. struct arizona *arizona = dev_get_drvdata(dev);
  205. dev_dbg(arizona->dev, "Entering AoD mode\n");
  206. regulator_disable(arizona->dcvdd);
  207. regcache_cache_only(arizona->regmap, true);
  208. regcache_mark_dirty(arizona->regmap);
  209. return 0;
  210. }
  211. #endif
  212. const struct dev_pm_ops arizona_pm_ops = {
  213. SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
  214. arizona_runtime_resume,
  215. NULL)
  216. };
  217. EXPORT_SYMBOL_GPL(arizona_pm_ops);
  218. static struct mfd_cell early_devs[] = {
  219. { .name = "arizona-ldo1" },
  220. };
  221. static struct mfd_cell wm5102_devs[] = {
  222. { .name = "arizona-extcon" },
  223. { .name = "arizona-gpio" },
  224. { .name = "arizona-haptics" },
  225. { .name = "arizona-micsupp" },
  226. { .name = "arizona-pwm" },
  227. { .name = "wm5102-codec" },
  228. };
  229. static struct mfd_cell wm5110_devs[] = {
  230. { .name = "arizona-extcon" },
  231. { .name = "arizona-gpio" },
  232. { .name = "arizona-haptics" },
  233. { .name = "arizona-micsupp" },
  234. { .name = "arizona-pwm" },
  235. { .name = "wm5110-codec" },
  236. };
  237. int arizona_dev_init(struct arizona *arizona)
  238. {
  239. struct device *dev = arizona->dev;
  240. const char *type_name;
  241. unsigned int reg, val;
  242. int (*apply_patch)(struct arizona *) = NULL;
  243. int ret, i;
  244. dev_set_drvdata(arizona->dev, arizona);
  245. mutex_init(&arizona->clk_lock);
  246. if (dev_get_platdata(arizona->dev))
  247. memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
  248. sizeof(arizona->pdata));
  249. regcache_cache_only(arizona->regmap, true);
  250. switch (arizona->type) {
  251. case WM5102:
  252. case WM5110:
  253. for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
  254. arizona->core_supplies[i].supply
  255. = wm5102_core_supplies[i];
  256. arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
  257. break;
  258. default:
  259. dev_err(arizona->dev, "Unknown device type %d\n",
  260. arizona->type);
  261. return -EINVAL;
  262. }
  263. ret = mfd_add_devices(arizona->dev, -1, early_devs,
  264. ARRAY_SIZE(early_devs), NULL, 0, NULL);
  265. if (ret != 0) {
  266. dev_err(dev, "Failed to add early children: %d\n", ret);
  267. return ret;
  268. }
  269. ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
  270. arizona->core_supplies);
  271. if (ret != 0) {
  272. dev_err(dev, "Failed to request core supplies: %d\n",
  273. ret);
  274. goto err_early;
  275. }
  276. arizona->dcvdd = devm_regulator_get(arizona->dev, "DCVDD");
  277. if (IS_ERR(arizona->dcvdd)) {
  278. ret = PTR_ERR(arizona->dcvdd);
  279. dev_err(dev, "Failed to request DCVDD: %d\n", ret);
  280. goto err_early;
  281. }
  282. ret = regulator_bulk_enable(arizona->num_core_supplies,
  283. arizona->core_supplies);
  284. if (ret != 0) {
  285. dev_err(dev, "Failed to enable core supplies: %d\n",
  286. ret);
  287. goto err_early;
  288. }
  289. ret = regulator_enable(arizona->dcvdd);
  290. if (ret != 0) {
  291. dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
  292. goto err_enable;
  293. }
  294. if (arizona->pdata.reset) {
  295. /* Start out with /RESET low to put the chip into reset */
  296. ret = gpio_request_one(arizona->pdata.reset,
  297. GPIOF_DIR_OUT | GPIOF_INIT_LOW,
  298. "arizona /RESET");
  299. if (ret != 0) {
  300. dev_err(dev, "Failed to request /RESET: %d\n", ret);
  301. goto err_dcvdd;
  302. }
  303. gpio_set_value_cansleep(arizona->pdata.reset, 1);
  304. }
  305. regcache_cache_only(arizona->regmap, false);
  306. ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
  307. if (ret != 0) {
  308. dev_err(dev, "Failed to read ID register: %d\n", ret);
  309. goto err_reset;
  310. }
  311. ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
  312. &arizona->rev);
  313. if (ret != 0) {
  314. dev_err(dev, "Failed to read revision register: %d\n", ret);
  315. goto err_reset;
  316. }
  317. arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
  318. switch (reg) {
  319. #ifdef CONFIG_MFD_WM5102
  320. case 0x5102:
  321. type_name = "WM5102";
  322. if (arizona->type != WM5102) {
  323. dev_err(arizona->dev, "WM5102 registered as %d\n",
  324. arizona->type);
  325. arizona->type = WM5102;
  326. }
  327. apply_patch = wm5102_patch;
  328. break;
  329. #endif
  330. #ifdef CONFIG_MFD_WM5110
  331. case 0x5110:
  332. type_name = "WM5110";
  333. if (arizona->type != WM5110) {
  334. dev_err(arizona->dev, "WM5110 registered as %d\n",
  335. arizona->type);
  336. arizona->type = WM5110;
  337. }
  338. apply_patch = wm5110_patch;
  339. break;
  340. #endif
  341. default:
  342. dev_err(arizona->dev, "Unknown device ID %x\n", reg);
  343. goto err_reset;
  344. }
  345. dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
  346. /* If we have a /RESET GPIO we'll already be reset */
  347. if (!arizona->pdata.reset) {
  348. regcache_mark_dirty(arizona->regmap);
  349. ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
  350. if (ret != 0) {
  351. dev_err(dev, "Failed to reset device: %d\n", ret);
  352. goto err_reset;
  353. }
  354. ret = regcache_sync(arizona->regmap);
  355. if (ret != 0) {
  356. dev_err(dev, "Failed to sync device: %d\n", ret);
  357. goto err_reset;
  358. }
  359. }
  360. ret = arizona_wait_for_boot(arizona);
  361. if (ret != 0) {
  362. dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
  363. goto err_reset;
  364. }
  365. if (apply_patch) {
  366. ret = apply_patch(arizona);
  367. if (ret != 0) {
  368. dev_err(arizona->dev, "Failed to apply patch: %d\n",
  369. ret);
  370. goto err_reset;
  371. }
  372. }
  373. for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
  374. if (!arizona->pdata.gpio_defaults[i])
  375. continue;
  376. regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
  377. arizona->pdata.gpio_defaults[i]);
  378. }
  379. pm_runtime_set_autosuspend_delay(arizona->dev, 100);
  380. pm_runtime_use_autosuspend(arizona->dev);
  381. pm_runtime_enable(arizona->dev);
  382. /* Chip default */
  383. if (!arizona->pdata.clk32k_src)
  384. arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
  385. switch (arizona->pdata.clk32k_src) {
  386. case ARIZONA_32KZ_MCLK1:
  387. case ARIZONA_32KZ_MCLK2:
  388. regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  389. ARIZONA_CLK_32K_SRC_MASK,
  390. arizona->pdata.clk32k_src - 1);
  391. break;
  392. case ARIZONA_32KZ_NONE:
  393. regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
  394. ARIZONA_CLK_32K_SRC_MASK, 2);
  395. break;
  396. default:
  397. dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
  398. arizona->pdata.clk32k_src);
  399. ret = -EINVAL;
  400. goto err_reset;
  401. }
  402. for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
  403. /* Default for both is 0 so noop with defaults */
  404. val = arizona->pdata.dmic_ref[i]
  405. << ARIZONA_IN1_DMIC_SUP_SHIFT;
  406. val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
  407. regmap_update_bits(arizona->regmap,
  408. ARIZONA_IN1L_CONTROL + (i * 8),
  409. ARIZONA_IN1_DMIC_SUP_MASK |
  410. ARIZONA_IN1_MODE_MASK, val);
  411. }
  412. for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
  413. /* Default is 0 so noop with defaults */
  414. if (arizona->pdata.out_mono[i])
  415. val = ARIZONA_OUT1_MONO;
  416. else
  417. val = 0;
  418. regmap_update_bits(arizona->regmap,
  419. ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
  420. ARIZONA_OUT1_MONO, val);
  421. }
  422. for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
  423. if (arizona->pdata.spk_mute[i])
  424. regmap_update_bits(arizona->regmap,
  425. ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
  426. ARIZONA_SPK1_MUTE_ENDIAN_MASK |
  427. ARIZONA_SPK1_MUTE_SEQ1_MASK,
  428. arizona->pdata.spk_mute[i]);
  429. if (arizona->pdata.spk_fmt[i])
  430. regmap_update_bits(arizona->regmap,
  431. ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
  432. ARIZONA_SPK1_FMT_MASK,
  433. arizona->pdata.spk_fmt[i]);
  434. }
  435. /* Set up for interrupts */
  436. ret = arizona_irq_init(arizona);
  437. if (ret != 0)
  438. goto err_reset;
  439. arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
  440. arizona_clkgen_err, arizona);
  441. arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
  442. arizona_overclocked, arizona);
  443. arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
  444. arizona_underclocked, arizona);
  445. switch (arizona->type) {
  446. case WM5102:
  447. ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
  448. ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
  449. break;
  450. case WM5110:
  451. ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
  452. ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
  453. break;
  454. }
  455. if (ret != 0) {
  456. dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
  457. goto err_irq;
  458. }
  459. #ifdef CONFIG_PM_RUNTIME
  460. regulator_disable(arizona->dcvdd);
  461. #endif
  462. return 0;
  463. err_irq:
  464. arizona_irq_exit(arizona);
  465. err_reset:
  466. if (arizona->pdata.reset) {
  467. gpio_set_value_cansleep(arizona->pdata.reset, 1);
  468. gpio_free(arizona->pdata.reset);
  469. }
  470. err_dcvdd:
  471. regulator_disable(arizona->dcvdd);
  472. err_enable:
  473. regulator_bulk_disable(arizona->num_core_supplies,
  474. arizona->core_supplies);
  475. err_early:
  476. mfd_remove_devices(dev);
  477. return ret;
  478. }
  479. EXPORT_SYMBOL_GPL(arizona_dev_init);
  480. int arizona_dev_exit(struct arizona *arizona)
  481. {
  482. mfd_remove_devices(arizona->dev);
  483. arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
  484. arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
  485. arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
  486. pm_runtime_disable(arizona->dev);
  487. arizona_irq_exit(arizona);
  488. return 0;
  489. }
  490. EXPORT_SYMBOL_GPL(arizona_dev_exit);