af9035.h 3.0 KB

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  1. /*
  2. * Afatech AF9035 DVB USB driver
  3. *
  4. * Copyright (C) 2009 Antti Palosaari <crope@iki.fi>
  5. * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  20. */
  21. #ifndef AF9035_H
  22. #define AF9035_H
  23. #include "dvb_usb.h"
  24. #include "af9033.h"
  25. #include "tua9001.h"
  26. #include "fc0011.h"
  27. #include "fc0012.h"
  28. #include "mxl5007t.h"
  29. #include "tda18218.h"
  30. #include "fc2580.h"
  31. struct reg_val {
  32. u32 reg;
  33. u8 val;
  34. };
  35. struct reg_val_mask {
  36. u32 reg;
  37. u8 val;
  38. u8 mask;
  39. };
  40. struct usb_req {
  41. u8 cmd;
  42. u8 mbox;
  43. u8 wlen;
  44. u8 *wbuf;
  45. u8 rlen;
  46. u8 *rbuf;
  47. };
  48. struct state {
  49. u8 seq; /* packet sequence number */
  50. bool dual_mode;
  51. struct af9033_config af9033_config[2];
  52. };
  53. u32 clock_lut[] = {
  54. 20480000, /* FPGA */
  55. 16384000, /* 16.38 MHz */
  56. 20480000, /* 20.48 MHz */
  57. 36000000, /* 36.00 MHz */
  58. 30000000, /* 30.00 MHz */
  59. 26000000, /* 26.00 MHz */
  60. 28000000, /* 28.00 MHz */
  61. 32000000, /* 32.00 MHz */
  62. 34000000, /* 34.00 MHz */
  63. 24000000, /* 24.00 MHz */
  64. 22000000, /* 22.00 MHz */
  65. 12000000, /* 12.00 MHz */
  66. };
  67. u32 clock_lut_it9135[] = {
  68. 12000000, /* 12.00 MHz */
  69. 20480000, /* 20.48 MHz */
  70. 36000000, /* 36.00 MHz */
  71. 30000000, /* 30.00 MHz */
  72. 26000000, /* 26.00 MHz */
  73. 28000000, /* 28.00 MHz */
  74. 32000000, /* 32.00 MHz */
  75. 34000000, /* 34.00 MHz */
  76. 24000000, /* 24.00 MHz */
  77. 22000000, /* 22.00 MHz */
  78. };
  79. #define AF9035_FIRMWARE_AF9035 "dvb-usb-af9035-02.fw"
  80. #define AF9035_FIRMWARE_IT9135 "dvb-usb-it9135-01.fw"
  81. /* EEPROM locations */
  82. #define EEPROM_IR_MODE 0x430d
  83. #define EEPROM_DUAL_MODE 0x4326
  84. #define EEPROM_2ND_DEMOD_ADDR 0x4327
  85. #define EEPROM_IR_TYPE 0x4329
  86. #define EEPROM_1_IFFREQ_L 0x432d
  87. #define EEPROM_1_IFFREQ_H 0x432e
  88. #define EEPROM_1_TUNER_ID 0x4331
  89. #define EEPROM_2_IFFREQ_L 0x433d
  90. #define EEPROM_2_IFFREQ_H 0x433e
  91. #define EEPROM_2_TUNER_ID 0x4341
  92. /* USB commands */
  93. #define CMD_MEM_RD 0x00
  94. #define CMD_MEM_WR 0x01
  95. #define CMD_I2C_RD 0x02
  96. #define CMD_I2C_WR 0x03
  97. #define CMD_IR_GET 0x18
  98. #define CMD_FW_DL 0x21
  99. #define CMD_FW_QUERYINFO 0x22
  100. #define CMD_FW_BOOT 0x23
  101. #define CMD_FW_DL_BEGIN 0x24
  102. #define CMD_FW_DL_END 0x25
  103. #define CMD_FW_SCATTER_WR 0x29
  104. #endif