tda18218.c 8.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340
  1. /*
  2. * NXP TDA18218HN silicon tuner driver
  3. *
  4. * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include "tda18218_priv.h"
  21. /* write multiple registers */
  22. static int tda18218_wr_regs(struct tda18218_priv *priv, u8 reg, u8 *val, u8 len)
  23. {
  24. int ret = 0, len2, remaining;
  25. u8 buf[1 + len];
  26. struct i2c_msg msg[1] = {
  27. {
  28. .addr = priv->cfg->i2c_address,
  29. .flags = 0,
  30. .buf = buf,
  31. }
  32. };
  33. for (remaining = len; remaining > 0;
  34. remaining -= (priv->cfg->i2c_wr_max - 1)) {
  35. len2 = remaining;
  36. if (len2 > (priv->cfg->i2c_wr_max - 1))
  37. len2 = (priv->cfg->i2c_wr_max - 1);
  38. msg[0].len = 1 + len2;
  39. buf[0] = reg + len - remaining;
  40. memcpy(&buf[1], &val[len - remaining], len2);
  41. ret = i2c_transfer(priv->i2c, msg, 1);
  42. if (ret != 1)
  43. break;
  44. }
  45. if (ret == 1) {
  46. ret = 0;
  47. } else {
  48. dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
  49. "len=%d\n", KBUILD_MODNAME, ret, reg, len);
  50. ret = -EREMOTEIO;
  51. }
  52. return ret;
  53. }
  54. /* read multiple registers */
  55. static int tda18218_rd_regs(struct tda18218_priv *priv, u8 reg, u8 *val, u8 len)
  56. {
  57. int ret;
  58. u8 buf[reg+len]; /* we must start read always from reg 0x00 */
  59. struct i2c_msg msg[2] = {
  60. {
  61. .addr = priv->cfg->i2c_address,
  62. .flags = 0,
  63. .len = 1,
  64. .buf = "\x00",
  65. }, {
  66. .addr = priv->cfg->i2c_address,
  67. .flags = I2C_M_RD,
  68. .len = sizeof(buf),
  69. .buf = buf,
  70. }
  71. };
  72. ret = i2c_transfer(priv->i2c, msg, 2);
  73. if (ret == 2) {
  74. memcpy(val, &buf[reg], len);
  75. ret = 0;
  76. } else {
  77. dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
  78. "len=%d\n", KBUILD_MODNAME, ret, reg, len);
  79. ret = -EREMOTEIO;
  80. }
  81. return ret;
  82. }
  83. /* write single register */
  84. static int tda18218_wr_reg(struct tda18218_priv *priv, u8 reg, u8 val)
  85. {
  86. return tda18218_wr_regs(priv, reg, &val, 1);
  87. }
  88. /* read single register */
  89. static int tda18218_rd_reg(struct tda18218_priv *priv, u8 reg, u8 *val)
  90. {
  91. return tda18218_rd_regs(priv, reg, val, 1);
  92. }
  93. static int tda18218_set_params(struct dvb_frontend *fe)
  94. {
  95. struct tda18218_priv *priv = fe->tuner_priv;
  96. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  97. u32 bw = c->bandwidth_hz;
  98. int ret;
  99. u8 buf[3], i, BP_Filter, LP_Fc;
  100. u32 LO_Frac;
  101. /* TODO: find out correct AGC algorithm */
  102. u8 agc[][2] = {
  103. { R20_AGC11, 0x60 },
  104. { R23_AGC21, 0x02 },
  105. { R20_AGC11, 0xa0 },
  106. { R23_AGC21, 0x09 },
  107. { R20_AGC11, 0xe0 },
  108. { R23_AGC21, 0x0c },
  109. { R20_AGC11, 0x40 },
  110. { R23_AGC21, 0x01 },
  111. { R20_AGC11, 0x80 },
  112. { R23_AGC21, 0x08 },
  113. { R20_AGC11, 0xc0 },
  114. { R23_AGC21, 0x0b },
  115. { R24_AGC22, 0x1c },
  116. { R24_AGC22, 0x0c },
  117. };
  118. if (fe->ops.i2c_gate_ctrl)
  119. fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
  120. /* low-pass filter cut-off frequency */
  121. if (bw <= 6000000) {
  122. LP_Fc = 0;
  123. priv->if_frequency = 3000000;
  124. } else if (bw <= 7000000) {
  125. LP_Fc = 1;
  126. priv->if_frequency = 3500000;
  127. } else {
  128. LP_Fc = 2;
  129. priv->if_frequency = 4000000;
  130. }
  131. LO_Frac = c->frequency + priv->if_frequency;
  132. /* band-pass filter */
  133. if (LO_Frac < 188000000)
  134. BP_Filter = 3;
  135. else if (LO_Frac < 253000000)
  136. BP_Filter = 4;
  137. else if (LO_Frac < 343000000)
  138. BP_Filter = 5;
  139. else
  140. BP_Filter = 6;
  141. buf[0] = (priv->regs[R1A_IF1] & ~7) | BP_Filter; /* BP_Filter */
  142. buf[1] = (priv->regs[R1B_IF2] & ~3) | LP_Fc; /* LP_Fc */
  143. buf[2] = priv->regs[R1C_AGC2B];
  144. ret = tda18218_wr_regs(priv, R1A_IF1, buf, 3);
  145. if (ret)
  146. goto error;
  147. buf[0] = (LO_Frac / 1000) >> 12; /* LO_Frac_0 */
  148. buf[1] = (LO_Frac / 1000) >> 4; /* LO_Frac_1 */
  149. buf[2] = (LO_Frac / 1000) << 4 |
  150. (priv->regs[R0C_MD5] & 0x0f); /* LO_Frac_2 */
  151. ret = tda18218_wr_regs(priv, R0A_MD3, buf, 3);
  152. if (ret)
  153. goto error;
  154. buf[0] = priv->regs[R0F_MD8] | (1 << 6); /* Freq_prog_Start */
  155. ret = tda18218_wr_regs(priv, R0F_MD8, buf, 1);
  156. if (ret)
  157. goto error;
  158. buf[0] = priv->regs[R0F_MD8] & ~(1 << 6); /* Freq_prog_Start */
  159. ret = tda18218_wr_regs(priv, R0F_MD8, buf, 1);
  160. if (ret)
  161. goto error;
  162. /* trigger AGC */
  163. for (i = 0; i < ARRAY_SIZE(agc); i++) {
  164. ret = tda18218_wr_reg(priv, agc[i][0], agc[i][1]);
  165. if (ret)
  166. goto error;
  167. }
  168. error:
  169. if (fe->ops.i2c_gate_ctrl)
  170. fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
  171. if (ret)
  172. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  173. return ret;
  174. }
  175. static int tda18218_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
  176. {
  177. struct tda18218_priv *priv = fe->tuner_priv;
  178. *frequency = priv->if_frequency;
  179. dev_dbg(&priv->i2c->dev, "%s: if_frequency=%d\n", __func__, *frequency);
  180. return 0;
  181. }
  182. static int tda18218_sleep(struct dvb_frontend *fe)
  183. {
  184. struct tda18218_priv *priv = fe->tuner_priv;
  185. int ret;
  186. if (fe->ops.i2c_gate_ctrl)
  187. fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
  188. /* standby */
  189. ret = tda18218_wr_reg(priv, R17_PD1, priv->regs[R17_PD1] | (1 << 0));
  190. if (fe->ops.i2c_gate_ctrl)
  191. fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
  192. if (ret)
  193. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  194. return ret;
  195. }
  196. static int tda18218_init(struct dvb_frontend *fe)
  197. {
  198. struct tda18218_priv *priv = fe->tuner_priv;
  199. int ret;
  200. /* TODO: calibrations */
  201. if (fe->ops.i2c_gate_ctrl)
  202. fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
  203. ret = tda18218_wr_regs(priv, R00_ID, priv->regs, TDA18218_NUM_REGS);
  204. if (fe->ops.i2c_gate_ctrl)
  205. fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
  206. if (ret)
  207. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  208. return ret;
  209. }
  210. static int tda18218_release(struct dvb_frontend *fe)
  211. {
  212. kfree(fe->tuner_priv);
  213. fe->tuner_priv = NULL;
  214. return 0;
  215. }
  216. static const struct dvb_tuner_ops tda18218_tuner_ops = {
  217. .info = {
  218. .name = "NXP TDA18218",
  219. .frequency_min = 174000000,
  220. .frequency_max = 864000000,
  221. .frequency_step = 1000,
  222. },
  223. .release = tda18218_release,
  224. .init = tda18218_init,
  225. .sleep = tda18218_sleep,
  226. .set_params = tda18218_set_params,
  227. .get_if_frequency = tda18218_get_if_frequency,
  228. };
  229. struct dvb_frontend *tda18218_attach(struct dvb_frontend *fe,
  230. struct i2c_adapter *i2c, struct tda18218_config *cfg)
  231. {
  232. struct tda18218_priv *priv = NULL;
  233. u8 val;
  234. int ret;
  235. /* chip default registers values */
  236. static u8 def_regs[] = {
  237. 0xc0, 0x88, 0x00, 0x8e, 0x03, 0x00, 0x00, 0xd0, 0x00, 0x40,
  238. 0x00, 0x00, 0x07, 0xff, 0x84, 0x09, 0x00, 0x13, 0x00, 0x00,
  239. 0x01, 0x84, 0x09, 0xf0, 0x19, 0x0a, 0x8e, 0x69, 0x98, 0x01,
  240. 0x00, 0x58, 0x10, 0x40, 0x8c, 0x00, 0x0c, 0x48, 0x85, 0xc9,
  241. 0xa7, 0x00, 0x00, 0x00, 0x30, 0x81, 0x80, 0x00, 0x39, 0x00,
  242. 0x8a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf6, 0xf6
  243. };
  244. priv = kzalloc(sizeof(struct tda18218_priv), GFP_KERNEL);
  245. if (priv == NULL)
  246. return NULL;
  247. priv->cfg = cfg;
  248. priv->i2c = i2c;
  249. fe->tuner_priv = priv;
  250. if (fe->ops.i2c_gate_ctrl)
  251. fe->ops.i2c_gate_ctrl(fe, 1); /* open I2C-gate */
  252. /* check if the tuner is there */
  253. ret = tda18218_rd_reg(priv, R00_ID, &val);
  254. if (!ret)
  255. dev_dbg(&priv->i2c->dev, "%s: chip id=%02x\n", __func__, val);
  256. if (ret || val != def_regs[R00_ID]) {
  257. kfree(priv);
  258. return NULL;
  259. }
  260. dev_info(&priv->i2c->dev,
  261. "%s: NXP TDA18218HN successfully identified\n",
  262. KBUILD_MODNAME);
  263. memcpy(&fe->ops.tuner_ops, &tda18218_tuner_ops,
  264. sizeof(struct dvb_tuner_ops));
  265. memcpy(priv->regs, def_regs, sizeof(def_regs));
  266. /* loop-through enabled chip default register values */
  267. if (priv->cfg->loop_through) {
  268. priv->regs[R17_PD1] = 0xb0;
  269. priv->regs[R18_PD2] = 0x59;
  270. }
  271. /* standby */
  272. ret = tda18218_wr_reg(priv, R17_PD1, priv->regs[R17_PD1] | (1 << 0));
  273. if (ret)
  274. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  275. if (fe->ops.i2c_gate_ctrl)
  276. fe->ops.i2c_gate_ctrl(fe, 0); /* close I2C-gate */
  277. return fe;
  278. }
  279. EXPORT_SYMBOL(tda18218_attach);
  280. MODULE_DESCRIPTION("NXP TDA18218HN silicon tuner driver");
  281. MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
  282. MODULE_LICENSE("GPL");