fc2580.c 12 KB

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  1. /*
  2. * FCI FC2580 silicon tuner driver
  3. *
  4. * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. */
  20. #include "fc2580_priv.h"
  21. /*
  22. * TODO:
  23. * I2C write and read works only for one single register. Multiple registers
  24. * could not be accessed using normal register address auto-increment.
  25. * There could be (very likely) register to change that behavior....
  26. *
  27. * Due to that limitation functions:
  28. * fc2580_wr_regs()
  29. * fc2580_rd_regs()
  30. * could not be used for accessing more than one register at once.
  31. *
  32. * TODO:
  33. * Currently it blind writes bunch of static registers from the
  34. * fc2580_freq_regs_lut[] when fc2580_set_params() is called. Add some
  35. * logic to reduce unneeded register writes.
  36. */
  37. /* write multiple registers */
  38. static int fc2580_wr_regs(struct fc2580_priv *priv, u8 reg, u8 *val, int len)
  39. {
  40. int ret;
  41. u8 buf[1 + len];
  42. struct i2c_msg msg[1] = {
  43. {
  44. .addr = priv->cfg->i2c_addr,
  45. .flags = 0,
  46. .len = sizeof(buf),
  47. .buf = buf,
  48. }
  49. };
  50. buf[0] = reg;
  51. memcpy(&buf[1], val, len);
  52. ret = i2c_transfer(priv->i2c, msg, 1);
  53. if (ret == 1) {
  54. ret = 0;
  55. } else {
  56. dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
  57. "len=%d\n", KBUILD_MODNAME, ret, reg, len);
  58. ret = -EREMOTEIO;
  59. }
  60. return ret;
  61. }
  62. /* read multiple registers */
  63. static int fc2580_rd_regs(struct fc2580_priv *priv, u8 reg, u8 *val, int len)
  64. {
  65. int ret;
  66. u8 buf[len];
  67. struct i2c_msg msg[2] = {
  68. {
  69. .addr = priv->cfg->i2c_addr,
  70. .flags = 0,
  71. .len = 1,
  72. .buf = &reg,
  73. }, {
  74. .addr = priv->cfg->i2c_addr,
  75. .flags = I2C_M_RD,
  76. .len = sizeof(buf),
  77. .buf = buf,
  78. }
  79. };
  80. ret = i2c_transfer(priv->i2c, msg, 2);
  81. if (ret == 2) {
  82. memcpy(val, buf, len);
  83. ret = 0;
  84. } else {
  85. dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
  86. "len=%d\n", KBUILD_MODNAME, ret, reg, len);
  87. ret = -EREMOTEIO;
  88. }
  89. return ret;
  90. }
  91. /* write single register */
  92. static int fc2580_wr_reg(struct fc2580_priv *priv, u8 reg, u8 val)
  93. {
  94. return fc2580_wr_regs(priv, reg, &val, 1);
  95. }
  96. /* read single register */
  97. static int fc2580_rd_reg(struct fc2580_priv *priv, u8 reg, u8 *val)
  98. {
  99. return fc2580_rd_regs(priv, reg, val, 1);
  100. }
  101. /* write single register conditionally only when value differs from 0xff
  102. * XXX: This is special routine meant only for writing fc2580_freq_regs_lut[]
  103. * values. Do not use for the other purposes. */
  104. static int fc2580_wr_reg_ff(struct fc2580_priv *priv, u8 reg, u8 val)
  105. {
  106. if (val == 0xff)
  107. return 0;
  108. else
  109. return fc2580_wr_regs(priv, reg, &val, 1);
  110. }
  111. static int fc2580_set_params(struct dvb_frontend *fe)
  112. {
  113. struct fc2580_priv *priv = fe->tuner_priv;
  114. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  115. int ret = 0, i;
  116. unsigned int r_val, n_val, k_val, k_val_reg, f_ref;
  117. u8 tmp_val, r18_val;
  118. u64 f_vco;
  119. /*
  120. * Fractional-N synthesizer/PLL.
  121. * Most likely all those PLL calculations are not correct. I am not
  122. * sure, but it looks like it is divider based Fractional-N synthesizer.
  123. * There is divider for reference clock too?
  124. * Anyhow, synthesizer calculation results seems to be quite correct.
  125. */
  126. dev_dbg(&priv->i2c->dev, "%s: delivery_system=%d frequency=%d " \
  127. "bandwidth_hz=%d\n", __func__,
  128. c->delivery_system, c->frequency, c->bandwidth_hz);
  129. if (fe->ops.i2c_gate_ctrl)
  130. fe->ops.i2c_gate_ctrl(fe, 1);
  131. /* PLL */
  132. for (i = 0; i < ARRAY_SIZE(fc2580_pll_lut); i++) {
  133. if (c->frequency <= fc2580_pll_lut[i].freq)
  134. break;
  135. }
  136. if (i == ARRAY_SIZE(fc2580_pll_lut))
  137. goto err;
  138. f_vco = c->frequency;
  139. f_vco *= fc2580_pll_lut[i].div;
  140. if (f_vco >= 2600000000UL)
  141. tmp_val = 0x0e | fc2580_pll_lut[i].band;
  142. else
  143. tmp_val = 0x06 | fc2580_pll_lut[i].band;
  144. ret = fc2580_wr_reg(priv, 0x02, tmp_val);
  145. if (ret < 0)
  146. goto err;
  147. if (f_vco >= 2UL * 76 * priv->cfg->clock) {
  148. r_val = 1;
  149. r18_val = 0x00;
  150. } else if (f_vco >= 1UL * 76 * priv->cfg->clock) {
  151. r_val = 2;
  152. r18_val = 0x10;
  153. } else {
  154. r_val = 4;
  155. r18_val = 0x20;
  156. }
  157. f_ref = 2UL * priv->cfg->clock / r_val;
  158. n_val = div_u64_rem(f_vco, f_ref, &k_val);
  159. k_val_reg = 1UL * k_val * (1 << 20) / f_ref;
  160. ret = fc2580_wr_reg(priv, 0x18, r18_val | ((k_val_reg >> 16) & 0xff));
  161. if (ret < 0)
  162. goto err;
  163. ret = fc2580_wr_reg(priv, 0x1a, (k_val_reg >> 8) & 0xff);
  164. if (ret < 0)
  165. goto err;
  166. ret = fc2580_wr_reg(priv, 0x1b, (k_val_reg >> 0) & 0xff);
  167. if (ret < 0)
  168. goto err;
  169. ret = fc2580_wr_reg(priv, 0x1c, n_val);
  170. if (ret < 0)
  171. goto err;
  172. if (priv->cfg->clock >= 28000000) {
  173. ret = fc2580_wr_reg(priv, 0x4b, 0x22);
  174. if (ret < 0)
  175. goto err;
  176. }
  177. if (fc2580_pll_lut[i].band == 0x00) {
  178. if (c->frequency <= 794000000)
  179. tmp_val = 0x9f;
  180. else
  181. tmp_val = 0x8f;
  182. ret = fc2580_wr_reg(priv, 0x2d, tmp_val);
  183. if (ret < 0)
  184. goto err;
  185. }
  186. /* registers */
  187. for (i = 0; i < ARRAY_SIZE(fc2580_freq_regs_lut); i++) {
  188. if (c->frequency <= fc2580_freq_regs_lut[i].freq)
  189. break;
  190. }
  191. if (i == ARRAY_SIZE(fc2580_freq_regs_lut))
  192. goto err;
  193. ret = fc2580_wr_reg_ff(priv, 0x25, fc2580_freq_regs_lut[i].r25_val);
  194. if (ret < 0)
  195. goto err;
  196. ret = fc2580_wr_reg_ff(priv, 0x27, fc2580_freq_regs_lut[i].r27_val);
  197. if (ret < 0)
  198. goto err;
  199. ret = fc2580_wr_reg_ff(priv, 0x28, fc2580_freq_regs_lut[i].r28_val);
  200. if (ret < 0)
  201. goto err;
  202. ret = fc2580_wr_reg_ff(priv, 0x29, fc2580_freq_regs_lut[i].r29_val);
  203. if (ret < 0)
  204. goto err;
  205. ret = fc2580_wr_reg_ff(priv, 0x2b, fc2580_freq_regs_lut[i].r2b_val);
  206. if (ret < 0)
  207. goto err;
  208. ret = fc2580_wr_reg_ff(priv, 0x2c, fc2580_freq_regs_lut[i].r2c_val);
  209. if (ret < 0)
  210. goto err;
  211. ret = fc2580_wr_reg_ff(priv, 0x2d, fc2580_freq_regs_lut[i].r2d_val);
  212. if (ret < 0)
  213. goto err;
  214. ret = fc2580_wr_reg_ff(priv, 0x30, fc2580_freq_regs_lut[i].r30_val);
  215. if (ret < 0)
  216. goto err;
  217. ret = fc2580_wr_reg_ff(priv, 0x44, fc2580_freq_regs_lut[i].r44_val);
  218. if (ret < 0)
  219. goto err;
  220. ret = fc2580_wr_reg_ff(priv, 0x50, fc2580_freq_regs_lut[i].r50_val);
  221. if (ret < 0)
  222. goto err;
  223. ret = fc2580_wr_reg_ff(priv, 0x53, fc2580_freq_regs_lut[i].r53_val);
  224. if (ret < 0)
  225. goto err;
  226. ret = fc2580_wr_reg_ff(priv, 0x5f, fc2580_freq_regs_lut[i].r5f_val);
  227. if (ret < 0)
  228. goto err;
  229. ret = fc2580_wr_reg_ff(priv, 0x61, fc2580_freq_regs_lut[i].r61_val);
  230. if (ret < 0)
  231. goto err;
  232. ret = fc2580_wr_reg_ff(priv, 0x62, fc2580_freq_regs_lut[i].r62_val);
  233. if (ret < 0)
  234. goto err;
  235. ret = fc2580_wr_reg_ff(priv, 0x63, fc2580_freq_regs_lut[i].r63_val);
  236. if (ret < 0)
  237. goto err;
  238. ret = fc2580_wr_reg_ff(priv, 0x67, fc2580_freq_regs_lut[i].r67_val);
  239. if (ret < 0)
  240. goto err;
  241. ret = fc2580_wr_reg_ff(priv, 0x68, fc2580_freq_regs_lut[i].r68_val);
  242. if (ret < 0)
  243. goto err;
  244. ret = fc2580_wr_reg_ff(priv, 0x69, fc2580_freq_regs_lut[i].r69_val);
  245. if (ret < 0)
  246. goto err;
  247. ret = fc2580_wr_reg_ff(priv, 0x6a, fc2580_freq_regs_lut[i].r6a_val);
  248. if (ret < 0)
  249. goto err;
  250. ret = fc2580_wr_reg_ff(priv, 0x6b, fc2580_freq_regs_lut[i].r6b_val);
  251. if (ret < 0)
  252. goto err;
  253. ret = fc2580_wr_reg_ff(priv, 0x6c, fc2580_freq_regs_lut[i].r6c_val);
  254. if (ret < 0)
  255. goto err;
  256. ret = fc2580_wr_reg_ff(priv, 0x6d, fc2580_freq_regs_lut[i].r6d_val);
  257. if (ret < 0)
  258. goto err;
  259. ret = fc2580_wr_reg_ff(priv, 0x6e, fc2580_freq_regs_lut[i].r6e_val);
  260. if (ret < 0)
  261. goto err;
  262. ret = fc2580_wr_reg_ff(priv, 0x6f, fc2580_freq_regs_lut[i].r6f_val);
  263. if (ret < 0)
  264. goto err;
  265. /* IF filters */
  266. for (i = 0; i < ARRAY_SIZE(fc2580_if_filter_lut); i++) {
  267. if (c->bandwidth_hz <= fc2580_if_filter_lut[i].freq)
  268. break;
  269. }
  270. if (i == ARRAY_SIZE(fc2580_if_filter_lut))
  271. goto err;
  272. ret = fc2580_wr_reg(priv, 0x36, fc2580_if_filter_lut[i].r36_val);
  273. if (ret < 0)
  274. goto err;
  275. ret = fc2580_wr_reg(priv, 0x37, 1UL * priv->cfg->clock * \
  276. fc2580_if_filter_lut[i].mul / 1000000000);
  277. if (ret < 0)
  278. goto err;
  279. ret = fc2580_wr_reg(priv, 0x39, fc2580_if_filter_lut[i].r39_val);
  280. if (ret < 0)
  281. goto err;
  282. /* calibration? */
  283. ret = fc2580_wr_reg(priv, 0x2e, 0x09);
  284. if (ret < 0)
  285. goto err;
  286. for (i = 0; i < 5; i++) {
  287. ret = fc2580_rd_reg(priv, 0x2f, &tmp_val);
  288. if (ret < 0)
  289. goto err;
  290. /* done when [7:6] are set */
  291. if ((tmp_val & 0xc0) == 0xc0)
  292. break;
  293. ret = fc2580_wr_reg(priv, 0x2e, 0x01);
  294. if (ret < 0)
  295. goto err;
  296. ret = fc2580_wr_reg(priv, 0x2e, 0x09);
  297. if (ret < 0)
  298. goto err;
  299. usleep_range(5000, 25000);
  300. }
  301. dev_dbg(&priv->i2c->dev, "%s: loop=%i\n", __func__, i);
  302. ret = fc2580_wr_reg(priv, 0x2e, 0x01);
  303. if (ret < 0)
  304. goto err;
  305. if (fe->ops.i2c_gate_ctrl)
  306. fe->ops.i2c_gate_ctrl(fe, 0);
  307. return 0;
  308. err:
  309. if (fe->ops.i2c_gate_ctrl)
  310. fe->ops.i2c_gate_ctrl(fe, 0);
  311. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  312. return ret;
  313. }
  314. static int fc2580_init(struct dvb_frontend *fe)
  315. {
  316. struct fc2580_priv *priv = fe->tuner_priv;
  317. int ret, i;
  318. dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
  319. if (fe->ops.i2c_gate_ctrl)
  320. fe->ops.i2c_gate_ctrl(fe, 1);
  321. for (i = 0; i < ARRAY_SIZE(fc2580_init_reg_vals); i++) {
  322. ret = fc2580_wr_reg(priv, fc2580_init_reg_vals[i].reg,
  323. fc2580_init_reg_vals[i].val);
  324. if (ret < 0)
  325. goto err;
  326. }
  327. if (fe->ops.i2c_gate_ctrl)
  328. fe->ops.i2c_gate_ctrl(fe, 0);
  329. return 0;
  330. err:
  331. if (fe->ops.i2c_gate_ctrl)
  332. fe->ops.i2c_gate_ctrl(fe, 0);
  333. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  334. return ret;
  335. }
  336. static int fc2580_sleep(struct dvb_frontend *fe)
  337. {
  338. struct fc2580_priv *priv = fe->tuner_priv;
  339. int ret;
  340. dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
  341. if (fe->ops.i2c_gate_ctrl)
  342. fe->ops.i2c_gate_ctrl(fe, 1);
  343. ret = fc2580_wr_reg(priv, 0x02, 0x0a);
  344. if (ret < 0)
  345. goto err;
  346. if (fe->ops.i2c_gate_ctrl)
  347. fe->ops.i2c_gate_ctrl(fe, 0);
  348. return 0;
  349. err:
  350. if (fe->ops.i2c_gate_ctrl)
  351. fe->ops.i2c_gate_ctrl(fe, 0);
  352. dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
  353. return ret;
  354. }
  355. static int fc2580_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
  356. {
  357. struct fc2580_priv *priv = fe->tuner_priv;
  358. dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
  359. *frequency = 0; /* Zero-IF */
  360. return 0;
  361. }
  362. static int fc2580_release(struct dvb_frontend *fe)
  363. {
  364. struct fc2580_priv *priv = fe->tuner_priv;
  365. dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
  366. kfree(fe->tuner_priv);
  367. return 0;
  368. }
  369. static const struct dvb_tuner_ops fc2580_tuner_ops = {
  370. .info = {
  371. .name = "FCI FC2580",
  372. .frequency_min = 174000000,
  373. .frequency_max = 862000000,
  374. },
  375. .release = fc2580_release,
  376. .init = fc2580_init,
  377. .sleep = fc2580_sleep,
  378. .set_params = fc2580_set_params,
  379. .get_if_frequency = fc2580_get_if_frequency,
  380. };
  381. struct dvb_frontend *fc2580_attach(struct dvb_frontend *fe,
  382. struct i2c_adapter *i2c, const struct fc2580_config *cfg)
  383. {
  384. struct fc2580_priv *priv;
  385. int ret;
  386. u8 chip_id;
  387. if (fe->ops.i2c_gate_ctrl)
  388. fe->ops.i2c_gate_ctrl(fe, 1);
  389. priv = kzalloc(sizeof(struct fc2580_priv), GFP_KERNEL);
  390. if (!priv) {
  391. ret = -ENOMEM;
  392. dev_err(&i2c->dev, "%s: kzalloc() failed\n", KBUILD_MODNAME);
  393. goto err;
  394. }
  395. priv->cfg = cfg;
  396. priv->i2c = i2c;
  397. /* check if the tuner is there */
  398. ret = fc2580_rd_reg(priv, 0x01, &chip_id);
  399. if (ret < 0)
  400. goto err;
  401. dev_dbg(&priv->i2c->dev, "%s: chip_id=%02x\n", __func__, chip_id);
  402. switch (chip_id) {
  403. case 0x56:
  404. case 0x5a:
  405. break;
  406. default:
  407. goto err;
  408. }
  409. dev_info(&priv->i2c->dev,
  410. "%s: FCI FC2580 successfully identified\n",
  411. KBUILD_MODNAME);
  412. fe->tuner_priv = priv;
  413. memcpy(&fe->ops.tuner_ops, &fc2580_tuner_ops,
  414. sizeof(struct dvb_tuner_ops));
  415. if (fe->ops.i2c_gate_ctrl)
  416. fe->ops.i2c_gate_ctrl(fe, 0);
  417. return fe;
  418. err:
  419. if (fe->ops.i2c_gate_ctrl)
  420. fe->ops.i2c_gate_ctrl(fe, 0);
  421. dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret);
  422. kfree(priv);
  423. return NULL;
  424. }
  425. EXPORT_SYMBOL(fc2580_attach);
  426. MODULE_DESCRIPTION("FCI FC2580 silicon tuner driver");
  427. MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
  428. MODULE_LICENSE("GPL");