cx88-dvb.c 47 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc4000.h"
  42. #include "xc5000.h"
  43. #include "nxt200x.h"
  44. #include "cx24123.h"
  45. #include "isl6421.h"
  46. #include "tuner-simple.h"
  47. #include "tda9887.h"
  48. #include "s5h1411.h"
  49. #include "stv0299.h"
  50. #include "z0194a.h"
  51. #include "stv0288.h"
  52. #include "stb6000.h"
  53. #include "cx24116.h"
  54. #include "stv0900.h"
  55. #include "stb6100.h"
  56. #include "stb6100_proc.h"
  57. #include "mb86a16.h"
  58. #include "ts2020.h"
  59. #include "ds3000.h"
  60. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  61. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  62. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  63. MODULE_LICENSE("GPL");
  64. MODULE_VERSION(CX88_VERSION);
  65. static unsigned int debug;
  66. module_param(debug, int, 0644);
  67. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  68. static unsigned int dvb_buf_tscnt = 32;
  69. module_param(dvb_buf_tscnt, int, 0644);
  70. MODULE_PARM_DESC(dvb_buf_tscnt, "DVB Buffer TS count [dvb]");
  71. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  72. #define dprintk(level,fmt, arg...) if (debug >= level) \
  73. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  74. /* ------------------------------------------------------------------ */
  75. static int dvb_buf_setup(struct videobuf_queue *q,
  76. unsigned int *count, unsigned int *size)
  77. {
  78. struct cx8802_dev *dev = q->priv_data;
  79. dev->ts_packet_size = 188 * 4;
  80. dev->ts_packet_count = dvb_buf_tscnt;
  81. *size = dev->ts_packet_size * dev->ts_packet_count;
  82. *count = dvb_buf_tscnt;
  83. return 0;
  84. }
  85. static int dvb_buf_prepare(struct videobuf_queue *q,
  86. struct videobuf_buffer *vb, enum v4l2_field field)
  87. {
  88. struct cx8802_dev *dev = q->priv_data;
  89. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  90. }
  91. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  92. {
  93. struct cx8802_dev *dev = q->priv_data;
  94. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  95. }
  96. static void dvb_buf_release(struct videobuf_queue *q,
  97. struct videobuf_buffer *vb)
  98. {
  99. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  100. }
  101. static const struct videobuf_queue_ops dvb_qops = {
  102. .buf_setup = dvb_buf_setup,
  103. .buf_prepare = dvb_buf_prepare,
  104. .buf_queue = dvb_buf_queue,
  105. .buf_release = dvb_buf_release,
  106. };
  107. /* ------------------------------------------------------------------ */
  108. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  109. {
  110. struct cx8802_dev *dev= fe->dvb->priv;
  111. struct cx8802_driver *drv = NULL;
  112. int ret = 0;
  113. int fe_id;
  114. fe_id = videobuf_dvb_find_frontend(&dev->frontends, fe);
  115. if (!fe_id) {
  116. printk(KERN_ERR "%s() No frontend found\n", __func__);
  117. return -EINVAL;
  118. }
  119. mutex_lock(&dev->core->lock);
  120. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  121. if (drv) {
  122. if (acquire){
  123. dev->frontends.active_fe_id = fe_id;
  124. ret = drv->request_acquire(drv);
  125. } else {
  126. ret = drv->request_release(drv);
  127. dev->frontends.active_fe_id = 0;
  128. }
  129. }
  130. mutex_unlock(&dev->core->lock);
  131. return ret;
  132. }
  133. static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
  134. {
  135. struct videobuf_dvb_frontends *f;
  136. struct videobuf_dvb_frontend *fe;
  137. if (!core->dvbdev)
  138. return;
  139. f = &core->dvbdev->frontends;
  140. if (!f)
  141. return;
  142. if (f->gate <= 1) /* undefined or fe0 */
  143. fe = videobuf_dvb_get_frontend(f, 1);
  144. else
  145. fe = videobuf_dvb_get_frontend(f, f->gate);
  146. if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
  147. fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
  148. }
  149. /* ------------------------------------------------------------------ */
  150. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  151. {
  152. static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  153. static const u8 reset [] = { RESET, 0x80 };
  154. static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  155. static const u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  156. static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  157. static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  158. mt352_write(fe, clock_config, sizeof(clock_config));
  159. udelay(200);
  160. mt352_write(fe, reset, sizeof(reset));
  161. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  162. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  163. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  164. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  165. return 0;
  166. }
  167. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  168. {
  169. static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  170. static const u8 reset [] = { RESET, 0x80 };
  171. static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  172. static const u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  173. static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  174. static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  175. mt352_write(fe, clock_config, sizeof(clock_config));
  176. udelay(200);
  177. mt352_write(fe, reset, sizeof(reset));
  178. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  179. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  180. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  181. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  182. return 0;
  183. }
  184. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  185. {
  186. static const u8 clock_config [] = { 0x89, 0x38, 0x39 };
  187. static const u8 reset [] = { 0x50, 0x80 };
  188. static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  189. static const u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  190. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  191. static const u8 dntv_extra[] = { 0xB5, 0x7A };
  192. static const u8 capt_range_cfg[] = { 0x75, 0x32 };
  193. mt352_write(fe, clock_config, sizeof(clock_config));
  194. udelay(2000);
  195. mt352_write(fe, reset, sizeof(reset));
  196. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  197. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  198. udelay(2000);
  199. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  200. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  201. return 0;
  202. }
  203. static const struct mt352_config dvico_fusionhdtv = {
  204. .demod_address = 0x0f,
  205. .demod_init = dvico_fusionhdtv_demod_init,
  206. };
  207. static const struct mt352_config dntv_live_dvbt_config = {
  208. .demod_address = 0x0f,
  209. .demod_init = dntv_live_dvbt_demod_init,
  210. };
  211. static const struct mt352_config dvico_fusionhdtv_dual = {
  212. .demod_address = 0x0f,
  213. .demod_init = dvico_dual_demod_init,
  214. };
  215. static const struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
  216. .demod_address = (0x1e >> 1),
  217. .no_tuner = 1,
  218. .if2 = 45600,
  219. };
  220. static struct mb86a16_config twinhan_vp1027 = {
  221. .demod_address = 0x08,
  222. };
  223. #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
  224. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  225. {
  226. static const u8 clock_config [] = { 0x89, 0x38, 0x38 };
  227. static const u8 reset [] = { 0x50, 0x80 };
  228. static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  229. static const u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  230. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  231. static const u8 dntv_extra[] = { 0xB5, 0x7A };
  232. static const u8 capt_range_cfg[] = { 0x75, 0x32 };
  233. mt352_write(fe, clock_config, sizeof(clock_config));
  234. udelay(2000);
  235. mt352_write(fe, reset, sizeof(reset));
  236. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  237. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  238. udelay(2000);
  239. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  240. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  241. return 0;
  242. }
  243. static const struct mt352_config dntv_live_dvbt_pro_config = {
  244. .demod_address = 0x0f,
  245. .no_tuner = 1,
  246. .demod_init = dntv_live_dvbt_pro_demod_init,
  247. };
  248. #endif
  249. static const struct zl10353_config dvico_fusionhdtv_hybrid = {
  250. .demod_address = 0x0f,
  251. .no_tuner = 1,
  252. };
  253. static const struct zl10353_config dvico_fusionhdtv_xc3028 = {
  254. .demod_address = 0x0f,
  255. .if2 = 45600,
  256. .no_tuner = 1,
  257. };
  258. static const struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  259. .demod_address = 0x0f,
  260. .if2 = 4560,
  261. .no_tuner = 1,
  262. .demod_init = dvico_fusionhdtv_demod_init,
  263. };
  264. static const struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  265. .demod_address = 0x0f,
  266. };
  267. static const struct cx22702_config connexant_refboard_config = {
  268. .demod_address = 0x43,
  269. .output_mode = CX22702_SERIAL_OUTPUT,
  270. };
  271. static const struct cx22702_config hauppauge_hvr_config = {
  272. .demod_address = 0x63,
  273. .output_mode = CX22702_SERIAL_OUTPUT,
  274. };
  275. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  276. {
  277. struct cx8802_dev *dev= fe->dvb->priv;
  278. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  279. return 0;
  280. }
  281. static const struct or51132_config pchdtv_hd3000 = {
  282. .demod_address = 0x15,
  283. .set_ts_params = or51132_set_ts_param,
  284. };
  285. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  286. {
  287. struct cx8802_dev *dev= fe->dvb->priv;
  288. struct cx88_core *core = dev->core;
  289. dprintk(1, "%s: index = %d\n", __func__, index);
  290. if (index == 0)
  291. cx_clear(MO_GP0_IO, 8);
  292. else
  293. cx_set(MO_GP0_IO, 8);
  294. return 0;
  295. }
  296. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  297. {
  298. struct cx8802_dev *dev= fe->dvb->priv;
  299. if (is_punctured)
  300. dev->ts_gen_cntrl |= 0x04;
  301. else
  302. dev->ts_gen_cntrl &= ~0x04;
  303. return 0;
  304. }
  305. static struct lgdt330x_config fusionhdtv_3_gold = {
  306. .demod_address = 0x0e,
  307. .demod_chip = LGDT3302,
  308. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  309. .set_ts_params = lgdt330x_set_ts_param,
  310. };
  311. static const struct lgdt330x_config fusionhdtv_5_gold = {
  312. .demod_address = 0x0e,
  313. .demod_chip = LGDT3303,
  314. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  315. .set_ts_params = lgdt330x_set_ts_param,
  316. };
  317. static const struct lgdt330x_config pchdtv_hd5500 = {
  318. .demod_address = 0x59,
  319. .demod_chip = LGDT3303,
  320. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  321. .set_ts_params = lgdt330x_set_ts_param,
  322. };
  323. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  324. {
  325. struct cx8802_dev *dev= fe->dvb->priv;
  326. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  327. return 0;
  328. }
  329. static const struct nxt200x_config ati_hdtvwonder = {
  330. .demod_address = 0x0a,
  331. .set_ts_params = nxt200x_set_ts_param,
  332. };
  333. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  334. int is_punctured)
  335. {
  336. struct cx8802_dev *dev= fe->dvb->priv;
  337. dev->ts_gen_cntrl = 0x02;
  338. return 0;
  339. }
  340. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  341. fe_sec_voltage_t voltage)
  342. {
  343. struct cx8802_dev *dev= fe->dvb->priv;
  344. struct cx88_core *core = dev->core;
  345. if (voltage == SEC_VOLTAGE_OFF)
  346. cx_write(MO_GP0_IO, 0x000006fb);
  347. else
  348. cx_write(MO_GP0_IO, 0x000006f9);
  349. if (core->prev_set_voltage)
  350. return core->prev_set_voltage(fe, voltage);
  351. return 0;
  352. }
  353. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  354. fe_sec_voltage_t voltage)
  355. {
  356. struct cx8802_dev *dev= fe->dvb->priv;
  357. struct cx88_core *core = dev->core;
  358. if (voltage == SEC_VOLTAGE_OFF) {
  359. dprintk(1,"LNB Voltage OFF\n");
  360. cx_write(MO_GP0_IO, 0x0000efff);
  361. }
  362. if (core->prev_set_voltage)
  363. return core->prev_set_voltage(fe, voltage);
  364. return 0;
  365. }
  366. static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
  367. fe_sec_voltage_t voltage)
  368. {
  369. struct cx8802_dev *dev= fe->dvb->priv;
  370. struct cx88_core *core = dev->core;
  371. cx_set(MO_GP0_IO, 0x6040);
  372. switch (voltage) {
  373. case SEC_VOLTAGE_13:
  374. cx_clear(MO_GP0_IO, 0x20);
  375. break;
  376. case SEC_VOLTAGE_18:
  377. cx_set(MO_GP0_IO, 0x20);
  378. break;
  379. case SEC_VOLTAGE_OFF:
  380. cx_clear(MO_GP0_IO, 0x20);
  381. break;
  382. }
  383. if (core->prev_set_voltage)
  384. return core->prev_set_voltage(fe, voltage);
  385. return 0;
  386. }
  387. static int vp1027_set_voltage(struct dvb_frontend *fe,
  388. fe_sec_voltage_t voltage)
  389. {
  390. struct cx8802_dev *dev = fe->dvb->priv;
  391. struct cx88_core *core = dev->core;
  392. switch (voltage) {
  393. case SEC_VOLTAGE_13:
  394. dprintk(1, "LNB SEC Voltage=13\n");
  395. cx_write(MO_GP0_IO, 0x00001220);
  396. break;
  397. case SEC_VOLTAGE_18:
  398. dprintk(1, "LNB SEC Voltage=18\n");
  399. cx_write(MO_GP0_IO, 0x00001222);
  400. break;
  401. case SEC_VOLTAGE_OFF:
  402. dprintk(1, "LNB Voltage OFF\n");
  403. cx_write(MO_GP0_IO, 0x00001230);
  404. break;
  405. }
  406. if (core->prev_set_voltage)
  407. return core->prev_set_voltage(fe, voltage);
  408. return 0;
  409. }
  410. static const struct cx24123_config geniatech_dvbs_config = {
  411. .demod_address = 0x55,
  412. .set_ts_params = cx24123_set_ts_param,
  413. };
  414. static const struct cx24123_config hauppauge_novas_config = {
  415. .demod_address = 0x55,
  416. .set_ts_params = cx24123_set_ts_param,
  417. };
  418. static const struct cx24123_config kworld_dvbs_100_config = {
  419. .demod_address = 0x15,
  420. .set_ts_params = cx24123_set_ts_param,
  421. .lnb_polarity = 1,
  422. };
  423. static const struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  424. .demod_address = 0x32 >> 1,
  425. .output_mode = S5H1409_PARALLEL_OUTPUT,
  426. .gpio = S5H1409_GPIO_ON,
  427. .qam_if = 44000,
  428. .inversion = S5H1409_INVERSION_OFF,
  429. .status_mode = S5H1409_DEMODLOCKING,
  430. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  431. };
  432. static const struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  433. .demod_address = 0x32 >> 1,
  434. .output_mode = S5H1409_SERIAL_OUTPUT,
  435. .gpio = S5H1409_GPIO_OFF,
  436. .inversion = S5H1409_INVERSION_OFF,
  437. .status_mode = S5H1409_DEMODLOCKING,
  438. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  439. };
  440. static const struct s5h1409_config kworld_atsc_120_config = {
  441. .demod_address = 0x32 >> 1,
  442. .output_mode = S5H1409_SERIAL_OUTPUT,
  443. .gpio = S5H1409_GPIO_OFF,
  444. .inversion = S5H1409_INVERSION_OFF,
  445. .status_mode = S5H1409_DEMODLOCKING,
  446. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  447. };
  448. static const struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  449. .i2c_address = 0x64,
  450. .if_khz = 5380,
  451. };
  452. static const struct zl10353_config cx88_pinnacle_hybrid_pctv = {
  453. .demod_address = (0x1e >> 1),
  454. .no_tuner = 1,
  455. .if2 = 45600,
  456. };
  457. static const struct zl10353_config cx88_geniatech_x8000_mt = {
  458. .demod_address = (0x1e >> 1),
  459. .no_tuner = 1,
  460. .disable_i2c_gate_ctrl = 1,
  461. };
  462. static const struct s5h1411_config dvico_fusionhdtv7_config = {
  463. .output_mode = S5H1411_SERIAL_OUTPUT,
  464. .gpio = S5H1411_GPIO_ON,
  465. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  466. .qam_if = S5H1411_IF_44000,
  467. .vsb_if = S5H1411_IF_44000,
  468. .inversion = S5H1411_INVERSION_OFF,
  469. .status_mode = S5H1411_DEMODLOCKING
  470. };
  471. static const struct xc5000_config dvico_fusionhdtv7_tuner_config = {
  472. .i2c_address = 0xc2 >> 1,
  473. .if_khz = 5380,
  474. };
  475. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  476. {
  477. struct dvb_frontend *fe;
  478. struct videobuf_dvb_frontend *fe0 = NULL;
  479. struct xc2028_ctrl ctl;
  480. struct xc2028_config cfg = {
  481. .i2c_adap = &dev->core->i2c_adap,
  482. .i2c_addr = addr,
  483. .ctrl = &ctl,
  484. };
  485. /* Get the first frontend */
  486. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  487. if (!fe0)
  488. return -EINVAL;
  489. if (!fe0->dvb.frontend) {
  490. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  491. "Can't attach xc3028\n",
  492. dev->core->name);
  493. return -EINVAL;
  494. }
  495. /*
  496. * Some xc3028 devices may be hidden by an I2C gate. This is known
  497. * to happen with some s5h1409-based devices.
  498. * Now that I2C gate is open, sets up xc3028 configuration
  499. */
  500. cx88_setup_xc3028(dev->core, &ctl);
  501. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
  502. if (!fe) {
  503. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  504. dev->core->name);
  505. dvb_frontend_detach(fe0->dvb.frontend);
  506. dvb_unregister_frontend(fe0->dvb.frontend);
  507. fe0->dvb.frontend = NULL;
  508. return -EINVAL;
  509. }
  510. printk(KERN_INFO "%s/2: xc3028 attached\n",
  511. dev->core->name);
  512. return 0;
  513. }
  514. static int attach_xc4000(struct cx8802_dev *dev, struct xc4000_config *cfg)
  515. {
  516. struct dvb_frontend *fe;
  517. struct videobuf_dvb_frontend *fe0 = NULL;
  518. /* Get the first frontend */
  519. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  520. if (!fe0)
  521. return -EINVAL;
  522. if (!fe0->dvb.frontend) {
  523. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  524. "Can't attach xc4000\n",
  525. dev->core->name);
  526. return -EINVAL;
  527. }
  528. fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, &dev->core->i2c_adap,
  529. cfg);
  530. if (!fe) {
  531. printk(KERN_ERR "%s/2: xc4000 attach failed\n",
  532. dev->core->name);
  533. dvb_frontend_detach(fe0->dvb.frontend);
  534. dvb_unregister_frontend(fe0->dvb.frontend);
  535. fe0->dvb.frontend = NULL;
  536. return -EINVAL;
  537. }
  538. printk(KERN_INFO "%s/2: xc4000 attached\n", dev->core->name);
  539. return 0;
  540. }
  541. static int cx24116_set_ts_param(struct dvb_frontend *fe,
  542. int is_punctured)
  543. {
  544. struct cx8802_dev *dev = fe->dvb->priv;
  545. dev->ts_gen_cntrl = 0x2;
  546. return 0;
  547. }
  548. static int stv0900_set_ts_param(struct dvb_frontend *fe,
  549. int is_punctured)
  550. {
  551. struct cx8802_dev *dev = fe->dvb->priv;
  552. dev->ts_gen_cntrl = 0;
  553. return 0;
  554. }
  555. static int cx24116_reset_device(struct dvb_frontend *fe)
  556. {
  557. struct cx8802_dev *dev = fe->dvb->priv;
  558. struct cx88_core *core = dev->core;
  559. /* Reset the part */
  560. /* Put the cx24116 into reset */
  561. cx_write(MO_SRST_IO, 0);
  562. msleep(10);
  563. /* Take the cx24116 out of reset */
  564. cx_write(MO_SRST_IO, 1);
  565. msleep(10);
  566. return 0;
  567. }
  568. static const struct cx24116_config hauppauge_hvr4000_config = {
  569. .demod_address = 0x05,
  570. .set_ts_params = cx24116_set_ts_param,
  571. .reset_device = cx24116_reset_device,
  572. };
  573. static const struct cx24116_config tevii_s460_config = {
  574. .demod_address = 0x55,
  575. .set_ts_params = cx24116_set_ts_param,
  576. .reset_device = cx24116_reset_device,
  577. };
  578. static int ds3000_set_ts_param(struct dvb_frontend *fe,
  579. int is_punctured)
  580. {
  581. struct cx8802_dev *dev = fe->dvb->priv;
  582. dev->ts_gen_cntrl = 4;
  583. return 0;
  584. }
  585. static struct ds3000_config tevii_ds3000_config = {
  586. .demod_address = 0x68,
  587. .set_ts_params = ds3000_set_ts_param,
  588. };
  589. static struct ts2020_config tevii_ts2020_config = {
  590. .tuner_address = 0x60,
  591. .clk_out_div = 1,
  592. };
  593. static const struct stv0900_config prof_7301_stv0900_config = {
  594. .demod_address = 0x6a,
  595. /* demod_mode = 0,*/
  596. .xtal = 27000000,
  597. .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
  598. .diseqc_mode = 2,/* 2/3 PWM */
  599. .tun1_maddress = 0,/* 0x60 */
  600. .tun1_adc = 0,/* 2 Vpp */
  601. .path1_mode = 3,
  602. .set_ts_params = stv0900_set_ts_param,
  603. };
  604. static const struct stb6100_config prof_7301_stb6100_config = {
  605. .tuner_address = 0x60,
  606. .refclock = 27000000,
  607. };
  608. static const struct stv0299_config tevii_tuner_sharp_config = {
  609. .demod_address = 0x68,
  610. .inittab = sharp_z0194a_inittab,
  611. .mclk = 88000000UL,
  612. .invert = 1,
  613. .skip_reinit = 0,
  614. .lock_output = 1,
  615. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  616. .min_delay_ms = 100,
  617. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  618. .set_ts_params = cx24116_set_ts_param,
  619. };
  620. static const struct stv0288_config tevii_tuner_earda_config = {
  621. .demod_address = 0x68,
  622. .min_delay_ms = 100,
  623. .set_ts_params = cx24116_set_ts_param,
  624. };
  625. static int cx8802_alloc_frontends(struct cx8802_dev *dev)
  626. {
  627. struct cx88_core *core = dev->core;
  628. struct videobuf_dvb_frontend *fe = NULL;
  629. int i;
  630. mutex_init(&dev->frontends.lock);
  631. INIT_LIST_HEAD(&dev->frontends.felist);
  632. if (!core->board.num_frontends)
  633. return -ENODEV;
  634. printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
  635. core->board.num_frontends);
  636. for (i = 1; i <= core->board.num_frontends; i++) {
  637. fe = videobuf_dvb_alloc_frontend(&dev->frontends, i);
  638. if (!fe) {
  639. printk(KERN_ERR "%s() failed to alloc\n", __func__);
  640. videobuf_dvb_dealloc_frontends(&dev->frontends);
  641. return -ENOMEM;
  642. }
  643. }
  644. return 0;
  645. }
  646. static const u8 samsung_smt_7020_inittab[] = {
  647. 0x01, 0x15,
  648. 0x02, 0x00,
  649. 0x03, 0x00,
  650. 0x04, 0x7D,
  651. 0x05, 0x0F,
  652. 0x06, 0x02,
  653. 0x07, 0x00,
  654. 0x08, 0x60,
  655. 0x0A, 0xC2,
  656. 0x0B, 0x00,
  657. 0x0C, 0x01,
  658. 0x0D, 0x81,
  659. 0x0E, 0x44,
  660. 0x0F, 0x09,
  661. 0x10, 0x3C,
  662. 0x11, 0x84,
  663. 0x12, 0xDA,
  664. 0x13, 0x99,
  665. 0x14, 0x8D,
  666. 0x15, 0xCE,
  667. 0x16, 0xE8,
  668. 0x17, 0x43,
  669. 0x18, 0x1C,
  670. 0x19, 0x1B,
  671. 0x1A, 0x1D,
  672. 0x1C, 0x12,
  673. 0x1D, 0x00,
  674. 0x1E, 0x00,
  675. 0x1F, 0x00,
  676. 0x20, 0x00,
  677. 0x21, 0x00,
  678. 0x22, 0x00,
  679. 0x23, 0x00,
  680. 0x28, 0x02,
  681. 0x29, 0x28,
  682. 0x2A, 0x14,
  683. 0x2B, 0x0F,
  684. 0x2C, 0x09,
  685. 0x2D, 0x05,
  686. 0x31, 0x1F,
  687. 0x32, 0x19,
  688. 0x33, 0xFC,
  689. 0x34, 0x13,
  690. 0xff, 0xff,
  691. };
  692. static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe)
  693. {
  694. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  695. struct cx8802_dev *dev = fe->dvb->priv;
  696. u8 buf[4];
  697. u32 div;
  698. struct i2c_msg msg = {
  699. .addr = 0x61,
  700. .flags = 0,
  701. .buf = buf,
  702. .len = sizeof(buf) };
  703. div = c->frequency / 125;
  704. buf[0] = (div >> 8) & 0x7f;
  705. buf[1] = div & 0xff;
  706. buf[2] = 0x84; /* 0xC4 */
  707. buf[3] = 0x00;
  708. if (c->frequency < 1500000)
  709. buf[3] |= 0x10;
  710. if (fe->ops.i2c_gate_ctrl)
  711. fe->ops.i2c_gate_ctrl(fe, 1);
  712. if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
  713. return -EIO;
  714. return 0;
  715. }
  716. static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
  717. fe_sec_tone_mode_t tone)
  718. {
  719. struct cx8802_dev *dev = fe->dvb->priv;
  720. struct cx88_core *core = dev->core;
  721. cx_set(MO_GP0_IO, 0x0800);
  722. switch (tone) {
  723. case SEC_TONE_ON:
  724. cx_set(MO_GP0_IO, 0x08);
  725. break;
  726. case SEC_TONE_OFF:
  727. cx_clear(MO_GP0_IO, 0x08);
  728. break;
  729. default:
  730. return -EINVAL;
  731. }
  732. return 0;
  733. }
  734. static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
  735. fe_sec_voltage_t voltage)
  736. {
  737. struct cx8802_dev *dev = fe->dvb->priv;
  738. struct cx88_core *core = dev->core;
  739. u8 data;
  740. struct i2c_msg msg = {
  741. .addr = 8,
  742. .flags = 0,
  743. .buf = &data,
  744. .len = sizeof(data) };
  745. cx_set(MO_GP0_IO, 0x8000);
  746. switch (voltage) {
  747. case SEC_VOLTAGE_OFF:
  748. break;
  749. case SEC_VOLTAGE_13:
  750. data = ISL6421_EN1 | ISL6421_LLC1;
  751. cx_clear(MO_GP0_IO, 0x80);
  752. break;
  753. case SEC_VOLTAGE_18:
  754. data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
  755. cx_clear(MO_GP0_IO, 0x80);
  756. break;
  757. default:
  758. return -EINVAL;
  759. }
  760. return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
  761. }
  762. static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
  763. u32 srate, u32 ratio)
  764. {
  765. u8 aclk = 0;
  766. u8 bclk = 0;
  767. if (srate < 1500000) {
  768. aclk = 0xb7;
  769. bclk = 0x47;
  770. } else if (srate < 3000000) {
  771. aclk = 0xb7;
  772. bclk = 0x4b;
  773. } else if (srate < 7000000) {
  774. aclk = 0xb7;
  775. bclk = 0x4f;
  776. } else if (srate < 14000000) {
  777. aclk = 0xb7;
  778. bclk = 0x53;
  779. } else if (srate < 30000000) {
  780. aclk = 0xb6;
  781. bclk = 0x53;
  782. } else if (srate < 45000000) {
  783. aclk = 0xb4;
  784. bclk = 0x51;
  785. }
  786. stv0299_writereg(fe, 0x13, aclk);
  787. stv0299_writereg(fe, 0x14, bclk);
  788. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  789. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  790. stv0299_writereg(fe, 0x21, ratio & 0xf0);
  791. return 0;
  792. }
  793. static const struct stv0299_config samsung_stv0299_config = {
  794. .demod_address = 0x68,
  795. .inittab = samsung_smt_7020_inittab,
  796. .mclk = 88000000UL,
  797. .invert = 0,
  798. .skip_reinit = 0,
  799. .lock_output = STV0299_LOCKOUTPUT_LK,
  800. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  801. .min_delay_ms = 100,
  802. .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
  803. };
  804. static int dvb_register(struct cx8802_dev *dev)
  805. {
  806. struct cx88_core *core = dev->core;
  807. struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
  808. int mfe_shared = 0; /* bus not shared by default */
  809. int res = -EINVAL;
  810. if (0 != core->i2c_rc) {
  811. printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
  812. goto frontend_detach;
  813. }
  814. /* Get the first frontend */
  815. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  816. if (!fe0)
  817. goto frontend_detach;
  818. /* multi-frontend gate control is undefined or defaults to fe0 */
  819. dev->frontends.gate = 0;
  820. /* Sets the gate control callback to be used by i2c command calls */
  821. core->gate_ctrl = cx88_dvb_gate_ctrl;
  822. /* init frontend(s) */
  823. switch (core->boardnr) {
  824. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  825. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  826. &connexant_refboard_config,
  827. &core->i2c_adap);
  828. if (fe0->dvb.frontend != NULL) {
  829. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  830. 0x61, &core->i2c_adap,
  831. DVB_PLL_THOMSON_DTT759X))
  832. goto frontend_detach;
  833. }
  834. break;
  835. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  836. case CX88_BOARD_CONEXANT_DVB_T1:
  837. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  838. case CX88_BOARD_WINFAST_DTV1000:
  839. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  840. &connexant_refboard_config,
  841. &core->i2c_adap);
  842. if (fe0->dvb.frontend != NULL) {
  843. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  844. 0x60, &core->i2c_adap,
  845. DVB_PLL_THOMSON_DTT7579))
  846. goto frontend_detach;
  847. }
  848. break;
  849. case CX88_BOARD_WINFAST_DTV2000H:
  850. case CX88_BOARD_HAUPPAUGE_HVR1100:
  851. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  852. case CX88_BOARD_HAUPPAUGE_HVR1300:
  853. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  854. &hauppauge_hvr_config,
  855. &core->i2c_adap);
  856. if (fe0->dvb.frontend != NULL) {
  857. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  858. &core->i2c_adap, 0x61,
  859. TUNER_PHILIPS_FMD1216ME_MK3))
  860. goto frontend_detach;
  861. }
  862. break;
  863. case CX88_BOARD_WINFAST_DTV2000H_J:
  864. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  865. &hauppauge_hvr_config,
  866. &core->i2c_adap);
  867. if (fe0->dvb.frontend != NULL) {
  868. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  869. &core->i2c_adap, 0x61,
  870. TUNER_PHILIPS_FMD1216MEX_MK3))
  871. goto frontend_detach;
  872. }
  873. break;
  874. case CX88_BOARD_HAUPPAUGE_HVR3000:
  875. /* MFE frontend 1 */
  876. mfe_shared = 1;
  877. dev->frontends.gate = 2;
  878. /* DVB-S init */
  879. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  880. &hauppauge_novas_config,
  881. &dev->core->i2c_adap);
  882. if (fe0->dvb.frontend) {
  883. if (!dvb_attach(isl6421_attach,
  884. fe0->dvb.frontend,
  885. &dev->core->i2c_adap,
  886. 0x08, ISL6421_DCL, 0x00))
  887. goto frontend_detach;
  888. }
  889. /* MFE frontend 2 */
  890. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  891. if (!fe1)
  892. goto frontend_detach;
  893. /* DVB-T init */
  894. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  895. &hauppauge_hvr_config,
  896. &dev->core->i2c_adap);
  897. if (fe1->dvb.frontend) {
  898. fe1->dvb.frontend->id = 1;
  899. if (!dvb_attach(simple_tuner_attach,
  900. fe1->dvb.frontend,
  901. &dev->core->i2c_adap,
  902. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  903. goto frontend_detach;
  904. }
  905. break;
  906. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  907. fe0->dvb.frontend = dvb_attach(mt352_attach,
  908. &dvico_fusionhdtv,
  909. &core->i2c_adap);
  910. if (fe0->dvb.frontend != NULL) {
  911. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  912. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  913. goto frontend_detach;
  914. break;
  915. }
  916. /* ZL10353 replaces MT352 on later cards */
  917. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  918. &dvico_fusionhdtv_plus_v1_1,
  919. &core->i2c_adap);
  920. if (fe0->dvb.frontend != NULL) {
  921. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  922. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  923. goto frontend_detach;
  924. }
  925. break;
  926. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  927. /* The tin box says DEE1601, but it seems to be DTT7579
  928. * compatible, with a slightly different MT352 AGC gain. */
  929. fe0->dvb.frontend = dvb_attach(mt352_attach,
  930. &dvico_fusionhdtv_dual,
  931. &core->i2c_adap);
  932. if (fe0->dvb.frontend != NULL) {
  933. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  934. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  935. goto frontend_detach;
  936. break;
  937. }
  938. /* ZL10353 replaces MT352 on later cards */
  939. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  940. &dvico_fusionhdtv_plus_v1_1,
  941. &core->i2c_adap);
  942. if (fe0->dvb.frontend != NULL) {
  943. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  944. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  945. goto frontend_detach;
  946. }
  947. break;
  948. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  949. fe0->dvb.frontend = dvb_attach(mt352_attach,
  950. &dvico_fusionhdtv,
  951. &core->i2c_adap);
  952. if (fe0->dvb.frontend != NULL) {
  953. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  954. 0x61, NULL, DVB_PLL_LG_Z201))
  955. goto frontend_detach;
  956. }
  957. break;
  958. case CX88_BOARD_KWORLD_DVB_T:
  959. case CX88_BOARD_DNTV_LIVE_DVB_T:
  960. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  961. fe0->dvb.frontend = dvb_attach(mt352_attach,
  962. &dntv_live_dvbt_config,
  963. &core->i2c_adap);
  964. if (fe0->dvb.frontend != NULL) {
  965. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  966. 0x61, NULL, DVB_PLL_UNKNOWN_1))
  967. goto frontend_detach;
  968. }
  969. break;
  970. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  971. #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
  972. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  973. fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  974. &dev->vp3054->adap);
  975. if (fe0->dvb.frontend != NULL) {
  976. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  977. &core->i2c_adap, 0x61,
  978. TUNER_PHILIPS_FMD1216ME_MK3))
  979. goto frontend_detach;
  980. }
  981. #else
  982. printk(KERN_ERR "%s/2: built without vp3054 support\n",
  983. core->name);
  984. #endif
  985. break;
  986. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  987. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  988. &dvico_fusionhdtv_hybrid,
  989. &core->i2c_adap);
  990. if (fe0->dvb.frontend != NULL) {
  991. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  992. &core->i2c_adap, 0x61,
  993. TUNER_THOMSON_FE6600))
  994. goto frontend_detach;
  995. }
  996. break;
  997. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  998. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  999. &dvico_fusionhdtv_xc3028,
  1000. &core->i2c_adap);
  1001. if (fe0->dvb.frontend == NULL)
  1002. fe0->dvb.frontend = dvb_attach(mt352_attach,
  1003. &dvico_fusionhdtv_mt352_xc3028,
  1004. &core->i2c_adap);
  1005. /*
  1006. * On this board, the demod provides the I2C bus pullup.
  1007. * We must not permit gate_ctrl to be performed, or
  1008. * the xc3028 cannot communicate on the bus.
  1009. */
  1010. if (fe0->dvb.frontend)
  1011. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1012. if (attach_xc3028(0x61, dev) < 0)
  1013. goto frontend_detach;
  1014. break;
  1015. case CX88_BOARD_PCHDTV_HD3000:
  1016. fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  1017. &core->i2c_adap);
  1018. if (fe0->dvb.frontend != NULL) {
  1019. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1020. &core->i2c_adap, 0x61,
  1021. TUNER_THOMSON_DTT761X))
  1022. goto frontend_detach;
  1023. }
  1024. break;
  1025. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  1026. dev->ts_gen_cntrl = 0x08;
  1027. /* Do a hardware reset of chip before using it. */
  1028. cx_clear(MO_GP0_IO, 1);
  1029. mdelay(100);
  1030. cx_set(MO_GP0_IO, 1);
  1031. mdelay(200);
  1032. /* Select RF connector callback */
  1033. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  1034. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1035. &fusionhdtv_3_gold,
  1036. &core->i2c_adap);
  1037. if (fe0->dvb.frontend != NULL) {
  1038. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1039. &core->i2c_adap, 0x61,
  1040. TUNER_MICROTUNE_4042FI5))
  1041. goto frontend_detach;
  1042. }
  1043. break;
  1044. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  1045. dev->ts_gen_cntrl = 0x08;
  1046. /* Do a hardware reset of chip before using it. */
  1047. cx_clear(MO_GP0_IO, 1);
  1048. mdelay(100);
  1049. cx_set(MO_GP0_IO, 9);
  1050. mdelay(200);
  1051. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1052. &fusionhdtv_3_gold,
  1053. &core->i2c_adap);
  1054. if (fe0->dvb.frontend != NULL) {
  1055. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1056. &core->i2c_adap, 0x61,
  1057. TUNER_THOMSON_DTT761X))
  1058. goto frontend_detach;
  1059. }
  1060. break;
  1061. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  1062. dev->ts_gen_cntrl = 0x08;
  1063. /* Do a hardware reset of chip before using it. */
  1064. cx_clear(MO_GP0_IO, 1);
  1065. mdelay(100);
  1066. cx_set(MO_GP0_IO, 1);
  1067. mdelay(200);
  1068. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1069. &fusionhdtv_5_gold,
  1070. &core->i2c_adap);
  1071. if (fe0->dvb.frontend != NULL) {
  1072. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1073. &core->i2c_adap, 0x61,
  1074. TUNER_LG_TDVS_H06XF))
  1075. goto frontend_detach;
  1076. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1077. &core->i2c_adap, 0x43))
  1078. goto frontend_detach;
  1079. }
  1080. break;
  1081. case CX88_BOARD_PCHDTV_HD5500:
  1082. dev->ts_gen_cntrl = 0x08;
  1083. /* Do a hardware reset of chip before using it. */
  1084. cx_clear(MO_GP0_IO, 1);
  1085. mdelay(100);
  1086. cx_set(MO_GP0_IO, 1);
  1087. mdelay(200);
  1088. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1089. &pchdtv_hd5500,
  1090. &core->i2c_adap);
  1091. if (fe0->dvb.frontend != NULL) {
  1092. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1093. &core->i2c_adap, 0x61,
  1094. TUNER_LG_TDVS_H06XF))
  1095. goto frontend_detach;
  1096. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1097. &core->i2c_adap, 0x43))
  1098. goto frontend_detach;
  1099. }
  1100. break;
  1101. case CX88_BOARD_ATI_HDTVWONDER:
  1102. fe0->dvb.frontend = dvb_attach(nxt200x_attach,
  1103. &ati_hdtvwonder,
  1104. &core->i2c_adap);
  1105. if (fe0->dvb.frontend != NULL) {
  1106. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1107. &core->i2c_adap, 0x61,
  1108. TUNER_PHILIPS_TUV1236D))
  1109. goto frontend_detach;
  1110. }
  1111. break;
  1112. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  1113. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  1114. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1115. &hauppauge_novas_config,
  1116. &core->i2c_adap);
  1117. if (fe0->dvb.frontend) {
  1118. if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
  1119. &core->i2c_adap, 0x08, ISL6421_DCL, 0x00))
  1120. goto frontend_detach;
  1121. }
  1122. break;
  1123. case CX88_BOARD_KWORLD_DVBS_100:
  1124. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1125. &kworld_dvbs_100_config,
  1126. &core->i2c_adap);
  1127. if (fe0->dvb.frontend) {
  1128. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1129. fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  1130. }
  1131. break;
  1132. case CX88_BOARD_GENIATECH_DVBS:
  1133. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1134. &geniatech_dvbs_config,
  1135. &core->i2c_adap);
  1136. if (fe0->dvb.frontend) {
  1137. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1138. fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  1139. }
  1140. break;
  1141. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  1142. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1143. &pinnacle_pctv_hd_800i_config,
  1144. &core->i2c_adap);
  1145. if (fe0->dvb.frontend != NULL) {
  1146. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1147. &core->i2c_adap,
  1148. &pinnacle_pctv_hd_800i_tuner_config))
  1149. goto frontend_detach;
  1150. }
  1151. break;
  1152. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  1153. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1154. &dvico_hdtv5_pci_nano_config,
  1155. &core->i2c_adap);
  1156. if (fe0->dvb.frontend != NULL) {
  1157. struct dvb_frontend *fe;
  1158. struct xc2028_config cfg = {
  1159. .i2c_adap = &core->i2c_adap,
  1160. .i2c_addr = 0x61,
  1161. };
  1162. static struct xc2028_ctrl ctl = {
  1163. .fname = XC2028_DEFAULT_FIRMWARE,
  1164. .max_len = 64,
  1165. .scode_table = XC3028_FE_OREN538,
  1166. };
  1167. fe = dvb_attach(xc2028_attach,
  1168. fe0->dvb.frontend, &cfg);
  1169. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  1170. fe->ops.tuner_ops.set_config(fe, &ctl);
  1171. }
  1172. break;
  1173. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  1174. case CX88_BOARD_WINFAST_DTV1800H:
  1175. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1176. &cx88_pinnacle_hybrid_pctv,
  1177. &core->i2c_adap);
  1178. if (fe0->dvb.frontend) {
  1179. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1180. if (attach_xc3028(0x61, dev) < 0)
  1181. goto frontend_detach;
  1182. }
  1183. break;
  1184. case CX88_BOARD_WINFAST_DTV1800H_XC4000:
  1185. case CX88_BOARD_WINFAST_DTV2000H_PLUS:
  1186. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1187. &cx88_pinnacle_hybrid_pctv,
  1188. &core->i2c_adap);
  1189. if (fe0->dvb.frontend) {
  1190. struct xc4000_config cfg = {
  1191. .i2c_address = 0x61,
  1192. .default_pm = 0,
  1193. .dvb_amplitude = 134,
  1194. .set_smoothedcvbs = 1,
  1195. .if_khz = 4560
  1196. };
  1197. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1198. if (attach_xc4000(dev, &cfg) < 0)
  1199. goto frontend_detach;
  1200. }
  1201. break;
  1202. case CX88_BOARD_GENIATECH_X8000_MT:
  1203. dev->ts_gen_cntrl = 0x00;
  1204. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1205. &cx88_geniatech_x8000_mt,
  1206. &core->i2c_adap);
  1207. if (attach_xc3028(0x61, dev) < 0)
  1208. goto frontend_detach;
  1209. break;
  1210. case CX88_BOARD_KWORLD_ATSC_120:
  1211. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1212. &kworld_atsc_120_config,
  1213. &core->i2c_adap);
  1214. if (attach_xc3028(0x61, dev) < 0)
  1215. goto frontend_detach;
  1216. break;
  1217. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
  1218. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  1219. &dvico_fusionhdtv7_config,
  1220. &core->i2c_adap);
  1221. if (fe0->dvb.frontend != NULL) {
  1222. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1223. &core->i2c_adap,
  1224. &dvico_fusionhdtv7_tuner_config))
  1225. goto frontend_detach;
  1226. }
  1227. break;
  1228. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1229. /* MFE frontend 1 */
  1230. mfe_shared = 1;
  1231. dev->frontends.gate = 2;
  1232. /* DVB-S/S2 Init */
  1233. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1234. &hauppauge_hvr4000_config,
  1235. &dev->core->i2c_adap);
  1236. if (fe0->dvb.frontend) {
  1237. if (!dvb_attach(isl6421_attach,
  1238. fe0->dvb.frontend,
  1239. &dev->core->i2c_adap,
  1240. 0x08, ISL6421_DCL, 0x00))
  1241. goto frontend_detach;
  1242. }
  1243. /* MFE frontend 2 */
  1244. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  1245. if (!fe1)
  1246. goto frontend_detach;
  1247. /* DVB-T Init */
  1248. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  1249. &hauppauge_hvr_config,
  1250. &dev->core->i2c_adap);
  1251. if (fe1->dvb.frontend) {
  1252. fe1->dvb.frontend->id = 1;
  1253. if (!dvb_attach(simple_tuner_attach,
  1254. fe1->dvb.frontend,
  1255. &dev->core->i2c_adap,
  1256. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  1257. goto frontend_detach;
  1258. }
  1259. break;
  1260. case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
  1261. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1262. &hauppauge_hvr4000_config,
  1263. &dev->core->i2c_adap);
  1264. if (fe0->dvb.frontend) {
  1265. if (!dvb_attach(isl6421_attach,
  1266. fe0->dvb.frontend,
  1267. &dev->core->i2c_adap,
  1268. 0x08, ISL6421_DCL, 0x00))
  1269. goto frontend_detach;
  1270. }
  1271. break;
  1272. case CX88_BOARD_PROF_6200:
  1273. case CX88_BOARD_TBS_8910:
  1274. case CX88_BOARD_TEVII_S420:
  1275. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1276. &tevii_tuner_sharp_config,
  1277. &core->i2c_adap);
  1278. if (fe0->dvb.frontend != NULL) {
  1279. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
  1280. &core->i2c_adap, DVB_PLL_OPERA1))
  1281. goto frontend_detach;
  1282. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1283. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1284. } else {
  1285. fe0->dvb.frontend = dvb_attach(stv0288_attach,
  1286. &tevii_tuner_earda_config,
  1287. &core->i2c_adap);
  1288. if (fe0->dvb.frontend != NULL) {
  1289. if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
  1290. &core->i2c_adap))
  1291. goto frontend_detach;
  1292. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1293. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1294. }
  1295. }
  1296. break;
  1297. case CX88_BOARD_TEVII_S460:
  1298. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1299. &tevii_s460_config,
  1300. &core->i2c_adap);
  1301. if (fe0->dvb.frontend != NULL)
  1302. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1303. break;
  1304. case CX88_BOARD_TEVII_S464:
  1305. fe0->dvb.frontend = dvb_attach(ds3000_attach,
  1306. &tevii_ds3000_config,
  1307. &core->i2c_adap);
  1308. if (fe0->dvb.frontend != NULL) {
  1309. dvb_attach(ts2020_attach, fe0->dvb.frontend,
  1310. &tevii_ts2020_config, &core->i2c_adap);
  1311. fe0->dvb.frontend->ops.set_voltage =
  1312. tevii_dvbs_set_voltage;
  1313. }
  1314. break;
  1315. case CX88_BOARD_OMICOM_SS4_PCI:
  1316. case CX88_BOARD_TBS_8920:
  1317. case CX88_BOARD_PROF_7300:
  1318. case CX88_BOARD_SATTRADE_ST4200:
  1319. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1320. &hauppauge_hvr4000_config,
  1321. &core->i2c_adap);
  1322. if (fe0->dvb.frontend != NULL)
  1323. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1324. break;
  1325. case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
  1326. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1327. &cx88_terratec_cinergy_ht_pci_mkii_config,
  1328. &core->i2c_adap);
  1329. if (fe0->dvb.frontend) {
  1330. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1331. if (attach_xc3028(0x61, dev) < 0)
  1332. goto frontend_detach;
  1333. }
  1334. break;
  1335. case CX88_BOARD_PROF_7301:{
  1336. struct dvb_tuner_ops *tuner_ops = NULL;
  1337. fe0->dvb.frontend = dvb_attach(stv0900_attach,
  1338. &prof_7301_stv0900_config,
  1339. &core->i2c_adap, 0);
  1340. if (fe0->dvb.frontend != NULL) {
  1341. if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
  1342. &prof_7301_stb6100_config,
  1343. &core->i2c_adap))
  1344. goto frontend_detach;
  1345. tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
  1346. tuner_ops->set_frequency = stb6100_set_freq;
  1347. tuner_ops->get_frequency = stb6100_get_freq;
  1348. tuner_ops->set_bandwidth = stb6100_set_bandw;
  1349. tuner_ops->get_bandwidth = stb6100_get_bandw;
  1350. core->prev_set_voltage =
  1351. fe0->dvb.frontend->ops.set_voltage;
  1352. fe0->dvb.frontend->ops.set_voltage =
  1353. tevii_dvbs_set_voltage;
  1354. }
  1355. break;
  1356. }
  1357. case CX88_BOARD_SAMSUNG_SMT_7020:
  1358. dev->ts_gen_cntrl = 0x08;
  1359. cx_set(MO_GP0_IO, 0x0101);
  1360. cx_clear(MO_GP0_IO, 0x01);
  1361. mdelay(100);
  1362. cx_set(MO_GP0_IO, 0x01);
  1363. mdelay(200);
  1364. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1365. &samsung_stv0299_config,
  1366. &dev->core->i2c_adap);
  1367. if (fe0->dvb.frontend) {
  1368. fe0->dvb.frontend->ops.tuner_ops.set_params =
  1369. samsung_smt_7020_tuner_set_params;
  1370. fe0->dvb.frontend->tuner_priv =
  1371. &dev->core->i2c_adap;
  1372. fe0->dvb.frontend->ops.set_voltage =
  1373. samsung_smt_7020_set_voltage;
  1374. fe0->dvb.frontend->ops.set_tone =
  1375. samsung_smt_7020_set_tone;
  1376. }
  1377. break;
  1378. case CX88_BOARD_TWINHAN_VP1027_DVBS:
  1379. dev->ts_gen_cntrl = 0x00;
  1380. fe0->dvb.frontend = dvb_attach(mb86a16_attach,
  1381. &twinhan_vp1027,
  1382. &core->i2c_adap);
  1383. if (fe0->dvb.frontend) {
  1384. core->prev_set_voltage =
  1385. fe0->dvb.frontend->ops.set_voltage;
  1386. fe0->dvb.frontend->ops.set_voltage =
  1387. vp1027_set_voltage;
  1388. }
  1389. break;
  1390. default:
  1391. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  1392. core->name);
  1393. break;
  1394. }
  1395. if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
  1396. printk(KERN_ERR
  1397. "%s/2: frontend initialization failed\n",
  1398. core->name);
  1399. goto frontend_detach;
  1400. }
  1401. /* define general-purpose callback pointer */
  1402. fe0->dvb.frontend->callback = cx88_tuner_callback;
  1403. /* Ensure all frontends negotiate bus access */
  1404. fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1405. if (fe1)
  1406. fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1407. /* Put the analog decoder in standby to keep it quiet */
  1408. call_all(core, core, s_power, 0);
  1409. /* register everything */
  1410. res = videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
  1411. &dev->pci->dev, adapter_nr, mfe_shared);
  1412. if (res)
  1413. goto frontend_detach;
  1414. return res;
  1415. frontend_detach:
  1416. core->gate_ctrl = NULL;
  1417. videobuf_dvb_dealloc_frontends(&dev->frontends);
  1418. return res;
  1419. }
  1420. /* ----------------------------------------------------------- */
  1421. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  1422. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  1423. {
  1424. struct cx88_core *core = drv->core;
  1425. int err = 0;
  1426. dprintk( 1, "%s\n", __func__);
  1427. switch (core->boardnr) {
  1428. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1429. /* We arrive here with either the cx23416 or the cx22702
  1430. * on the bus. Take the bus from the cx23416 and enable the
  1431. * cx22702 demod
  1432. */
  1433. /* Toggle reset on cx22702 leaving i2c active */
  1434. cx_set(MO_GP0_IO, 0x00000080);
  1435. udelay(1000);
  1436. cx_clear(MO_GP0_IO, 0x00000080);
  1437. udelay(50);
  1438. cx_set(MO_GP0_IO, 0x00000080);
  1439. udelay(1000);
  1440. /* enable the cx22702 pins */
  1441. cx_clear(MO_GP0_IO, 0x00000004);
  1442. udelay(1000);
  1443. break;
  1444. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1445. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1446. /* Toggle reset on cx22702 leaving i2c active */
  1447. cx_set(MO_GP0_IO, 0x00000080);
  1448. udelay(1000);
  1449. cx_clear(MO_GP0_IO, 0x00000080);
  1450. udelay(50);
  1451. cx_set(MO_GP0_IO, 0x00000080);
  1452. udelay(1000);
  1453. switch (core->dvbdev->frontends.active_fe_id) {
  1454. case 1: /* DVB-S/S2 Enabled */
  1455. /* tri-state the cx22702 pins */
  1456. cx_set(MO_GP0_IO, 0x00000004);
  1457. /* Take the cx24116/cx24123 out of reset */
  1458. cx_write(MO_SRST_IO, 1);
  1459. core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
  1460. break;
  1461. case 2: /* DVB-T Enabled */
  1462. /* Put the cx24116/cx24123 into reset */
  1463. cx_write(MO_SRST_IO, 0);
  1464. /* enable the cx22702 pins */
  1465. cx_clear(MO_GP0_IO, 0x00000004);
  1466. core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
  1467. break;
  1468. }
  1469. udelay(1000);
  1470. break;
  1471. case CX88_BOARD_WINFAST_DTV2000H_PLUS:
  1472. /* set RF input to AIR for DVB-T (GPIO 16) */
  1473. cx_write(MO_GP2_IO, 0x0101);
  1474. break;
  1475. default:
  1476. err = -ENODEV;
  1477. }
  1478. return err;
  1479. }
  1480. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  1481. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  1482. {
  1483. struct cx88_core *core = drv->core;
  1484. int err = 0;
  1485. dprintk( 1, "%s\n", __func__);
  1486. switch (core->boardnr) {
  1487. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1488. /* Do Nothing, leave the cx22702 on the bus. */
  1489. break;
  1490. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1491. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1492. break;
  1493. default:
  1494. err = -ENODEV;
  1495. }
  1496. return err;
  1497. }
  1498. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  1499. {
  1500. struct cx88_core *core = drv->core;
  1501. struct cx8802_dev *dev = drv->core->dvbdev;
  1502. int err;
  1503. struct videobuf_dvb_frontend *fe;
  1504. int i;
  1505. dprintk( 1, "%s\n", __func__);
  1506. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  1507. core->boardnr,
  1508. core->name,
  1509. core->pci_bus,
  1510. core->pci_slot);
  1511. err = -ENODEV;
  1512. if (!(core->board.mpeg & CX88_MPEG_DVB))
  1513. goto fail_core;
  1514. /* If vp3054 isn't enabled, a stub will just return 0 */
  1515. err = vp3054_i2c_probe(dev);
  1516. if (0 != err)
  1517. goto fail_core;
  1518. /* dvb stuff */
  1519. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  1520. dev->ts_gen_cntrl = 0x0c;
  1521. err = cx8802_alloc_frontends(dev);
  1522. if (err)
  1523. goto fail_core;
  1524. err = -ENODEV;
  1525. for (i = 1; i <= core->board.num_frontends; i++) {
  1526. fe = videobuf_dvb_get_frontend(&core->dvbdev->frontends, i);
  1527. if (fe == NULL) {
  1528. printk(KERN_ERR "%s() failed to get frontend(%d)\n",
  1529. __func__, i);
  1530. goto fail_probe;
  1531. }
  1532. videobuf_queue_sg_init(&fe->dvb.dvbq, &dvb_qops,
  1533. &dev->pci->dev, &dev->slock,
  1534. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  1535. V4L2_FIELD_TOP,
  1536. sizeof(struct cx88_buffer),
  1537. dev, NULL);
  1538. /* init struct videobuf_dvb */
  1539. fe->dvb.name = dev->core->name;
  1540. }
  1541. err = dvb_register(dev);
  1542. if (err)
  1543. /* frontends/adapter de-allocated in dvb_register */
  1544. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  1545. core->name, err);
  1546. return err;
  1547. fail_probe:
  1548. videobuf_dvb_dealloc_frontends(&core->dvbdev->frontends);
  1549. fail_core:
  1550. return err;
  1551. }
  1552. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  1553. {
  1554. struct cx88_core *core = drv->core;
  1555. struct cx8802_dev *dev = drv->core->dvbdev;
  1556. dprintk( 1, "%s\n", __func__);
  1557. videobuf_dvb_unregister_bus(&dev->frontends);
  1558. vp3054_i2c_remove(dev);
  1559. core->gate_ctrl = NULL;
  1560. return 0;
  1561. }
  1562. static struct cx8802_driver cx8802_dvb_driver = {
  1563. .type_id = CX88_MPEG_DVB,
  1564. .hw_access = CX8802_DRVCTL_SHARED,
  1565. .probe = cx8802_dvb_probe,
  1566. .remove = cx8802_dvb_remove,
  1567. .advise_acquire = cx8802_dvb_advise_acquire,
  1568. .advise_release = cx8802_dvb_advise_release,
  1569. };
  1570. static int __init dvb_init(void)
  1571. {
  1572. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %s loaded\n",
  1573. CX88_VERSION);
  1574. return cx8802_register_driver(&cx8802_dvb_driver);
  1575. }
  1576. static void __exit dvb_fini(void)
  1577. {
  1578. cx8802_unregister_driver(&cx8802_dvb_driver);
  1579. }
  1580. module_init(dvb_init);
  1581. module_exit(dvb_fini);