qib_qp.c 32 KB

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  1. /*
  2. * Copyright (c) 2012 Intel Corporation. All rights reserved.
  3. * Copyright (c) 2006 - 2012 QLogic Corporation. * All rights reserved.
  4. * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. */
  34. #include <linux/err.h>
  35. #include <linux/vmalloc.h>
  36. #include <linux/jhash.h>
  37. #include "qib.h"
  38. #define BITS_PER_PAGE (PAGE_SIZE*BITS_PER_BYTE)
  39. #define BITS_PER_PAGE_MASK (BITS_PER_PAGE-1)
  40. static inline unsigned mk_qpn(struct qib_qpn_table *qpt,
  41. struct qpn_map *map, unsigned off)
  42. {
  43. return (map - qpt->map) * BITS_PER_PAGE + off;
  44. }
  45. static inline unsigned find_next_offset(struct qib_qpn_table *qpt,
  46. struct qpn_map *map, unsigned off,
  47. unsigned n)
  48. {
  49. if (qpt->mask) {
  50. off++;
  51. if (((off & qpt->mask) >> 1) >= n)
  52. off = (off | qpt->mask) + 2;
  53. } else
  54. off = find_next_zero_bit(map->page, BITS_PER_PAGE, off);
  55. return off;
  56. }
  57. /*
  58. * Convert the AETH credit code into the number of credits.
  59. */
  60. static u32 credit_table[31] = {
  61. 0, /* 0 */
  62. 1, /* 1 */
  63. 2, /* 2 */
  64. 3, /* 3 */
  65. 4, /* 4 */
  66. 6, /* 5 */
  67. 8, /* 6 */
  68. 12, /* 7 */
  69. 16, /* 8 */
  70. 24, /* 9 */
  71. 32, /* A */
  72. 48, /* B */
  73. 64, /* C */
  74. 96, /* D */
  75. 128, /* E */
  76. 192, /* F */
  77. 256, /* 10 */
  78. 384, /* 11 */
  79. 512, /* 12 */
  80. 768, /* 13 */
  81. 1024, /* 14 */
  82. 1536, /* 15 */
  83. 2048, /* 16 */
  84. 3072, /* 17 */
  85. 4096, /* 18 */
  86. 6144, /* 19 */
  87. 8192, /* 1A */
  88. 12288, /* 1B */
  89. 16384, /* 1C */
  90. 24576, /* 1D */
  91. 32768 /* 1E */
  92. };
  93. static void get_map_page(struct qib_qpn_table *qpt, struct qpn_map *map)
  94. {
  95. unsigned long page = get_zeroed_page(GFP_KERNEL);
  96. /*
  97. * Free the page if someone raced with us installing it.
  98. */
  99. spin_lock(&qpt->lock);
  100. if (map->page)
  101. free_page(page);
  102. else
  103. map->page = (void *)page;
  104. spin_unlock(&qpt->lock);
  105. }
  106. /*
  107. * Allocate the next available QPN or
  108. * zero/one for QP type IB_QPT_SMI/IB_QPT_GSI.
  109. */
  110. static int alloc_qpn(struct qib_devdata *dd, struct qib_qpn_table *qpt,
  111. enum ib_qp_type type, u8 port)
  112. {
  113. u32 i, offset, max_scan, qpn;
  114. struct qpn_map *map;
  115. u32 ret;
  116. if (type == IB_QPT_SMI || type == IB_QPT_GSI) {
  117. unsigned n;
  118. ret = type == IB_QPT_GSI;
  119. n = 1 << (ret + 2 * (port - 1));
  120. spin_lock(&qpt->lock);
  121. if (qpt->flags & n)
  122. ret = -EINVAL;
  123. else
  124. qpt->flags |= n;
  125. spin_unlock(&qpt->lock);
  126. goto bail;
  127. }
  128. qpn = qpt->last + 2;
  129. if (qpn >= QPN_MAX)
  130. qpn = 2;
  131. if (qpt->mask && ((qpn & qpt->mask) >> 1) >= dd->n_krcv_queues)
  132. qpn = (qpn | qpt->mask) + 2;
  133. offset = qpn & BITS_PER_PAGE_MASK;
  134. map = &qpt->map[qpn / BITS_PER_PAGE];
  135. max_scan = qpt->nmaps - !offset;
  136. for (i = 0;;) {
  137. if (unlikely(!map->page)) {
  138. get_map_page(qpt, map);
  139. if (unlikely(!map->page))
  140. break;
  141. }
  142. do {
  143. if (!test_and_set_bit(offset, map->page)) {
  144. qpt->last = qpn;
  145. ret = qpn;
  146. goto bail;
  147. }
  148. offset = find_next_offset(qpt, map, offset,
  149. dd->n_krcv_queues);
  150. qpn = mk_qpn(qpt, map, offset);
  151. /*
  152. * This test differs from alloc_pidmap().
  153. * If find_next_offset() does find a zero
  154. * bit, we don't need to check for QPN
  155. * wrapping around past our starting QPN.
  156. * We just need to be sure we don't loop
  157. * forever.
  158. */
  159. } while (offset < BITS_PER_PAGE && qpn < QPN_MAX);
  160. /*
  161. * In order to keep the number of pages allocated to a
  162. * minimum, we scan the all existing pages before increasing
  163. * the size of the bitmap table.
  164. */
  165. if (++i > max_scan) {
  166. if (qpt->nmaps == QPNMAP_ENTRIES)
  167. break;
  168. map = &qpt->map[qpt->nmaps++];
  169. offset = 0;
  170. } else if (map < &qpt->map[qpt->nmaps]) {
  171. ++map;
  172. offset = 0;
  173. } else {
  174. map = &qpt->map[0];
  175. offset = 2;
  176. }
  177. qpn = mk_qpn(qpt, map, offset);
  178. }
  179. ret = -ENOMEM;
  180. bail:
  181. return ret;
  182. }
  183. static void free_qpn(struct qib_qpn_table *qpt, u32 qpn)
  184. {
  185. struct qpn_map *map;
  186. map = qpt->map + qpn / BITS_PER_PAGE;
  187. if (map->page)
  188. clear_bit(qpn & BITS_PER_PAGE_MASK, map->page);
  189. }
  190. static inline unsigned qpn_hash(struct qib_ibdev *dev, u32 qpn)
  191. {
  192. return jhash_1word(qpn, dev->qp_rnd) &
  193. (dev->qp_table_size - 1);
  194. }
  195. /*
  196. * Put the QP into the hash table.
  197. * The hash table holds a reference to the QP.
  198. */
  199. static void insert_qp(struct qib_ibdev *dev, struct qib_qp *qp)
  200. {
  201. struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  202. unsigned long flags;
  203. unsigned n = qpn_hash(dev, qp->ibqp.qp_num);
  204. spin_lock_irqsave(&dev->qpt_lock, flags);
  205. atomic_inc(&qp->refcount);
  206. if (qp->ibqp.qp_num == 0)
  207. rcu_assign_pointer(ibp->qp0, qp);
  208. else if (qp->ibqp.qp_num == 1)
  209. rcu_assign_pointer(ibp->qp1, qp);
  210. else {
  211. qp->next = dev->qp_table[n];
  212. rcu_assign_pointer(dev->qp_table[n], qp);
  213. }
  214. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  215. synchronize_rcu();
  216. }
  217. /*
  218. * Remove the QP from the table so it can't be found asynchronously by
  219. * the receive interrupt routine.
  220. */
  221. static void remove_qp(struct qib_ibdev *dev, struct qib_qp *qp)
  222. {
  223. struct qib_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  224. unsigned n = qpn_hash(dev, qp->ibqp.qp_num);
  225. unsigned long flags;
  226. spin_lock_irqsave(&dev->qpt_lock, flags);
  227. if (rcu_dereference_protected(ibp->qp0,
  228. lockdep_is_held(&dev->qpt_lock)) == qp) {
  229. atomic_dec(&qp->refcount);
  230. rcu_assign_pointer(ibp->qp0, NULL);
  231. } else if (rcu_dereference_protected(ibp->qp1,
  232. lockdep_is_held(&dev->qpt_lock)) == qp) {
  233. atomic_dec(&qp->refcount);
  234. rcu_assign_pointer(ibp->qp1, NULL);
  235. } else {
  236. struct qib_qp *q;
  237. struct qib_qp __rcu **qpp;
  238. qpp = &dev->qp_table[n];
  239. q = rcu_dereference_protected(*qpp,
  240. lockdep_is_held(&dev->qpt_lock));
  241. for (; q; qpp = &q->next) {
  242. if (q == qp) {
  243. atomic_dec(&qp->refcount);
  244. *qpp = qp->next;
  245. rcu_assign_pointer(qp->next, NULL);
  246. q = rcu_dereference_protected(*qpp,
  247. lockdep_is_held(&dev->qpt_lock));
  248. break;
  249. }
  250. q = rcu_dereference_protected(*qpp,
  251. lockdep_is_held(&dev->qpt_lock));
  252. }
  253. }
  254. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  255. synchronize_rcu();
  256. }
  257. /**
  258. * qib_free_all_qps - check for QPs still in use
  259. * @qpt: the QP table to empty
  260. *
  261. * There should not be any QPs still in use.
  262. * Free memory for table.
  263. */
  264. unsigned qib_free_all_qps(struct qib_devdata *dd)
  265. {
  266. struct qib_ibdev *dev = &dd->verbs_dev;
  267. unsigned long flags;
  268. struct qib_qp *qp;
  269. unsigned n, qp_inuse = 0;
  270. for (n = 0; n < dd->num_pports; n++) {
  271. struct qib_ibport *ibp = &dd->pport[n].ibport_data;
  272. if (!qib_mcast_tree_empty(ibp))
  273. qp_inuse++;
  274. rcu_read_lock();
  275. if (rcu_dereference(ibp->qp0))
  276. qp_inuse++;
  277. if (rcu_dereference(ibp->qp1))
  278. qp_inuse++;
  279. rcu_read_unlock();
  280. }
  281. spin_lock_irqsave(&dev->qpt_lock, flags);
  282. for (n = 0; n < dev->qp_table_size; n++) {
  283. qp = rcu_dereference_protected(dev->qp_table[n],
  284. lockdep_is_held(&dev->qpt_lock));
  285. rcu_assign_pointer(dev->qp_table[n], NULL);
  286. for (; qp; qp = rcu_dereference_protected(qp->next,
  287. lockdep_is_held(&dev->qpt_lock)))
  288. qp_inuse++;
  289. }
  290. spin_unlock_irqrestore(&dev->qpt_lock, flags);
  291. synchronize_rcu();
  292. return qp_inuse;
  293. }
  294. /**
  295. * qib_lookup_qpn - return the QP with the given QPN
  296. * @qpt: the QP table
  297. * @qpn: the QP number to look up
  298. *
  299. * The caller is responsible for decrementing the QP reference count
  300. * when done.
  301. */
  302. struct qib_qp *qib_lookup_qpn(struct qib_ibport *ibp, u32 qpn)
  303. {
  304. struct qib_qp *qp = NULL;
  305. if (unlikely(qpn <= 1)) {
  306. rcu_read_lock();
  307. if (qpn == 0)
  308. qp = rcu_dereference(ibp->qp0);
  309. else
  310. qp = rcu_dereference(ibp->qp1);
  311. } else {
  312. struct qib_ibdev *dev = &ppd_from_ibp(ibp)->dd->verbs_dev;
  313. unsigned n = qpn_hash(dev, qpn);
  314. rcu_read_lock();
  315. for (qp = rcu_dereference(dev->qp_table[n]); qp;
  316. qp = rcu_dereference(qp->next))
  317. if (qp->ibqp.qp_num == qpn)
  318. break;
  319. }
  320. if (qp)
  321. if (unlikely(!atomic_inc_not_zero(&qp->refcount)))
  322. qp = NULL;
  323. rcu_read_unlock();
  324. return qp;
  325. }
  326. /**
  327. * qib_reset_qp - initialize the QP state to the reset state
  328. * @qp: the QP to reset
  329. * @type: the QP type
  330. */
  331. static void qib_reset_qp(struct qib_qp *qp, enum ib_qp_type type)
  332. {
  333. qp->remote_qpn = 0;
  334. qp->qkey = 0;
  335. qp->qp_access_flags = 0;
  336. atomic_set(&qp->s_dma_busy, 0);
  337. qp->s_flags &= QIB_S_SIGNAL_REQ_WR;
  338. qp->s_hdrwords = 0;
  339. qp->s_wqe = NULL;
  340. qp->s_draining = 0;
  341. qp->s_next_psn = 0;
  342. qp->s_last_psn = 0;
  343. qp->s_sending_psn = 0;
  344. qp->s_sending_hpsn = 0;
  345. qp->s_psn = 0;
  346. qp->r_psn = 0;
  347. qp->r_msn = 0;
  348. if (type == IB_QPT_RC) {
  349. qp->s_state = IB_OPCODE_RC_SEND_LAST;
  350. qp->r_state = IB_OPCODE_RC_SEND_LAST;
  351. } else {
  352. qp->s_state = IB_OPCODE_UC_SEND_LAST;
  353. qp->r_state = IB_OPCODE_UC_SEND_LAST;
  354. }
  355. qp->s_ack_state = IB_OPCODE_RC_ACKNOWLEDGE;
  356. qp->r_nak_state = 0;
  357. qp->r_aflags = 0;
  358. qp->r_flags = 0;
  359. qp->s_head = 0;
  360. qp->s_tail = 0;
  361. qp->s_cur = 0;
  362. qp->s_acked = 0;
  363. qp->s_last = 0;
  364. qp->s_ssn = 1;
  365. qp->s_lsn = 0;
  366. qp->s_mig_state = IB_MIG_MIGRATED;
  367. memset(qp->s_ack_queue, 0, sizeof(qp->s_ack_queue));
  368. qp->r_head_ack_queue = 0;
  369. qp->s_tail_ack_queue = 0;
  370. qp->s_num_rd_atomic = 0;
  371. if (qp->r_rq.wq) {
  372. qp->r_rq.wq->head = 0;
  373. qp->r_rq.wq->tail = 0;
  374. }
  375. qp->r_sge.num_sge = 0;
  376. }
  377. static void clear_mr_refs(struct qib_qp *qp, int clr_sends)
  378. {
  379. unsigned n;
  380. if (test_and_clear_bit(QIB_R_REWIND_SGE, &qp->r_aflags))
  381. qib_put_ss(&qp->s_rdma_read_sge);
  382. qib_put_ss(&qp->r_sge);
  383. if (clr_sends) {
  384. while (qp->s_last != qp->s_head) {
  385. struct qib_swqe *wqe = get_swqe_ptr(qp, qp->s_last);
  386. unsigned i;
  387. for (i = 0; i < wqe->wr.num_sge; i++) {
  388. struct qib_sge *sge = &wqe->sg_list[i];
  389. qib_put_mr(sge->mr);
  390. }
  391. if (qp->ibqp.qp_type == IB_QPT_UD ||
  392. qp->ibqp.qp_type == IB_QPT_SMI ||
  393. qp->ibqp.qp_type == IB_QPT_GSI)
  394. atomic_dec(&to_iah(wqe->wr.wr.ud.ah)->refcount);
  395. if (++qp->s_last >= qp->s_size)
  396. qp->s_last = 0;
  397. }
  398. if (qp->s_rdma_mr) {
  399. qib_put_mr(qp->s_rdma_mr);
  400. qp->s_rdma_mr = NULL;
  401. }
  402. }
  403. if (qp->ibqp.qp_type != IB_QPT_RC)
  404. return;
  405. for (n = 0; n < ARRAY_SIZE(qp->s_ack_queue); n++) {
  406. struct qib_ack_entry *e = &qp->s_ack_queue[n];
  407. if (e->opcode == IB_OPCODE_RC_RDMA_READ_REQUEST &&
  408. e->rdma_sge.mr) {
  409. qib_put_mr(e->rdma_sge.mr);
  410. e->rdma_sge.mr = NULL;
  411. }
  412. }
  413. }
  414. /**
  415. * qib_error_qp - put a QP into the error state
  416. * @qp: the QP to put into the error state
  417. * @err: the receive completion error to signal if a RWQE is active
  418. *
  419. * Flushes both send and receive work queues.
  420. * Returns true if last WQE event should be generated.
  421. * The QP r_lock and s_lock should be held and interrupts disabled.
  422. * If we are already in error state, just return.
  423. */
  424. int qib_error_qp(struct qib_qp *qp, enum ib_wc_status err)
  425. {
  426. struct qib_ibdev *dev = to_idev(qp->ibqp.device);
  427. struct ib_wc wc;
  428. int ret = 0;
  429. if (qp->state == IB_QPS_ERR || qp->state == IB_QPS_RESET)
  430. goto bail;
  431. qp->state = IB_QPS_ERR;
  432. if (qp->s_flags & (QIB_S_TIMER | QIB_S_WAIT_RNR)) {
  433. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_WAIT_RNR);
  434. del_timer(&qp->s_timer);
  435. }
  436. if (qp->s_flags & QIB_S_ANY_WAIT_SEND)
  437. qp->s_flags &= ~QIB_S_ANY_WAIT_SEND;
  438. spin_lock(&dev->pending_lock);
  439. if (!list_empty(&qp->iowait) && !(qp->s_flags & QIB_S_BUSY)) {
  440. qp->s_flags &= ~QIB_S_ANY_WAIT_IO;
  441. list_del_init(&qp->iowait);
  442. }
  443. spin_unlock(&dev->pending_lock);
  444. if (!(qp->s_flags & QIB_S_BUSY)) {
  445. qp->s_hdrwords = 0;
  446. if (qp->s_rdma_mr) {
  447. qib_put_mr(qp->s_rdma_mr);
  448. qp->s_rdma_mr = NULL;
  449. }
  450. if (qp->s_tx) {
  451. qib_put_txreq(qp->s_tx);
  452. qp->s_tx = NULL;
  453. }
  454. }
  455. /* Schedule the sending tasklet to drain the send work queue. */
  456. if (qp->s_last != qp->s_head)
  457. qib_schedule_send(qp);
  458. clear_mr_refs(qp, 0);
  459. memset(&wc, 0, sizeof(wc));
  460. wc.qp = &qp->ibqp;
  461. wc.opcode = IB_WC_RECV;
  462. if (test_and_clear_bit(QIB_R_WRID_VALID, &qp->r_aflags)) {
  463. wc.wr_id = qp->r_wr_id;
  464. wc.status = err;
  465. qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, 1);
  466. }
  467. wc.status = IB_WC_WR_FLUSH_ERR;
  468. if (qp->r_rq.wq) {
  469. struct qib_rwq *wq;
  470. u32 head;
  471. u32 tail;
  472. spin_lock(&qp->r_rq.lock);
  473. /* sanity check pointers before trusting them */
  474. wq = qp->r_rq.wq;
  475. head = wq->head;
  476. if (head >= qp->r_rq.size)
  477. head = 0;
  478. tail = wq->tail;
  479. if (tail >= qp->r_rq.size)
  480. tail = 0;
  481. while (tail != head) {
  482. wc.wr_id = get_rwqe_ptr(&qp->r_rq, tail)->wr_id;
  483. if (++tail >= qp->r_rq.size)
  484. tail = 0;
  485. qib_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, 1);
  486. }
  487. wq->tail = tail;
  488. spin_unlock(&qp->r_rq.lock);
  489. } else if (qp->ibqp.event_handler)
  490. ret = 1;
  491. bail:
  492. return ret;
  493. }
  494. /**
  495. * qib_modify_qp - modify the attributes of a queue pair
  496. * @ibqp: the queue pair who's attributes we're modifying
  497. * @attr: the new attributes
  498. * @attr_mask: the mask of attributes to modify
  499. * @udata: user data for libibverbs.so
  500. *
  501. * Returns 0 on success, otherwise returns an errno.
  502. */
  503. int qib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  504. int attr_mask, struct ib_udata *udata)
  505. {
  506. struct qib_ibdev *dev = to_idev(ibqp->device);
  507. struct qib_qp *qp = to_iqp(ibqp);
  508. enum ib_qp_state cur_state, new_state;
  509. struct ib_event ev;
  510. int lastwqe = 0;
  511. int mig = 0;
  512. int ret;
  513. u32 pmtu = 0; /* for gcc warning only */
  514. spin_lock_irq(&qp->r_lock);
  515. spin_lock(&qp->s_lock);
  516. cur_state = attr_mask & IB_QP_CUR_STATE ?
  517. attr->cur_qp_state : qp->state;
  518. new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state;
  519. if (!ib_modify_qp_is_ok(cur_state, new_state, ibqp->qp_type,
  520. attr_mask))
  521. goto inval;
  522. if (attr_mask & IB_QP_AV) {
  523. if (attr->ah_attr.dlid >= QIB_MULTICAST_LID_BASE)
  524. goto inval;
  525. if (qib_check_ah(qp->ibqp.device, &attr->ah_attr))
  526. goto inval;
  527. }
  528. if (attr_mask & IB_QP_ALT_PATH) {
  529. if (attr->alt_ah_attr.dlid >= QIB_MULTICAST_LID_BASE)
  530. goto inval;
  531. if (qib_check_ah(qp->ibqp.device, &attr->alt_ah_attr))
  532. goto inval;
  533. if (attr->alt_pkey_index >= qib_get_npkeys(dd_from_dev(dev)))
  534. goto inval;
  535. }
  536. if (attr_mask & IB_QP_PKEY_INDEX)
  537. if (attr->pkey_index >= qib_get_npkeys(dd_from_dev(dev)))
  538. goto inval;
  539. if (attr_mask & IB_QP_MIN_RNR_TIMER)
  540. if (attr->min_rnr_timer > 31)
  541. goto inval;
  542. if (attr_mask & IB_QP_PORT)
  543. if (qp->ibqp.qp_type == IB_QPT_SMI ||
  544. qp->ibqp.qp_type == IB_QPT_GSI ||
  545. attr->port_num == 0 ||
  546. attr->port_num > ibqp->device->phys_port_cnt)
  547. goto inval;
  548. if (attr_mask & IB_QP_DEST_QPN)
  549. if (attr->dest_qp_num > QIB_QPN_MASK)
  550. goto inval;
  551. if (attr_mask & IB_QP_RETRY_CNT)
  552. if (attr->retry_cnt > 7)
  553. goto inval;
  554. if (attr_mask & IB_QP_RNR_RETRY)
  555. if (attr->rnr_retry > 7)
  556. goto inval;
  557. /*
  558. * Don't allow invalid path_mtu values. OK to set greater
  559. * than the active mtu (or even the max_cap, if we have tuned
  560. * that to a small mtu. We'll set qp->path_mtu
  561. * to the lesser of requested attribute mtu and active,
  562. * for packetizing messages.
  563. * Note that the QP port has to be set in INIT and MTU in RTR.
  564. */
  565. if (attr_mask & IB_QP_PATH_MTU) {
  566. struct qib_devdata *dd = dd_from_dev(dev);
  567. int mtu, pidx = qp->port_num - 1;
  568. mtu = ib_mtu_enum_to_int(attr->path_mtu);
  569. if (mtu == -1)
  570. goto inval;
  571. if (mtu > dd->pport[pidx].ibmtu) {
  572. switch (dd->pport[pidx].ibmtu) {
  573. case 4096:
  574. pmtu = IB_MTU_4096;
  575. break;
  576. case 2048:
  577. pmtu = IB_MTU_2048;
  578. break;
  579. case 1024:
  580. pmtu = IB_MTU_1024;
  581. break;
  582. case 512:
  583. pmtu = IB_MTU_512;
  584. break;
  585. case 256:
  586. pmtu = IB_MTU_256;
  587. break;
  588. default:
  589. pmtu = IB_MTU_2048;
  590. }
  591. } else
  592. pmtu = attr->path_mtu;
  593. }
  594. if (attr_mask & IB_QP_PATH_MIG_STATE) {
  595. if (attr->path_mig_state == IB_MIG_REARM) {
  596. if (qp->s_mig_state == IB_MIG_ARMED)
  597. goto inval;
  598. if (new_state != IB_QPS_RTS)
  599. goto inval;
  600. } else if (attr->path_mig_state == IB_MIG_MIGRATED) {
  601. if (qp->s_mig_state == IB_MIG_REARM)
  602. goto inval;
  603. if (new_state != IB_QPS_RTS && new_state != IB_QPS_SQD)
  604. goto inval;
  605. if (qp->s_mig_state == IB_MIG_ARMED)
  606. mig = 1;
  607. } else
  608. goto inval;
  609. }
  610. if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
  611. if (attr->max_dest_rd_atomic > QIB_MAX_RDMA_ATOMIC)
  612. goto inval;
  613. switch (new_state) {
  614. case IB_QPS_RESET:
  615. if (qp->state != IB_QPS_RESET) {
  616. qp->state = IB_QPS_RESET;
  617. spin_lock(&dev->pending_lock);
  618. if (!list_empty(&qp->iowait))
  619. list_del_init(&qp->iowait);
  620. spin_unlock(&dev->pending_lock);
  621. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_ANY_WAIT);
  622. spin_unlock(&qp->s_lock);
  623. spin_unlock_irq(&qp->r_lock);
  624. /* Stop the sending work queue and retry timer */
  625. cancel_work_sync(&qp->s_work);
  626. del_timer_sync(&qp->s_timer);
  627. wait_event(qp->wait_dma, !atomic_read(&qp->s_dma_busy));
  628. if (qp->s_tx) {
  629. qib_put_txreq(qp->s_tx);
  630. qp->s_tx = NULL;
  631. }
  632. remove_qp(dev, qp);
  633. wait_event(qp->wait, !atomic_read(&qp->refcount));
  634. spin_lock_irq(&qp->r_lock);
  635. spin_lock(&qp->s_lock);
  636. clear_mr_refs(qp, 1);
  637. qib_reset_qp(qp, ibqp->qp_type);
  638. }
  639. break;
  640. case IB_QPS_RTR:
  641. /* Allow event to retrigger if QP set to RTR more than once */
  642. qp->r_flags &= ~QIB_R_COMM_EST;
  643. qp->state = new_state;
  644. break;
  645. case IB_QPS_SQD:
  646. qp->s_draining = qp->s_last != qp->s_cur;
  647. qp->state = new_state;
  648. break;
  649. case IB_QPS_SQE:
  650. if (qp->ibqp.qp_type == IB_QPT_RC)
  651. goto inval;
  652. qp->state = new_state;
  653. break;
  654. case IB_QPS_ERR:
  655. lastwqe = qib_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  656. break;
  657. default:
  658. qp->state = new_state;
  659. break;
  660. }
  661. if (attr_mask & IB_QP_PKEY_INDEX)
  662. qp->s_pkey_index = attr->pkey_index;
  663. if (attr_mask & IB_QP_PORT)
  664. qp->port_num = attr->port_num;
  665. if (attr_mask & IB_QP_DEST_QPN)
  666. qp->remote_qpn = attr->dest_qp_num;
  667. if (attr_mask & IB_QP_SQ_PSN) {
  668. qp->s_next_psn = attr->sq_psn & QIB_PSN_MASK;
  669. qp->s_psn = qp->s_next_psn;
  670. qp->s_sending_psn = qp->s_next_psn;
  671. qp->s_last_psn = qp->s_next_psn - 1;
  672. qp->s_sending_hpsn = qp->s_last_psn;
  673. }
  674. if (attr_mask & IB_QP_RQ_PSN)
  675. qp->r_psn = attr->rq_psn & QIB_PSN_MASK;
  676. if (attr_mask & IB_QP_ACCESS_FLAGS)
  677. qp->qp_access_flags = attr->qp_access_flags;
  678. if (attr_mask & IB_QP_AV) {
  679. qp->remote_ah_attr = attr->ah_attr;
  680. qp->s_srate = attr->ah_attr.static_rate;
  681. }
  682. if (attr_mask & IB_QP_ALT_PATH) {
  683. qp->alt_ah_attr = attr->alt_ah_attr;
  684. qp->s_alt_pkey_index = attr->alt_pkey_index;
  685. }
  686. if (attr_mask & IB_QP_PATH_MIG_STATE) {
  687. qp->s_mig_state = attr->path_mig_state;
  688. if (mig) {
  689. qp->remote_ah_attr = qp->alt_ah_attr;
  690. qp->port_num = qp->alt_ah_attr.port_num;
  691. qp->s_pkey_index = qp->s_alt_pkey_index;
  692. }
  693. }
  694. if (attr_mask & IB_QP_PATH_MTU) {
  695. qp->path_mtu = pmtu;
  696. qp->pmtu = ib_mtu_enum_to_int(pmtu);
  697. }
  698. if (attr_mask & IB_QP_RETRY_CNT) {
  699. qp->s_retry_cnt = attr->retry_cnt;
  700. qp->s_retry = attr->retry_cnt;
  701. }
  702. if (attr_mask & IB_QP_RNR_RETRY) {
  703. qp->s_rnr_retry_cnt = attr->rnr_retry;
  704. qp->s_rnr_retry = attr->rnr_retry;
  705. }
  706. if (attr_mask & IB_QP_MIN_RNR_TIMER)
  707. qp->r_min_rnr_timer = attr->min_rnr_timer;
  708. if (attr_mask & IB_QP_TIMEOUT) {
  709. qp->timeout = attr->timeout;
  710. qp->timeout_jiffies =
  711. usecs_to_jiffies((4096UL * (1UL << qp->timeout)) /
  712. 1000UL);
  713. }
  714. if (attr_mask & IB_QP_QKEY)
  715. qp->qkey = attr->qkey;
  716. if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
  717. qp->r_max_rd_atomic = attr->max_dest_rd_atomic;
  718. if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC)
  719. qp->s_max_rd_atomic = attr->max_rd_atomic;
  720. spin_unlock(&qp->s_lock);
  721. spin_unlock_irq(&qp->r_lock);
  722. if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT)
  723. insert_qp(dev, qp);
  724. if (lastwqe) {
  725. ev.device = qp->ibqp.device;
  726. ev.element.qp = &qp->ibqp;
  727. ev.event = IB_EVENT_QP_LAST_WQE_REACHED;
  728. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  729. }
  730. if (mig) {
  731. ev.device = qp->ibqp.device;
  732. ev.element.qp = &qp->ibqp;
  733. ev.event = IB_EVENT_PATH_MIG;
  734. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  735. }
  736. ret = 0;
  737. goto bail;
  738. inval:
  739. spin_unlock(&qp->s_lock);
  740. spin_unlock_irq(&qp->r_lock);
  741. ret = -EINVAL;
  742. bail:
  743. return ret;
  744. }
  745. int qib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  746. int attr_mask, struct ib_qp_init_attr *init_attr)
  747. {
  748. struct qib_qp *qp = to_iqp(ibqp);
  749. attr->qp_state = qp->state;
  750. attr->cur_qp_state = attr->qp_state;
  751. attr->path_mtu = qp->path_mtu;
  752. attr->path_mig_state = qp->s_mig_state;
  753. attr->qkey = qp->qkey;
  754. attr->rq_psn = qp->r_psn & QIB_PSN_MASK;
  755. attr->sq_psn = qp->s_next_psn & QIB_PSN_MASK;
  756. attr->dest_qp_num = qp->remote_qpn;
  757. attr->qp_access_flags = qp->qp_access_flags;
  758. attr->cap.max_send_wr = qp->s_size - 1;
  759. attr->cap.max_recv_wr = qp->ibqp.srq ? 0 : qp->r_rq.size - 1;
  760. attr->cap.max_send_sge = qp->s_max_sge;
  761. attr->cap.max_recv_sge = qp->r_rq.max_sge;
  762. attr->cap.max_inline_data = 0;
  763. attr->ah_attr = qp->remote_ah_attr;
  764. attr->alt_ah_attr = qp->alt_ah_attr;
  765. attr->pkey_index = qp->s_pkey_index;
  766. attr->alt_pkey_index = qp->s_alt_pkey_index;
  767. attr->en_sqd_async_notify = 0;
  768. attr->sq_draining = qp->s_draining;
  769. attr->max_rd_atomic = qp->s_max_rd_atomic;
  770. attr->max_dest_rd_atomic = qp->r_max_rd_atomic;
  771. attr->min_rnr_timer = qp->r_min_rnr_timer;
  772. attr->port_num = qp->port_num;
  773. attr->timeout = qp->timeout;
  774. attr->retry_cnt = qp->s_retry_cnt;
  775. attr->rnr_retry = qp->s_rnr_retry_cnt;
  776. attr->alt_port_num = qp->alt_ah_attr.port_num;
  777. attr->alt_timeout = qp->alt_timeout;
  778. init_attr->event_handler = qp->ibqp.event_handler;
  779. init_attr->qp_context = qp->ibqp.qp_context;
  780. init_attr->send_cq = qp->ibqp.send_cq;
  781. init_attr->recv_cq = qp->ibqp.recv_cq;
  782. init_attr->srq = qp->ibqp.srq;
  783. init_attr->cap = attr->cap;
  784. if (qp->s_flags & QIB_S_SIGNAL_REQ_WR)
  785. init_attr->sq_sig_type = IB_SIGNAL_REQ_WR;
  786. else
  787. init_attr->sq_sig_type = IB_SIGNAL_ALL_WR;
  788. init_attr->qp_type = qp->ibqp.qp_type;
  789. init_attr->port_num = qp->port_num;
  790. return 0;
  791. }
  792. /**
  793. * qib_compute_aeth - compute the AETH (syndrome + MSN)
  794. * @qp: the queue pair to compute the AETH for
  795. *
  796. * Returns the AETH.
  797. */
  798. __be32 qib_compute_aeth(struct qib_qp *qp)
  799. {
  800. u32 aeth = qp->r_msn & QIB_MSN_MASK;
  801. if (qp->ibqp.srq) {
  802. /*
  803. * Shared receive queues don't generate credits.
  804. * Set the credit field to the invalid value.
  805. */
  806. aeth |= QIB_AETH_CREDIT_INVAL << QIB_AETH_CREDIT_SHIFT;
  807. } else {
  808. u32 min, max, x;
  809. u32 credits;
  810. struct qib_rwq *wq = qp->r_rq.wq;
  811. u32 head;
  812. u32 tail;
  813. /* sanity check pointers before trusting them */
  814. head = wq->head;
  815. if (head >= qp->r_rq.size)
  816. head = 0;
  817. tail = wq->tail;
  818. if (tail >= qp->r_rq.size)
  819. tail = 0;
  820. /*
  821. * Compute the number of credits available (RWQEs).
  822. * XXX Not holding the r_rq.lock here so there is a small
  823. * chance that the pair of reads are not atomic.
  824. */
  825. credits = head - tail;
  826. if ((int)credits < 0)
  827. credits += qp->r_rq.size;
  828. /*
  829. * Binary search the credit table to find the code to
  830. * use.
  831. */
  832. min = 0;
  833. max = 31;
  834. for (;;) {
  835. x = (min + max) / 2;
  836. if (credit_table[x] == credits)
  837. break;
  838. if (credit_table[x] > credits)
  839. max = x;
  840. else if (min == x)
  841. break;
  842. else
  843. min = x;
  844. }
  845. aeth |= x << QIB_AETH_CREDIT_SHIFT;
  846. }
  847. return cpu_to_be32(aeth);
  848. }
  849. /**
  850. * qib_create_qp - create a queue pair for a device
  851. * @ibpd: the protection domain who's device we create the queue pair for
  852. * @init_attr: the attributes of the queue pair
  853. * @udata: user data for libibverbs.so
  854. *
  855. * Returns the queue pair on success, otherwise returns an errno.
  856. *
  857. * Called by the ib_create_qp() core verbs function.
  858. */
  859. struct ib_qp *qib_create_qp(struct ib_pd *ibpd,
  860. struct ib_qp_init_attr *init_attr,
  861. struct ib_udata *udata)
  862. {
  863. struct qib_qp *qp;
  864. int err;
  865. struct qib_swqe *swq = NULL;
  866. struct qib_ibdev *dev;
  867. struct qib_devdata *dd;
  868. size_t sz;
  869. size_t sg_list_sz;
  870. struct ib_qp *ret;
  871. if (init_attr->cap.max_send_sge > ib_qib_max_sges ||
  872. init_attr->cap.max_send_wr > ib_qib_max_qp_wrs) {
  873. ret = ERR_PTR(-EINVAL);
  874. goto bail;
  875. }
  876. /* Check receive queue parameters if no SRQ is specified. */
  877. if (!init_attr->srq) {
  878. if (init_attr->cap.max_recv_sge > ib_qib_max_sges ||
  879. init_attr->cap.max_recv_wr > ib_qib_max_qp_wrs) {
  880. ret = ERR_PTR(-EINVAL);
  881. goto bail;
  882. }
  883. if (init_attr->cap.max_send_sge +
  884. init_attr->cap.max_send_wr +
  885. init_attr->cap.max_recv_sge +
  886. init_attr->cap.max_recv_wr == 0) {
  887. ret = ERR_PTR(-EINVAL);
  888. goto bail;
  889. }
  890. }
  891. switch (init_attr->qp_type) {
  892. case IB_QPT_SMI:
  893. case IB_QPT_GSI:
  894. if (init_attr->port_num == 0 ||
  895. init_attr->port_num > ibpd->device->phys_port_cnt) {
  896. ret = ERR_PTR(-EINVAL);
  897. goto bail;
  898. }
  899. case IB_QPT_UC:
  900. case IB_QPT_RC:
  901. case IB_QPT_UD:
  902. sz = sizeof(struct qib_sge) *
  903. init_attr->cap.max_send_sge +
  904. sizeof(struct qib_swqe);
  905. swq = vmalloc((init_attr->cap.max_send_wr + 1) * sz);
  906. if (swq == NULL) {
  907. ret = ERR_PTR(-ENOMEM);
  908. goto bail;
  909. }
  910. sz = sizeof(*qp);
  911. sg_list_sz = 0;
  912. if (init_attr->srq) {
  913. struct qib_srq *srq = to_isrq(init_attr->srq);
  914. if (srq->rq.max_sge > 1)
  915. sg_list_sz = sizeof(*qp->r_sg_list) *
  916. (srq->rq.max_sge - 1);
  917. } else if (init_attr->cap.max_recv_sge > 1)
  918. sg_list_sz = sizeof(*qp->r_sg_list) *
  919. (init_attr->cap.max_recv_sge - 1);
  920. qp = kzalloc(sz + sg_list_sz, GFP_KERNEL);
  921. if (!qp) {
  922. ret = ERR_PTR(-ENOMEM);
  923. goto bail_swq;
  924. }
  925. RCU_INIT_POINTER(qp->next, NULL);
  926. qp->s_hdr = kzalloc(sizeof(*qp->s_hdr), GFP_KERNEL);
  927. if (!qp->s_hdr) {
  928. ret = ERR_PTR(-ENOMEM);
  929. goto bail_qp;
  930. }
  931. qp->timeout_jiffies =
  932. usecs_to_jiffies((4096UL * (1UL << qp->timeout)) /
  933. 1000UL);
  934. if (init_attr->srq)
  935. sz = 0;
  936. else {
  937. qp->r_rq.size = init_attr->cap.max_recv_wr + 1;
  938. qp->r_rq.max_sge = init_attr->cap.max_recv_sge;
  939. sz = (sizeof(struct ib_sge) * qp->r_rq.max_sge) +
  940. sizeof(struct qib_rwqe);
  941. qp->r_rq.wq = vmalloc_user(sizeof(struct qib_rwq) +
  942. qp->r_rq.size * sz);
  943. if (!qp->r_rq.wq) {
  944. ret = ERR_PTR(-ENOMEM);
  945. goto bail_qp;
  946. }
  947. }
  948. /*
  949. * ib_create_qp() will initialize qp->ibqp
  950. * except for qp->ibqp.qp_num.
  951. */
  952. spin_lock_init(&qp->r_lock);
  953. spin_lock_init(&qp->s_lock);
  954. spin_lock_init(&qp->r_rq.lock);
  955. atomic_set(&qp->refcount, 0);
  956. init_waitqueue_head(&qp->wait);
  957. init_waitqueue_head(&qp->wait_dma);
  958. init_timer(&qp->s_timer);
  959. qp->s_timer.data = (unsigned long)qp;
  960. INIT_WORK(&qp->s_work, qib_do_send);
  961. INIT_LIST_HEAD(&qp->iowait);
  962. INIT_LIST_HEAD(&qp->rspwait);
  963. qp->state = IB_QPS_RESET;
  964. qp->s_wq = swq;
  965. qp->s_size = init_attr->cap.max_send_wr + 1;
  966. qp->s_max_sge = init_attr->cap.max_send_sge;
  967. if (init_attr->sq_sig_type == IB_SIGNAL_REQ_WR)
  968. qp->s_flags = QIB_S_SIGNAL_REQ_WR;
  969. dev = to_idev(ibpd->device);
  970. dd = dd_from_dev(dev);
  971. err = alloc_qpn(dd, &dev->qpn_table, init_attr->qp_type,
  972. init_attr->port_num);
  973. if (err < 0) {
  974. ret = ERR_PTR(err);
  975. vfree(qp->r_rq.wq);
  976. goto bail_qp;
  977. }
  978. qp->ibqp.qp_num = err;
  979. qp->port_num = init_attr->port_num;
  980. qib_reset_qp(qp, init_attr->qp_type);
  981. break;
  982. default:
  983. /* Don't support raw QPs */
  984. ret = ERR_PTR(-ENOSYS);
  985. goto bail;
  986. }
  987. init_attr->cap.max_inline_data = 0;
  988. /*
  989. * Return the address of the RWQ as the offset to mmap.
  990. * See qib_mmap() for details.
  991. */
  992. if (udata && udata->outlen >= sizeof(__u64)) {
  993. if (!qp->r_rq.wq) {
  994. __u64 offset = 0;
  995. err = ib_copy_to_udata(udata, &offset,
  996. sizeof(offset));
  997. if (err) {
  998. ret = ERR_PTR(err);
  999. goto bail_ip;
  1000. }
  1001. } else {
  1002. u32 s = sizeof(struct qib_rwq) + qp->r_rq.size * sz;
  1003. qp->ip = qib_create_mmap_info(dev, s,
  1004. ibpd->uobject->context,
  1005. qp->r_rq.wq);
  1006. if (!qp->ip) {
  1007. ret = ERR_PTR(-ENOMEM);
  1008. goto bail_ip;
  1009. }
  1010. err = ib_copy_to_udata(udata, &(qp->ip->offset),
  1011. sizeof(qp->ip->offset));
  1012. if (err) {
  1013. ret = ERR_PTR(err);
  1014. goto bail_ip;
  1015. }
  1016. }
  1017. }
  1018. spin_lock(&dev->n_qps_lock);
  1019. if (dev->n_qps_allocated == ib_qib_max_qps) {
  1020. spin_unlock(&dev->n_qps_lock);
  1021. ret = ERR_PTR(-ENOMEM);
  1022. goto bail_ip;
  1023. }
  1024. dev->n_qps_allocated++;
  1025. spin_unlock(&dev->n_qps_lock);
  1026. if (qp->ip) {
  1027. spin_lock_irq(&dev->pending_lock);
  1028. list_add(&qp->ip->pending_mmaps, &dev->pending_mmaps);
  1029. spin_unlock_irq(&dev->pending_lock);
  1030. }
  1031. ret = &qp->ibqp;
  1032. goto bail;
  1033. bail_ip:
  1034. if (qp->ip)
  1035. kref_put(&qp->ip->ref, qib_release_mmap_info);
  1036. else
  1037. vfree(qp->r_rq.wq);
  1038. free_qpn(&dev->qpn_table, qp->ibqp.qp_num);
  1039. bail_qp:
  1040. kfree(qp->s_hdr);
  1041. kfree(qp);
  1042. bail_swq:
  1043. vfree(swq);
  1044. bail:
  1045. return ret;
  1046. }
  1047. /**
  1048. * qib_destroy_qp - destroy a queue pair
  1049. * @ibqp: the queue pair to destroy
  1050. *
  1051. * Returns 0 on success.
  1052. *
  1053. * Note that this can be called while the QP is actively sending or
  1054. * receiving!
  1055. */
  1056. int qib_destroy_qp(struct ib_qp *ibqp)
  1057. {
  1058. struct qib_qp *qp = to_iqp(ibqp);
  1059. struct qib_ibdev *dev = to_idev(ibqp->device);
  1060. /* Make sure HW and driver activity is stopped. */
  1061. spin_lock_irq(&qp->s_lock);
  1062. if (qp->state != IB_QPS_RESET) {
  1063. qp->state = IB_QPS_RESET;
  1064. spin_lock(&dev->pending_lock);
  1065. if (!list_empty(&qp->iowait))
  1066. list_del_init(&qp->iowait);
  1067. spin_unlock(&dev->pending_lock);
  1068. qp->s_flags &= ~(QIB_S_TIMER | QIB_S_ANY_WAIT);
  1069. spin_unlock_irq(&qp->s_lock);
  1070. cancel_work_sync(&qp->s_work);
  1071. del_timer_sync(&qp->s_timer);
  1072. wait_event(qp->wait_dma, !atomic_read(&qp->s_dma_busy));
  1073. if (qp->s_tx) {
  1074. qib_put_txreq(qp->s_tx);
  1075. qp->s_tx = NULL;
  1076. }
  1077. remove_qp(dev, qp);
  1078. wait_event(qp->wait, !atomic_read(&qp->refcount));
  1079. clear_mr_refs(qp, 1);
  1080. } else
  1081. spin_unlock_irq(&qp->s_lock);
  1082. /* all user's cleaned up, mark it available */
  1083. free_qpn(&dev->qpn_table, qp->ibqp.qp_num);
  1084. spin_lock(&dev->n_qps_lock);
  1085. dev->n_qps_allocated--;
  1086. spin_unlock(&dev->n_qps_lock);
  1087. if (qp->ip)
  1088. kref_put(&qp->ip->ref, qib_release_mmap_info);
  1089. else
  1090. vfree(qp->r_rq.wq);
  1091. vfree(qp->s_wq);
  1092. kfree(qp->s_hdr);
  1093. kfree(qp);
  1094. return 0;
  1095. }
  1096. /**
  1097. * qib_init_qpn_table - initialize the QP number table for a device
  1098. * @qpt: the QPN table
  1099. */
  1100. void qib_init_qpn_table(struct qib_devdata *dd, struct qib_qpn_table *qpt)
  1101. {
  1102. spin_lock_init(&qpt->lock);
  1103. qpt->last = 1; /* start with QPN 2 */
  1104. qpt->nmaps = 1;
  1105. qpt->mask = dd->qpn_mask;
  1106. }
  1107. /**
  1108. * qib_free_qpn_table - free the QP number table for a device
  1109. * @qpt: the QPN table
  1110. */
  1111. void qib_free_qpn_table(struct qib_qpn_table *qpt)
  1112. {
  1113. int i;
  1114. for (i = 0; i < ARRAY_SIZE(qpt->map); i++)
  1115. if (qpt->map[i].page)
  1116. free_page((unsigned long) qpt->map[i].page);
  1117. }
  1118. /**
  1119. * qib_get_credit - flush the send work queue of a QP
  1120. * @qp: the qp who's send work queue to flush
  1121. * @aeth: the Acknowledge Extended Transport Header
  1122. *
  1123. * The QP s_lock should be held.
  1124. */
  1125. void qib_get_credit(struct qib_qp *qp, u32 aeth)
  1126. {
  1127. u32 credit = (aeth >> QIB_AETH_CREDIT_SHIFT) & QIB_AETH_CREDIT_MASK;
  1128. /*
  1129. * If the credit is invalid, we can send
  1130. * as many packets as we like. Otherwise, we have to
  1131. * honor the credit field.
  1132. */
  1133. if (credit == QIB_AETH_CREDIT_INVAL) {
  1134. if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT)) {
  1135. qp->s_flags |= QIB_S_UNLIMITED_CREDIT;
  1136. if (qp->s_flags & QIB_S_WAIT_SSN_CREDIT) {
  1137. qp->s_flags &= ~QIB_S_WAIT_SSN_CREDIT;
  1138. qib_schedule_send(qp);
  1139. }
  1140. }
  1141. } else if (!(qp->s_flags & QIB_S_UNLIMITED_CREDIT)) {
  1142. /* Compute new LSN (i.e., MSN + credit) */
  1143. credit = (aeth + credit_table[credit]) & QIB_MSN_MASK;
  1144. if (qib_cmp24(credit, qp->s_lsn) > 0) {
  1145. qp->s_lsn = credit;
  1146. if (qp->s_flags & QIB_S_WAIT_SSN_CREDIT) {
  1147. qp->s_flags &= ~QIB_S_WAIT_SSN_CREDIT;
  1148. qib_schedule_send(qp);
  1149. }
  1150. }
  1151. }
  1152. }