ad5764.c 8.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382
  1. /*
  2. * Analog devices AD5764, AD5764R, AD5744, AD5744R quad-channel
  3. * Digital to Analog Converters driver
  4. *
  5. * Copyright 2011 Analog Devices Inc.
  6. *
  7. * Licensed under the GPL-2.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/err.h>
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/slab.h>
  15. #include <linux/sysfs.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/iio/iio.h>
  18. #include <linux/iio/sysfs.h>
  19. #define AD5764_REG_SF_NOP 0x0
  20. #define AD5764_REG_SF_CONFIG 0x1
  21. #define AD5764_REG_SF_CLEAR 0x4
  22. #define AD5764_REG_SF_LOAD 0x5
  23. #define AD5764_REG_DATA(x) ((2 << 3) | (x))
  24. #define AD5764_REG_COARSE_GAIN(x) ((3 << 3) | (x))
  25. #define AD5764_REG_FINE_GAIN(x) ((4 << 3) | (x))
  26. #define AD5764_REG_OFFSET(x) ((5 << 3) | (x))
  27. #define AD5764_NUM_CHANNELS 4
  28. /**
  29. * struct ad5764_chip_info - chip specific information
  30. * @int_vref: Value of the internal reference voltage in uV - 0 if external
  31. * reference voltage is used
  32. * @channel channel specification
  33. */
  34. struct ad5764_chip_info {
  35. unsigned long int_vref;
  36. const struct iio_chan_spec *channels;
  37. };
  38. /**
  39. * struct ad5764_state - driver instance specific data
  40. * @spi: spi_device
  41. * @chip_info: chip info
  42. * @vref_reg: vref supply regulators
  43. * @data: spi transfer buffers
  44. */
  45. struct ad5764_state {
  46. struct spi_device *spi;
  47. const struct ad5764_chip_info *chip_info;
  48. struct regulator_bulk_data vref_reg[2];
  49. /*
  50. * DMA (thus cache coherency maintenance) requires the
  51. * transfer buffers to live in their own cache lines.
  52. */
  53. union {
  54. __be32 d32;
  55. u8 d8[4];
  56. } data[2] ____cacheline_aligned;
  57. };
  58. enum ad5764_type {
  59. ID_AD5744,
  60. ID_AD5744R,
  61. ID_AD5764,
  62. ID_AD5764R,
  63. };
  64. #define AD5764_CHANNEL(_chan, _bits) { \
  65. .type = IIO_VOLTAGE, \
  66. .indexed = 1, \
  67. .output = 1, \
  68. .channel = (_chan), \
  69. .address = (_chan), \
  70. .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
  71. IIO_CHAN_INFO_OFFSET_SHARED_BIT | \
  72. IIO_CHAN_INFO_SCALE_SEPARATE_BIT | \
  73. IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | \
  74. IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, \
  75. .scan_type = IIO_ST('u', (_bits), 16, 16 - (_bits)) \
  76. }
  77. #define DECLARE_AD5764_CHANNELS(_name, _bits) \
  78. const struct iio_chan_spec _name##_channels[] = { \
  79. AD5764_CHANNEL(0, (_bits)), \
  80. AD5764_CHANNEL(1, (_bits)), \
  81. AD5764_CHANNEL(2, (_bits)), \
  82. AD5764_CHANNEL(3, (_bits)), \
  83. };
  84. static DECLARE_AD5764_CHANNELS(ad5764, 16);
  85. static DECLARE_AD5764_CHANNELS(ad5744, 14);
  86. static const struct ad5764_chip_info ad5764_chip_infos[] = {
  87. [ID_AD5744] = {
  88. .int_vref = 0,
  89. .channels = ad5744_channels,
  90. },
  91. [ID_AD5744R] = {
  92. .int_vref = 5000000,
  93. .channels = ad5744_channels,
  94. },
  95. [ID_AD5764] = {
  96. .int_vref = 0,
  97. .channels = ad5764_channels,
  98. },
  99. [ID_AD5764R] = {
  100. .int_vref = 5000000,
  101. .channels = ad5764_channels,
  102. },
  103. };
  104. static int ad5764_write(struct iio_dev *indio_dev, unsigned int reg,
  105. unsigned int val)
  106. {
  107. struct ad5764_state *st = iio_priv(indio_dev);
  108. int ret;
  109. mutex_lock(&indio_dev->mlock);
  110. st->data[0].d32 = cpu_to_be32((reg << 16) | val);
  111. ret = spi_write(st->spi, &st->data[0].d8[1], 3);
  112. mutex_unlock(&indio_dev->mlock);
  113. return ret;
  114. }
  115. static int ad5764_read(struct iio_dev *indio_dev, unsigned int reg,
  116. unsigned int *val)
  117. {
  118. struct ad5764_state *st = iio_priv(indio_dev);
  119. struct spi_message m;
  120. int ret;
  121. struct spi_transfer t[] = {
  122. {
  123. .tx_buf = &st->data[0].d8[1],
  124. .len = 3,
  125. .cs_change = 1,
  126. }, {
  127. .rx_buf = &st->data[1].d8[1],
  128. .len = 3,
  129. },
  130. };
  131. spi_message_init(&m);
  132. spi_message_add_tail(&t[0], &m);
  133. spi_message_add_tail(&t[1], &m);
  134. mutex_lock(&indio_dev->mlock);
  135. st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
  136. ret = spi_sync(st->spi, &m);
  137. if (ret >= 0)
  138. *val = be32_to_cpu(st->data[1].d32) & 0xffff;
  139. mutex_unlock(&indio_dev->mlock);
  140. return ret;
  141. }
  142. static int ad5764_chan_info_to_reg(struct iio_chan_spec const *chan, long info)
  143. {
  144. switch (info) {
  145. case 0:
  146. return AD5764_REG_DATA(chan->address);
  147. case IIO_CHAN_INFO_CALIBBIAS:
  148. return AD5764_REG_OFFSET(chan->address);
  149. case IIO_CHAN_INFO_CALIBSCALE:
  150. return AD5764_REG_FINE_GAIN(chan->address);
  151. default:
  152. break;
  153. }
  154. return 0;
  155. }
  156. static int ad5764_write_raw(struct iio_dev *indio_dev,
  157. struct iio_chan_spec const *chan, int val, int val2, long info)
  158. {
  159. const int max_val = (1 << chan->scan_type.realbits);
  160. unsigned int reg;
  161. switch (info) {
  162. case IIO_CHAN_INFO_RAW:
  163. if (val >= max_val || val < 0)
  164. return -EINVAL;
  165. val <<= chan->scan_type.shift;
  166. break;
  167. case IIO_CHAN_INFO_CALIBBIAS:
  168. if (val >= 128 || val < -128)
  169. return -EINVAL;
  170. break;
  171. case IIO_CHAN_INFO_CALIBSCALE:
  172. if (val >= 32 || val < -32)
  173. return -EINVAL;
  174. break;
  175. default:
  176. return -EINVAL;
  177. }
  178. reg = ad5764_chan_info_to_reg(chan, info);
  179. return ad5764_write(indio_dev, reg, (u16)val);
  180. }
  181. static int ad5764_get_channel_vref(struct ad5764_state *st,
  182. unsigned int channel)
  183. {
  184. if (st->chip_info->int_vref)
  185. return st->chip_info->int_vref;
  186. else
  187. return regulator_get_voltage(st->vref_reg[channel / 2].consumer);
  188. }
  189. static int ad5764_read_raw(struct iio_dev *indio_dev,
  190. struct iio_chan_spec const *chan, int *val, int *val2, long info)
  191. {
  192. struct ad5764_state *st = iio_priv(indio_dev);
  193. unsigned long scale_uv;
  194. unsigned int reg;
  195. int vref;
  196. int ret;
  197. switch (info) {
  198. case IIO_CHAN_INFO_RAW:
  199. reg = AD5764_REG_DATA(chan->address);
  200. ret = ad5764_read(indio_dev, reg, val);
  201. if (ret < 0)
  202. return ret;
  203. *val >>= chan->scan_type.shift;
  204. return IIO_VAL_INT;
  205. case IIO_CHAN_INFO_CALIBBIAS:
  206. reg = AD5764_REG_OFFSET(chan->address);
  207. ret = ad5764_read(indio_dev, reg, val);
  208. if (ret < 0)
  209. return ret;
  210. *val = sign_extend32(*val, 7);
  211. return IIO_VAL_INT;
  212. case IIO_CHAN_INFO_CALIBSCALE:
  213. reg = AD5764_REG_FINE_GAIN(chan->address);
  214. ret = ad5764_read(indio_dev, reg, val);
  215. if (ret < 0)
  216. return ret;
  217. *val = sign_extend32(*val, 5);
  218. return IIO_VAL_INT;
  219. case IIO_CHAN_INFO_SCALE:
  220. /* vout = 4 * vref + ((dac_code / 65535) - 0.5) */
  221. vref = ad5764_get_channel_vref(st, chan->channel);
  222. if (vref < 0)
  223. return vref;
  224. scale_uv = (vref * 4 * 100) >> chan->scan_type.realbits;
  225. *val = scale_uv / 100000;
  226. *val2 = (scale_uv % 100000) * 10;
  227. return IIO_VAL_INT_PLUS_MICRO;
  228. case IIO_CHAN_INFO_OFFSET:
  229. *val = -(1 << chan->scan_type.realbits) / 2;
  230. return IIO_VAL_INT;
  231. }
  232. return -EINVAL;
  233. }
  234. static const struct iio_info ad5764_info = {
  235. .read_raw = ad5764_read_raw,
  236. .write_raw = ad5764_write_raw,
  237. .driver_module = THIS_MODULE,
  238. };
  239. static int ad5764_probe(struct spi_device *spi)
  240. {
  241. enum ad5764_type type = spi_get_device_id(spi)->driver_data;
  242. struct iio_dev *indio_dev;
  243. struct ad5764_state *st;
  244. int ret;
  245. indio_dev = iio_device_alloc(sizeof(*st));
  246. if (indio_dev == NULL) {
  247. dev_err(&spi->dev, "Failed to allocate iio device\n");
  248. return -ENOMEM;
  249. }
  250. st = iio_priv(indio_dev);
  251. spi_set_drvdata(spi, indio_dev);
  252. st->spi = spi;
  253. st->chip_info = &ad5764_chip_infos[type];
  254. indio_dev->dev.parent = &spi->dev;
  255. indio_dev->name = spi_get_device_id(spi)->name;
  256. indio_dev->info = &ad5764_info;
  257. indio_dev->modes = INDIO_DIRECT_MODE;
  258. indio_dev->num_channels = AD5764_NUM_CHANNELS;
  259. indio_dev->channels = st->chip_info->channels;
  260. if (st->chip_info->int_vref == 0) {
  261. st->vref_reg[0].supply = "vrefAB";
  262. st->vref_reg[1].supply = "vrefCD";
  263. ret = regulator_bulk_get(&st->spi->dev,
  264. ARRAY_SIZE(st->vref_reg), st->vref_reg);
  265. if (ret) {
  266. dev_err(&spi->dev, "Failed to request vref regulators: %d\n",
  267. ret);
  268. goto error_free;
  269. }
  270. ret = regulator_bulk_enable(ARRAY_SIZE(st->vref_reg),
  271. st->vref_reg);
  272. if (ret) {
  273. dev_err(&spi->dev, "Failed to enable vref regulators: %d\n",
  274. ret);
  275. goto error_free_reg;
  276. }
  277. }
  278. ret = iio_device_register(indio_dev);
  279. if (ret) {
  280. dev_err(&spi->dev, "Failed to register iio device: %d\n", ret);
  281. goto error_disable_reg;
  282. }
  283. return 0;
  284. error_disable_reg:
  285. if (st->chip_info->int_vref == 0)
  286. regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
  287. error_free_reg:
  288. if (st->chip_info->int_vref == 0)
  289. regulator_bulk_free(ARRAY_SIZE(st->vref_reg), st->vref_reg);
  290. error_free:
  291. iio_device_free(indio_dev);
  292. return ret;
  293. }
  294. static int ad5764_remove(struct spi_device *spi)
  295. {
  296. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  297. struct ad5764_state *st = iio_priv(indio_dev);
  298. iio_device_unregister(indio_dev);
  299. if (st->chip_info->int_vref == 0) {
  300. regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
  301. regulator_bulk_free(ARRAY_SIZE(st->vref_reg), st->vref_reg);
  302. }
  303. iio_device_free(indio_dev);
  304. return 0;
  305. }
  306. static const struct spi_device_id ad5764_ids[] = {
  307. { "ad5744", ID_AD5744 },
  308. { "ad5744r", ID_AD5744R },
  309. { "ad5764", ID_AD5764 },
  310. { "ad5764r", ID_AD5764R },
  311. { }
  312. };
  313. MODULE_DEVICE_TABLE(spi, ad5764_ids);
  314. static struct spi_driver ad5764_driver = {
  315. .driver = {
  316. .name = "ad5764",
  317. .owner = THIS_MODULE,
  318. },
  319. .probe = ad5764_probe,
  320. .remove = ad5764_remove,
  321. .id_table = ad5764_ids,
  322. };
  323. module_spi_driver(ad5764_driver);
  324. MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
  325. MODULE_DESCRIPTION("Analog Devices AD5744/AD5744R/AD5764/AD5764R DAC");
  326. MODULE_LICENSE("GPL v2");