ad5686.c 9.7 KB

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  1. /*
  2. * AD5686R, AD5685R, AD5684R Digital to analog converters driver
  3. *
  4. * Copyright 2011 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2.
  7. */
  8. #include <linux/interrupt.h>
  9. #include <linux/fs.h>
  10. #include <linux/device.h>
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/slab.h>
  15. #include <linux/sysfs.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/iio/iio.h>
  18. #include <linux/iio/sysfs.h>
  19. #define AD5686_DAC_CHANNELS 4
  20. #define AD5686_ADDR(x) ((x) << 16)
  21. #define AD5686_CMD(x) ((x) << 20)
  22. #define AD5686_ADDR_DAC(chan) (0x1 << (chan))
  23. #define AD5686_ADDR_ALL_DAC 0xF
  24. #define AD5686_CMD_NOOP 0x0
  25. #define AD5686_CMD_WRITE_INPUT_N 0x1
  26. #define AD5686_CMD_UPDATE_DAC_N 0x2
  27. #define AD5686_CMD_WRITE_INPUT_N_UPDATE_N 0x3
  28. #define AD5686_CMD_POWERDOWN_DAC 0x4
  29. #define AD5686_CMD_LDAC_MASK 0x5
  30. #define AD5686_CMD_RESET 0x6
  31. #define AD5686_CMD_INTERNAL_REFER_SETUP 0x7
  32. #define AD5686_CMD_DAISY_CHAIN_ENABLE 0x8
  33. #define AD5686_CMD_READBACK_ENABLE 0x9
  34. #define AD5686_LDAC_PWRDN_NONE 0x0
  35. #define AD5686_LDAC_PWRDN_1K 0x1
  36. #define AD5686_LDAC_PWRDN_100K 0x2
  37. #define AD5686_LDAC_PWRDN_3STATE 0x3
  38. /**
  39. * struct ad5686_chip_info - chip specific information
  40. * @int_vref_mv: AD5620/40/60: the internal reference voltage
  41. * @channel: channel specification
  42. */
  43. struct ad5686_chip_info {
  44. u16 int_vref_mv;
  45. struct iio_chan_spec channel[AD5686_DAC_CHANNELS];
  46. };
  47. /**
  48. * struct ad5446_state - driver instance specific data
  49. * @spi: spi_device
  50. * @chip_info: chip model specific constants, available modes etc
  51. * @reg: supply regulator
  52. * @vref_mv: actual reference voltage used
  53. * @pwr_down_mask: power down mask
  54. * @pwr_down_mode: current power down mode
  55. * @data: spi transfer buffers
  56. */
  57. struct ad5686_state {
  58. struct spi_device *spi;
  59. const struct ad5686_chip_info *chip_info;
  60. struct regulator *reg;
  61. unsigned short vref_mv;
  62. unsigned pwr_down_mask;
  63. unsigned pwr_down_mode;
  64. /*
  65. * DMA (thus cache coherency maintenance) requires the
  66. * transfer buffers to live in their own cache lines.
  67. */
  68. union {
  69. u32 d32;
  70. u8 d8[4];
  71. } data[3] ____cacheline_aligned;
  72. };
  73. /**
  74. * ad5686_supported_device_ids:
  75. */
  76. enum ad5686_supported_device_ids {
  77. ID_AD5684,
  78. ID_AD5685,
  79. ID_AD5686,
  80. };
  81. static int ad5686_spi_write(struct ad5686_state *st,
  82. u8 cmd, u8 addr, u16 val, u8 shift)
  83. {
  84. val <<= shift;
  85. st->data[0].d32 = cpu_to_be32(AD5686_CMD(cmd) |
  86. AD5686_ADDR(addr) |
  87. val);
  88. return spi_write(st->spi, &st->data[0].d8[1], 3);
  89. }
  90. static int ad5686_spi_read(struct ad5686_state *st, u8 addr)
  91. {
  92. struct spi_transfer t[] = {
  93. {
  94. .tx_buf = &st->data[0].d8[1],
  95. .len = 3,
  96. .cs_change = 1,
  97. }, {
  98. .tx_buf = &st->data[1].d8[1],
  99. .rx_buf = &st->data[2].d8[1],
  100. .len = 3,
  101. },
  102. };
  103. struct spi_message m;
  104. int ret;
  105. spi_message_init(&m);
  106. spi_message_add_tail(&t[0], &m);
  107. spi_message_add_tail(&t[1], &m);
  108. st->data[0].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_READBACK_ENABLE) |
  109. AD5686_ADDR(addr));
  110. st->data[1].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_NOOP));
  111. ret = spi_sync(st->spi, &m);
  112. if (ret < 0)
  113. return ret;
  114. return be32_to_cpu(st->data[2].d32);
  115. }
  116. static const char * const ad5686_powerdown_modes[] = {
  117. "1kohm_to_gnd",
  118. "100kohm_to_gnd",
  119. "three_state"
  120. };
  121. static int ad5686_get_powerdown_mode(struct iio_dev *indio_dev,
  122. const struct iio_chan_spec *chan)
  123. {
  124. struct ad5686_state *st = iio_priv(indio_dev);
  125. return ((st->pwr_down_mode >> (chan->channel * 2)) & 0x3) - 1;
  126. }
  127. static int ad5686_set_powerdown_mode(struct iio_dev *indio_dev,
  128. const struct iio_chan_spec *chan, unsigned int mode)
  129. {
  130. struct ad5686_state *st = iio_priv(indio_dev);
  131. st->pwr_down_mode &= ~(0x3 << (chan->channel * 2));
  132. st->pwr_down_mode |= ((mode + 1) << (chan->channel * 2));
  133. return 0;
  134. }
  135. static const struct iio_enum ad5686_powerdown_mode_enum = {
  136. .items = ad5686_powerdown_modes,
  137. .num_items = ARRAY_SIZE(ad5686_powerdown_modes),
  138. .get = ad5686_get_powerdown_mode,
  139. .set = ad5686_set_powerdown_mode,
  140. };
  141. static ssize_t ad5686_read_dac_powerdown(struct iio_dev *indio_dev,
  142. uintptr_t private, const struct iio_chan_spec *chan, char *buf)
  143. {
  144. struct ad5686_state *st = iio_priv(indio_dev);
  145. return sprintf(buf, "%d\n", !!(st->pwr_down_mask &
  146. (0x3 << (chan->channel * 2))));
  147. }
  148. static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev,
  149. uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
  150. size_t len)
  151. {
  152. bool readin;
  153. int ret;
  154. struct ad5686_state *st = iio_priv(indio_dev);
  155. ret = strtobool(buf, &readin);
  156. if (ret)
  157. return ret;
  158. if (readin)
  159. st->pwr_down_mask |= (0x3 << (chan->channel * 2));
  160. else
  161. st->pwr_down_mask &= ~(0x3 << (chan->channel * 2));
  162. ret = ad5686_spi_write(st, AD5686_CMD_POWERDOWN_DAC, 0,
  163. st->pwr_down_mask & st->pwr_down_mode, 0);
  164. return ret ? ret : len;
  165. }
  166. static int ad5686_read_raw(struct iio_dev *indio_dev,
  167. struct iio_chan_spec const *chan,
  168. int *val,
  169. int *val2,
  170. long m)
  171. {
  172. struct ad5686_state *st = iio_priv(indio_dev);
  173. unsigned long scale_uv;
  174. int ret;
  175. switch (m) {
  176. case IIO_CHAN_INFO_RAW:
  177. mutex_lock(&indio_dev->mlock);
  178. ret = ad5686_spi_read(st, chan->address);
  179. mutex_unlock(&indio_dev->mlock);
  180. if (ret < 0)
  181. return ret;
  182. *val = ret;
  183. return IIO_VAL_INT;
  184. break;
  185. case IIO_CHAN_INFO_SCALE:
  186. scale_uv = (st->vref_mv * 100000)
  187. >> (chan->scan_type.realbits);
  188. *val = scale_uv / 100000;
  189. *val2 = (scale_uv % 100000) * 10;
  190. return IIO_VAL_INT_PLUS_MICRO;
  191. }
  192. return -EINVAL;
  193. }
  194. static int ad5686_write_raw(struct iio_dev *indio_dev,
  195. struct iio_chan_spec const *chan,
  196. int val,
  197. int val2,
  198. long mask)
  199. {
  200. struct ad5686_state *st = iio_priv(indio_dev);
  201. int ret;
  202. switch (mask) {
  203. case IIO_CHAN_INFO_RAW:
  204. if (val > (1 << chan->scan_type.realbits) || val < 0)
  205. return -EINVAL;
  206. mutex_lock(&indio_dev->mlock);
  207. ret = ad5686_spi_write(st,
  208. AD5686_CMD_WRITE_INPUT_N_UPDATE_N,
  209. chan->address,
  210. val,
  211. chan->scan_type.shift);
  212. mutex_unlock(&indio_dev->mlock);
  213. break;
  214. default:
  215. ret = -EINVAL;
  216. }
  217. return ret;
  218. }
  219. static const struct iio_info ad5686_info = {
  220. .read_raw = ad5686_read_raw,
  221. .write_raw = ad5686_write_raw,
  222. .driver_module = THIS_MODULE,
  223. };
  224. static const struct iio_chan_spec_ext_info ad5686_ext_info[] = {
  225. {
  226. .name = "powerdown",
  227. .read = ad5686_read_dac_powerdown,
  228. .write = ad5686_write_dac_powerdown,
  229. },
  230. IIO_ENUM("powerdown_mode", false, &ad5686_powerdown_mode_enum),
  231. IIO_ENUM_AVAILABLE("powerdown_mode", &ad5686_powerdown_mode_enum),
  232. { },
  233. };
  234. #define AD5868_CHANNEL(chan, bits, shift) { \
  235. .type = IIO_VOLTAGE, \
  236. .indexed = 1, \
  237. .output = 1, \
  238. .channel = chan, \
  239. .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
  240. IIO_CHAN_INFO_SCALE_SHARED_BIT, \
  241. .address = AD5686_ADDR_DAC(chan), \
  242. .scan_type = IIO_ST('u', bits, 16, shift), \
  243. .ext_info = ad5686_ext_info, \
  244. }
  245. static const struct ad5686_chip_info ad5686_chip_info_tbl[] = {
  246. [ID_AD5684] = {
  247. .channel[0] = AD5868_CHANNEL(0, 12, 4),
  248. .channel[1] = AD5868_CHANNEL(1, 12, 4),
  249. .channel[2] = AD5868_CHANNEL(2, 12, 4),
  250. .channel[3] = AD5868_CHANNEL(3, 12, 4),
  251. .int_vref_mv = 2500,
  252. },
  253. [ID_AD5685] = {
  254. .channel[0] = AD5868_CHANNEL(0, 14, 2),
  255. .channel[1] = AD5868_CHANNEL(1, 14, 2),
  256. .channel[2] = AD5868_CHANNEL(2, 14, 2),
  257. .channel[3] = AD5868_CHANNEL(3, 14, 2),
  258. .int_vref_mv = 2500,
  259. },
  260. [ID_AD5686] = {
  261. .channel[0] = AD5868_CHANNEL(0, 16, 0),
  262. .channel[1] = AD5868_CHANNEL(1, 16, 0),
  263. .channel[2] = AD5868_CHANNEL(2, 16, 0),
  264. .channel[3] = AD5868_CHANNEL(3, 16, 0),
  265. .int_vref_mv = 2500,
  266. },
  267. };
  268. static int ad5686_probe(struct spi_device *spi)
  269. {
  270. struct ad5686_state *st;
  271. struct iio_dev *indio_dev;
  272. int ret, regdone = 0, voltage_uv = 0;
  273. indio_dev = iio_device_alloc(sizeof(*st));
  274. if (indio_dev == NULL)
  275. return -ENOMEM;
  276. st = iio_priv(indio_dev);
  277. spi_set_drvdata(spi, indio_dev);
  278. st->reg = regulator_get(&spi->dev, "vcc");
  279. if (!IS_ERR(st->reg)) {
  280. ret = regulator_enable(st->reg);
  281. if (ret)
  282. goto error_put_reg;
  283. voltage_uv = regulator_get_voltage(st->reg);
  284. }
  285. st->chip_info =
  286. &ad5686_chip_info_tbl[spi_get_device_id(spi)->driver_data];
  287. if (voltage_uv)
  288. st->vref_mv = voltage_uv / 1000;
  289. else
  290. st->vref_mv = st->chip_info->int_vref_mv;
  291. st->spi = spi;
  292. /* Set all the power down mode for all channels to 1K pulldown */
  293. st->pwr_down_mode = 0x55;
  294. indio_dev->dev.parent = &spi->dev;
  295. indio_dev->name = spi_get_device_id(spi)->name;
  296. indio_dev->info = &ad5686_info;
  297. indio_dev->modes = INDIO_DIRECT_MODE;
  298. indio_dev->channels = st->chip_info->channel;
  299. indio_dev->num_channels = AD5686_DAC_CHANNELS;
  300. regdone = 1;
  301. ret = ad5686_spi_write(st, AD5686_CMD_INTERNAL_REFER_SETUP, 0,
  302. !!voltage_uv, 0);
  303. if (ret)
  304. goto error_disable_reg;
  305. ret = iio_device_register(indio_dev);
  306. if (ret)
  307. goto error_disable_reg;
  308. return 0;
  309. error_disable_reg:
  310. if (!IS_ERR(st->reg))
  311. regulator_disable(st->reg);
  312. error_put_reg:
  313. if (!IS_ERR(st->reg))
  314. regulator_put(st->reg);
  315. iio_device_free(indio_dev);
  316. return ret;
  317. }
  318. static int ad5686_remove(struct spi_device *spi)
  319. {
  320. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  321. struct ad5686_state *st = iio_priv(indio_dev);
  322. iio_device_unregister(indio_dev);
  323. if (!IS_ERR(st->reg)) {
  324. regulator_disable(st->reg);
  325. regulator_put(st->reg);
  326. }
  327. iio_device_free(indio_dev);
  328. return 0;
  329. }
  330. static const struct spi_device_id ad5686_id[] = {
  331. {"ad5684", ID_AD5684},
  332. {"ad5685", ID_AD5685},
  333. {"ad5686", ID_AD5686},
  334. {}
  335. };
  336. MODULE_DEVICE_TABLE(spi, ad5686_id);
  337. static struct spi_driver ad5686_driver = {
  338. .driver = {
  339. .name = "ad5686",
  340. .owner = THIS_MODULE,
  341. },
  342. .probe = ad5686_probe,
  343. .remove = ad5686_remove,
  344. .id_table = ad5686_id,
  345. };
  346. module_spi_driver(ad5686_driver);
  347. MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
  348. MODULE_DESCRIPTION("Analog Devices AD5686/85/84 DAC");
  349. MODULE_LICENSE("GPL v2");