ad5421.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544
  1. /*
  2. * AD5421 Digital to analog converters driver
  3. *
  4. * Copyright 2011 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/delay.h>
  10. #include <linux/err.h>
  11. #include <linux/module.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/kernel.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/slab.h>
  16. #include <linux/sysfs.h>
  17. #include <linux/iio/iio.h>
  18. #include <linux/iio/sysfs.h>
  19. #include <linux/iio/events.h>
  20. #include <linux/iio/dac/ad5421.h>
  21. #define AD5421_REG_DAC_DATA 0x1
  22. #define AD5421_REG_CTRL 0x2
  23. #define AD5421_REG_OFFSET 0x3
  24. #define AD5421_REG_GAIN 0x4
  25. /* load dac and fault shared the same register number. Writing to it will cause
  26. * a dac load command, reading from it will return the fault status register */
  27. #define AD5421_REG_LOAD_DAC 0x5
  28. #define AD5421_REG_FAULT 0x5
  29. #define AD5421_REG_FORCE_ALARM_CURRENT 0x6
  30. #define AD5421_REG_RESET 0x7
  31. #define AD5421_REG_START_CONVERSION 0x8
  32. #define AD5421_REG_NOOP 0x9
  33. #define AD5421_CTRL_WATCHDOG_DISABLE BIT(12)
  34. #define AD5421_CTRL_AUTO_FAULT_READBACK BIT(11)
  35. #define AD5421_CTRL_MIN_CURRENT BIT(9)
  36. #define AD5421_CTRL_ADC_SOURCE_TEMP BIT(8)
  37. #define AD5421_CTRL_ADC_ENABLE BIT(7)
  38. #define AD5421_CTRL_PWR_DOWN_INT_VREF BIT(6)
  39. #define AD5421_FAULT_SPI BIT(15)
  40. #define AD5421_FAULT_PEC BIT(14)
  41. #define AD5421_FAULT_OVER_CURRENT BIT(13)
  42. #define AD5421_FAULT_UNDER_CURRENT BIT(12)
  43. #define AD5421_FAULT_TEMP_OVER_140 BIT(11)
  44. #define AD5421_FAULT_TEMP_OVER_100 BIT(10)
  45. #define AD5421_FAULT_UNDER_VOLTAGE_6V BIT(9)
  46. #define AD5421_FAULT_UNDER_VOLTAGE_12V BIT(8)
  47. /* These bits will cause the fault pin to go high */
  48. #define AD5421_FAULT_TRIGGER_IRQ \
  49. (AD5421_FAULT_SPI | AD5421_FAULT_PEC | AD5421_FAULT_OVER_CURRENT | \
  50. AD5421_FAULT_UNDER_CURRENT | AD5421_FAULT_TEMP_OVER_140)
  51. /**
  52. * struct ad5421_state - driver instance specific data
  53. * @spi: spi_device
  54. * @ctrl: control register cache
  55. * @current_range: current range which the device is configured for
  56. * @data: spi transfer buffers
  57. * @fault_mask: software masking of events
  58. */
  59. struct ad5421_state {
  60. struct spi_device *spi;
  61. unsigned int ctrl;
  62. enum ad5421_current_range current_range;
  63. unsigned int fault_mask;
  64. /*
  65. * DMA (thus cache coherency maintenance) requires the
  66. * transfer buffers to live in their own cache lines.
  67. */
  68. union {
  69. u32 d32;
  70. u8 d8[4];
  71. } data[2] ____cacheline_aligned;
  72. };
  73. static const struct iio_chan_spec ad5421_channels[] = {
  74. {
  75. .type = IIO_CURRENT,
  76. .indexed = 1,
  77. .output = 1,
  78. .channel = 0,
  79. .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
  80. IIO_CHAN_INFO_SCALE_SHARED_BIT |
  81. IIO_CHAN_INFO_OFFSET_SHARED_BIT |
  82. IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT |
  83. IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT,
  84. .scan_type = IIO_ST('u', 16, 16, 0),
  85. .event_mask = IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING) |
  86. IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
  87. },
  88. {
  89. .type = IIO_TEMP,
  90. .channel = -1,
  91. .event_mask = IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
  92. },
  93. };
  94. static int ad5421_write_unlocked(struct iio_dev *indio_dev,
  95. unsigned int reg, unsigned int val)
  96. {
  97. struct ad5421_state *st = iio_priv(indio_dev);
  98. st->data[0].d32 = cpu_to_be32((reg << 16) | val);
  99. return spi_write(st->spi, &st->data[0].d8[1], 3);
  100. }
  101. static int ad5421_write(struct iio_dev *indio_dev, unsigned int reg,
  102. unsigned int val)
  103. {
  104. int ret;
  105. mutex_lock(&indio_dev->mlock);
  106. ret = ad5421_write_unlocked(indio_dev, reg, val);
  107. mutex_unlock(&indio_dev->mlock);
  108. return ret;
  109. }
  110. static int ad5421_read(struct iio_dev *indio_dev, unsigned int reg)
  111. {
  112. struct ad5421_state *st = iio_priv(indio_dev);
  113. struct spi_message m;
  114. int ret;
  115. struct spi_transfer t[] = {
  116. {
  117. .tx_buf = &st->data[0].d8[1],
  118. .len = 3,
  119. .cs_change = 1,
  120. }, {
  121. .rx_buf = &st->data[1].d8[1],
  122. .len = 3,
  123. },
  124. };
  125. spi_message_init(&m);
  126. spi_message_add_tail(&t[0], &m);
  127. spi_message_add_tail(&t[1], &m);
  128. mutex_lock(&indio_dev->mlock);
  129. st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
  130. ret = spi_sync(st->spi, &m);
  131. if (ret >= 0)
  132. ret = be32_to_cpu(st->data[1].d32) & 0xffff;
  133. mutex_unlock(&indio_dev->mlock);
  134. return ret;
  135. }
  136. static int ad5421_update_ctrl(struct iio_dev *indio_dev, unsigned int set,
  137. unsigned int clr)
  138. {
  139. struct ad5421_state *st = iio_priv(indio_dev);
  140. unsigned int ret;
  141. mutex_lock(&indio_dev->mlock);
  142. st->ctrl &= ~clr;
  143. st->ctrl |= set;
  144. ret = ad5421_write_unlocked(indio_dev, AD5421_REG_CTRL, st->ctrl);
  145. mutex_unlock(&indio_dev->mlock);
  146. return ret;
  147. }
  148. static irqreturn_t ad5421_fault_handler(int irq, void *data)
  149. {
  150. struct iio_dev *indio_dev = data;
  151. struct ad5421_state *st = iio_priv(indio_dev);
  152. unsigned int fault;
  153. unsigned int old_fault = 0;
  154. unsigned int events;
  155. fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
  156. if (!fault)
  157. return IRQ_NONE;
  158. /* If we had a fault, this might mean that the DAC has lost its state
  159. * and has been reset. Make sure that the control register actually
  160. * contains what we expect it to contain. Otherwise the watchdog might
  161. * be enabled and we get watchdog timeout faults, which will render the
  162. * DAC unusable. */
  163. ad5421_update_ctrl(indio_dev, 0, 0);
  164. /* The fault pin stays high as long as a fault condition is present and
  165. * it is not possible to mask fault conditions. For certain fault
  166. * conditions for example like over-temperature it takes some time
  167. * until the fault condition disappears. If we would exit the interrupt
  168. * handler immediately after handling the event it would be entered
  169. * again instantly. Thus we fall back to polling in case we detect that
  170. * a interrupt condition is still present.
  171. */
  172. do {
  173. /* 0xffff is a invalid value for the register and will only be
  174. * read if there has been a communication error */
  175. if (fault == 0xffff)
  176. fault = 0;
  177. /* we are only interested in new events */
  178. events = (old_fault ^ fault) & fault;
  179. events &= st->fault_mask;
  180. if (events & AD5421_FAULT_OVER_CURRENT) {
  181. iio_push_event(indio_dev,
  182. IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
  183. 0,
  184. IIO_EV_TYPE_THRESH,
  185. IIO_EV_DIR_RISING),
  186. iio_get_time_ns());
  187. }
  188. if (events & AD5421_FAULT_UNDER_CURRENT) {
  189. iio_push_event(indio_dev,
  190. IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
  191. 0,
  192. IIO_EV_TYPE_THRESH,
  193. IIO_EV_DIR_FALLING),
  194. iio_get_time_ns());
  195. }
  196. if (events & AD5421_FAULT_TEMP_OVER_140) {
  197. iio_push_event(indio_dev,
  198. IIO_UNMOD_EVENT_CODE(IIO_TEMP,
  199. 0,
  200. IIO_EV_TYPE_MAG,
  201. IIO_EV_DIR_RISING),
  202. iio_get_time_ns());
  203. }
  204. old_fault = fault;
  205. fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
  206. /* still active? go to sleep for some time */
  207. if (fault & AD5421_FAULT_TRIGGER_IRQ)
  208. msleep(1000);
  209. } while (fault & AD5421_FAULT_TRIGGER_IRQ);
  210. return IRQ_HANDLED;
  211. }
  212. static void ad5421_get_current_min_max(struct ad5421_state *st,
  213. unsigned int *min, unsigned int *max)
  214. {
  215. /* The current range is configured using external pins, which are
  216. * usually hard-wired and not run-time switchable. */
  217. switch (st->current_range) {
  218. case AD5421_CURRENT_RANGE_4mA_20mA:
  219. *min = 4000;
  220. *max = 20000;
  221. break;
  222. case AD5421_CURRENT_RANGE_3mA8_21mA:
  223. *min = 3800;
  224. *max = 21000;
  225. break;
  226. case AD5421_CURRENT_RANGE_3mA2_24mA:
  227. *min = 3200;
  228. *max = 24000;
  229. break;
  230. default:
  231. *min = 0;
  232. *max = 1;
  233. break;
  234. }
  235. }
  236. static inline unsigned int ad5421_get_offset(struct ad5421_state *st)
  237. {
  238. unsigned int min, max;
  239. ad5421_get_current_min_max(st, &min, &max);
  240. return (min * (1 << 16)) / (max - min);
  241. }
  242. static inline unsigned int ad5421_get_scale(struct ad5421_state *st)
  243. {
  244. unsigned int min, max;
  245. ad5421_get_current_min_max(st, &min, &max);
  246. return ((max - min) * 1000) / (1 << 16);
  247. }
  248. static int ad5421_read_raw(struct iio_dev *indio_dev,
  249. struct iio_chan_spec const *chan, int *val, int *val2, long m)
  250. {
  251. struct ad5421_state *st = iio_priv(indio_dev);
  252. int ret;
  253. if (chan->type != IIO_CURRENT)
  254. return -EINVAL;
  255. switch (m) {
  256. case IIO_CHAN_INFO_RAW:
  257. ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
  258. if (ret < 0)
  259. return ret;
  260. *val = ret;
  261. return IIO_VAL_INT;
  262. case IIO_CHAN_INFO_SCALE:
  263. *val = 0;
  264. *val2 = ad5421_get_scale(st);
  265. return IIO_VAL_INT_PLUS_MICRO;
  266. case IIO_CHAN_INFO_OFFSET:
  267. *val = ad5421_get_offset(st);
  268. return IIO_VAL_INT;
  269. case IIO_CHAN_INFO_CALIBBIAS:
  270. ret = ad5421_read(indio_dev, AD5421_REG_OFFSET);
  271. if (ret < 0)
  272. return ret;
  273. *val = ret - 32768;
  274. return IIO_VAL_INT;
  275. case IIO_CHAN_INFO_CALIBSCALE:
  276. ret = ad5421_read(indio_dev, AD5421_REG_GAIN);
  277. if (ret < 0)
  278. return ret;
  279. *val = ret;
  280. return IIO_VAL_INT;
  281. }
  282. return -EINVAL;
  283. }
  284. static int ad5421_write_raw(struct iio_dev *indio_dev,
  285. struct iio_chan_spec const *chan, int val, int val2, long mask)
  286. {
  287. const unsigned int max_val = 1 << 16;
  288. switch (mask) {
  289. case IIO_CHAN_INFO_RAW:
  290. if (val >= max_val || val < 0)
  291. return -EINVAL;
  292. return ad5421_write(indio_dev, AD5421_REG_DAC_DATA, val);
  293. case IIO_CHAN_INFO_CALIBBIAS:
  294. val += 32768;
  295. if (val >= max_val || val < 0)
  296. return -EINVAL;
  297. return ad5421_write(indio_dev, AD5421_REG_OFFSET, val);
  298. case IIO_CHAN_INFO_CALIBSCALE:
  299. if (val >= max_val || val < 0)
  300. return -EINVAL;
  301. return ad5421_write(indio_dev, AD5421_REG_GAIN, val);
  302. default:
  303. break;
  304. }
  305. return -EINVAL;
  306. }
  307. static int ad5421_write_event_config(struct iio_dev *indio_dev,
  308. u64 event_code, int state)
  309. {
  310. struct ad5421_state *st = iio_priv(indio_dev);
  311. unsigned int mask;
  312. switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
  313. case IIO_CURRENT:
  314. if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) ==
  315. IIO_EV_DIR_RISING)
  316. mask = AD5421_FAULT_OVER_CURRENT;
  317. else
  318. mask = AD5421_FAULT_UNDER_CURRENT;
  319. break;
  320. case IIO_TEMP:
  321. mask = AD5421_FAULT_TEMP_OVER_140;
  322. break;
  323. default:
  324. return -EINVAL;
  325. }
  326. mutex_lock(&indio_dev->mlock);
  327. if (state)
  328. st->fault_mask |= mask;
  329. else
  330. st->fault_mask &= ~mask;
  331. mutex_unlock(&indio_dev->mlock);
  332. return 0;
  333. }
  334. static int ad5421_read_event_config(struct iio_dev *indio_dev,
  335. u64 event_code)
  336. {
  337. struct ad5421_state *st = iio_priv(indio_dev);
  338. unsigned int mask;
  339. switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
  340. case IIO_CURRENT:
  341. if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) ==
  342. IIO_EV_DIR_RISING)
  343. mask = AD5421_FAULT_OVER_CURRENT;
  344. else
  345. mask = AD5421_FAULT_UNDER_CURRENT;
  346. break;
  347. case IIO_TEMP:
  348. mask = AD5421_FAULT_TEMP_OVER_140;
  349. break;
  350. default:
  351. return -EINVAL;
  352. }
  353. return (bool)(st->fault_mask & mask);
  354. }
  355. static int ad5421_read_event_value(struct iio_dev *indio_dev, u64 event_code,
  356. int *val)
  357. {
  358. int ret;
  359. switch (IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(event_code)) {
  360. case IIO_CURRENT:
  361. ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
  362. if (ret < 0)
  363. return ret;
  364. *val = ret;
  365. break;
  366. case IIO_TEMP:
  367. *val = 140000;
  368. break;
  369. default:
  370. return -EINVAL;
  371. }
  372. return 0;
  373. }
  374. static const struct iio_info ad5421_info = {
  375. .read_raw = ad5421_read_raw,
  376. .write_raw = ad5421_write_raw,
  377. .read_event_config = ad5421_read_event_config,
  378. .write_event_config = ad5421_write_event_config,
  379. .read_event_value = ad5421_read_event_value,
  380. .driver_module = THIS_MODULE,
  381. };
  382. static int ad5421_probe(struct spi_device *spi)
  383. {
  384. struct ad5421_platform_data *pdata = dev_get_platdata(&spi->dev);
  385. struct iio_dev *indio_dev;
  386. struct ad5421_state *st;
  387. int ret;
  388. indio_dev = iio_device_alloc(sizeof(*st));
  389. if (indio_dev == NULL) {
  390. dev_err(&spi->dev, "Failed to allocate iio device\n");
  391. return -ENOMEM;
  392. }
  393. st = iio_priv(indio_dev);
  394. spi_set_drvdata(spi, indio_dev);
  395. st->spi = spi;
  396. indio_dev->dev.parent = &spi->dev;
  397. indio_dev->name = "ad5421";
  398. indio_dev->info = &ad5421_info;
  399. indio_dev->modes = INDIO_DIRECT_MODE;
  400. indio_dev->channels = ad5421_channels;
  401. indio_dev->num_channels = ARRAY_SIZE(ad5421_channels);
  402. st->ctrl = AD5421_CTRL_WATCHDOG_DISABLE |
  403. AD5421_CTRL_AUTO_FAULT_READBACK;
  404. if (pdata) {
  405. st->current_range = pdata->current_range;
  406. if (pdata->external_vref)
  407. st->ctrl |= AD5421_CTRL_PWR_DOWN_INT_VREF;
  408. } else {
  409. st->current_range = AD5421_CURRENT_RANGE_4mA_20mA;
  410. }
  411. /* write initial ctrl register value */
  412. ad5421_update_ctrl(indio_dev, 0, 0);
  413. if (spi->irq) {
  414. ret = request_threaded_irq(spi->irq,
  415. NULL,
  416. ad5421_fault_handler,
  417. IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
  418. "ad5421 fault",
  419. indio_dev);
  420. if (ret)
  421. goto error_free;
  422. }
  423. ret = iio_device_register(indio_dev);
  424. if (ret) {
  425. dev_err(&spi->dev, "Failed to register iio device: %d\n", ret);
  426. goto error_free_irq;
  427. }
  428. return 0;
  429. error_free_irq:
  430. if (spi->irq)
  431. free_irq(spi->irq, indio_dev);
  432. error_free:
  433. iio_device_free(indio_dev);
  434. return ret;
  435. }
  436. static int ad5421_remove(struct spi_device *spi)
  437. {
  438. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  439. iio_device_unregister(indio_dev);
  440. if (spi->irq)
  441. free_irq(spi->irq, indio_dev);
  442. iio_device_free(indio_dev);
  443. return 0;
  444. }
  445. static struct spi_driver ad5421_driver = {
  446. .driver = {
  447. .name = "ad5421",
  448. .owner = THIS_MODULE,
  449. },
  450. .probe = ad5421_probe,
  451. .remove = ad5421_remove,
  452. };
  453. module_spi_driver(ad5421_driver);
  454. MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
  455. MODULE_DESCRIPTION("Analog Devices AD5421 DAC");
  456. MODULE_LICENSE("GPL v2");
  457. MODULE_ALIAS("spi:ad5421");