jc42.c 16 KB

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  1. /*
  2. * jc42.c - driver for Jedec JC42.4 compliant temperature sensors
  3. *
  4. * Copyright (c) 2010 Ericsson AB.
  5. *
  6. * Derived from lm77.c by Andras BALI <drewie@freemail.hu>.
  7. *
  8. * JC42.4 compliant temperature sensors are typically used on memory modules.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23. */
  24. #include <linux/module.h>
  25. #include <linux/init.h>
  26. #include <linux/slab.h>
  27. #include <linux/jiffies.h>
  28. #include <linux/i2c.h>
  29. #include <linux/hwmon.h>
  30. #include <linux/hwmon-sysfs.h>
  31. #include <linux/err.h>
  32. #include <linux/mutex.h>
  33. /* Addresses to scan */
  34. static const unsigned short normal_i2c[] = {
  35. 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END };
  36. /* JC42 registers. All registers are 16 bit. */
  37. #define JC42_REG_CAP 0x00
  38. #define JC42_REG_CONFIG 0x01
  39. #define JC42_REG_TEMP_UPPER 0x02
  40. #define JC42_REG_TEMP_LOWER 0x03
  41. #define JC42_REG_TEMP_CRITICAL 0x04
  42. #define JC42_REG_TEMP 0x05
  43. #define JC42_REG_MANID 0x06
  44. #define JC42_REG_DEVICEID 0x07
  45. /* Status bits in temperature register */
  46. #define JC42_ALARM_CRIT_BIT 15
  47. #define JC42_ALARM_MAX_BIT 14
  48. #define JC42_ALARM_MIN_BIT 13
  49. /* Configuration register defines */
  50. #define JC42_CFG_CRIT_ONLY (1 << 2)
  51. #define JC42_CFG_TCRIT_LOCK (1 << 6)
  52. #define JC42_CFG_EVENT_LOCK (1 << 7)
  53. #define JC42_CFG_SHUTDOWN (1 << 8)
  54. #define JC42_CFG_HYST_SHIFT 9
  55. #define JC42_CFG_HYST_MASK (0x03 << 9)
  56. /* Capabilities */
  57. #define JC42_CAP_RANGE (1 << 2)
  58. /* Manufacturer IDs */
  59. #define ADT_MANID 0x11d4 /* Analog Devices */
  60. #define ATMEL_MANID 0x001f /* Atmel */
  61. #define MAX_MANID 0x004d /* Maxim */
  62. #define IDT_MANID 0x00b3 /* IDT */
  63. #define MCP_MANID 0x0054 /* Microchip */
  64. #define NXP_MANID 0x1131 /* NXP Semiconductors */
  65. #define ONS_MANID 0x1b09 /* ON Semiconductor */
  66. #define STM_MANID 0x104a /* ST Microelectronics */
  67. /* Supported chips */
  68. /* Analog Devices */
  69. #define ADT7408_DEVID 0x0801
  70. #define ADT7408_DEVID_MASK 0xffff
  71. /* Atmel */
  72. #define AT30TS00_DEVID 0x8201
  73. #define AT30TS00_DEVID_MASK 0xffff
  74. /* IDT */
  75. #define TS3000B3_DEVID 0x2903 /* Also matches TSE2002B3 */
  76. #define TS3000B3_DEVID_MASK 0xffff
  77. #define TS3000GB2_DEVID 0x2912 /* Also matches TSE2002GB2 */
  78. #define TS3000GB2_DEVID_MASK 0xffff
  79. /* Maxim */
  80. #define MAX6604_DEVID 0x3e00
  81. #define MAX6604_DEVID_MASK 0xffff
  82. /* Microchip */
  83. #define MCP9804_DEVID 0x0200
  84. #define MCP9804_DEVID_MASK 0xfffc
  85. #define MCP98242_DEVID 0x2000
  86. #define MCP98242_DEVID_MASK 0xfffc
  87. #define MCP98243_DEVID 0x2100
  88. #define MCP98243_DEVID_MASK 0xfffc
  89. #define MCP9843_DEVID 0x0000 /* Also matches mcp9805 */
  90. #define MCP9843_DEVID_MASK 0xfffe
  91. /* NXP */
  92. #define SE97_DEVID 0xa200
  93. #define SE97_DEVID_MASK 0xfffc
  94. #define SE98_DEVID 0xa100
  95. #define SE98_DEVID_MASK 0xfffc
  96. /* ON Semiconductor */
  97. #define CAT6095_DEVID 0x0800 /* Also matches CAT34TS02 */
  98. #define CAT6095_DEVID_MASK 0xffe0
  99. /* ST Microelectronics */
  100. #define STTS424_DEVID 0x0101
  101. #define STTS424_DEVID_MASK 0xffff
  102. #define STTS424E_DEVID 0x0000
  103. #define STTS424E_DEVID_MASK 0xfffe
  104. #define STTS2002_DEVID 0x0300
  105. #define STTS2002_DEVID_MASK 0xffff
  106. #define STTS3000_DEVID 0x0200
  107. #define STTS3000_DEVID_MASK 0xffff
  108. static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 };
  109. struct jc42_chips {
  110. u16 manid;
  111. u16 devid;
  112. u16 devid_mask;
  113. };
  114. static struct jc42_chips jc42_chips[] = {
  115. { ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK },
  116. { ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK },
  117. { IDT_MANID, TS3000B3_DEVID, TS3000B3_DEVID_MASK },
  118. { IDT_MANID, TS3000GB2_DEVID, TS3000GB2_DEVID_MASK },
  119. { MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK },
  120. { MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK },
  121. { MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK },
  122. { MCP_MANID, MCP98243_DEVID, MCP98243_DEVID_MASK },
  123. { MCP_MANID, MCP9843_DEVID, MCP9843_DEVID_MASK },
  124. { NXP_MANID, SE97_DEVID, SE97_DEVID_MASK },
  125. { ONS_MANID, CAT6095_DEVID, CAT6095_DEVID_MASK },
  126. { NXP_MANID, SE98_DEVID, SE98_DEVID_MASK },
  127. { STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK },
  128. { STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK },
  129. { STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK },
  130. { STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK },
  131. };
  132. /* Each client has this additional data */
  133. struct jc42_data {
  134. struct device *hwmon_dev;
  135. struct mutex update_lock; /* protect register access */
  136. bool extended; /* true if extended range supported */
  137. bool valid;
  138. unsigned long last_updated; /* In jiffies */
  139. u16 orig_config; /* original configuration */
  140. u16 config; /* current configuration */
  141. u16 temp_input; /* Temperatures */
  142. u16 temp_crit;
  143. u16 temp_min;
  144. u16 temp_max;
  145. };
  146. static int jc42_probe(struct i2c_client *client,
  147. const struct i2c_device_id *id);
  148. static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info);
  149. static int jc42_remove(struct i2c_client *client);
  150. static struct jc42_data *jc42_update_device(struct device *dev);
  151. static const struct i2c_device_id jc42_id[] = {
  152. { "jc42", 0 },
  153. { }
  154. };
  155. MODULE_DEVICE_TABLE(i2c, jc42_id);
  156. #ifdef CONFIG_PM
  157. static int jc42_suspend(struct device *dev)
  158. {
  159. struct i2c_client *client = to_i2c_client(dev);
  160. struct jc42_data *data = i2c_get_clientdata(client);
  161. data->config |= JC42_CFG_SHUTDOWN;
  162. i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, data->config);
  163. return 0;
  164. }
  165. static int jc42_resume(struct device *dev)
  166. {
  167. struct i2c_client *client = to_i2c_client(dev);
  168. struct jc42_data *data = i2c_get_clientdata(client);
  169. data->config &= ~JC42_CFG_SHUTDOWN;
  170. i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, data->config);
  171. return 0;
  172. }
  173. static const struct dev_pm_ops jc42_dev_pm_ops = {
  174. .suspend = jc42_suspend,
  175. .resume = jc42_resume,
  176. };
  177. #define JC42_DEV_PM_OPS (&jc42_dev_pm_ops)
  178. #else
  179. #define JC42_DEV_PM_OPS NULL
  180. #endif /* CONFIG_PM */
  181. /* This is the driver that will be inserted */
  182. static struct i2c_driver jc42_driver = {
  183. .class = I2C_CLASS_SPD,
  184. .driver = {
  185. .name = "jc42",
  186. .pm = JC42_DEV_PM_OPS,
  187. },
  188. .probe = jc42_probe,
  189. .remove = jc42_remove,
  190. .id_table = jc42_id,
  191. .detect = jc42_detect,
  192. .address_list = normal_i2c,
  193. };
  194. #define JC42_TEMP_MIN_EXTENDED (-40000)
  195. #define JC42_TEMP_MIN 0
  196. #define JC42_TEMP_MAX 125000
  197. static u16 jc42_temp_to_reg(int temp, bool extended)
  198. {
  199. int ntemp = SENSORS_LIMIT(temp,
  200. extended ? JC42_TEMP_MIN_EXTENDED :
  201. JC42_TEMP_MIN, JC42_TEMP_MAX);
  202. /* convert from 0.001 to 0.0625 resolution */
  203. return (ntemp * 2 / 125) & 0x1fff;
  204. }
  205. static int jc42_temp_from_reg(s16 reg)
  206. {
  207. reg &= 0x1fff;
  208. /* sign extend register */
  209. if (reg & 0x1000)
  210. reg |= 0xf000;
  211. /* convert from 0.0625 to 0.001 resolution */
  212. return reg * 125 / 2;
  213. }
  214. /* sysfs stuff */
  215. /* read routines for temperature limits */
  216. #define show(value) \
  217. static ssize_t show_##value(struct device *dev, \
  218. struct device_attribute *attr, \
  219. char *buf) \
  220. { \
  221. struct jc42_data *data = jc42_update_device(dev); \
  222. if (IS_ERR(data)) \
  223. return PTR_ERR(data); \
  224. return sprintf(buf, "%d\n", jc42_temp_from_reg(data->value)); \
  225. }
  226. show(temp_input);
  227. show(temp_crit);
  228. show(temp_min);
  229. show(temp_max);
  230. /* read routines for hysteresis values */
  231. static ssize_t show_temp_crit_hyst(struct device *dev,
  232. struct device_attribute *attr, char *buf)
  233. {
  234. struct jc42_data *data = jc42_update_device(dev);
  235. int temp, hyst;
  236. if (IS_ERR(data))
  237. return PTR_ERR(data);
  238. temp = jc42_temp_from_reg(data->temp_crit);
  239. hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
  240. >> JC42_CFG_HYST_SHIFT];
  241. return sprintf(buf, "%d\n", temp - hyst);
  242. }
  243. static ssize_t show_temp_max_hyst(struct device *dev,
  244. struct device_attribute *attr, char *buf)
  245. {
  246. struct jc42_data *data = jc42_update_device(dev);
  247. int temp, hyst;
  248. if (IS_ERR(data))
  249. return PTR_ERR(data);
  250. temp = jc42_temp_from_reg(data->temp_max);
  251. hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
  252. >> JC42_CFG_HYST_SHIFT];
  253. return sprintf(buf, "%d\n", temp - hyst);
  254. }
  255. /* write routines */
  256. #define set(value, reg) \
  257. static ssize_t set_##value(struct device *dev, \
  258. struct device_attribute *attr, \
  259. const char *buf, size_t count) \
  260. { \
  261. struct i2c_client *client = to_i2c_client(dev); \
  262. struct jc42_data *data = i2c_get_clientdata(client); \
  263. int err, ret = count; \
  264. long val; \
  265. if (kstrtol(buf, 10, &val) < 0) \
  266. return -EINVAL; \
  267. mutex_lock(&data->update_lock); \
  268. data->value = jc42_temp_to_reg(val, data->extended); \
  269. err = i2c_smbus_write_word_swapped(client, reg, data->value); \
  270. if (err < 0) \
  271. ret = err; \
  272. mutex_unlock(&data->update_lock); \
  273. return ret; \
  274. }
  275. set(temp_min, JC42_REG_TEMP_LOWER);
  276. set(temp_max, JC42_REG_TEMP_UPPER);
  277. set(temp_crit, JC42_REG_TEMP_CRITICAL);
  278. /*
  279. * JC42.4 compliant chips only support four hysteresis values.
  280. * Pick best choice and go from there.
  281. */
  282. static ssize_t set_temp_crit_hyst(struct device *dev,
  283. struct device_attribute *attr,
  284. const char *buf, size_t count)
  285. {
  286. struct i2c_client *client = to_i2c_client(dev);
  287. struct jc42_data *data = i2c_get_clientdata(client);
  288. unsigned long val;
  289. int diff, hyst;
  290. int err;
  291. int ret = count;
  292. if (kstrtoul(buf, 10, &val) < 0)
  293. return -EINVAL;
  294. diff = jc42_temp_from_reg(data->temp_crit) - val;
  295. hyst = 0;
  296. if (diff > 0) {
  297. if (diff < 2250)
  298. hyst = 1; /* 1.5 degrees C */
  299. else if (diff < 4500)
  300. hyst = 2; /* 3.0 degrees C */
  301. else
  302. hyst = 3; /* 6.0 degrees C */
  303. }
  304. mutex_lock(&data->update_lock);
  305. data->config = (data->config & ~JC42_CFG_HYST_MASK)
  306. | (hyst << JC42_CFG_HYST_SHIFT);
  307. err = i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG,
  308. data->config);
  309. if (err < 0)
  310. ret = err;
  311. mutex_unlock(&data->update_lock);
  312. return ret;
  313. }
  314. static ssize_t show_alarm(struct device *dev,
  315. struct device_attribute *attr, char *buf)
  316. {
  317. u16 bit = to_sensor_dev_attr(attr)->index;
  318. struct jc42_data *data = jc42_update_device(dev);
  319. u16 val;
  320. if (IS_ERR(data))
  321. return PTR_ERR(data);
  322. val = data->temp_input;
  323. if (bit != JC42_ALARM_CRIT_BIT && (data->config & JC42_CFG_CRIT_ONLY))
  324. val = 0;
  325. return sprintf(buf, "%u\n", (val >> bit) & 1);
  326. }
  327. static DEVICE_ATTR(temp1_input, S_IRUGO,
  328. show_temp_input, NULL);
  329. static DEVICE_ATTR(temp1_crit, S_IRUGO,
  330. show_temp_crit, set_temp_crit);
  331. static DEVICE_ATTR(temp1_min, S_IRUGO,
  332. show_temp_min, set_temp_min);
  333. static DEVICE_ATTR(temp1_max, S_IRUGO,
  334. show_temp_max, set_temp_max);
  335. static DEVICE_ATTR(temp1_crit_hyst, S_IRUGO,
  336. show_temp_crit_hyst, set_temp_crit_hyst);
  337. static DEVICE_ATTR(temp1_max_hyst, S_IRUGO,
  338. show_temp_max_hyst, NULL);
  339. static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL,
  340. JC42_ALARM_CRIT_BIT);
  341. static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL,
  342. JC42_ALARM_MIN_BIT);
  343. static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL,
  344. JC42_ALARM_MAX_BIT);
  345. static struct attribute *jc42_attributes[] = {
  346. &dev_attr_temp1_input.attr,
  347. &dev_attr_temp1_crit.attr,
  348. &dev_attr_temp1_min.attr,
  349. &dev_attr_temp1_max.attr,
  350. &dev_attr_temp1_crit_hyst.attr,
  351. &dev_attr_temp1_max_hyst.attr,
  352. &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
  353. &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
  354. &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
  355. NULL
  356. };
  357. static umode_t jc42_attribute_mode(struct kobject *kobj,
  358. struct attribute *attr, int index)
  359. {
  360. struct device *dev = container_of(kobj, struct device, kobj);
  361. struct i2c_client *client = to_i2c_client(dev);
  362. struct jc42_data *data = i2c_get_clientdata(client);
  363. unsigned int config = data->config;
  364. bool readonly;
  365. if (attr == &dev_attr_temp1_crit.attr)
  366. readonly = config & JC42_CFG_TCRIT_LOCK;
  367. else if (attr == &dev_attr_temp1_min.attr ||
  368. attr == &dev_attr_temp1_max.attr)
  369. readonly = config & JC42_CFG_EVENT_LOCK;
  370. else if (attr == &dev_attr_temp1_crit_hyst.attr)
  371. readonly = config & (JC42_CFG_EVENT_LOCK | JC42_CFG_TCRIT_LOCK);
  372. else
  373. readonly = true;
  374. return S_IRUGO | (readonly ? 0 : S_IWUSR);
  375. }
  376. static const struct attribute_group jc42_group = {
  377. .attrs = jc42_attributes,
  378. .is_visible = jc42_attribute_mode,
  379. };
  380. /* Return 0 if detection is successful, -ENODEV otherwise */
  381. static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info)
  382. {
  383. struct i2c_adapter *adapter = client->adapter;
  384. int i, config, cap, manid, devid;
  385. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
  386. I2C_FUNC_SMBUS_WORD_DATA))
  387. return -ENODEV;
  388. cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
  389. config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
  390. manid = i2c_smbus_read_word_swapped(client, JC42_REG_MANID);
  391. devid = i2c_smbus_read_word_swapped(client, JC42_REG_DEVICEID);
  392. if (cap < 0 || config < 0 || manid < 0 || devid < 0)
  393. return -ENODEV;
  394. if ((cap & 0xff00) || (config & 0xf800))
  395. return -ENODEV;
  396. for (i = 0; i < ARRAY_SIZE(jc42_chips); i++) {
  397. struct jc42_chips *chip = &jc42_chips[i];
  398. if (manid == chip->manid &&
  399. (devid & chip->devid_mask) == chip->devid) {
  400. strlcpy(info->type, "jc42", I2C_NAME_SIZE);
  401. return 0;
  402. }
  403. }
  404. return -ENODEV;
  405. }
  406. static int jc42_probe(struct i2c_client *client, const struct i2c_device_id *id)
  407. {
  408. struct jc42_data *data;
  409. int config, cap, err;
  410. struct device *dev = &client->dev;
  411. data = devm_kzalloc(dev, sizeof(struct jc42_data), GFP_KERNEL);
  412. if (!data)
  413. return -ENOMEM;
  414. i2c_set_clientdata(client, data);
  415. mutex_init(&data->update_lock);
  416. cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
  417. if (cap < 0)
  418. return cap;
  419. data->extended = !!(cap & JC42_CAP_RANGE);
  420. config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
  421. if (config < 0)
  422. return config;
  423. data->orig_config = config;
  424. if (config & JC42_CFG_SHUTDOWN) {
  425. config &= ~JC42_CFG_SHUTDOWN;
  426. i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
  427. }
  428. data->config = config;
  429. /* Register sysfs hooks */
  430. err = sysfs_create_group(&dev->kobj, &jc42_group);
  431. if (err)
  432. return err;
  433. data->hwmon_dev = hwmon_device_register(dev);
  434. if (IS_ERR(data->hwmon_dev)) {
  435. err = PTR_ERR(data->hwmon_dev);
  436. goto exit_remove;
  437. }
  438. return 0;
  439. exit_remove:
  440. sysfs_remove_group(&dev->kobj, &jc42_group);
  441. return err;
  442. }
  443. static int jc42_remove(struct i2c_client *client)
  444. {
  445. struct jc42_data *data = i2c_get_clientdata(client);
  446. hwmon_device_unregister(data->hwmon_dev);
  447. sysfs_remove_group(&client->dev.kobj, &jc42_group);
  448. /* Restore original configuration except hysteresis */
  449. if ((data->config & ~JC42_CFG_HYST_MASK) !=
  450. (data->orig_config & ~JC42_CFG_HYST_MASK)) {
  451. int config;
  452. config = (data->orig_config & ~JC42_CFG_HYST_MASK)
  453. | (data->config & JC42_CFG_HYST_MASK);
  454. i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
  455. }
  456. return 0;
  457. }
  458. static struct jc42_data *jc42_update_device(struct device *dev)
  459. {
  460. struct i2c_client *client = to_i2c_client(dev);
  461. struct jc42_data *data = i2c_get_clientdata(client);
  462. struct jc42_data *ret = data;
  463. int val;
  464. mutex_lock(&data->update_lock);
  465. if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
  466. val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP);
  467. if (val < 0) {
  468. ret = ERR_PTR(val);
  469. goto abort;
  470. }
  471. data->temp_input = val;
  472. val = i2c_smbus_read_word_swapped(client,
  473. JC42_REG_TEMP_CRITICAL);
  474. if (val < 0) {
  475. ret = ERR_PTR(val);
  476. goto abort;
  477. }
  478. data->temp_crit = val;
  479. val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_LOWER);
  480. if (val < 0) {
  481. ret = ERR_PTR(val);
  482. goto abort;
  483. }
  484. data->temp_min = val;
  485. val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_UPPER);
  486. if (val < 0) {
  487. ret = ERR_PTR(val);
  488. goto abort;
  489. }
  490. data->temp_max = val;
  491. data->last_updated = jiffies;
  492. data->valid = true;
  493. }
  494. abort:
  495. mutex_unlock(&data->update_lock);
  496. return ret;
  497. }
  498. module_i2c_driver(jc42_driver);
  499. MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
  500. MODULE_DESCRIPTION("JC42 driver");
  501. MODULE_LICENSE("GPL");