vmwgfx_kms.c 54 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #include "vmwgfx_kms.h"
  28. /* Might need a hrtimer here? */
  29. #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
  30. struct vmw_clip_rect {
  31. int x1, x2, y1, y2;
  32. };
  33. /**
  34. * Clip @num_rects number of @rects against @clip storing the
  35. * results in @out_rects and the number of passed rects in @out_num.
  36. */
  37. void vmw_clip_cliprects(struct drm_clip_rect *rects,
  38. int num_rects,
  39. struct vmw_clip_rect clip,
  40. SVGASignedRect *out_rects,
  41. int *out_num)
  42. {
  43. int i, k;
  44. for (i = 0, k = 0; i < num_rects; i++) {
  45. int x1 = max_t(int, clip.x1, rects[i].x1);
  46. int y1 = max_t(int, clip.y1, rects[i].y1);
  47. int x2 = min_t(int, clip.x2, rects[i].x2);
  48. int y2 = min_t(int, clip.y2, rects[i].y2);
  49. if (x1 >= x2)
  50. continue;
  51. if (y1 >= y2)
  52. continue;
  53. out_rects[k].left = x1;
  54. out_rects[k].top = y1;
  55. out_rects[k].right = x2;
  56. out_rects[k].bottom = y2;
  57. k++;
  58. }
  59. *out_num = k;
  60. }
  61. void vmw_display_unit_cleanup(struct vmw_display_unit *du)
  62. {
  63. if (du->cursor_surface)
  64. vmw_surface_unreference(&du->cursor_surface);
  65. if (du->cursor_dmabuf)
  66. vmw_dmabuf_unreference(&du->cursor_dmabuf);
  67. drm_crtc_cleanup(&du->crtc);
  68. drm_encoder_cleanup(&du->encoder);
  69. drm_connector_cleanup(&du->connector);
  70. }
  71. /*
  72. * Display Unit Cursor functions
  73. */
  74. int vmw_cursor_update_image(struct vmw_private *dev_priv,
  75. u32 *image, u32 width, u32 height,
  76. u32 hotspotX, u32 hotspotY)
  77. {
  78. struct {
  79. u32 cmd;
  80. SVGAFifoCmdDefineAlphaCursor cursor;
  81. } *cmd;
  82. u32 image_size = width * height * 4;
  83. u32 cmd_size = sizeof(*cmd) + image_size;
  84. if (!image)
  85. return -EINVAL;
  86. cmd = vmw_fifo_reserve(dev_priv, cmd_size);
  87. if (unlikely(cmd == NULL)) {
  88. DRM_ERROR("Fifo reserve failed.\n");
  89. return -ENOMEM;
  90. }
  91. memset(cmd, 0, sizeof(*cmd));
  92. memcpy(&cmd[1], image, image_size);
  93. cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
  94. cmd->cursor.id = cpu_to_le32(0);
  95. cmd->cursor.width = cpu_to_le32(width);
  96. cmd->cursor.height = cpu_to_le32(height);
  97. cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
  98. cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
  99. vmw_fifo_commit(dev_priv, cmd_size);
  100. return 0;
  101. }
  102. int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
  103. struct vmw_dma_buffer *dmabuf,
  104. u32 width, u32 height,
  105. u32 hotspotX, u32 hotspotY)
  106. {
  107. struct ttm_bo_kmap_obj map;
  108. unsigned long kmap_offset;
  109. unsigned long kmap_num;
  110. void *virtual;
  111. bool dummy;
  112. int ret;
  113. kmap_offset = 0;
  114. kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
  115. ret = ttm_bo_reserve(&dmabuf->base, true, false, false, 0);
  116. if (unlikely(ret != 0)) {
  117. DRM_ERROR("reserve failed\n");
  118. return -EINVAL;
  119. }
  120. ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
  121. if (unlikely(ret != 0))
  122. goto err_unreserve;
  123. virtual = ttm_kmap_obj_virtual(&map, &dummy);
  124. ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
  125. hotspotX, hotspotY);
  126. ttm_bo_kunmap(&map);
  127. err_unreserve:
  128. ttm_bo_unreserve(&dmabuf->base);
  129. return ret;
  130. }
  131. void vmw_cursor_update_position(struct vmw_private *dev_priv,
  132. bool show, int x, int y)
  133. {
  134. __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
  135. uint32_t count;
  136. iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
  137. iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
  138. iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
  139. count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  140. iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
  141. }
  142. int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
  143. uint32_t handle, uint32_t width, uint32_t height)
  144. {
  145. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  146. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  147. struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
  148. struct vmw_surface *surface = NULL;
  149. struct vmw_dma_buffer *dmabuf = NULL;
  150. int ret;
  151. /* A lot of the code assumes this */
  152. if (handle && (width != 64 || height != 64))
  153. return -EINVAL;
  154. if (handle) {
  155. ret = vmw_user_lookup_handle(dev_priv, tfile,
  156. handle, &surface, &dmabuf);
  157. if (ret) {
  158. DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
  159. return -EINVAL;
  160. }
  161. }
  162. /* need to do this before taking down old image */
  163. if (surface && !surface->snooper.image) {
  164. DRM_ERROR("surface not suitable for cursor\n");
  165. vmw_surface_unreference(&surface);
  166. return -EINVAL;
  167. }
  168. /* takedown old cursor */
  169. if (du->cursor_surface) {
  170. du->cursor_surface->snooper.crtc = NULL;
  171. vmw_surface_unreference(&du->cursor_surface);
  172. }
  173. if (du->cursor_dmabuf)
  174. vmw_dmabuf_unreference(&du->cursor_dmabuf);
  175. /* setup new image */
  176. if (surface) {
  177. /* vmw_user_surface_lookup takes one reference */
  178. du->cursor_surface = surface;
  179. du->cursor_surface->snooper.crtc = crtc;
  180. du->cursor_age = du->cursor_surface->snooper.age;
  181. vmw_cursor_update_image(dev_priv, surface->snooper.image,
  182. 64, 64, du->hotspot_x, du->hotspot_y);
  183. } else if (dmabuf) {
  184. /* vmw_user_surface_lookup takes one reference */
  185. du->cursor_dmabuf = dmabuf;
  186. ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
  187. du->hotspot_x, du->hotspot_y);
  188. } else {
  189. vmw_cursor_update_position(dev_priv, false, 0, 0);
  190. return 0;
  191. }
  192. vmw_cursor_update_position(dev_priv, true,
  193. du->cursor_x + du->hotspot_x,
  194. du->cursor_y + du->hotspot_y);
  195. return 0;
  196. }
  197. int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
  198. {
  199. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  200. struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
  201. bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
  202. du->cursor_x = x + crtc->x;
  203. du->cursor_y = y + crtc->y;
  204. vmw_cursor_update_position(dev_priv, shown,
  205. du->cursor_x + du->hotspot_x,
  206. du->cursor_y + du->hotspot_y);
  207. return 0;
  208. }
  209. void vmw_kms_cursor_snoop(struct vmw_surface *srf,
  210. struct ttm_object_file *tfile,
  211. struct ttm_buffer_object *bo,
  212. SVGA3dCmdHeader *header)
  213. {
  214. struct ttm_bo_kmap_obj map;
  215. unsigned long kmap_offset;
  216. unsigned long kmap_num;
  217. SVGA3dCopyBox *box;
  218. unsigned box_count;
  219. void *virtual;
  220. bool dummy;
  221. struct vmw_dma_cmd {
  222. SVGA3dCmdHeader header;
  223. SVGA3dCmdSurfaceDMA dma;
  224. } *cmd;
  225. int i, ret;
  226. cmd = container_of(header, struct vmw_dma_cmd, header);
  227. /* No snooper installed */
  228. if (!srf->snooper.image)
  229. return;
  230. if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
  231. DRM_ERROR("face and mipmap for cursors should never != 0\n");
  232. return;
  233. }
  234. if (cmd->header.size < 64) {
  235. DRM_ERROR("at least one full copy box must be given\n");
  236. return;
  237. }
  238. box = (SVGA3dCopyBox *)&cmd[1];
  239. box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
  240. sizeof(SVGA3dCopyBox);
  241. if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
  242. box->x != 0 || box->y != 0 || box->z != 0 ||
  243. box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
  244. box->d != 1 || box_count != 1) {
  245. /* TODO handle none page aligned offsets */
  246. /* TODO handle more dst & src != 0 */
  247. /* TODO handle more then one copy */
  248. DRM_ERROR("Cant snoop dma request for cursor!\n");
  249. DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
  250. box->srcx, box->srcy, box->srcz,
  251. box->x, box->y, box->z,
  252. box->w, box->h, box->d, box_count,
  253. cmd->dma.guest.ptr.offset);
  254. return;
  255. }
  256. kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
  257. kmap_num = (64*64*4) >> PAGE_SHIFT;
  258. ret = ttm_bo_reserve(bo, true, false, false, 0);
  259. if (unlikely(ret != 0)) {
  260. DRM_ERROR("reserve failed\n");
  261. return;
  262. }
  263. ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
  264. if (unlikely(ret != 0))
  265. goto err_unreserve;
  266. virtual = ttm_kmap_obj_virtual(&map, &dummy);
  267. if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
  268. memcpy(srf->snooper.image, virtual, 64*64*4);
  269. } else {
  270. /* Image is unsigned pointer. */
  271. for (i = 0; i < box->h; i++)
  272. memcpy(srf->snooper.image + i * 64,
  273. virtual + i * cmd->dma.guest.pitch,
  274. box->w * 4);
  275. }
  276. srf->snooper.age++;
  277. /* we can't call this function from this function since execbuf has
  278. * reserved fifo space.
  279. *
  280. * if (srf->snooper.crtc)
  281. * vmw_ldu_crtc_cursor_update_image(dev_priv,
  282. * srf->snooper.image, 64, 64,
  283. * du->hotspot_x, du->hotspot_y);
  284. */
  285. ttm_bo_kunmap(&map);
  286. err_unreserve:
  287. ttm_bo_unreserve(bo);
  288. }
  289. void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
  290. {
  291. struct drm_device *dev = dev_priv->dev;
  292. struct vmw_display_unit *du;
  293. struct drm_crtc *crtc;
  294. mutex_lock(&dev->mode_config.mutex);
  295. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  296. du = vmw_crtc_to_du(crtc);
  297. if (!du->cursor_surface ||
  298. du->cursor_age == du->cursor_surface->snooper.age)
  299. continue;
  300. du->cursor_age = du->cursor_surface->snooper.age;
  301. vmw_cursor_update_image(dev_priv,
  302. du->cursor_surface->snooper.image,
  303. 64, 64, du->hotspot_x, du->hotspot_y);
  304. }
  305. mutex_unlock(&dev->mode_config.mutex);
  306. }
  307. /*
  308. * Generic framebuffer code
  309. */
  310. int vmw_framebuffer_create_handle(struct drm_framebuffer *fb,
  311. struct drm_file *file_priv,
  312. unsigned int *handle)
  313. {
  314. if (handle)
  315. *handle = 0;
  316. return 0;
  317. }
  318. /*
  319. * Surface framebuffer code
  320. */
  321. #define vmw_framebuffer_to_vfbs(x) \
  322. container_of(x, struct vmw_framebuffer_surface, base.base)
  323. struct vmw_framebuffer_surface {
  324. struct vmw_framebuffer base;
  325. struct vmw_surface *surface;
  326. struct vmw_dma_buffer *buffer;
  327. struct list_head head;
  328. struct drm_master *master;
  329. };
  330. void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
  331. {
  332. struct vmw_framebuffer_surface *vfbs =
  333. vmw_framebuffer_to_vfbs(framebuffer);
  334. struct vmw_master *vmaster = vmw_master(vfbs->master);
  335. mutex_lock(&vmaster->fb_surf_mutex);
  336. list_del(&vfbs->head);
  337. mutex_unlock(&vmaster->fb_surf_mutex);
  338. drm_master_put(&vfbs->master);
  339. drm_framebuffer_cleanup(framebuffer);
  340. vmw_surface_unreference(&vfbs->surface);
  341. ttm_base_object_unref(&vfbs->base.user_obj);
  342. kfree(vfbs);
  343. }
  344. static int do_surface_dirty_sou(struct vmw_private *dev_priv,
  345. struct drm_file *file_priv,
  346. struct vmw_framebuffer *framebuffer,
  347. unsigned flags, unsigned color,
  348. struct drm_clip_rect *clips,
  349. unsigned num_clips, int inc,
  350. struct vmw_fence_obj **out_fence)
  351. {
  352. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  353. struct drm_clip_rect *clips_ptr;
  354. struct drm_clip_rect *tmp;
  355. struct drm_crtc *crtc;
  356. size_t fifo_size;
  357. int i, num_units;
  358. int ret = 0; /* silence warning */
  359. int left, right, top, bottom;
  360. struct {
  361. SVGA3dCmdHeader header;
  362. SVGA3dCmdBlitSurfaceToScreen body;
  363. } *cmd;
  364. SVGASignedRect *blits;
  365. num_units = 0;
  366. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
  367. head) {
  368. if (crtc->fb != &framebuffer->base)
  369. continue;
  370. units[num_units++] = vmw_crtc_to_du(crtc);
  371. }
  372. BUG_ON(!clips || !num_clips);
  373. tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
  374. if (unlikely(tmp == NULL)) {
  375. DRM_ERROR("Temporary cliprect memory alloc failed.\n");
  376. return -ENOMEM;
  377. }
  378. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
  379. cmd = kzalloc(fifo_size, GFP_KERNEL);
  380. if (unlikely(cmd == NULL)) {
  381. DRM_ERROR("Temporary fifo memory alloc failed.\n");
  382. ret = -ENOMEM;
  383. goto out_free_tmp;
  384. }
  385. /* setup blits pointer */
  386. blits = (SVGASignedRect *)&cmd[1];
  387. /* initial clip region */
  388. left = clips->x1;
  389. right = clips->x2;
  390. top = clips->y1;
  391. bottom = clips->y2;
  392. /* skip the first clip rect */
  393. for (i = 1, clips_ptr = clips + inc;
  394. i < num_clips; i++, clips_ptr += inc) {
  395. left = min_t(int, left, (int)clips_ptr->x1);
  396. right = max_t(int, right, (int)clips_ptr->x2);
  397. top = min_t(int, top, (int)clips_ptr->y1);
  398. bottom = max_t(int, bottom, (int)clips_ptr->y2);
  399. }
  400. /* only need to do this once */
  401. cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
  402. cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
  403. cmd->body.srcRect.left = left;
  404. cmd->body.srcRect.right = right;
  405. cmd->body.srcRect.top = top;
  406. cmd->body.srcRect.bottom = bottom;
  407. clips_ptr = clips;
  408. for (i = 0; i < num_clips; i++, clips_ptr += inc) {
  409. tmp[i].x1 = clips_ptr->x1 - left;
  410. tmp[i].x2 = clips_ptr->x2 - left;
  411. tmp[i].y1 = clips_ptr->y1 - top;
  412. tmp[i].y2 = clips_ptr->y2 - top;
  413. }
  414. /* do per unit writing, reuse fifo for each */
  415. for (i = 0; i < num_units; i++) {
  416. struct vmw_display_unit *unit = units[i];
  417. struct vmw_clip_rect clip;
  418. int num;
  419. clip.x1 = left - unit->crtc.x;
  420. clip.y1 = top - unit->crtc.y;
  421. clip.x2 = right - unit->crtc.x;
  422. clip.y2 = bottom - unit->crtc.y;
  423. /* skip any crtcs that misses the clip region */
  424. if (clip.x1 >= unit->crtc.mode.hdisplay ||
  425. clip.y1 >= unit->crtc.mode.vdisplay ||
  426. clip.x2 <= 0 || clip.y2 <= 0)
  427. continue;
  428. /*
  429. * In order for the clip rects to be correctly scaled
  430. * the src and dest rects needs to be the same size.
  431. */
  432. cmd->body.destRect.left = clip.x1;
  433. cmd->body.destRect.right = clip.x2;
  434. cmd->body.destRect.top = clip.y1;
  435. cmd->body.destRect.bottom = clip.y2;
  436. /* create a clip rect of the crtc in dest coords */
  437. clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
  438. clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
  439. clip.x1 = 0 - clip.x1;
  440. clip.y1 = 0 - clip.y1;
  441. /* need to reset sid as it is changed by execbuf */
  442. cmd->body.srcImage.sid = cpu_to_le32(framebuffer->user_handle);
  443. cmd->body.destScreenId = unit->unit;
  444. /* clip and write blits to cmd stream */
  445. vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
  446. /* if no cliprects hit skip this */
  447. if (num == 0)
  448. continue;
  449. /* only return the last fence */
  450. if (out_fence && *out_fence)
  451. vmw_fence_obj_unreference(out_fence);
  452. /* recalculate package length */
  453. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
  454. cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
  455. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  456. fifo_size, 0, NULL, out_fence);
  457. if (unlikely(ret != 0))
  458. break;
  459. }
  460. kfree(cmd);
  461. out_free_tmp:
  462. kfree(tmp);
  463. return ret;
  464. }
  465. int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
  466. struct drm_file *file_priv,
  467. unsigned flags, unsigned color,
  468. struct drm_clip_rect *clips,
  469. unsigned num_clips)
  470. {
  471. struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
  472. struct vmw_master *vmaster = vmw_master(file_priv->master);
  473. struct vmw_framebuffer_surface *vfbs =
  474. vmw_framebuffer_to_vfbs(framebuffer);
  475. struct drm_clip_rect norect;
  476. int ret, inc = 1;
  477. if (unlikely(vfbs->master != file_priv->master))
  478. return -EINVAL;
  479. /* Require ScreenObject support for 3D */
  480. if (!dev_priv->sou_priv)
  481. return -EINVAL;
  482. ret = ttm_read_lock(&vmaster->lock, true);
  483. if (unlikely(ret != 0))
  484. return ret;
  485. if (!num_clips) {
  486. num_clips = 1;
  487. clips = &norect;
  488. norect.x1 = norect.y1 = 0;
  489. norect.x2 = framebuffer->width;
  490. norect.y2 = framebuffer->height;
  491. } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
  492. num_clips /= 2;
  493. inc = 2; /* skip source rects */
  494. }
  495. ret = do_surface_dirty_sou(dev_priv, file_priv, &vfbs->base,
  496. flags, color,
  497. clips, num_clips, inc, NULL);
  498. ttm_read_unlock(&vmaster->lock);
  499. return 0;
  500. }
  501. static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
  502. .destroy = vmw_framebuffer_surface_destroy,
  503. .dirty = vmw_framebuffer_surface_dirty,
  504. .create_handle = vmw_framebuffer_create_handle,
  505. };
  506. static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
  507. struct drm_file *file_priv,
  508. struct vmw_surface *surface,
  509. struct vmw_framebuffer **out,
  510. const struct drm_mode_fb_cmd
  511. *mode_cmd)
  512. {
  513. struct drm_device *dev = dev_priv->dev;
  514. struct vmw_framebuffer_surface *vfbs;
  515. enum SVGA3dSurfaceFormat format;
  516. struct vmw_master *vmaster = vmw_master(file_priv->master);
  517. int ret;
  518. /* 3D is only supported on HWv8 hosts which supports screen objects */
  519. if (!dev_priv->sou_priv)
  520. return -ENOSYS;
  521. /*
  522. * Sanity checks.
  523. */
  524. /* Surface must be marked as a scanout. */
  525. if (unlikely(!surface->scanout))
  526. return -EINVAL;
  527. if (unlikely(surface->mip_levels[0] != 1 ||
  528. surface->num_sizes != 1 ||
  529. surface->sizes[0].width < mode_cmd->width ||
  530. surface->sizes[0].height < mode_cmd->height ||
  531. surface->sizes[0].depth != 1)) {
  532. DRM_ERROR("Incompatible surface dimensions "
  533. "for requested mode.\n");
  534. return -EINVAL;
  535. }
  536. switch (mode_cmd->depth) {
  537. case 32:
  538. format = SVGA3D_A8R8G8B8;
  539. break;
  540. case 24:
  541. format = SVGA3D_X8R8G8B8;
  542. break;
  543. case 16:
  544. format = SVGA3D_R5G6B5;
  545. break;
  546. case 15:
  547. format = SVGA3D_A1R5G5B5;
  548. break;
  549. case 8:
  550. format = SVGA3D_LUMINANCE8;
  551. break;
  552. default:
  553. DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
  554. return -EINVAL;
  555. }
  556. if (unlikely(format != surface->format)) {
  557. DRM_ERROR("Invalid surface format for requested mode.\n");
  558. return -EINVAL;
  559. }
  560. vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
  561. if (!vfbs) {
  562. ret = -ENOMEM;
  563. goto out_err1;
  564. }
  565. ret = drm_framebuffer_init(dev, &vfbs->base.base,
  566. &vmw_framebuffer_surface_funcs);
  567. if (ret)
  568. goto out_err2;
  569. if (!vmw_surface_reference(surface)) {
  570. DRM_ERROR("failed to reference surface %p\n", surface);
  571. goto out_err3;
  572. }
  573. /* XXX get the first 3 from the surface info */
  574. vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
  575. vfbs->base.base.pitches[0] = mode_cmd->pitch;
  576. vfbs->base.base.depth = mode_cmd->depth;
  577. vfbs->base.base.width = mode_cmd->width;
  578. vfbs->base.base.height = mode_cmd->height;
  579. vfbs->surface = surface;
  580. vfbs->base.user_handle = mode_cmd->handle;
  581. vfbs->master = drm_master_get(file_priv->master);
  582. mutex_lock(&vmaster->fb_surf_mutex);
  583. list_add_tail(&vfbs->head, &vmaster->fb_surf);
  584. mutex_unlock(&vmaster->fb_surf_mutex);
  585. *out = &vfbs->base;
  586. return 0;
  587. out_err3:
  588. drm_framebuffer_cleanup(&vfbs->base.base);
  589. out_err2:
  590. kfree(vfbs);
  591. out_err1:
  592. return ret;
  593. }
  594. /*
  595. * Dmabuf framebuffer code
  596. */
  597. #define vmw_framebuffer_to_vfbd(x) \
  598. container_of(x, struct vmw_framebuffer_dmabuf, base.base)
  599. struct vmw_framebuffer_dmabuf {
  600. struct vmw_framebuffer base;
  601. struct vmw_dma_buffer *buffer;
  602. };
  603. void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
  604. {
  605. struct vmw_framebuffer_dmabuf *vfbd =
  606. vmw_framebuffer_to_vfbd(framebuffer);
  607. drm_framebuffer_cleanup(framebuffer);
  608. vmw_dmabuf_unreference(&vfbd->buffer);
  609. ttm_base_object_unref(&vfbd->base.user_obj);
  610. kfree(vfbd);
  611. }
  612. static int do_dmabuf_dirty_ldu(struct vmw_private *dev_priv,
  613. struct vmw_framebuffer *framebuffer,
  614. unsigned flags, unsigned color,
  615. struct drm_clip_rect *clips,
  616. unsigned num_clips, int increment)
  617. {
  618. size_t fifo_size;
  619. int i;
  620. struct {
  621. uint32_t header;
  622. SVGAFifoCmdUpdate body;
  623. } *cmd;
  624. fifo_size = sizeof(*cmd) * num_clips;
  625. cmd = vmw_fifo_reserve(dev_priv, fifo_size);
  626. if (unlikely(cmd == NULL)) {
  627. DRM_ERROR("Fifo reserve failed.\n");
  628. return -ENOMEM;
  629. }
  630. memset(cmd, 0, fifo_size);
  631. for (i = 0; i < num_clips; i++, clips += increment) {
  632. cmd[i].header = cpu_to_le32(SVGA_CMD_UPDATE);
  633. cmd[i].body.x = cpu_to_le32(clips->x1);
  634. cmd[i].body.y = cpu_to_le32(clips->y1);
  635. cmd[i].body.width = cpu_to_le32(clips->x2 - clips->x1);
  636. cmd[i].body.height = cpu_to_le32(clips->y2 - clips->y1);
  637. }
  638. vmw_fifo_commit(dev_priv, fifo_size);
  639. return 0;
  640. }
  641. static int do_dmabuf_define_gmrfb(struct drm_file *file_priv,
  642. struct vmw_private *dev_priv,
  643. struct vmw_framebuffer *framebuffer)
  644. {
  645. int depth = framebuffer->base.depth;
  646. size_t fifo_size;
  647. int ret;
  648. struct {
  649. uint32_t header;
  650. SVGAFifoCmdDefineGMRFB body;
  651. } *cmd;
  652. /* Emulate RGBA support, contrary to svga_reg.h this is not
  653. * supported by hosts. This is only a problem if we are reading
  654. * this value later and expecting what we uploaded back.
  655. */
  656. if (depth == 32)
  657. depth = 24;
  658. fifo_size = sizeof(*cmd);
  659. cmd = kmalloc(fifo_size, GFP_KERNEL);
  660. if (unlikely(cmd == NULL)) {
  661. DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
  662. return -ENOMEM;
  663. }
  664. memset(cmd, 0, fifo_size);
  665. cmd->header = SVGA_CMD_DEFINE_GMRFB;
  666. cmd->body.format.bitsPerPixel = framebuffer->base.bits_per_pixel;
  667. cmd->body.format.colorDepth = depth;
  668. cmd->body.format.reserved = 0;
  669. cmd->body.bytesPerLine = framebuffer->base.pitches[0];
  670. cmd->body.ptr.gmrId = framebuffer->user_handle;
  671. cmd->body.ptr.offset = 0;
  672. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  673. fifo_size, 0, NULL, NULL);
  674. kfree(cmd);
  675. return ret;
  676. }
  677. static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
  678. struct vmw_private *dev_priv,
  679. struct vmw_framebuffer *framebuffer,
  680. unsigned flags, unsigned color,
  681. struct drm_clip_rect *clips,
  682. unsigned num_clips, int increment,
  683. struct vmw_fence_obj **out_fence)
  684. {
  685. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  686. struct drm_clip_rect *clips_ptr;
  687. int i, k, num_units, ret;
  688. struct drm_crtc *crtc;
  689. size_t fifo_size;
  690. struct {
  691. uint32_t header;
  692. SVGAFifoCmdBlitGMRFBToScreen body;
  693. } *blits;
  694. ret = do_dmabuf_define_gmrfb(file_priv, dev_priv, framebuffer);
  695. if (unlikely(ret != 0))
  696. return ret; /* define_gmrfb prints warnings */
  697. fifo_size = sizeof(*blits) * num_clips;
  698. blits = kmalloc(fifo_size, GFP_KERNEL);
  699. if (unlikely(blits == NULL)) {
  700. DRM_ERROR("Failed to allocate temporary cmd buffer.\n");
  701. return -ENOMEM;
  702. }
  703. num_units = 0;
  704. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  705. if (crtc->fb != &framebuffer->base)
  706. continue;
  707. units[num_units++] = vmw_crtc_to_du(crtc);
  708. }
  709. for (k = 0; k < num_units; k++) {
  710. struct vmw_display_unit *unit = units[k];
  711. int hit_num = 0;
  712. clips_ptr = clips;
  713. for (i = 0; i < num_clips; i++, clips_ptr += increment) {
  714. int clip_x1 = clips_ptr->x1 - unit->crtc.x;
  715. int clip_y1 = clips_ptr->y1 - unit->crtc.y;
  716. int clip_x2 = clips_ptr->x2 - unit->crtc.x;
  717. int clip_y2 = clips_ptr->y2 - unit->crtc.y;
  718. int move_x, move_y;
  719. /* skip any crtcs that misses the clip region */
  720. if (clip_x1 >= unit->crtc.mode.hdisplay ||
  721. clip_y1 >= unit->crtc.mode.vdisplay ||
  722. clip_x2 <= 0 || clip_y2 <= 0)
  723. continue;
  724. /* clip size to crtc size */
  725. clip_x2 = min_t(int, clip_x2, unit->crtc.mode.hdisplay);
  726. clip_y2 = min_t(int, clip_y2, unit->crtc.mode.vdisplay);
  727. /* translate both src and dest to bring clip into screen */
  728. move_x = min_t(int, clip_x1, 0);
  729. move_y = min_t(int, clip_y1, 0);
  730. /* actual translate done here */
  731. blits[hit_num].header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
  732. blits[hit_num].body.destScreenId = unit->unit;
  733. blits[hit_num].body.srcOrigin.x = clips_ptr->x1 - move_x;
  734. blits[hit_num].body.srcOrigin.y = clips_ptr->y1 - move_y;
  735. blits[hit_num].body.destRect.left = clip_x1 - move_x;
  736. blits[hit_num].body.destRect.top = clip_y1 - move_y;
  737. blits[hit_num].body.destRect.right = clip_x2;
  738. blits[hit_num].body.destRect.bottom = clip_y2;
  739. hit_num++;
  740. }
  741. /* no clips hit the crtc */
  742. if (hit_num == 0)
  743. continue;
  744. /* only return the last fence */
  745. if (out_fence && *out_fence)
  746. vmw_fence_obj_unreference(out_fence);
  747. fifo_size = sizeof(*blits) * hit_num;
  748. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, blits,
  749. fifo_size, 0, NULL, out_fence);
  750. if (unlikely(ret != 0))
  751. break;
  752. }
  753. kfree(blits);
  754. return ret;
  755. }
  756. int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
  757. struct drm_file *file_priv,
  758. unsigned flags, unsigned color,
  759. struct drm_clip_rect *clips,
  760. unsigned num_clips)
  761. {
  762. struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
  763. struct vmw_master *vmaster = vmw_master(file_priv->master);
  764. struct vmw_framebuffer_dmabuf *vfbd =
  765. vmw_framebuffer_to_vfbd(framebuffer);
  766. struct drm_clip_rect norect;
  767. int ret, increment = 1;
  768. ret = ttm_read_lock(&vmaster->lock, true);
  769. if (unlikely(ret != 0))
  770. return ret;
  771. if (!num_clips) {
  772. num_clips = 1;
  773. clips = &norect;
  774. norect.x1 = norect.y1 = 0;
  775. norect.x2 = framebuffer->width;
  776. norect.y2 = framebuffer->height;
  777. } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
  778. num_clips /= 2;
  779. increment = 2;
  780. }
  781. if (dev_priv->ldu_priv) {
  782. ret = do_dmabuf_dirty_ldu(dev_priv, &vfbd->base,
  783. flags, color,
  784. clips, num_clips, increment);
  785. } else {
  786. ret = do_dmabuf_dirty_sou(file_priv, dev_priv, &vfbd->base,
  787. flags, color,
  788. clips, num_clips, increment, NULL);
  789. }
  790. ttm_read_unlock(&vmaster->lock);
  791. return ret;
  792. }
  793. static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
  794. .destroy = vmw_framebuffer_dmabuf_destroy,
  795. .dirty = vmw_framebuffer_dmabuf_dirty,
  796. .create_handle = vmw_framebuffer_create_handle,
  797. };
  798. /**
  799. * Pin the dmabuffer to the start of vram.
  800. */
  801. static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
  802. {
  803. struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
  804. struct vmw_framebuffer_dmabuf *vfbd =
  805. vmw_framebuffer_to_vfbd(&vfb->base);
  806. int ret;
  807. /* This code should not be used with screen objects */
  808. BUG_ON(dev_priv->sou_priv);
  809. vmw_overlay_pause_all(dev_priv);
  810. ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false);
  811. vmw_overlay_resume_all(dev_priv);
  812. WARN_ON(ret != 0);
  813. return 0;
  814. }
  815. static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
  816. {
  817. struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
  818. struct vmw_framebuffer_dmabuf *vfbd =
  819. vmw_framebuffer_to_vfbd(&vfb->base);
  820. if (!vfbd->buffer) {
  821. WARN_ON(!vfbd->buffer);
  822. return 0;
  823. }
  824. return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
  825. }
  826. static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
  827. struct vmw_dma_buffer *dmabuf,
  828. struct vmw_framebuffer **out,
  829. const struct drm_mode_fb_cmd
  830. *mode_cmd)
  831. {
  832. struct drm_device *dev = dev_priv->dev;
  833. struct vmw_framebuffer_dmabuf *vfbd;
  834. unsigned int requested_size;
  835. int ret;
  836. requested_size = mode_cmd->height * mode_cmd->pitch;
  837. if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
  838. DRM_ERROR("Screen buffer object size is too small "
  839. "for requested mode.\n");
  840. return -EINVAL;
  841. }
  842. /* Limited framebuffer color depth support for screen objects */
  843. if (dev_priv->sou_priv) {
  844. switch (mode_cmd->depth) {
  845. case 32:
  846. case 24:
  847. /* Only support 32 bpp for 32 and 24 depth fbs */
  848. if (mode_cmd->bpp == 32)
  849. break;
  850. DRM_ERROR("Invalid color depth/bbp: %d %d\n",
  851. mode_cmd->depth, mode_cmd->bpp);
  852. return -EINVAL;
  853. case 16:
  854. case 15:
  855. /* Only support 16 bpp for 16 and 15 depth fbs */
  856. if (mode_cmd->bpp == 16)
  857. break;
  858. DRM_ERROR("Invalid color depth/bbp: %d %d\n",
  859. mode_cmd->depth, mode_cmd->bpp);
  860. return -EINVAL;
  861. default:
  862. DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
  863. return -EINVAL;
  864. }
  865. }
  866. vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
  867. if (!vfbd) {
  868. ret = -ENOMEM;
  869. goto out_err1;
  870. }
  871. ret = drm_framebuffer_init(dev, &vfbd->base.base,
  872. &vmw_framebuffer_dmabuf_funcs);
  873. if (ret)
  874. goto out_err2;
  875. if (!vmw_dmabuf_reference(dmabuf)) {
  876. DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
  877. goto out_err3;
  878. }
  879. vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
  880. vfbd->base.base.pitches[0] = mode_cmd->pitch;
  881. vfbd->base.base.depth = mode_cmd->depth;
  882. vfbd->base.base.width = mode_cmd->width;
  883. vfbd->base.base.height = mode_cmd->height;
  884. if (!dev_priv->sou_priv) {
  885. vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
  886. vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
  887. }
  888. vfbd->base.dmabuf = true;
  889. vfbd->buffer = dmabuf;
  890. vfbd->base.user_handle = mode_cmd->handle;
  891. *out = &vfbd->base;
  892. return 0;
  893. out_err3:
  894. drm_framebuffer_cleanup(&vfbd->base.base);
  895. out_err2:
  896. kfree(vfbd);
  897. out_err1:
  898. return ret;
  899. }
  900. /*
  901. * Generic Kernel modesetting functions
  902. */
  903. static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
  904. struct drm_file *file_priv,
  905. struct drm_mode_fb_cmd2 *mode_cmd2)
  906. {
  907. struct vmw_private *dev_priv = vmw_priv(dev);
  908. struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
  909. struct vmw_framebuffer *vfb = NULL;
  910. struct vmw_surface *surface = NULL;
  911. struct vmw_dma_buffer *bo = NULL;
  912. struct ttm_base_object *user_obj;
  913. struct drm_mode_fb_cmd mode_cmd;
  914. int ret;
  915. mode_cmd.width = mode_cmd2->width;
  916. mode_cmd.height = mode_cmd2->height;
  917. mode_cmd.pitch = mode_cmd2->pitches[0];
  918. mode_cmd.handle = mode_cmd2->handles[0];
  919. drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth,
  920. &mode_cmd.bpp);
  921. /**
  922. * This code should be conditioned on Screen Objects not being used.
  923. * If screen objects are used, we can allocate a GMR to hold the
  924. * requested framebuffer.
  925. */
  926. if (!vmw_kms_validate_mode_vram(dev_priv,
  927. mode_cmd.pitch,
  928. mode_cmd.height)) {
  929. DRM_ERROR("VRAM size is too small for requested mode.\n");
  930. return ERR_PTR(-ENOMEM);
  931. }
  932. /*
  933. * Take a reference on the user object of the resource
  934. * backing the kms fb. This ensures that user-space handle
  935. * lookups on that resource will always work as long as
  936. * it's registered with a kms framebuffer. This is important,
  937. * since vmw_execbuf_process identifies resources in the
  938. * command stream using user-space handles.
  939. */
  940. user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle);
  941. if (unlikely(user_obj == NULL)) {
  942. DRM_ERROR("Could not locate requested kms frame buffer.\n");
  943. return ERR_PTR(-ENOENT);
  944. }
  945. /**
  946. * End conditioned code.
  947. */
  948. /* returns either a dmabuf or surface */
  949. ret = vmw_user_lookup_handle(dev_priv, tfile,
  950. mode_cmd.handle,
  951. &surface, &bo);
  952. if (ret)
  953. goto err_out;
  954. /* Create the new framebuffer depending one what we got back */
  955. if (bo)
  956. ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
  957. &mode_cmd);
  958. else if (surface)
  959. ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv,
  960. surface, &vfb, &mode_cmd);
  961. else
  962. BUG();
  963. err_out:
  964. /* vmw_user_lookup_handle takes one ref so does new_fb */
  965. if (bo)
  966. vmw_dmabuf_unreference(&bo);
  967. if (surface)
  968. vmw_surface_unreference(&surface);
  969. if (ret) {
  970. DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
  971. ttm_base_object_unref(&user_obj);
  972. return ERR_PTR(ret);
  973. } else
  974. vfb->user_obj = user_obj;
  975. return &vfb->base;
  976. }
  977. static const struct drm_mode_config_funcs vmw_kms_funcs = {
  978. .fb_create = vmw_kms_fb_create,
  979. };
  980. int vmw_kms_present(struct vmw_private *dev_priv,
  981. struct drm_file *file_priv,
  982. struct vmw_framebuffer *vfb,
  983. struct vmw_surface *surface,
  984. uint32_t sid,
  985. int32_t destX, int32_t destY,
  986. struct drm_vmw_rect *clips,
  987. uint32_t num_clips)
  988. {
  989. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  990. struct drm_clip_rect *tmp;
  991. struct drm_crtc *crtc;
  992. size_t fifo_size;
  993. int i, k, num_units;
  994. int ret = 0; /* silence warning */
  995. int left, right, top, bottom;
  996. struct {
  997. SVGA3dCmdHeader header;
  998. SVGA3dCmdBlitSurfaceToScreen body;
  999. } *cmd;
  1000. SVGASignedRect *blits;
  1001. num_units = 0;
  1002. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  1003. if (crtc->fb != &vfb->base)
  1004. continue;
  1005. units[num_units++] = vmw_crtc_to_du(crtc);
  1006. }
  1007. BUG_ON(surface == NULL);
  1008. BUG_ON(!clips || !num_clips);
  1009. tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
  1010. if (unlikely(tmp == NULL)) {
  1011. DRM_ERROR("Temporary cliprect memory alloc failed.\n");
  1012. return -ENOMEM;
  1013. }
  1014. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
  1015. cmd = kmalloc(fifo_size, GFP_KERNEL);
  1016. if (unlikely(cmd == NULL)) {
  1017. DRM_ERROR("Failed to allocate temporary fifo memory.\n");
  1018. ret = -ENOMEM;
  1019. goto out_free_tmp;
  1020. }
  1021. left = clips->x;
  1022. right = clips->x + clips->w;
  1023. top = clips->y;
  1024. bottom = clips->y + clips->h;
  1025. for (i = 1; i < num_clips; i++) {
  1026. left = min_t(int, left, (int)clips[i].x);
  1027. right = max_t(int, right, (int)clips[i].x + clips[i].w);
  1028. top = min_t(int, top, (int)clips[i].y);
  1029. bottom = max_t(int, bottom, (int)clips[i].y + clips[i].h);
  1030. }
  1031. /* only need to do this once */
  1032. memset(cmd, 0, fifo_size);
  1033. cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
  1034. blits = (SVGASignedRect *)&cmd[1];
  1035. cmd->body.srcRect.left = left;
  1036. cmd->body.srcRect.right = right;
  1037. cmd->body.srcRect.top = top;
  1038. cmd->body.srcRect.bottom = bottom;
  1039. for (i = 0; i < num_clips; i++) {
  1040. tmp[i].x1 = clips[i].x - left;
  1041. tmp[i].x2 = clips[i].x + clips[i].w - left;
  1042. tmp[i].y1 = clips[i].y - top;
  1043. tmp[i].y2 = clips[i].y + clips[i].h - top;
  1044. }
  1045. for (k = 0; k < num_units; k++) {
  1046. struct vmw_display_unit *unit = units[k];
  1047. struct vmw_clip_rect clip;
  1048. int num;
  1049. clip.x1 = left + destX - unit->crtc.x;
  1050. clip.y1 = top + destY - unit->crtc.y;
  1051. clip.x2 = right + destX - unit->crtc.x;
  1052. clip.y2 = bottom + destY - unit->crtc.y;
  1053. /* skip any crtcs that misses the clip region */
  1054. if (clip.x1 >= unit->crtc.mode.hdisplay ||
  1055. clip.y1 >= unit->crtc.mode.vdisplay ||
  1056. clip.x2 <= 0 || clip.y2 <= 0)
  1057. continue;
  1058. /*
  1059. * In order for the clip rects to be correctly scaled
  1060. * the src and dest rects needs to be the same size.
  1061. */
  1062. cmd->body.destRect.left = clip.x1;
  1063. cmd->body.destRect.right = clip.x2;
  1064. cmd->body.destRect.top = clip.y1;
  1065. cmd->body.destRect.bottom = clip.y2;
  1066. /* create a clip rect of the crtc in dest coords */
  1067. clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
  1068. clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
  1069. clip.x1 = 0 - clip.x1;
  1070. clip.y1 = 0 - clip.y1;
  1071. /* need to reset sid as it is changed by execbuf */
  1072. cmd->body.srcImage.sid = sid;
  1073. cmd->body.destScreenId = unit->unit;
  1074. /* clip and write blits to cmd stream */
  1075. vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
  1076. /* if no cliprects hit skip this */
  1077. if (num == 0)
  1078. continue;
  1079. /* recalculate package length */
  1080. fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
  1081. cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
  1082. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
  1083. fifo_size, 0, NULL, NULL);
  1084. if (unlikely(ret != 0))
  1085. break;
  1086. }
  1087. kfree(cmd);
  1088. out_free_tmp:
  1089. kfree(tmp);
  1090. return ret;
  1091. }
  1092. int vmw_kms_readback(struct vmw_private *dev_priv,
  1093. struct drm_file *file_priv,
  1094. struct vmw_framebuffer *vfb,
  1095. struct drm_vmw_fence_rep __user *user_fence_rep,
  1096. struct drm_vmw_rect *clips,
  1097. uint32_t num_clips)
  1098. {
  1099. struct vmw_framebuffer_dmabuf *vfbd =
  1100. vmw_framebuffer_to_vfbd(&vfb->base);
  1101. struct vmw_dma_buffer *dmabuf = vfbd->buffer;
  1102. struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
  1103. struct drm_crtc *crtc;
  1104. size_t fifo_size;
  1105. int i, k, ret, num_units, blits_pos;
  1106. struct {
  1107. uint32_t header;
  1108. SVGAFifoCmdDefineGMRFB body;
  1109. } *cmd;
  1110. struct {
  1111. uint32_t header;
  1112. SVGAFifoCmdBlitScreenToGMRFB body;
  1113. } *blits;
  1114. num_units = 0;
  1115. list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
  1116. if (crtc->fb != &vfb->base)
  1117. continue;
  1118. units[num_units++] = vmw_crtc_to_du(crtc);
  1119. }
  1120. BUG_ON(dmabuf == NULL);
  1121. BUG_ON(!clips || !num_clips);
  1122. /* take a safe guess at fifo size */
  1123. fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
  1124. cmd = kmalloc(fifo_size, GFP_KERNEL);
  1125. if (unlikely(cmd == NULL)) {
  1126. DRM_ERROR("Failed to allocate temporary fifo memory.\n");
  1127. return -ENOMEM;
  1128. }
  1129. memset(cmd, 0, fifo_size);
  1130. cmd->header = SVGA_CMD_DEFINE_GMRFB;
  1131. cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
  1132. cmd->body.format.colorDepth = vfb->base.depth;
  1133. cmd->body.format.reserved = 0;
  1134. cmd->body.bytesPerLine = vfb->base.pitches[0];
  1135. cmd->body.ptr.gmrId = vfb->user_handle;
  1136. cmd->body.ptr.offset = 0;
  1137. blits = (void *)&cmd[1];
  1138. blits_pos = 0;
  1139. for (i = 0; i < num_units; i++) {
  1140. struct drm_vmw_rect *c = clips;
  1141. for (k = 0; k < num_clips; k++, c++) {
  1142. /* transform clip coords to crtc origin based coords */
  1143. int clip_x1 = c->x - units[i]->crtc.x;
  1144. int clip_x2 = c->x - units[i]->crtc.x + c->w;
  1145. int clip_y1 = c->y - units[i]->crtc.y;
  1146. int clip_y2 = c->y - units[i]->crtc.y + c->h;
  1147. int dest_x = c->x;
  1148. int dest_y = c->y;
  1149. /* compensate for clipping, we negate
  1150. * a negative number and add that.
  1151. */
  1152. if (clip_x1 < 0)
  1153. dest_x += -clip_x1;
  1154. if (clip_y1 < 0)
  1155. dest_y += -clip_y1;
  1156. /* clip */
  1157. clip_x1 = max(clip_x1, 0);
  1158. clip_y1 = max(clip_y1, 0);
  1159. clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
  1160. clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
  1161. /* and cull any rects that misses the crtc */
  1162. if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
  1163. clip_y1 >= units[i]->crtc.mode.vdisplay ||
  1164. clip_x2 <= 0 || clip_y2 <= 0)
  1165. continue;
  1166. blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
  1167. blits[blits_pos].body.srcScreenId = units[i]->unit;
  1168. blits[blits_pos].body.destOrigin.x = dest_x;
  1169. blits[blits_pos].body.destOrigin.y = dest_y;
  1170. blits[blits_pos].body.srcRect.left = clip_x1;
  1171. blits[blits_pos].body.srcRect.top = clip_y1;
  1172. blits[blits_pos].body.srcRect.right = clip_x2;
  1173. blits[blits_pos].body.srcRect.bottom = clip_y2;
  1174. blits_pos++;
  1175. }
  1176. }
  1177. /* reset size here and use calculated exact size from loops */
  1178. fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
  1179. ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
  1180. 0, user_fence_rep, NULL);
  1181. kfree(cmd);
  1182. return ret;
  1183. }
  1184. int vmw_kms_init(struct vmw_private *dev_priv)
  1185. {
  1186. struct drm_device *dev = dev_priv->dev;
  1187. int ret;
  1188. drm_mode_config_init(dev);
  1189. dev->mode_config.funcs = &vmw_kms_funcs;
  1190. dev->mode_config.min_width = 1;
  1191. dev->mode_config.min_height = 1;
  1192. /* assumed largest fb size */
  1193. dev->mode_config.max_width = 8192;
  1194. dev->mode_config.max_height = 8192;
  1195. ret = vmw_kms_init_screen_object_display(dev_priv);
  1196. if (ret) /* Fallback */
  1197. (void)vmw_kms_init_legacy_display_system(dev_priv);
  1198. return 0;
  1199. }
  1200. int vmw_kms_close(struct vmw_private *dev_priv)
  1201. {
  1202. /*
  1203. * Docs says we should take the lock before calling this function
  1204. * but since it destroys encoders and our destructor calls
  1205. * drm_encoder_cleanup which takes the lock we deadlock.
  1206. */
  1207. drm_mode_config_cleanup(dev_priv->dev);
  1208. if (dev_priv->sou_priv)
  1209. vmw_kms_close_screen_object_display(dev_priv);
  1210. else
  1211. vmw_kms_close_legacy_display_system(dev_priv);
  1212. return 0;
  1213. }
  1214. int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
  1215. struct drm_file *file_priv)
  1216. {
  1217. struct drm_vmw_cursor_bypass_arg *arg = data;
  1218. struct vmw_display_unit *du;
  1219. struct drm_mode_object *obj;
  1220. struct drm_crtc *crtc;
  1221. int ret = 0;
  1222. mutex_lock(&dev->mode_config.mutex);
  1223. if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
  1224. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  1225. du = vmw_crtc_to_du(crtc);
  1226. du->hotspot_x = arg->xhot;
  1227. du->hotspot_y = arg->yhot;
  1228. }
  1229. mutex_unlock(&dev->mode_config.mutex);
  1230. return 0;
  1231. }
  1232. obj = drm_mode_object_find(dev, arg->crtc_id, DRM_MODE_OBJECT_CRTC);
  1233. if (!obj) {
  1234. ret = -EINVAL;
  1235. goto out;
  1236. }
  1237. crtc = obj_to_crtc(obj);
  1238. du = vmw_crtc_to_du(crtc);
  1239. du->hotspot_x = arg->xhot;
  1240. du->hotspot_y = arg->yhot;
  1241. out:
  1242. mutex_unlock(&dev->mode_config.mutex);
  1243. return ret;
  1244. }
  1245. int vmw_kms_write_svga(struct vmw_private *vmw_priv,
  1246. unsigned width, unsigned height, unsigned pitch,
  1247. unsigned bpp, unsigned depth)
  1248. {
  1249. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1250. vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
  1251. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1252. iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
  1253. vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
  1254. vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
  1255. vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
  1256. if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
  1257. DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
  1258. depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
  1259. return -EINVAL;
  1260. }
  1261. return 0;
  1262. }
  1263. int vmw_kms_save_vga(struct vmw_private *vmw_priv)
  1264. {
  1265. struct vmw_vga_topology_state *save;
  1266. uint32_t i;
  1267. vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
  1268. vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
  1269. vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
  1270. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1271. vmw_priv->vga_pitchlock =
  1272. vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
  1273. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1274. vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
  1275. SVGA_FIFO_PITCHLOCK);
  1276. if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
  1277. return 0;
  1278. vmw_priv->num_displays = vmw_read(vmw_priv,
  1279. SVGA_REG_NUM_GUEST_DISPLAYS);
  1280. if (vmw_priv->num_displays == 0)
  1281. vmw_priv->num_displays = 1;
  1282. for (i = 0; i < vmw_priv->num_displays; ++i) {
  1283. save = &vmw_priv->vga_save[i];
  1284. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
  1285. save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
  1286. save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
  1287. save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
  1288. save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
  1289. save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
  1290. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
  1291. if (i == 0 && vmw_priv->num_displays == 1 &&
  1292. save->width == 0 && save->height == 0) {
  1293. /*
  1294. * It should be fairly safe to assume that these
  1295. * values are uninitialized.
  1296. */
  1297. save->width = vmw_priv->vga_width - save->pos_x;
  1298. save->height = vmw_priv->vga_height - save->pos_y;
  1299. }
  1300. }
  1301. return 0;
  1302. }
  1303. int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
  1304. {
  1305. struct vmw_vga_topology_state *save;
  1306. uint32_t i;
  1307. vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
  1308. vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
  1309. vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
  1310. if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
  1311. vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
  1312. vmw_priv->vga_pitchlock);
  1313. else if (vmw_fifo_have_pitchlock(vmw_priv))
  1314. iowrite32(vmw_priv->vga_pitchlock,
  1315. vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
  1316. if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
  1317. return 0;
  1318. for (i = 0; i < vmw_priv->num_displays; ++i) {
  1319. save = &vmw_priv->vga_save[i];
  1320. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
  1321. vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
  1322. vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
  1323. vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
  1324. vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
  1325. vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
  1326. vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
  1327. }
  1328. return 0;
  1329. }
  1330. bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
  1331. uint32_t pitch,
  1332. uint32_t height)
  1333. {
  1334. return ((u64) pitch * (u64) height) < (u64) dev_priv->vram_size;
  1335. }
  1336. /**
  1337. * Function called by DRM code called with vbl_lock held.
  1338. */
  1339. u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
  1340. {
  1341. return 0;
  1342. }
  1343. /**
  1344. * Function called by DRM code called with vbl_lock held.
  1345. */
  1346. int vmw_enable_vblank(struct drm_device *dev, int crtc)
  1347. {
  1348. return -ENOSYS;
  1349. }
  1350. /**
  1351. * Function called by DRM code called with vbl_lock held.
  1352. */
  1353. void vmw_disable_vblank(struct drm_device *dev, int crtc)
  1354. {
  1355. }
  1356. /*
  1357. * Small shared kms functions.
  1358. */
  1359. int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
  1360. struct drm_vmw_rect *rects)
  1361. {
  1362. struct drm_device *dev = dev_priv->dev;
  1363. struct vmw_display_unit *du;
  1364. struct drm_connector *con;
  1365. mutex_lock(&dev->mode_config.mutex);
  1366. #if 0
  1367. {
  1368. unsigned int i;
  1369. DRM_INFO("%s: new layout ", __func__);
  1370. for (i = 0; i < num; i++)
  1371. DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
  1372. rects[i].w, rects[i].h);
  1373. DRM_INFO("\n");
  1374. }
  1375. #endif
  1376. list_for_each_entry(con, &dev->mode_config.connector_list, head) {
  1377. du = vmw_connector_to_du(con);
  1378. if (num > du->unit) {
  1379. du->pref_width = rects[du->unit].w;
  1380. du->pref_height = rects[du->unit].h;
  1381. du->pref_active = true;
  1382. du->gui_x = rects[du->unit].x;
  1383. du->gui_y = rects[du->unit].y;
  1384. } else {
  1385. du->pref_width = 800;
  1386. du->pref_height = 600;
  1387. du->pref_active = false;
  1388. }
  1389. con->status = vmw_du_connector_detect(con, true);
  1390. }
  1391. mutex_unlock(&dev->mode_config.mutex);
  1392. return 0;
  1393. }
  1394. int vmw_du_page_flip(struct drm_crtc *crtc,
  1395. struct drm_framebuffer *fb,
  1396. struct drm_pending_vblank_event *event)
  1397. {
  1398. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  1399. struct drm_framebuffer *old_fb = crtc->fb;
  1400. struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(fb);
  1401. struct drm_file *file_priv ;
  1402. struct vmw_fence_obj *fence = NULL;
  1403. struct drm_clip_rect clips;
  1404. int ret;
  1405. if (event == NULL)
  1406. return -EINVAL;
  1407. /* require ScreenObject support for page flipping */
  1408. if (!dev_priv->sou_priv)
  1409. return -ENOSYS;
  1410. file_priv = event->base.file_priv;
  1411. if (!vmw_kms_screen_object_flippable(dev_priv, crtc))
  1412. return -EINVAL;
  1413. crtc->fb = fb;
  1414. /* do a full screen dirty update */
  1415. clips.x1 = clips.y1 = 0;
  1416. clips.x2 = fb->width;
  1417. clips.y2 = fb->height;
  1418. if (vfb->dmabuf)
  1419. ret = do_dmabuf_dirty_sou(file_priv, dev_priv, vfb,
  1420. 0, 0, &clips, 1, 1, &fence);
  1421. else
  1422. ret = do_surface_dirty_sou(dev_priv, file_priv, vfb,
  1423. 0, 0, &clips, 1, 1, &fence);
  1424. if (ret != 0)
  1425. goto out_no_fence;
  1426. if (!fence) {
  1427. ret = -EINVAL;
  1428. goto out_no_fence;
  1429. }
  1430. ret = vmw_event_fence_action_queue(file_priv, fence,
  1431. &event->base,
  1432. &event->event.tv_sec,
  1433. &event->event.tv_usec,
  1434. true);
  1435. /*
  1436. * No need to hold on to this now. The only cleanup
  1437. * we need to do if we fail is unref the fence.
  1438. */
  1439. vmw_fence_obj_unreference(&fence);
  1440. if (vmw_crtc_to_du(crtc)->is_implicit)
  1441. vmw_kms_screen_object_update_implicit_fb(dev_priv, crtc);
  1442. return ret;
  1443. out_no_fence:
  1444. crtc->fb = old_fb;
  1445. return ret;
  1446. }
  1447. void vmw_du_crtc_save(struct drm_crtc *crtc)
  1448. {
  1449. }
  1450. void vmw_du_crtc_restore(struct drm_crtc *crtc)
  1451. {
  1452. }
  1453. void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
  1454. u16 *r, u16 *g, u16 *b,
  1455. uint32_t start, uint32_t size)
  1456. {
  1457. struct vmw_private *dev_priv = vmw_priv(crtc->dev);
  1458. int i;
  1459. for (i = 0; i < size; i++) {
  1460. DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
  1461. r[i], g[i], b[i]);
  1462. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
  1463. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
  1464. vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
  1465. }
  1466. }
  1467. void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
  1468. {
  1469. }
  1470. void vmw_du_connector_save(struct drm_connector *connector)
  1471. {
  1472. }
  1473. void vmw_du_connector_restore(struct drm_connector *connector)
  1474. {
  1475. }
  1476. enum drm_connector_status
  1477. vmw_du_connector_detect(struct drm_connector *connector, bool force)
  1478. {
  1479. uint32_t num_displays;
  1480. struct drm_device *dev = connector->dev;
  1481. struct vmw_private *dev_priv = vmw_priv(dev);
  1482. struct vmw_display_unit *du = vmw_connector_to_du(connector);
  1483. mutex_lock(&dev_priv->hw_mutex);
  1484. num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
  1485. mutex_unlock(&dev_priv->hw_mutex);
  1486. return ((vmw_connector_to_du(connector)->unit < num_displays &&
  1487. du->pref_active) ?
  1488. connector_status_connected : connector_status_disconnected);
  1489. }
  1490. static struct drm_display_mode vmw_kms_connector_builtin[] = {
  1491. /* 640x480@60Hz */
  1492. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
  1493. 752, 800, 0, 480, 489, 492, 525, 0,
  1494. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1495. /* 800x600@60Hz */
  1496. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
  1497. 968, 1056, 0, 600, 601, 605, 628, 0,
  1498. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1499. /* 1024x768@60Hz */
  1500. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
  1501. 1184, 1344, 0, 768, 771, 777, 806, 0,
  1502. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1503. /* 1152x864@75Hz */
  1504. { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
  1505. 1344, 1600, 0, 864, 865, 868, 900, 0,
  1506. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1507. /* 1280x768@60Hz */
  1508. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
  1509. 1472, 1664, 0, 768, 771, 778, 798, 0,
  1510. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1511. /* 1280x800@60Hz */
  1512. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
  1513. 1480, 1680, 0, 800, 803, 809, 831, 0,
  1514. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  1515. /* 1280x960@60Hz */
  1516. { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
  1517. 1488, 1800, 0, 960, 961, 964, 1000, 0,
  1518. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1519. /* 1280x1024@60Hz */
  1520. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
  1521. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  1522. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1523. /* 1360x768@60Hz */
  1524. { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
  1525. 1536, 1792, 0, 768, 771, 777, 795, 0,
  1526. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1527. /* 1440x1050@60Hz */
  1528. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
  1529. 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
  1530. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1531. /* 1440x900@60Hz */
  1532. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
  1533. 1672, 1904, 0, 900, 903, 909, 934, 0,
  1534. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1535. /* 1600x1200@60Hz */
  1536. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
  1537. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  1538. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1539. /* 1680x1050@60Hz */
  1540. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
  1541. 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
  1542. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1543. /* 1792x1344@60Hz */
  1544. { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
  1545. 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
  1546. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1547. /* 1853x1392@60Hz */
  1548. { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
  1549. 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
  1550. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1551. /* 1920x1200@60Hz */
  1552. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
  1553. 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
  1554. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1555. /* 1920x1440@60Hz */
  1556. { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
  1557. 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
  1558. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1559. /* 2560x1600@60Hz */
  1560. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
  1561. 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
  1562. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1563. /* Terminate */
  1564. { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
  1565. };
  1566. /**
  1567. * vmw_guess_mode_timing - Provide fake timings for a
  1568. * 60Hz vrefresh mode.
  1569. *
  1570. * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
  1571. * members filled in.
  1572. */
  1573. static void vmw_guess_mode_timing(struct drm_display_mode *mode)
  1574. {
  1575. mode->hsync_start = mode->hdisplay + 50;
  1576. mode->hsync_end = mode->hsync_start + 50;
  1577. mode->htotal = mode->hsync_end + 50;
  1578. mode->vsync_start = mode->vdisplay + 50;
  1579. mode->vsync_end = mode->vsync_start + 50;
  1580. mode->vtotal = mode->vsync_end + 50;
  1581. mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
  1582. mode->vrefresh = drm_mode_vrefresh(mode);
  1583. }
  1584. int vmw_du_connector_fill_modes(struct drm_connector *connector,
  1585. uint32_t max_width, uint32_t max_height)
  1586. {
  1587. struct vmw_display_unit *du = vmw_connector_to_du(connector);
  1588. struct drm_device *dev = connector->dev;
  1589. struct vmw_private *dev_priv = vmw_priv(dev);
  1590. struct drm_display_mode *mode = NULL;
  1591. struct drm_display_mode *bmode;
  1592. struct drm_display_mode prefmode = { DRM_MODE("preferred",
  1593. DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
  1594. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  1595. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
  1596. };
  1597. int i;
  1598. /* Add preferred mode */
  1599. {
  1600. mode = drm_mode_duplicate(dev, &prefmode);
  1601. if (!mode)
  1602. return 0;
  1603. mode->hdisplay = du->pref_width;
  1604. mode->vdisplay = du->pref_height;
  1605. vmw_guess_mode_timing(mode);
  1606. if (vmw_kms_validate_mode_vram(dev_priv, mode->hdisplay * 2,
  1607. mode->vdisplay)) {
  1608. drm_mode_probed_add(connector, mode);
  1609. } else {
  1610. drm_mode_destroy(dev, mode);
  1611. mode = NULL;
  1612. }
  1613. if (du->pref_mode) {
  1614. list_del_init(&du->pref_mode->head);
  1615. drm_mode_destroy(dev, du->pref_mode);
  1616. }
  1617. /* mode might be null here, this is intended */
  1618. du->pref_mode = mode;
  1619. }
  1620. for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
  1621. bmode = &vmw_kms_connector_builtin[i];
  1622. if (bmode->hdisplay > max_width ||
  1623. bmode->vdisplay > max_height)
  1624. continue;
  1625. if (!vmw_kms_validate_mode_vram(dev_priv, bmode->hdisplay * 2,
  1626. bmode->vdisplay))
  1627. continue;
  1628. mode = drm_mode_duplicate(dev, bmode);
  1629. if (!mode)
  1630. return 0;
  1631. mode->vrefresh = drm_mode_vrefresh(mode);
  1632. drm_mode_probed_add(connector, mode);
  1633. }
  1634. /* Move the prefered mode first, help apps pick the right mode. */
  1635. if (du->pref_mode)
  1636. list_move(&du->pref_mode->head, &connector->probed_modes);
  1637. drm_mode_connector_list_update(connector);
  1638. return 1;
  1639. }
  1640. int vmw_du_connector_set_property(struct drm_connector *connector,
  1641. struct drm_property *property,
  1642. uint64_t val)
  1643. {
  1644. return 0;
  1645. }
  1646. int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
  1647. struct drm_file *file_priv)
  1648. {
  1649. struct vmw_private *dev_priv = vmw_priv(dev);
  1650. struct drm_vmw_update_layout_arg *arg =
  1651. (struct drm_vmw_update_layout_arg *)data;
  1652. struct vmw_master *vmaster = vmw_master(file_priv->master);
  1653. void __user *user_rects;
  1654. struct drm_vmw_rect *rects;
  1655. unsigned rects_size;
  1656. int ret;
  1657. int i;
  1658. struct drm_mode_config *mode_config = &dev->mode_config;
  1659. ret = ttm_read_lock(&vmaster->lock, true);
  1660. if (unlikely(ret != 0))
  1661. return ret;
  1662. if (!arg->num_outputs) {
  1663. struct drm_vmw_rect def_rect = {0, 0, 800, 600};
  1664. vmw_du_update_layout(dev_priv, 1, &def_rect);
  1665. goto out_unlock;
  1666. }
  1667. rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
  1668. rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
  1669. GFP_KERNEL);
  1670. if (unlikely(!rects)) {
  1671. ret = -ENOMEM;
  1672. goto out_unlock;
  1673. }
  1674. user_rects = (void __user *)(unsigned long)arg->rects;
  1675. ret = copy_from_user(rects, user_rects, rects_size);
  1676. if (unlikely(ret != 0)) {
  1677. DRM_ERROR("Failed to get rects.\n");
  1678. ret = -EFAULT;
  1679. goto out_free;
  1680. }
  1681. for (i = 0; i < arg->num_outputs; ++i) {
  1682. if (rects[i].x < 0 ||
  1683. rects[i].y < 0 ||
  1684. rects[i].x + rects[i].w > mode_config->max_width ||
  1685. rects[i].y + rects[i].h > mode_config->max_height) {
  1686. DRM_ERROR("Invalid GUI layout.\n");
  1687. ret = -EINVAL;
  1688. goto out_free;
  1689. }
  1690. }
  1691. vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
  1692. out_free:
  1693. kfree(rects);
  1694. out_unlock:
  1695. ttm_read_unlock(&vmaster->lock);
  1696. return ret;
  1697. }