radeon_drv.c 16 KB

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  1. /**
  2. * \file radeon_drv.c
  3. * ATI Radeon driver
  4. *
  5. * \author Gareth Hughes <gareth@valinux.com>
  6. */
  7. /*
  8. * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  9. * All Rights Reserved.
  10. *
  11. * Permission is hereby granted, free of charge, to any person obtaining a
  12. * copy of this software and associated documentation files (the "Software"),
  13. * to deal in the Software without restriction, including without limitation
  14. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  15. * and/or sell copies of the Software, and to permit persons to whom the
  16. * Software is furnished to do so, subject to the following conditions:
  17. *
  18. * The above copyright notice and this permission notice (including the next
  19. * paragraph) shall be included in all copies or substantial portions of the
  20. * Software.
  21. *
  22. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  23. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  24. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  25. * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  26. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  27. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  28. * OTHER DEALINGS IN THE SOFTWARE.
  29. */
  30. #include <drm/drmP.h>
  31. #include <drm/radeon_drm.h>
  32. #include "radeon_drv.h"
  33. #include <drm/drm_pciids.h>
  34. #include <linux/console.h>
  35. #include <linux/module.h>
  36. /*
  37. * KMS wrapper.
  38. * - 2.0.0 - initial interface
  39. * - 2.1.0 - add square tiling interface
  40. * - 2.2.0 - add r6xx/r7xx const buffer support
  41. * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
  42. * - 2.4.0 - add crtc id query
  43. * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
  44. * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
  45. * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
  46. * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
  47. * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
  48. * 2.10.0 - fusion 2D tiling
  49. * 2.11.0 - backend map, initial compute support for the CS checker
  50. * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
  51. * 2.13.0 - virtual memory support, streamout
  52. * 2.14.0 - add evergreen tiling informations
  53. * 2.15.0 - add max_pipes query
  54. * 2.16.0 - fix evergreen 2D tiled surface calculation
  55. * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
  56. * 2.18.0 - r600-eg: allow "invalid" DB formats
  57. * 2.19.0 - r600-eg: MSAA textures
  58. * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
  59. * 2.21.0 - r600-r700: FMASK and CMASK
  60. * 2.22.0 - r600 only: RESOLVE_BOX allowed
  61. * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
  62. * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
  63. * 2.25.0 - eg+: new info request for num SE and num SH
  64. * 2.26.0 - r600-eg: fix htile size computation
  65. * 2.27.0 - r600-SI: Add CS ioctl support for async DMA
  66. * 2.28.0 - r600-eg: Add MEM_WRITE packet support
  67. */
  68. #define KMS_DRIVER_MAJOR 2
  69. #define KMS_DRIVER_MINOR 28
  70. #define KMS_DRIVER_PATCHLEVEL 0
  71. int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
  72. int radeon_driver_unload_kms(struct drm_device *dev);
  73. int radeon_driver_firstopen_kms(struct drm_device *dev);
  74. void radeon_driver_lastclose_kms(struct drm_device *dev);
  75. int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
  76. void radeon_driver_postclose_kms(struct drm_device *dev,
  77. struct drm_file *file_priv);
  78. void radeon_driver_preclose_kms(struct drm_device *dev,
  79. struct drm_file *file_priv);
  80. int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
  81. int radeon_resume_kms(struct drm_device *dev);
  82. u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
  83. int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
  84. void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
  85. int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
  86. int *max_error,
  87. struct timeval *vblank_time,
  88. unsigned flags);
  89. void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
  90. int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
  91. void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
  92. irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
  93. int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
  94. struct drm_file *file_priv);
  95. int radeon_gem_object_init(struct drm_gem_object *obj);
  96. void radeon_gem_object_free(struct drm_gem_object *obj);
  97. int radeon_gem_object_open(struct drm_gem_object *obj,
  98. struct drm_file *file_priv);
  99. void radeon_gem_object_close(struct drm_gem_object *obj,
  100. struct drm_file *file_priv);
  101. extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
  102. int *vpos, int *hpos);
  103. extern struct drm_ioctl_desc radeon_ioctls_kms[];
  104. extern int radeon_max_kms_ioctl;
  105. int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
  106. int radeon_mode_dumb_mmap(struct drm_file *filp,
  107. struct drm_device *dev,
  108. uint32_t handle, uint64_t *offset_p);
  109. int radeon_mode_dumb_create(struct drm_file *file_priv,
  110. struct drm_device *dev,
  111. struct drm_mode_create_dumb *args);
  112. int radeon_mode_dumb_destroy(struct drm_file *file_priv,
  113. struct drm_device *dev,
  114. uint32_t handle);
  115. struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
  116. struct drm_gem_object *obj,
  117. int flags);
  118. struct drm_gem_object *radeon_gem_prime_import(struct drm_device *dev,
  119. struct dma_buf *dma_buf);
  120. #if defined(CONFIG_DEBUG_FS)
  121. int radeon_debugfs_init(struct drm_minor *minor);
  122. void radeon_debugfs_cleanup(struct drm_minor *minor);
  123. #endif
  124. int radeon_no_wb;
  125. int radeon_modeset = -1;
  126. int radeon_dynclks = -1;
  127. int radeon_r4xx_atom = 0;
  128. int radeon_agpmode = 0;
  129. int radeon_vram_limit = 0;
  130. int radeon_gart_size = 512; /* default gart size */
  131. int radeon_benchmarking = 0;
  132. int radeon_testing = 0;
  133. int radeon_connector_table = 0;
  134. int radeon_tv = 1;
  135. int radeon_audio = 0;
  136. int radeon_disp_priority = 0;
  137. int radeon_hw_i2c = 0;
  138. int radeon_pcie_gen2 = -1;
  139. int radeon_msi = -1;
  140. int radeon_lockup_timeout = 10000;
  141. MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
  142. module_param_named(no_wb, radeon_no_wb, int, 0444);
  143. MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
  144. module_param_named(modeset, radeon_modeset, int, 0400);
  145. MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
  146. module_param_named(dynclks, radeon_dynclks, int, 0444);
  147. MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
  148. module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
  149. MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
  150. module_param_named(vramlimit, radeon_vram_limit, int, 0600);
  151. MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
  152. module_param_named(agpmode, radeon_agpmode, int, 0444);
  153. MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
  154. module_param_named(gartsize, radeon_gart_size, int, 0600);
  155. MODULE_PARM_DESC(benchmark, "Run benchmark");
  156. module_param_named(benchmark, radeon_benchmarking, int, 0444);
  157. MODULE_PARM_DESC(test, "Run tests");
  158. module_param_named(test, radeon_testing, int, 0444);
  159. MODULE_PARM_DESC(connector_table, "Force connector table");
  160. module_param_named(connector_table, radeon_connector_table, int, 0444);
  161. MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
  162. module_param_named(tv, radeon_tv, int, 0444);
  163. MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
  164. module_param_named(audio, radeon_audio, int, 0444);
  165. MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
  166. module_param_named(disp_priority, radeon_disp_priority, int, 0444);
  167. MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
  168. module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
  169. MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
  170. module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
  171. MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
  172. module_param_named(msi, radeon_msi, int, 0444);
  173. MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
  174. module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
  175. static int radeon_suspend(struct drm_device *dev, pm_message_t state)
  176. {
  177. drm_radeon_private_t *dev_priv = dev->dev_private;
  178. if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
  179. return 0;
  180. /* Disable *all* interrupts */
  181. if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
  182. RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
  183. RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
  184. return 0;
  185. }
  186. static int radeon_resume(struct drm_device *dev)
  187. {
  188. drm_radeon_private_t *dev_priv = dev->dev_private;
  189. if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
  190. return 0;
  191. /* Restore interrupt registers */
  192. if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
  193. RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
  194. RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
  195. return 0;
  196. }
  197. static struct pci_device_id pciidlist[] = {
  198. radeon_PCI_IDS
  199. };
  200. #if defined(CONFIG_DRM_RADEON_KMS)
  201. MODULE_DEVICE_TABLE(pci, pciidlist);
  202. #endif
  203. static const struct file_operations radeon_driver_old_fops = {
  204. .owner = THIS_MODULE,
  205. .open = drm_open,
  206. .release = drm_release,
  207. .unlocked_ioctl = drm_ioctl,
  208. .mmap = drm_mmap,
  209. .poll = drm_poll,
  210. .fasync = drm_fasync,
  211. .read = drm_read,
  212. #ifdef CONFIG_COMPAT
  213. .compat_ioctl = radeon_compat_ioctl,
  214. #endif
  215. .llseek = noop_llseek,
  216. };
  217. static struct drm_driver driver_old = {
  218. .driver_features =
  219. DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
  220. DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
  221. .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
  222. .load = radeon_driver_load,
  223. .firstopen = radeon_driver_firstopen,
  224. .open = radeon_driver_open,
  225. .preclose = radeon_driver_preclose,
  226. .postclose = radeon_driver_postclose,
  227. .lastclose = radeon_driver_lastclose,
  228. .unload = radeon_driver_unload,
  229. .suspend = radeon_suspend,
  230. .resume = radeon_resume,
  231. .get_vblank_counter = radeon_get_vblank_counter,
  232. .enable_vblank = radeon_enable_vblank,
  233. .disable_vblank = radeon_disable_vblank,
  234. .master_create = radeon_master_create,
  235. .master_destroy = radeon_master_destroy,
  236. .irq_preinstall = radeon_driver_irq_preinstall,
  237. .irq_postinstall = radeon_driver_irq_postinstall,
  238. .irq_uninstall = radeon_driver_irq_uninstall,
  239. .irq_handler = radeon_driver_irq_handler,
  240. .ioctls = radeon_ioctls,
  241. .dma_ioctl = radeon_cp_buffers,
  242. .fops = &radeon_driver_old_fops,
  243. .name = DRIVER_NAME,
  244. .desc = DRIVER_DESC,
  245. .date = DRIVER_DATE,
  246. .major = DRIVER_MAJOR,
  247. .minor = DRIVER_MINOR,
  248. .patchlevel = DRIVER_PATCHLEVEL,
  249. };
  250. static struct drm_driver kms_driver;
  251. static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
  252. {
  253. struct apertures_struct *ap;
  254. bool primary = false;
  255. ap = alloc_apertures(1);
  256. if (!ap)
  257. return -ENOMEM;
  258. ap->ranges[0].base = pci_resource_start(pdev, 0);
  259. ap->ranges[0].size = pci_resource_len(pdev, 0);
  260. #ifdef CONFIG_X86
  261. primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  262. #endif
  263. remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
  264. kfree(ap);
  265. return 0;
  266. }
  267. static int radeon_pci_probe(struct pci_dev *pdev,
  268. const struct pci_device_id *ent)
  269. {
  270. int ret;
  271. /* Get rid of things like offb */
  272. ret = radeon_kick_out_firmware_fb(pdev);
  273. if (ret)
  274. return ret;
  275. return drm_get_pci_dev(pdev, ent, &kms_driver);
  276. }
  277. static void
  278. radeon_pci_remove(struct pci_dev *pdev)
  279. {
  280. struct drm_device *dev = pci_get_drvdata(pdev);
  281. drm_put_dev(dev);
  282. }
  283. static int
  284. radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  285. {
  286. struct drm_device *dev = pci_get_drvdata(pdev);
  287. return radeon_suspend_kms(dev, state);
  288. }
  289. static int
  290. radeon_pci_resume(struct pci_dev *pdev)
  291. {
  292. struct drm_device *dev = pci_get_drvdata(pdev);
  293. return radeon_resume_kms(dev);
  294. }
  295. static const struct file_operations radeon_driver_kms_fops = {
  296. .owner = THIS_MODULE,
  297. .open = drm_open,
  298. .release = drm_release,
  299. .unlocked_ioctl = drm_ioctl,
  300. .mmap = radeon_mmap,
  301. .poll = drm_poll,
  302. .fasync = drm_fasync,
  303. .read = drm_read,
  304. #ifdef CONFIG_COMPAT
  305. .compat_ioctl = radeon_kms_compat_ioctl,
  306. #endif
  307. };
  308. static struct drm_driver kms_driver = {
  309. .driver_features =
  310. DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
  311. DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
  312. DRIVER_PRIME,
  313. .dev_priv_size = 0,
  314. .load = radeon_driver_load_kms,
  315. .firstopen = radeon_driver_firstopen_kms,
  316. .open = radeon_driver_open_kms,
  317. .preclose = radeon_driver_preclose_kms,
  318. .postclose = radeon_driver_postclose_kms,
  319. .lastclose = radeon_driver_lastclose_kms,
  320. .unload = radeon_driver_unload_kms,
  321. .suspend = radeon_suspend_kms,
  322. .resume = radeon_resume_kms,
  323. .get_vblank_counter = radeon_get_vblank_counter_kms,
  324. .enable_vblank = radeon_enable_vblank_kms,
  325. .disable_vblank = radeon_disable_vblank_kms,
  326. .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
  327. .get_scanout_position = radeon_get_crtc_scanoutpos,
  328. #if defined(CONFIG_DEBUG_FS)
  329. .debugfs_init = radeon_debugfs_init,
  330. .debugfs_cleanup = radeon_debugfs_cleanup,
  331. #endif
  332. .irq_preinstall = radeon_driver_irq_preinstall_kms,
  333. .irq_postinstall = radeon_driver_irq_postinstall_kms,
  334. .irq_uninstall = radeon_driver_irq_uninstall_kms,
  335. .irq_handler = radeon_driver_irq_handler_kms,
  336. .ioctls = radeon_ioctls_kms,
  337. .gem_init_object = radeon_gem_object_init,
  338. .gem_free_object = radeon_gem_object_free,
  339. .gem_open_object = radeon_gem_object_open,
  340. .gem_close_object = radeon_gem_object_close,
  341. .dma_ioctl = radeon_dma_ioctl_kms,
  342. .dumb_create = radeon_mode_dumb_create,
  343. .dumb_map_offset = radeon_mode_dumb_mmap,
  344. .dumb_destroy = radeon_mode_dumb_destroy,
  345. .fops = &radeon_driver_kms_fops,
  346. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  347. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  348. .gem_prime_export = radeon_gem_prime_export,
  349. .gem_prime_import = radeon_gem_prime_import,
  350. .name = DRIVER_NAME,
  351. .desc = DRIVER_DESC,
  352. .date = DRIVER_DATE,
  353. .major = KMS_DRIVER_MAJOR,
  354. .minor = KMS_DRIVER_MINOR,
  355. .patchlevel = KMS_DRIVER_PATCHLEVEL,
  356. };
  357. static struct drm_driver *driver;
  358. static struct pci_driver *pdriver;
  359. static struct pci_driver radeon_pci_driver = {
  360. .name = DRIVER_NAME,
  361. .id_table = pciidlist,
  362. };
  363. static struct pci_driver radeon_kms_pci_driver = {
  364. .name = DRIVER_NAME,
  365. .id_table = pciidlist,
  366. .probe = radeon_pci_probe,
  367. .remove = radeon_pci_remove,
  368. .suspend = radeon_pci_suspend,
  369. .resume = radeon_pci_resume,
  370. };
  371. static int __init radeon_init(void)
  372. {
  373. driver = &driver_old;
  374. pdriver = &radeon_pci_driver;
  375. driver->num_ioctls = radeon_max_ioctl;
  376. #ifdef CONFIG_VGA_CONSOLE
  377. if (vgacon_text_force() && radeon_modeset == -1) {
  378. DRM_INFO("VGACON disable radeon kernel modesetting.\n");
  379. driver = &driver_old;
  380. pdriver = &radeon_pci_driver;
  381. driver->driver_features &= ~DRIVER_MODESET;
  382. radeon_modeset = 0;
  383. }
  384. #endif
  385. /* if enabled by default */
  386. if (radeon_modeset == -1) {
  387. #ifdef CONFIG_DRM_RADEON_KMS
  388. DRM_INFO("radeon defaulting to kernel modesetting.\n");
  389. radeon_modeset = 1;
  390. #else
  391. DRM_INFO("radeon defaulting to userspace modesetting.\n");
  392. radeon_modeset = 0;
  393. #endif
  394. }
  395. if (radeon_modeset == 1) {
  396. DRM_INFO("radeon kernel modesetting enabled.\n");
  397. driver = &kms_driver;
  398. pdriver = &radeon_kms_pci_driver;
  399. driver->driver_features |= DRIVER_MODESET;
  400. driver->num_ioctls = radeon_max_kms_ioctl;
  401. radeon_register_atpx_handler();
  402. }
  403. /* if the vga console setting is enabled still
  404. * let modprobe override it */
  405. return drm_pci_init(driver, pdriver);
  406. }
  407. static void __exit radeon_exit(void)
  408. {
  409. drm_pci_exit(driver, pdriver);
  410. radeon_unregister_atpx_handler();
  411. }
  412. module_init(radeon_init);
  413. module_exit(radeon_exit);
  414. MODULE_AUTHOR(DRIVER_AUTHOR);
  415. MODULE_DESCRIPTION(DRIVER_DESC);
  416. MODULE_LICENSE("GPL and additional rights");