nouveau_drm.c 18 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/console.h>
  25. #include <linux/module.h>
  26. #include <linux/pci.h>
  27. #include <core/device.h>
  28. #include <core/client.h>
  29. #include <core/gpuobj.h>
  30. #include <core/class.h>
  31. #include <subdev/device.h>
  32. #include <subdev/vm.h>
  33. #include "nouveau_drm.h"
  34. #include "nouveau_irq.h"
  35. #include "nouveau_dma.h"
  36. #include "nouveau_ttm.h"
  37. #include "nouveau_gem.h"
  38. #include "nouveau_agp.h"
  39. #include "nouveau_vga.h"
  40. #include "nouveau_pm.h"
  41. #include "nouveau_acpi.h"
  42. #include "nouveau_bios.h"
  43. #include "nouveau_ioctl.h"
  44. #include "nouveau_abi16.h"
  45. #include "nouveau_fbcon.h"
  46. #include "nouveau_fence.h"
  47. MODULE_PARM_DESC(config, "option string to pass to driver core");
  48. static char *nouveau_config;
  49. module_param_named(config, nouveau_config, charp, 0400);
  50. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  51. static char *nouveau_debug;
  52. module_param_named(debug, nouveau_debug, charp, 0400);
  53. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  54. static int nouveau_noaccel = 0;
  55. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  56. MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
  57. "0 = disabled, 1 = enabled, 2 = headless)");
  58. int nouveau_modeset = -1;
  59. module_param_named(modeset, nouveau_modeset, int, 0400);
  60. static struct drm_driver driver;
  61. static u64
  62. nouveau_name(struct pci_dev *pdev)
  63. {
  64. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  65. name |= pdev->bus->number << 16;
  66. name |= PCI_SLOT(pdev->devfn) << 8;
  67. return name | PCI_FUNC(pdev->devfn);
  68. }
  69. static int
  70. nouveau_cli_create(struct pci_dev *pdev, const char *name,
  71. int size, void **pcli)
  72. {
  73. struct nouveau_cli *cli;
  74. int ret;
  75. ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config,
  76. nouveau_debug, size, pcli);
  77. cli = *pcli;
  78. if (ret)
  79. return ret;
  80. mutex_init(&cli->mutex);
  81. return 0;
  82. }
  83. static void
  84. nouveau_cli_destroy(struct nouveau_cli *cli)
  85. {
  86. struct nouveau_object *client = nv_object(cli);
  87. nouveau_vm_ref(NULL, &cli->base.vm, NULL);
  88. nouveau_client_fini(&cli->base, false);
  89. atomic_set(&client->refcount, 1);
  90. nouveau_object_ref(NULL, &client);
  91. }
  92. static void
  93. nouveau_accel_fini(struct nouveau_drm *drm)
  94. {
  95. nouveau_gpuobj_ref(NULL, &drm->notify);
  96. nouveau_channel_del(&drm->channel);
  97. nouveau_channel_del(&drm->cechan);
  98. if (drm->fence)
  99. nouveau_fence(drm)->dtor(drm);
  100. }
  101. static void
  102. nouveau_accel_init(struct nouveau_drm *drm)
  103. {
  104. struct nouveau_device *device = nv_device(drm->device);
  105. struct nouveau_object *object;
  106. u32 arg0, arg1;
  107. int ret;
  108. if (nouveau_noaccel)
  109. return;
  110. /* initialise synchronisation routines */
  111. if (device->card_type < NV_10) ret = nv04_fence_create(drm);
  112. else if (device->card_type < NV_50) ret = nv10_fence_create(drm);
  113. else if (device->chipset < 0x84) ret = nv50_fence_create(drm);
  114. else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
  115. else ret = nvc0_fence_create(drm);
  116. if (ret) {
  117. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  118. nouveau_accel_fini(drm);
  119. return;
  120. }
  121. if (device->card_type >= NV_E0) {
  122. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
  123. NVDRM_CHAN + 1,
  124. NVE0_CHANNEL_IND_ENGINE_CE0 |
  125. NVE0_CHANNEL_IND_ENGINE_CE1, 0,
  126. &drm->cechan);
  127. if (ret)
  128. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  129. arg0 = NVE0_CHANNEL_IND_ENGINE_GR;
  130. arg1 = 1;
  131. } else {
  132. arg0 = NvDmaFB;
  133. arg1 = NvDmaTT;
  134. }
  135. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
  136. arg0, arg1, &drm->channel);
  137. if (ret) {
  138. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  139. nouveau_accel_fini(drm);
  140. return;
  141. }
  142. if (device->card_type < NV_C0) {
  143. ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
  144. &drm->notify);
  145. if (ret) {
  146. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  147. nouveau_accel_fini(drm);
  148. return;
  149. }
  150. ret = nouveau_object_new(nv_object(drm),
  151. drm->channel->handle, NvNotify0,
  152. 0x003d, &(struct nv_dma_class) {
  153. .flags = NV_DMA_TARGET_VRAM |
  154. NV_DMA_ACCESS_RDWR,
  155. .start = drm->notify->addr,
  156. .limit = drm->notify->addr + 31
  157. }, sizeof(struct nv_dma_class),
  158. &object);
  159. if (ret) {
  160. nouveau_accel_fini(drm);
  161. return;
  162. }
  163. }
  164. nouveau_bo_move_init(drm);
  165. }
  166. static int nouveau_drm_probe(struct pci_dev *pdev,
  167. const struct pci_device_id *pent)
  168. {
  169. struct nouveau_device *device;
  170. struct apertures_struct *aper;
  171. bool boot = false;
  172. int ret;
  173. /* remove conflicting drivers (vesafb, efifb etc) */
  174. aper = alloc_apertures(3);
  175. if (!aper)
  176. return -ENOMEM;
  177. aper->ranges[0].base = pci_resource_start(pdev, 1);
  178. aper->ranges[0].size = pci_resource_len(pdev, 1);
  179. aper->count = 1;
  180. if (pci_resource_len(pdev, 2)) {
  181. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  182. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  183. aper->count++;
  184. }
  185. if (pci_resource_len(pdev, 3)) {
  186. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  187. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  188. aper->count++;
  189. }
  190. #ifdef CONFIG_X86
  191. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  192. #endif
  193. remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  194. kfree(aper);
  195. ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev),
  196. nouveau_config, nouveau_debug, &device);
  197. if (ret)
  198. return ret;
  199. pci_set_master(pdev);
  200. ret = drm_get_pci_dev(pdev, pent, &driver);
  201. if (ret) {
  202. nouveau_object_ref(NULL, (struct nouveau_object **)&device);
  203. return ret;
  204. }
  205. return 0;
  206. }
  207. static int
  208. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  209. {
  210. struct pci_dev *pdev = dev->pdev;
  211. struct nouveau_device *device;
  212. struct nouveau_drm *drm;
  213. int ret;
  214. ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm);
  215. if (ret)
  216. return ret;
  217. dev->dev_private = drm;
  218. drm->dev = dev;
  219. INIT_LIST_HEAD(&drm->clients);
  220. spin_lock_init(&drm->tile.lock);
  221. /* make sure AGP controller is in a consistent state before we
  222. * (possibly) execute vbios init tables (see nouveau_agp.h)
  223. */
  224. if (drm_pci_device_is_agp(dev) && dev->agp) {
  225. /* dummy device object, doesn't init anything, but allows
  226. * agp code access to registers
  227. */
  228. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
  229. NVDRM_DEVICE, 0x0080,
  230. &(struct nv_device_class) {
  231. .device = ~0,
  232. .disable =
  233. ~(NV_DEVICE_DISABLE_MMIO |
  234. NV_DEVICE_DISABLE_IDENTIFY),
  235. .debug0 = ~0,
  236. }, sizeof(struct nv_device_class),
  237. &drm->device);
  238. if (ret)
  239. goto fail_device;
  240. nouveau_agp_reset(drm);
  241. nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
  242. }
  243. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
  244. 0x0080, &(struct nv_device_class) {
  245. .device = ~0,
  246. .disable = 0,
  247. .debug0 = 0,
  248. }, sizeof(struct nv_device_class),
  249. &drm->device);
  250. if (ret)
  251. goto fail_device;
  252. /* workaround an odd issue on nvc1 by disabling the device's
  253. * nosnoop capability. hopefully won't cause issues until a
  254. * better fix is found - assuming there is one...
  255. */
  256. device = nv_device(drm->device);
  257. if (nv_device(drm->device)->chipset == 0xc1)
  258. nv_mask(device, 0x00088080, 0x00000800, 0x00000000);
  259. nouveau_vga_init(drm);
  260. nouveau_agp_init(drm);
  261. if (device->card_type >= NV_50) {
  262. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  263. 0x1000, &drm->client.base.vm);
  264. if (ret)
  265. goto fail_device;
  266. }
  267. ret = nouveau_ttm_init(drm);
  268. if (ret)
  269. goto fail_ttm;
  270. ret = nouveau_bios_init(dev);
  271. if (ret)
  272. goto fail_bios;
  273. ret = nouveau_irq_init(dev);
  274. if (ret)
  275. goto fail_irq;
  276. ret = nouveau_display_create(dev);
  277. if (ret)
  278. goto fail_dispctor;
  279. if (dev->mode_config.num_crtc) {
  280. ret = nouveau_display_init(dev);
  281. if (ret)
  282. goto fail_dispinit;
  283. }
  284. nouveau_pm_init(dev);
  285. nouveau_accel_init(drm);
  286. nouveau_fbcon_init(dev);
  287. return 0;
  288. fail_dispinit:
  289. nouveau_display_destroy(dev);
  290. fail_dispctor:
  291. nouveau_irq_fini(dev);
  292. fail_irq:
  293. nouveau_bios_takedown(dev);
  294. fail_bios:
  295. nouveau_ttm_fini(drm);
  296. fail_ttm:
  297. nouveau_agp_fini(drm);
  298. nouveau_vga_fini(drm);
  299. fail_device:
  300. nouveau_cli_destroy(&drm->client);
  301. return ret;
  302. }
  303. static int
  304. nouveau_drm_unload(struct drm_device *dev)
  305. {
  306. struct nouveau_drm *drm = nouveau_drm(dev);
  307. nouveau_fbcon_fini(dev);
  308. nouveau_accel_fini(drm);
  309. nouveau_pm_fini(dev);
  310. if (dev->mode_config.num_crtc)
  311. nouveau_display_fini(dev);
  312. nouveau_display_destroy(dev);
  313. nouveau_irq_fini(dev);
  314. nouveau_bios_takedown(dev);
  315. nouveau_ttm_fini(drm);
  316. nouveau_agp_fini(drm);
  317. nouveau_vga_fini(drm);
  318. nouveau_cli_destroy(&drm->client);
  319. return 0;
  320. }
  321. static void
  322. nouveau_drm_remove(struct pci_dev *pdev)
  323. {
  324. struct drm_device *dev = pci_get_drvdata(pdev);
  325. struct nouveau_drm *drm = nouveau_drm(dev);
  326. struct nouveau_object *device;
  327. device = drm->client.base.device;
  328. drm_put_dev(dev);
  329. nouveau_object_ref(NULL, &device);
  330. nouveau_object_debug();
  331. }
  332. int
  333. nouveau_do_suspend(struct drm_device *dev)
  334. {
  335. struct nouveau_drm *drm = nouveau_drm(dev);
  336. struct nouveau_cli *cli;
  337. int ret;
  338. if (dev->mode_config.num_crtc) {
  339. NV_INFO(drm, "suspending fbcon...\n");
  340. nouveau_fbcon_set_suspend(dev, 1);
  341. NV_INFO(drm, "suspending display...\n");
  342. ret = nouveau_display_suspend(dev);
  343. if (ret)
  344. return ret;
  345. }
  346. NV_INFO(drm, "evicting buffers...\n");
  347. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  348. if (drm->fence && nouveau_fence(drm)->suspend) {
  349. if (!nouveau_fence(drm)->suspend(drm))
  350. return -ENOMEM;
  351. }
  352. NV_INFO(drm, "suspending client object trees...\n");
  353. list_for_each_entry(cli, &drm->clients, head) {
  354. ret = nouveau_client_fini(&cli->base, true);
  355. if (ret)
  356. goto fail_client;
  357. }
  358. ret = nouveau_client_fini(&drm->client.base, true);
  359. if (ret)
  360. goto fail_client;
  361. nouveau_agp_fini(drm);
  362. return 0;
  363. fail_client:
  364. list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
  365. nouveau_client_init(&cli->base);
  366. }
  367. if (dev->mode_config.num_crtc) {
  368. NV_INFO(drm, "resuming display...\n");
  369. nouveau_display_resume(dev);
  370. }
  371. return ret;
  372. }
  373. int nouveau_pmops_suspend(struct device *dev)
  374. {
  375. struct pci_dev *pdev = to_pci_dev(dev);
  376. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  377. int ret;
  378. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  379. return 0;
  380. ret = nouveau_do_suspend(drm_dev);
  381. if (ret)
  382. return ret;
  383. pci_save_state(pdev);
  384. pci_disable_device(pdev);
  385. pci_set_power_state(pdev, PCI_D3hot);
  386. return 0;
  387. }
  388. int
  389. nouveau_do_resume(struct drm_device *dev)
  390. {
  391. struct nouveau_drm *drm = nouveau_drm(dev);
  392. struct nouveau_cli *cli;
  393. NV_INFO(drm, "re-enabling device...\n");
  394. nouveau_agp_reset(drm);
  395. NV_INFO(drm, "resuming client object trees...\n");
  396. nouveau_client_init(&drm->client.base);
  397. nouveau_agp_init(drm);
  398. list_for_each_entry(cli, &drm->clients, head) {
  399. nouveau_client_init(&cli->base);
  400. }
  401. if (drm->fence && nouveau_fence(drm)->resume)
  402. nouveau_fence(drm)->resume(drm);
  403. nouveau_run_vbios_init(dev);
  404. nouveau_irq_postinstall(dev);
  405. nouveau_pm_resume(dev);
  406. if (dev->mode_config.num_crtc) {
  407. NV_INFO(drm, "resuming display...\n");
  408. nouveau_display_resume(dev);
  409. }
  410. return 0;
  411. }
  412. int nouveau_pmops_resume(struct device *dev)
  413. {
  414. struct pci_dev *pdev = to_pci_dev(dev);
  415. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  416. int ret;
  417. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  418. return 0;
  419. pci_set_power_state(pdev, PCI_D0);
  420. pci_restore_state(pdev);
  421. ret = pci_enable_device(pdev);
  422. if (ret)
  423. return ret;
  424. pci_set_master(pdev);
  425. return nouveau_do_resume(drm_dev);
  426. }
  427. static int nouveau_pmops_freeze(struct device *dev)
  428. {
  429. struct pci_dev *pdev = to_pci_dev(dev);
  430. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  431. return nouveau_do_suspend(drm_dev);
  432. }
  433. static int nouveau_pmops_thaw(struct device *dev)
  434. {
  435. struct pci_dev *pdev = to_pci_dev(dev);
  436. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  437. return nouveau_do_resume(drm_dev);
  438. }
  439. static int
  440. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  441. {
  442. struct pci_dev *pdev = dev->pdev;
  443. struct nouveau_drm *drm = nouveau_drm(dev);
  444. struct nouveau_cli *cli;
  445. char name[16];
  446. int ret;
  447. snprintf(name, sizeof(name), "%d", pid_nr(fpriv->pid));
  448. ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli);
  449. if (ret)
  450. return ret;
  451. if (nv_device(drm->device)->card_type >= NV_50) {
  452. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  453. 0x1000, &cli->base.vm);
  454. if (ret) {
  455. nouveau_cli_destroy(cli);
  456. return ret;
  457. }
  458. }
  459. fpriv->driver_priv = cli;
  460. mutex_lock(&drm->client.mutex);
  461. list_add(&cli->head, &drm->clients);
  462. mutex_unlock(&drm->client.mutex);
  463. return 0;
  464. }
  465. static void
  466. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  467. {
  468. struct nouveau_cli *cli = nouveau_cli(fpriv);
  469. struct nouveau_drm *drm = nouveau_drm(dev);
  470. if (cli->abi16)
  471. nouveau_abi16_fini(cli->abi16);
  472. mutex_lock(&drm->client.mutex);
  473. list_del(&cli->head);
  474. mutex_unlock(&drm->client.mutex);
  475. }
  476. static void
  477. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  478. {
  479. struct nouveau_cli *cli = nouveau_cli(fpriv);
  480. nouveau_cli_destroy(cli);
  481. }
  482. static struct drm_ioctl_desc
  483. nouveau_ioctls[] = {
  484. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH),
  485. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  486. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH),
  487. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH),
  488. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  489. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  490. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH),
  491. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH),
  492. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH),
  493. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
  494. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
  495. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH),
  496. };
  497. static const struct file_operations
  498. nouveau_driver_fops = {
  499. .owner = THIS_MODULE,
  500. .open = drm_open,
  501. .release = drm_release,
  502. .unlocked_ioctl = drm_ioctl,
  503. .mmap = nouveau_ttm_mmap,
  504. .poll = drm_poll,
  505. .fasync = drm_fasync,
  506. .read = drm_read,
  507. #if defined(CONFIG_COMPAT)
  508. .compat_ioctl = nouveau_compat_ioctl,
  509. #endif
  510. .llseek = noop_llseek,
  511. };
  512. static struct drm_driver
  513. driver = {
  514. .driver_features =
  515. DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
  516. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
  517. DRIVER_MODESET | DRIVER_PRIME,
  518. .load = nouveau_drm_load,
  519. .unload = nouveau_drm_unload,
  520. .open = nouveau_drm_open,
  521. .preclose = nouveau_drm_preclose,
  522. .postclose = nouveau_drm_postclose,
  523. .lastclose = nouveau_vga_lastclose,
  524. .irq_preinstall = nouveau_irq_preinstall,
  525. .irq_postinstall = nouveau_irq_postinstall,
  526. .irq_uninstall = nouveau_irq_uninstall,
  527. .irq_handler = nouveau_irq_handler,
  528. .get_vblank_counter = drm_vblank_count,
  529. .enable_vblank = nouveau_vblank_enable,
  530. .disable_vblank = nouveau_vblank_disable,
  531. .ioctls = nouveau_ioctls,
  532. .fops = &nouveau_driver_fops,
  533. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  534. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  535. .gem_prime_export = nouveau_gem_prime_export,
  536. .gem_prime_import = nouveau_gem_prime_import,
  537. .gem_init_object = nouveau_gem_object_new,
  538. .gem_free_object = nouveau_gem_object_del,
  539. .gem_open_object = nouveau_gem_object_open,
  540. .gem_close_object = nouveau_gem_object_close,
  541. .dumb_create = nouveau_display_dumb_create,
  542. .dumb_map_offset = nouveau_display_dumb_map_offset,
  543. .dumb_destroy = nouveau_display_dumb_destroy,
  544. .name = DRIVER_NAME,
  545. .desc = DRIVER_DESC,
  546. #ifdef GIT_REVISION
  547. .date = GIT_REVISION,
  548. #else
  549. .date = DRIVER_DATE,
  550. #endif
  551. .major = DRIVER_MAJOR,
  552. .minor = DRIVER_MINOR,
  553. .patchlevel = DRIVER_PATCHLEVEL,
  554. };
  555. static struct pci_device_id
  556. nouveau_drm_pci_table[] = {
  557. {
  558. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  559. .class = PCI_BASE_CLASS_DISPLAY << 16,
  560. .class_mask = 0xff << 16,
  561. },
  562. {
  563. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  564. .class = PCI_BASE_CLASS_DISPLAY << 16,
  565. .class_mask = 0xff << 16,
  566. },
  567. {}
  568. };
  569. static const struct dev_pm_ops nouveau_pm_ops = {
  570. .suspend = nouveau_pmops_suspend,
  571. .resume = nouveau_pmops_resume,
  572. .freeze = nouveau_pmops_freeze,
  573. .thaw = nouveau_pmops_thaw,
  574. .poweroff = nouveau_pmops_freeze,
  575. .restore = nouveau_pmops_resume,
  576. };
  577. static struct pci_driver
  578. nouveau_drm_pci_driver = {
  579. .name = "nouveau",
  580. .id_table = nouveau_drm_pci_table,
  581. .probe = nouveau_drm_probe,
  582. .remove = nouveau_drm_remove,
  583. .driver.pm = &nouveau_pm_ops,
  584. };
  585. static int __init
  586. nouveau_drm_init(void)
  587. {
  588. driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);
  589. if (nouveau_modeset == -1) {
  590. #ifdef CONFIG_VGA_CONSOLE
  591. if (vgacon_text_force())
  592. nouveau_modeset = 0;
  593. #endif
  594. }
  595. if (!nouveau_modeset)
  596. return 0;
  597. nouveau_register_dsm_handler();
  598. return drm_pci_init(&driver, &nouveau_drm_pci_driver);
  599. }
  600. static void __exit
  601. nouveau_drm_exit(void)
  602. {
  603. if (!nouveau_modeset)
  604. return;
  605. drm_pci_exit(&driver, &nouveau_drm_pci_driver);
  606. nouveau_unregister_dsm_handler();
  607. }
  608. module_init(nouveau_drm_init);
  609. module_exit(nouveau_drm_exit);
  610. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  611. MODULE_AUTHOR(DRIVER_AUTHOR);
  612. MODULE_DESCRIPTION(DRIVER_DESC);
  613. MODULE_LICENSE("GPL and additional rights");