intel_sdvo.c 85 KB

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  1. /*
  2. * Copyright 2006 Dave Airlie <airlied@linux.ie>
  3. * Copyright © 2006-2007 Intel Corporation
  4. * Jesse Barnes <jesse.barnes@intel.com>
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the next
  14. * paragraph) shall be included in all copies or substantial portions of the
  15. * Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23. * DEALINGS IN THE SOFTWARE.
  24. *
  25. * Authors:
  26. * Eric Anholt <eric@anholt.net>
  27. */
  28. #include <linux/i2c.h>
  29. #include <linux/slab.h>
  30. #include <linux/delay.h>
  31. #include <linux/export.h>
  32. #include <drm/drmP.h>
  33. #include <drm/drm_crtc.h>
  34. #include <drm/drm_edid.h>
  35. #include "intel_drv.h"
  36. #include <drm/i915_drm.h>
  37. #include "i915_drv.h"
  38. #include "intel_sdvo_regs.h"
  39. #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  40. #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  41. #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  42. #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  43. #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  44. SDVO_TV_MASK)
  45. #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
  46. #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
  47. #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
  48. #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  49. #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  50. static const char *tv_format_names[] = {
  51. "NTSC_M" , "NTSC_J" , "NTSC_443",
  52. "PAL_B" , "PAL_D" , "PAL_G" ,
  53. "PAL_H" , "PAL_I" , "PAL_M" ,
  54. "PAL_N" , "PAL_NC" , "PAL_60" ,
  55. "SECAM_B" , "SECAM_D" , "SECAM_G" ,
  56. "SECAM_K" , "SECAM_K1", "SECAM_L" ,
  57. "SECAM_60"
  58. };
  59. #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
  60. struct intel_sdvo {
  61. struct intel_encoder base;
  62. struct i2c_adapter *i2c;
  63. u8 slave_addr;
  64. struct i2c_adapter ddc;
  65. /* Register for the SDVO device: SDVOB or SDVOC */
  66. uint32_t sdvo_reg;
  67. /* Active outputs controlled by this SDVO output */
  68. uint16_t controlled_output;
  69. /*
  70. * Capabilities of the SDVO device returned by
  71. * i830_sdvo_get_capabilities()
  72. */
  73. struct intel_sdvo_caps caps;
  74. /* Pixel clock limitations reported by the SDVO device, in kHz */
  75. int pixel_clock_min, pixel_clock_max;
  76. /*
  77. * For multiple function SDVO device,
  78. * this is for current attached outputs.
  79. */
  80. uint16_t attached_output;
  81. /*
  82. * Hotplug activation bits for this device
  83. */
  84. uint16_t hotplug_active;
  85. /**
  86. * This is used to select the color range of RBG outputs in HDMI mode.
  87. * It is only valid when using TMDS encoding and 8 bit per color mode.
  88. */
  89. uint32_t color_range;
  90. /**
  91. * This is set if we're going to treat the device as TV-out.
  92. *
  93. * While we have these nice friendly flags for output types that ought
  94. * to decide this for us, the S-Video output on our HDMI+S-Video card
  95. * shows up as RGB1 (VGA).
  96. */
  97. bool is_tv;
  98. /* On different gens SDVOB is at different places. */
  99. bool is_sdvob;
  100. /* This is for current tv format name */
  101. int tv_format_index;
  102. /**
  103. * This is set if we treat the device as HDMI, instead of DVI.
  104. */
  105. bool is_hdmi;
  106. bool has_hdmi_monitor;
  107. bool has_hdmi_audio;
  108. /**
  109. * This is set if we detect output of sdvo device as LVDS and
  110. * have a valid fixed mode to use with the panel.
  111. */
  112. bool is_lvds;
  113. /**
  114. * This is sdvo fixed pannel mode pointer
  115. */
  116. struct drm_display_mode *sdvo_lvds_fixed_mode;
  117. /* DDC bus used by this SDVO encoder */
  118. uint8_t ddc_bus;
  119. /*
  120. * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
  121. */
  122. uint8_t dtd_sdvo_flags;
  123. };
  124. struct intel_sdvo_connector {
  125. struct intel_connector base;
  126. /* Mark the type of connector */
  127. uint16_t output_flag;
  128. enum hdmi_force_audio force_audio;
  129. /* This contains all current supported TV format */
  130. u8 tv_format_supported[TV_FORMAT_NUM];
  131. int format_supported_num;
  132. struct drm_property *tv_format;
  133. /* add the property for the SDVO-TV */
  134. struct drm_property *left;
  135. struct drm_property *right;
  136. struct drm_property *top;
  137. struct drm_property *bottom;
  138. struct drm_property *hpos;
  139. struct drm_property *vpos;
  140. struct drm_property *contrast;
  141. struct drm_property *saturation;
  142. struct drm_property *hue;
  143. struct drm_property *sharpness;
  144. struct drm_property *flicker_filter;
  145. struct drm_property *flicker_filter_adaptive;
  146. struct drm_property *flicker_filter_2d;
  147. struct drm_property *tv_chroma_filter;
  148. struct drm_property *tv_luma_filter;
  149. struct drm_property *dot_crawl;
  150. /* add the property for the SDVO-TV/LVDS */
  151. struct drm_property *brightness;
  152. /* Add variable to record current setting for the above property */
  153. u32 left_margin, right_margin, top_margin, bottom_margin;
  154. /* this is to get the range of margin.*/
  155. u32 max_hscan, max_vscan;
  156. u32 max_hpos, cur_hpos;
  157. u32 max_vpos, cur_vpos;
  158. u32 cur_brightness, max_brightness;
  159. u32 cur_contrast, max_contrast;
  160. u32 cur_saturation, max_saturation;
  161. u32 cur_hue, max_hue;
  162. u32 cur_sharpness, max_sharpness;
  163. u32 cur_flicker_filter, max_flicker_filter;
  164. u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
  165. u32 cur_flicker_filter_2d, max_flicker_filter_2d;
  166. u32 cur_tv_chroma_filter, max_tv_chroma_filter;
  167. u32 cur_tv_luma_filter, max_tv_luma_filter;
  168. u32 cur_dot_crawl, max_dot_crawl;
  169. };
  170. static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
  171. {
  172. return container_of(encoder, struct intel_sdvo, base.base);
  173. }
  174. static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
  175. {
  176. return container_of(intel_attached_encoder(connector),
  177. struct intel_sdvo, base);
  178. }
  179. static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
  180. {
  181. return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
  182. }
  183. static bool
  184. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
  185. static bool
  186. intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  187. struct intel_sdvo_connector *intel_sdvo_connector,
  188. int type);
  189. static bool
  190. intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  191. struct intel_sdvo_connector *intel_sdvo_connector);
  192. /**
  193. * Writes the SDVOB or SDVOC with the given value, but always writes both
  194. * SDVOB and SDVOC to work around apparent hardware issues (according to
  195. * comments in the BIOS).
  196. */
  197. static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
  198. {
  199. struct drm_device *dev = intel_sdvo->base.base.dev;
  200. struct drm_i915_private *dev_priv = dev->dev_private;
  201. u32 bval = val, cval = val;
  202. int i;
  203. if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
  204. I915_WRITE(intel_sdvo->sdvo_reg, val);
  205. I915_READ(intel_sdvo->sdvo_reg);
  206. return;
  207. }
  208. if (intel_sdvo->sdvo_reg == SDVOB) {
  209. cval = I915_READ(SDVOC);
  210. } else {
  211. bval = I915_READ(SDVOB);
  212. }
  213. /*
  214. * Write the registers twice for luck. Sometimes,
  215. * writing them only once doesn't appear to 'stick'.
  216. * The BIOS does this too. Yay, magic
  217. */
  218. for (i = 0; i < 2; i++)
  219. {
  220. I915_WRITE(SDVOB, bval);
  221. I915_READ(SDVOB);
  222. I915_WRITE(SDVOC, cval);
  223. I915_READ(SDVOC);
  224. }
  225. }
  226. static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
  227. {
  228. struct i2c_msg msgs[] = {
  229. {
  230. .addr = intel_sdvo->slave_addr,
  231. .flags = 0,
  232. .len = 1,
  233. .buf = &addr,
  234. },
  235. {
  236. .addr = intel_sdvo->slave_addr,
  237. .flags = I2C_M_RD,
  238. .len = 1,
  239. .buf = ch,
  240. }
  241. };
  242. int ret;
  243. if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
  244. return true;
  245. DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
  246. return false;
  247. }
  248. #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
  249. /** Mapping of command numbers to names, for debug output */
  250. static const struct _sdvo_cmd_name {
  251. u8 cmd;
  252. const char *name;
  253. } sdvo_cmd_names[] = {
  254. SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
  255. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
  256. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
  257. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
  258. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
  259. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
  260. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
  261. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
  262. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
  263. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
  264. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
  265. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
  266. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
  267. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
  268. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
  269. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
  270. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
  271. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  272. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
  273. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  274. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
  275. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
  276. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
  277. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
  278. SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
  279. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
  280. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
  281. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
  282. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
  283. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
  284. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
  285. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
  286. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
  287. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
  288. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
  289. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
  290. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
  291. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
  292. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
  293. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
  294. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
  295. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
  296. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
  297. /* Add the op code for SDVO enhancements */
  298. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
  299. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
  300. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
  301. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
  302. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
  303. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
  304. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
  305. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
  306. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
  307. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
  308. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
  309. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
  310. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
  311. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
  312. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
  313. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
  314. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
  315. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
  316. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
  317. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
  318. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
  319. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
  320. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
  321. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
  322. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
  323. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
  324. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
  325. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
  326. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
  327. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
  328. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
  329. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
  330. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
  331. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
  332. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
  333. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
  334. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
  335. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
  336. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
  337. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
  338. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
  339. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
  340. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
  341. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
  342. /* HDMI op code */
  343. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
  344. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
  345. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
  346. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
  347. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
  348. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
  349. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
  350. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
  351. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
  352. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
  353. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
  354. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
  355. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
  356. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
  357. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
  358. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
  359. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
  360. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
  361. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
  362. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
  363. };
  364. #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
  365. static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
  366. const void *args, int args_len)
  367. {
  368. int i;
  369. DRM_DEBUG_KMS("%s: W: %02X ",
  370. SDVO_NAME(intel_sdvo), cmd);
  371. for (i = 0; i < args_len; i++)
  372. DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
  373. for (; i < 8; i++)
  374. DRM_LOG_KMS(" ");
  375. for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
  376. if (cmd == sdvo_cmd_names[i].cmd) {
  377. DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
  378. break;
  379. }
  380. }
  381. if (i == ARRAY_SIZE(sdvo_cmd_names))
  382. DRM_LOG_KMS("(%02X)", cmd);
  383. DRM_LOG_KMS("\n");
  384. }
  385. static const char *cmd_status_names[] = {
  386. "Power on",
  387. "Success",
  388. "Not supported",
  389. "Invalid arg",
  390. "Pending",
  391. "Target not specified",
  392. "Scaling not supported"
  393. };
  394. static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
  395. const void *args, int args_len)
  396. {
  397. u8 *buf, status;
  398. struct i2c_msg *msgs;
  399. int i, ret = true;
  400. /* Would be simpler to allocate both in one go ? */
  401. buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
  402. if (!buf)
  403. return false;
  404. msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
  405. if (!msgs) {
  406. kfree(buf);
  407. return false;
  408. }
  409. intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
  410. for (i = 0; i < args_len; i++) {
  411. msgs[i].addr = intel_sdvo->slave_addr;
  412. msgs[i].flags = 0;
  413. msgs[i].len = 2;
  414. msgs[i].buf = buf + 2 *i;
  415. buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
  416. buf[2*i + 1] = ((u8*)args)[i];
  417. }
  418. msgs[i].addr = intel_sdvo->slave_addr;
  419. msgs[i].flags = 0;
  420. msgs[i].len = 2;
  421. msgs[i].buf = buf + 2*i;
  422. buf[2*i + 0] = SDVO_I2C_OPCODE;
  423. buf[2*i + 1] = cmd;
  424. /* the following two are to read the response */
  425. status = SDVO_I2C_CMD_STATUS;
  426. msgs[i+1].addr = intel_sdvo->slave_addr;
  427. msgs[i+1].flags = 0;
  428. msgs[i+1].len = 1;
  429. msgs[i+1].buf = &status;
  430. msgs[i+2].addr = intel_sdvo->slave_addr;
  431. msgs[i+2].flags = I2C_M_RD;
  432. msgs[i+2].len = 1;
  433. msgs[i+2].buf = &status;
  434. ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
  435. if (ret < 0) {
  436. DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
  437. ret = false;
  438. goto out;
  439. }
  440. if (ret != i+3) {
  441. /* failure in I2C transfer */
  442. DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
  443. ret = false;
  444. }
  445. out:
  446. kfree(msgs);
  447. kfree(buf);
  448. return ret;
  449. }
  450. static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
  451. void *response, int response_len)
  452. {
  453. u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
  454. u8 status;
  455. int i;
  456. DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
  457. /*
  458. * The documentation states that all commands will be
  459. * processed within 15µs, and that we need only poll
  460. * the status byte a maximum of 3 times in order for the
  461. * command to be complete.
  462. *
  463. * Check 5 times in case the hardware failed to read the docs.
  464. *
  465. * Also beware that the first response by many devices is to
  466. * reply PENDING and stall for time. TVs are notorious for
  467. * requiring longer than specified to complete their replies.
  468. * Originally (in the DDX long ago), the delay was only ever 15ms
  469. * with an additional delay of 30ms applied for TVs added later after
  470. * many experiments. To accommodate both sets of delays, we do a
  471. * sequence of slow checks if the device is falling behind and fails
  472. * to reply within 5*15µs.
  473. */
  474. if (!intel_sdvo_read_byte(intel_sdvo,
  475. SDVO_I2C_CMD_STATUS,
  476. &status))
  477. goto log_fail;
  478. while (status == SDVO_CMD_STATUS_PENDING && --retry) {
  479. if (retry < 10)
  480. msleep(15);
  481. else
  482. udelay(15);
  483. if (!intel_sdvo_read_byte(intel_sdvo,
  484. SDVO_I2C_CMD_STATUS,
  485. &status))
  486. goto log_fail;
  487. }
  488. if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
  489. DRM_LOG_KMS("(%s)", cmd_status_names[status]);
  490. else
  491. DRM_LOG_KMS("(??? %d)", status);
  492. if (status != SDVO_CMD_STATUS_SUCCESS)
  493. goto log_fail;
  494. /* Read the command response */
  495. for (i = 0; i < response_len; i++) {
  496. if (!intel_sdvo_read_byte(intel_sdvo,
  497. SDVO_I2C_RETURN_0 + i,
  498. &((u8 *)response)[i]))
  499. goto log_fail;
  500. DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
  501. }
  502. DRM_LOG_KMS("\n");
  503. return true;
  504. log_fail:
  505. DRM_LOG_KMS("... failed\n");
  506. return false;
  507. }
  508. static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
  509. {
  510. if (mode->clock >= 100000)
  511. return 1;
  512. else if (mode->clock >= 50000)
  513. return 2;
  514. else
  515. return 4;
  516. }
  517. static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
  518. u8 ddc_bus)
  519. {
  520. /* This must be the immediately preceding write before the i2c xfer */
  521. return intel_sdvo_write_cmd(intel_sdvo,
  522. SDVO_CMD_SET_CONTROL_BUS_SWITCH,
  523. &ddc_bus, 1);
  524. }
  525. static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
  526. {
  527. if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
  528. return false;
  529. return intel_sdvo_read_response(intel_sdvo, NULL, 0);
  530. }
  531. static bool
  532. intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
  533. {
  534. if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
  535. return false;
  536. return intel_sdvo_read_response(intel_sdvo, value, len);
  537. }
  538. static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
  539. {
  540. struct intel_sdvo_set_target_input_args targets = {0};
  541. return intel_sdvo_set_value(intel_sdvo,
  542. SDVO_CMD_SET_TARGET_INPUT,
  543. &targets, sizeof(targets));
  544. }
  545. /**
  546. * Return whether each input is trained.
  547. *
  548. * This function is making an assumption about the layout of the response,
  549. * which should be checked against the docs.
  550. */
  551. static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
  552. {
  553. struct intel_sdvo_get_trained_inputs_response response;
  554. BUILD_BUG_ON(sizeof(response) != 1);
  555. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
  556. &response, sizeof(response)))
  557. return false;
  558. *input_1 = response.input0_trained;
  559. *input_2 = response.input1_trained;
  560. return true;
  561. }
  562. static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
  563. u16 outputs)
  564. {
  565. return intel_sdvo_set_value(intel_sdvo,
  566. SDVO_CMD_SET_ACTIVE_OUTPUTS,
  567. &outputs, sizeof(outputs));
  568. }
  569. static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
  570. u16 *outputs)
  571. {
  572. return intel_sdvo_get_value(intel_sdvo,
  573. SDVO_CMD_GET_ACTIVE_OUTPUTS,
  574. outputs, sizeof(*outputs));
  575. }
  576. static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
  577. int mode)
  578. {
  579. u8 state = SDVO_ENCODER_STATE_ON;
  580. switch (mode) {
  581. case DRM_MODE_DPMS_ON:
  582. state = SDVO_ENCODER_STATE_ON;
  583. break;
  584. case DRM_MODE_DPMS_STANDBY:
  585. state = SDVO_ENCODER_STATE_STANDBY;
  586. break;
  587. case DRM_MODE_DPMS_SUSPEND:
  588. state = SDVO_ENCODER_STATE_SUSPEND;
  589. break;
  590. case DRM_MODE_DPMS_OFF:
  591. state = SDVO_ENCODER_STATE_OFF;
  592. break;
  593. }
  594. return intel_sdvo_set_value(intel_sdvo,
  595. SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
  596. }
  597. static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
  598. int *clock_min,
  599. int *clock_max)
  600. {
  601. struct intel_sdvo_pixel_clock_range clocks;
  602. BUILD_BUG_ON(sizeof(clocks) != 4);
  603. if (!intel_sdvo_get_value(intel_sdvo,
  604. SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
  605. &clocks, sizeof(clocks)))
  606. return false;
  607. /* Convert the values from units of 10 kHz to kHz. */
  608. *clock_min = clocks.min * 10;
  609. *clock_max = clocks.max * 10;
  610. return true;
  611. }
  612. static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
  613. u16 outputs)
  614. {
  615. return intel_sdvo_set_value(intel_sdvo,
  616. SDVO_CMD_SET_TARGET_OUTPUT,
  617. &outputs, sizeof(outputs));
  618. }
  619. static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
  620. struct intel_sdvo_dtd *dtd)
  621. {
  622. return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
  623. intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
  624. }
  625. static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
  626. struct intel_sdvo_dtd *dtd)
  627. {
  628. return intel_sdvo_set_timing(intel_sdvo,
  629. SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
  630. }
  631. static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
  632. struct intel_sdvo_dtd *dtd)
  633. {
  634. return intel_sdvo_set_timing(intel_sdvo,
  635. SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
  636. }
  637. static bool
  638. intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  639. uint16_t clock,
  640. uint16_t width,
  641. uint16_t height)
  642. {
  643. struct intel_sdvo_preferred_input_timing_args args;
  644. memset(&args, 0, sizeof(args));
  645. args.clock = clock;
  646. args.width = width;
  647. args.height = height;
  648. args.interlace = 0;
  649. if (intel_sdvo->is_lvds &&
  650. (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
  651. intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
  652. args.scaled = 1;
  653. return intel_sdvo_set_value(intel_sdvo,
  654. SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
  655. &args, sizeof(args));
  656. }
  657. static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  658. struct intel_sdvo_dtd *dtd)
  659. {
  660. BUILD_BUG_ON(sizeof(dtd->part1) != 8);
  661. BUILD_BUG_ON(sizeof(dtd->part2) != 8);
  662. return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
  663. &dtd->part1, sizeof(dtd->part1)) &&
  664. intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
  665. &dtd->part2, sizeof(dtd->part2));
  666. }
  667. static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
  668. {
  669. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
  670. }
  671. static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
  672. const struct drm_display_mode *mode)
  673. {
  674. uint16_t width, height;
  675. uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
  676. uint16_t h_sync_offset, v_sync_offset;
  677. int mode_clock;
  678. width = mode->hdisplay;
  679. height = mode->vdisplay;
  680. /* do some mode translations */
  681. h_blank_len = mode->htotal - mode->hdisplay;
  682. h_sync_len = mode->hsync_end - mode->hsync_start;
  683. v_blank_len = mode->vtotal - mode->vdisplay;
  684. v_sync_len = mode->vsync_end - mode->vsync_start;
  685. h_sync_offset = mode->hsync_start - mode->hdisplay;
  686. v_sync_offset = mode->vsync_start - mode->vdisplay;
  687. mode_clock = mode->clock;
  688. mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
  689. mode_clock /= 10;
  690. dtd->part1.clock = mode_clock;
  691. dtd->part1.h_active = width & 0xff;
  692. dtd->part1.h_blank = h_blank_len & 0xff;
  693. dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
  694. ((h_blank_len >> 8) & 0xf);
  695. dtd->part1.v_active = height & 0xff;
  696. dtd->part1.v_blank = v_blank_len & 0xff;
  697. dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
  698. ((v_blank_len >> 8) & 0xf);
  699. dtd->part2.h_sync_off = h_sync_offset & 0xff;
  700. dtd->part2.h_sync_width = h_sync_len & 0xff;
  701. dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
  702. (v_sync_len & 0xf);
  703. dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
  704. ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
  705. ((v_sync_len & 0x30) >> 4);
  706. dtd->part2.dtd_flags = 0x18;
  707. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  708. dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
  709. if (mode->flags & DRM_MODE_FLAG_PHSYNC)
  710. dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
  711. if (mode->flags & DRM_MODE_FLAG_PVSYNC)
  712. dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
  713. dtd->part2.sdvo_flags = 0;
  714. dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
  715. dtd->part2.reserved = 0;
  716. }
  717. static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
  718. const struct intel_sdvo_dtd *dtd)
  719. {
  720. mode->hdisplay = dtd->part1.h_active;
  721. mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
  722. mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
  723. mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
  724. mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
  725. mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
  726. mode->htotal = mode->hdisplay + dtd->part1.h_blank;
  727. mode->htotal += (dtd->part1.h_high & 0xf) << 8;
  728. mode->vdisplay = dtd->part1.v_active;
  729. mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
  730. mode->vsync_start = mode->vdisplay;
  731. mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
  732. mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
  733. mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
  734. mode->vsync_end = mode->vsync_start +
  735. (dtd->part2.v_sync_off_width & 0xf);
  736. mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
  737. mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
  738. mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
  739. mode->clock = dtd->part1.clock * 10;
  740. mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
  741. if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
  742. mode->flags |= DRM_MODE_FLAG_INTERLACE;
  743. if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
  744. mode->flags |= DRM_MODE_FLAG_PHSYNC;
  745. if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
  746. mode->flags |= DRM_MODE_FLAG_PVSYNC;
  747. }
  748. static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
  749. {
  750. struct intel_sdvo_encode encode;
  751. BUILD_BUG_ON(sizeof(encode) != 2);
  752. return intel_sdvo_get_value(intel_sdvo,
  753. SDVO_CMD_GET_SUPP_ENCODE,
  754. &encode, sizeof(encode));
  755. }
  756. static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
  757. uint8_t mode)
  758. {
  759. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
  760. }
  761. static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
  762. uint8_t mode)
  763. {
  764. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
  765. }
  766. #if 0
  767. static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
  768. {
  769. int i, j;
  770. uint8_t set_buf_index[2];
  771. uint8_t av_split;
  772. uint8_t buf_size;
  773. uint8_t buf[48];
  774. uint8_t *pos;
  775. intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
  776. for (i = 0; i <= av_split; i++) {
  777. set_buf_index[0] = i; set_buf_index[1] = 0;
  778. intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
  779. set_buf_index, 2);
  780. intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
  781. intel_sdvo_read_response(encoder, &buf_size, 1);
  782. pos = buf;
  783. for (j = 0; j <= buf_size; j += 8) {
  784. intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
  785. NULL, 0);
  786. intel_sdvo_read_response(encoder, pos, 8);
  787. pos += 8;
  788. }
  789. }
  790. }
  791. #endif
  792. static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
  793. unsigned if_index, uint8_t tx_rate,
  794. uint8_t *data, unsigned length)
  795. {
  796. uint8_t set_buf_index[2] = { if_index, 0 };
  797. uint8_t hbuf_size, tmp[8];
  798. int i;
  799. if (!intel_sdvo_set_value(intel_sdvo,
  800. SDVO_CMD_SET_HBUF_INDEX,
  801. set_buf_index, 2))
  802. return false;
  803. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
  804. &hbuf_size, 1))
  805. return false;
  806. /* Buffer size is 0 based, hooray! */
  807. hbuf_size++;
  808. DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
  809. if_index, length, hbuf_size);
  810. for (i = 0; i < hbuf_size; i += 8) {
  811. memset(tmp, 0, 8);
  812. if (i < length)
  813. memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
  814. if (!intel_sdvo_set_value(intel_sdvo,
  815. SDVO_CMD_SET_HBUF_DATA,
  816. tmp, 8))
  817. return false;
  818. }
  819. return intel_sdvo_set_value(intel_sdvo,
  820. SDVO_CMD_SET_HBUF_TXRATE,
  821. &tx_rate, 1);
  822. }
  823. static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
  824. {
  825. struct dip_infoframe avi_if = {
  826. .type = DIP_TYPE_AVI,
  827. .ver = DIP_VERSION_AVI,
  828. .len = DIP_LEN_AVI,
  829. };
  830. uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
  831. intel_dip_infoframe_csum(&avi_if);
  832. /* sdvo spec says that the ecc is handled by the hw, and it looks like
  833. * we must not send the ecc field, either. */
  834. memcpy(sdvo_data, &avi_if, 3);
  835. sdvo_data[3] = avi_if.checksum;
  836. memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
  837. return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
  838. SDVO_HBUF_TX_VSYNC,
  839. sdvo_data, sizeof(sdvo_data));
  840. }
  841. static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
  842. {
  843. struct intel_sdvo_tv_format format;
  844. uint32_t format_map;
  845. format_map = 1 << intel_sdvo->tv_format_index;
  846. memset(&format, 0, sizeof(format));
  847. memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
  848. BUILD_BUG_ON(sizeof(format) != 6);
  849. return intel_sdvo_set_value(intel_sdvo,
  850. SDVO_CMD_SET_TV_FORMAT,
  851. &format, sizeof(format));
  852. }
  853. static bool
  854. intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
  855. const struct drm_display_mode *mode)
  856. {
  857. struct intel_sdvo_dtd output_dtd;
  858. if (!intel_sdvo_set_target_output(intel_sdvo,
  859. intel_sdvo->attached_output))
  860. return false;
  861. intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  862. if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
  863. return false;
  864. return true;
  865. }
  866. /* Asks the sdvo controller for the preferred input mode given the output mode.
  867. * Unfortunately we have to set up the full output mode to do that. */
  868. static bool
  869. intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
  870. const struct drm_display_mode *mode,
  871. struct drm_display_mode *adjusted_mode)
  872. {
  873. struct intel_sdvo_dtd input_dtd;
  874. /* Reset the input timing to the screen. Assume always input 0. */
  875. if (!intel_sdvo_set_target_input(intel_sdvo))
  876. return false;
  877. if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
  878. mode->clock / 10,
  879. mode->hdisplay,
  880. mode->vdisplay))
  881. return false;
  882. if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
  883. &input_dtd))
  884. return false;
  885. intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
  886. intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
  887. return true;
  888. }
  889. static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
  890. const struct drm_display_mode *mode,
  891. struct drm_display_mode *adjusted_mode)
  892. {
  893. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  894. int multiplier;
  895. /* We need to construct preferred input timings based on our
  896. * output timings. To do that, we have to set the output
  897. * timings, even though this isn't really the right place in
  898. * the sequence to do it. Oh well.
  899. */
  900. if (intel_sdvo->is_tv) {
  901. if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
  902. return false;
  903. (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
  904. mode,
  905. adjusted_mode);
  906. } else if (intel_sdvo->is_lvds) {
  907. if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
  908. intel_sdvo->sdvo_lvds_fixed_mode))
  909. return false;
  910. (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
  911. mode,
  912. adjusted_mode);
  913. }
  914. /* Make the CRTC code factor in the SDVO pixel multiplier. The
  915. * SDVO device will factor out the multiplier during mode_set.
  916. */
  917. multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
  918. intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
  919. return true;
  920. }
  921. static void intel_sdvo_mode_set(struct drm_encoder *encoder,
  922. struct drm_display_mode *mode,
  923. struct drm_display_mode *adjusted_mode)
  924. {
  925. struct drm_device *dev = encoder->dev;
  926. struct drm_i915_private *dev_priv = dev->dev_private;
  927. struct drm_crtc *crtc = encoder->crtc;
  928. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  929. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  930. u32 sdvox;
  931. struct intel_sdvo_in_out_map in_out;
  932. struct intel_sdvo_dtd input_dtd, output_dtd;
  933. int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
  934. int rate;
  935. if (!mode)
  936. return;
  937. /* First, set the input mapping for the first input to our controlled
  938. * output. This is only correct if we're a single-input device, in
  939. * which case the first input is the output from the appropriate SDVO
  940. * channel on the motherboard. In a two-input device, the first input
  941. * will be SDVOB and the second SDVOC.
  942. */
  943. in_out.in0 = intel_sdvo->attached_output;
  944. in_out.in1 = 0;
  945. intel_sdvo_set_value(intel_sdvo,
  946. SDVO_CMD_SET_IN_OUT_MAP,
  947. &in_out, sizeof(in_out));
  948. /* Set the output timings to the screen */
  949. if (!intel_sdvo_set_target_output(intel_sdvo,
  950. intel_sdvo->attached_output))
  951. return;
  952. /* lvds has a special fixed output timing. */
  953. if (intel_sdvo->is_lvds)
  954. intel_sdvo_get_dtd_from_mode(&output_dtd,
  955. intel_sdvo->sdvo_lvds_fixed_mode);
  956. else
  957. intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  958. if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
  959. DRM_INFO("Setting output timings on %s failed\n",
  960. SDVO_NAME(intel_sdvo));
  961. /* Set the input timing to the screen. Assume always input 0. */
  962. if (!intel_sdvo_set_target_input(intel_sdvo))
  963. return;
  964. if (intel_sdvo->has_hdmi_monitor) {
  965. intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
  966. intel_sdvo_set_colorimetry(intel_sdvo,
  967. SDVO_COLORIMETRY_RGB256);
  968. intel_sdvo_set_avi_infoframe(intel_sdvo);
  969. } else
  970. intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
  971. if (intel_sdvo->is_tv &&
  972. !intel_sdvo_set_tv_format(intel_sdvo))
  973. return;
  974. /* We have tried to get input timing in mode_fixup, and filled into
  975. * adjusted_mode.
  976. */
  977. intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
  978. if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
  979. input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
  980. if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
  981. DRM_INFO("Setting input timings on %s failed\n",
  982. SDVO_NAME(intel_sdvo));
  983. switch (pixel_multiplier) {
  984. default:
  985. case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
  986. case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
  987. case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
  988. }
  989. if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
  990. return;
  991. /* Set the SDVO control regs. */
  992. if (INTEL_INFO(dev)->gen >= 4) {
  993. /* The real mode polarity is set by the SDVO commands, using
  994. * struct intel_sdvo_dtd. */
  995. sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
  996. if (intel_sdvo->is_hdmi)
  997. sdvox |= intel_sdvo->color_range;
  998. if (INTEL_INFO(dev)->gen < 5)
  999. sdvox |= SDVO_BORDER_ENABLE;
  1000. } else {
  1001. sdvox = I915_READ(intel_sdvo->sdvo_reg);
  1002. switch (intel_sdvo->sdvo_reg) {
  1003. case SDVOB:
  1004. sdvox &= SDVOB_PRESERVE_MASK;
  1005. break;
  1006. case SDVOC:
  1007. sdvox &= SDVOC_PRESERVE_MASK;
  1008. break;
  1009. }
  1010. sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
  1011. }
  1012. if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
  1013. sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
  1014. else
  1015. sdvox |= TRANSCODER(intel_crtc->pipe);
  1016. if (intel_sdvo->has_hdmi_audio)
  1017. sdvox |= SDVO_AUDIO_ENABLE;
  1018. if (INTEL_INFO(dev)->gen >= 4) {
  1019. /* done in crtc_mode_set as the dpll_md reg must be written early */
  1020. } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
  1021. /* done in crtc_mode_set as it lives inside the dpll register */
  1022. } else {
  1023. sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
  1024. }
  1025. if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
  1026. INTEL_INFO(dev)->gen < 5)
  1027. sdvox |= SDVO_STALL_SELECT;
  1028. intel_sdvo_write_sdvox(intel_sdvo, sdvox);
  1029. }
  1030. static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
  1031. {
  1032. struct intel_sdvo_connector *intel_sdvo_connector =
  1033. to_intel_sdvo_connector(&connector->base);
  1034. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
  1035. u16 active_outputs;
  1036. intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
  1037. if (active_outputs & intel_sdvo_connector->output_flag)
  1038. return true;
  1039. else
  1040. return false;
  1041. }
  1042. static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
  1043. enum pipe *pipe)
  1044. {
  1045. struct drm_device *dev = encoder->base.dev;
  1046. struct drm_i915_private *dev_priv = dev->dev_private;
  1047. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1048. u32 tmp;
  1049. tmp = I915_READ(intel_sdvo->sdvo_reg);
  1050. if (!(tmp & SDVO_ENABLE))
  1051. return false;
  1052. if (HAS_PCH_CPT(dev))
  1053. *pipe = PORT_TO_PIPE_CPT(tmp);
  1054. else
  1055. *pipe = PORT_TO_PIPE(tmp);
  1056. return true;
  1057. }
  1058. static void intel_disable_sdvo(struct intel_encoder *encoder)
  1059. {
  1060. struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  1061. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1062. u32 temp;
  1063. intel_sdvo_set_active_outputs(intel_sdvo, 0);
  1064. if (0)
  1065. intel_sdvo_set_encoder_power_state(intel_sdvo,
  1066. DRM_MODE_DPMS_OFF);
  1067. temp = I915_READ(intel_sdvo->sdvo_reg);
  1068. if ((temp & SDVO_ENABLE) != 0) {
  1069. /* HW workaround for IBX, we need to move the port to
  1070. * transcoder A before disabling it. */
  1071. if (HAS_PCH_IBX(encoder->base.dev)) {
  1072. struct drm_crtc *crtc = encoder->base.crtc;
  1073. int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
  1074. if (temp & SDVO_PIPE_B_SELECT) {
  1075. temp &= ~SDVO_PIPE_B_SELECT;
  1076. I915_WRITE(intel_sdvo->sdvo_reg, temp);
  1077. POSTING_READ(intel_sdvo->sdvo_reg);
  1078. /* Again we need to write this twice. */
  1079. I915_WRITE(intel_sdvo->sdvo_reg, temp);
  1080. POSTING_READ(intel_sdvo->sdvo_reg);
  1081. /* Transcoder selection bits only update
  1082. * effectively on vblank. */
  1083. if (crtc)
  1084. intel_wait_for_vblank(encoder->base.dev, pipe);
  1085. else
  1086. msleep(50);
  1087. }
  1088. }
  1089. intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
  1090. }
  1091. }
  1092. static void intel_enable_sdvo(struct intel_encoder *encoder)
  1093. {
  1094. struct drm_device *dev = encoder->base.dev;
  1095. struct drm_i915_private *dev_priv = dev->dev_private;
  1096. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1097. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  1098. u32 temp;
  1099. bool input1, input2;
  1100. int i;
  1101. u8 status;
  1102. temp = I915_READ(intel_sdvo->sdvo_reg);
  1103. if ((temp & SDVO_ENABLE) == 0) {
  1104. /* HW workaround for IBX, we need to move the port
  1105. * to transcoder A before disabling it. */
  1106. if (HAS_PCH_IBX(dev)) {
  1107. struct drm_crtc *crtc = encoder->base.crtc;
  1108. int pipe = crtc ? to_intel_crtc(crtc)->pipe : -1;
  1109. /* Restore the transcoder select bit. */
  1110. if (pipe == PIPE_B)
  1111. temp |= SDVO_PIPE_B_SELECT;
  1112. }
  1113. intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
  1114. }
  1115. for (i = 0; i < 2; i++)
  1116. intel_wait_for_vblank(dev, intel_crtc->pipe);
  1117. status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
  1118. /* Warn if the device reported failure to sync.
  1119. * A lot of SDVO devices fail to notify of sync, but it's
  1120. * a given it the status is a success, we succeeded.
  1121. */
  1122. if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
  1123. DRM_DEBUG_KMS("First %s output reported failure to "
  1124. "sync\n", SDVO_NAME(intel_sdvo));
  1125. }
  1126. if (0)
  1127. intel_sdvo_set_encoder_power_state(intel_sdvo,
  1128. DRM_MODE_DPMS_ON);
  1129. intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
  1130. }
  1131. static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
  1132. {
  1133. struct drm_crtc *crtc;
  1134. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1135. /* dvo supports only 2 dpms states. */
  1136. if (mode != DRM_MODE_DPMS_ON)
  1137. mode = DRM_MODE_DPMS_OFF;
  1138. if (mode == connector->dpms)
  1139. return;
  1140. connector->dpms = mode;
  1141. /* Only need to change hw state when actually enabled */
  1142. crtc = intel_sdvo->base.base.crtc;
  1143. if (!crtc) {
  1144. intel_sdvo->base.connectors_active = false;
  1145. return;
  1146. }
  1147. if (mode != DRM_MODE_DPMS_ON) {
  1148. intel_sdvo_set_active_outputs(intel_sdvo, 0);
  1149. if (0)
  1150. intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  1151. intel_sdvo->base.connectors_active = false;
  1152. intel_crtc_update_dpms(crtc);
  1153. } else {
  1154. intel_sdvo->base.connectors_active = true;
  1155. intel_crtc_update_dpms(crtc);
  1156. if (0)
  1157. intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  1158. intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
  1159. }
  1160. intel_modeset_check_state(connector->dev);
  1161. }
  1162. static int intel_sdvo_mode_valid(struct drm_connector *connector,
  1163. struct drm_display_mode *mode)
  1164. {
  1165. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1166. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  1167. return MODE_NO_DBLESCAN;
  1168. if (intel_sdvo->pixel_clock_min > mode->clock)
  1169. return MODE_CLOCK_LOW;
  1170. if (intel_sdvo->pixel_clock_max < mode->clock)
  1171. return MODE_CLOCK_HIGH;
  1172. if (intel_sdvo->is_lvds) {
  1173. if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
  1174. return MODE_PANEL;
  1175. if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
  1176. return MODE_PANEL;
  1177. }
  1178. return MODE_OK;
  1179. }
  1180. static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
  1181. {
  1182. BUILD_BUG_ON(sizeof(*caps) != 8);
  1183. if (!intel_sdvo_get_value(intel_sdvo,
  1184. SDVO_CMD_GET_DEVICE_CAPS,
  1185. caps, sizeof(*caps)))
  1186. return false;
  1187. DRM_DEBUG_KMS("SDVO capabilities:\n"
  1188. " vendor_id: %d\n"
  1189. " device_id: %d\n"
  1190. " device_rev_id: %d\n"
  1191. " sdvo_version_major: %d\n"
  1192. " sdvo_version_minor: %d\n"
  1193. " sdvo_inputs_mask: %d\n"
  1194. " smooth_scaling: %d\n"
  1195. " sharp_scaling: %d\n"
  1196. " up_scaling: %d\n"
  1197. " down_scaling: %d\n"
  1198. " stall_support: %d\n"
  1199. " output_flags: %d\n",
  1200. caps->vendor_id,
  1201. caps->device_id,
  1202. caps->device_rev_id,
  1203. caps->sdvo_version_major,
  1204. caps->sdvo_version_minor,
  1205. caps->sdvo_inputs_mask,
  1206. caps->smooth_scaling,
  1207. caps->sharp_scaling,
  1208. caps->up_scaling,
  1209. caps->down_scaling,
  1210. caps->stall_support,
  1211. caps->output_flags);
  1212. return true;
  1213. }
  1214. static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
  1215. {
  1216. struct drm_device *dev = intel_sdvo->base.base.dev;
  1217. uint16_t hotplug;
  1218. /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
  1219. * on the line. */
  1220. if (IS_I945G(dev) || IS_I945GM(dev))
  1221. return 0;
  1222. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
  1223. &hotplug, sizeof(hotplug)))
  1224. return 0;
  1225. return hotplug;
  1226. }
  1227. static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
  1228. {
  1229. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1230. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
  1231. &intel_sdvo->hotplug_active, 2);
  1232. }
  1233. static bool
  1234. intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
  1235. {
  1236. /* Is there more than one type of output? */
  1237. return hweight16(intel_sdvo->caps.output_flags) > 1;
  1238. }
  1239. static struct edid *
  1240. intel_sdvo_get_edid(struct drm_connector *connector)
  1241. {
  1242. struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
  1243. return drm_get_edid(connector, &sdvo->ddc);
  1244. }
  1245. /* Mac mini hack -- use the same DDC as the analog connector */
  1246. static struct edid *
  1247. intel_sdvo_get_analog_edid(struct drm_connector *connector)
  1248. {
  1249. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1250. return drm_get_edid(connector,
  1251. intel_gmbus_get_adapter(dev_priv,
  1252. dev_priv->crt_ddc_pin));
  1253. }
  1254. static enum drm_connector_status
  1255. intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
  1256. {
  1257. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1258. enum drm_connector_status status;
  1259. struct edid *edid;
  1260. edid = intel_sdvo_get_edid(connector);
  1261. if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
  1262. u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
  1263. /*
  1264. * Don't use the 1 as the argument of DDC bus switch to get
  1265. * the EDID. It is used for SDVO SPD ROM.
  1266. */
  1267. for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
  1268. intel_sdvo->ddc_bus = ddc;
  1269. edid = intel_sdvo_get_edid(connector);
  1270. if (edid)
  1271. break;
  1272. }
  1273. /*
  1274. * If we found the EDID on the other bus,
  1275. * assume that is the correct DDC bus.
  1276. */
  1277. if (edid == NULL)
  1278. intel_sdvo->ddc_bus = saved_ddc;
  1279. }
  1280. /*
  1281. * When there is no edid and no monitor is connected with VGA
  1282. * port, try to use the CRT ddc to read the EDID for DVI-connector.
  1283. */
  1284. if (edid == NULL)
  1285. edid = intel_sdvo_get_analog_edid(connector);
  1286. status = connector_status_unknown;
  1287. if (edid != NULL) {
  1288. /* DDC bus is shared, match EDID to connector type */
  1289. if (edid->input & DRM_EDID_INPUT_DIGITAL) {
  1290. status = connector_status_connected;
  1291. if (intel_sdvo->is_hdmi) {
  1292. intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
  1293. intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
  1294. }
  1295. } else
  1296. status = connector_status_disconnected;
  1297. kfree(edid);
  1298. }
  1299. if (status == connector_status_connected) {
  1300. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1301. if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
  1302. intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
  1303. }
  1304. return status;
  1305. }
  1306. static bool
  1307. intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
  1308. struct edid *edid)
  1309. {
  1310. bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
  1311. bool connector_is_digital = !!IS_DIGITAL(sdvo);
  1312. DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
  1313. connector_is_digital, monitor_is_digital);
  1314. return connector_is_digital == monitor_is_digital;
  1315. }
  1316. static enum drm_connector_status
  1317. intel_sdvo_detect(struct drm_connector *connector, bool force)
  1318. {
  1319. uint16_t response;
  1320. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1321. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1322. enum drm_connector_status ret;
  1323. if (!intel_sdvo_get_value(intel_sdvo,
  1324. SDVO_CMD_GET_ATTACHED_DISPLAYS,
  1325. &response, 2))
  1326. return connector_status_unknown;
  1327. DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
  1328. response & 0xff, response >> 8,
  1329. intel_sdvo_connector->output_flag);
  1330. if (response == 0)
  1331. return connector_status_disconnected;
  1332. intel_sdvo->attached_output = response;
  1333. intel_sdvo->has_hdmi_monitor = false;
  1334. intel_sdvo->has_hdmi_audio = false;
  1335. if ((intel_sdvo_connector->output_flag & response) == 0)
  1336. ret = connector_status_disconnected;
  1337. else if (IS_TMDS(intel_sdvo_connector))
  1338. ret = intel_sdvo_tmds_sink_detect(connector);
  1339. else {
  1340. struct edid *edid;
  1341. /* if we have an edid check it matches the connection */
  1342. edid = intel_sdvo_get_edid(connector);
  1343. if (edid == NULL)
  1344. edid = intel_sdvo_get_analog_edid(connector);
  1345. if (edid != NULL) {
  1346. if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
  1347. edid))
  1348. ret = connector_status_connected;
  1349. else
  1350. ret = connector_status_disconnected;
  1351. kfree(edid);
  1352. } else
  1353. ret = connector_status_connected;
  1354. }
  1355. /* May update encoder flag for like clock for SDVO TV, etc.*/
  1356. if (ret == connector_status_connected) {
  1357. intel_sdvo->is_tv = false;
  1358. intel_sdvo->is_lvds = false;
  1359. intel_sdvo->base.needs_tv_clock = false;
  1360. if (response & SDVO_TV_MASK) {
  1361. intel_sdvo->is_tv = true;
  1362. intel_sdvo->base.needs_tv_clock = true;
  1363. }
  1364. if (response & SDVO_LVDS_MASK)
  1365. intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
  1366. }
  1367. return ret;
  1368. }
  1369. static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
  1370. {
  1371. struct edid *edid;
  1372. /* set the bus switch and get the modes */
  1373. edid = intel_sdvo_get_edid(connector);
  1374. /*
  1375. * Mac mini hack. On this device, the DVI-I connector shares one DDC
  1376. * link between analog and digital outputs. So, if the regular SDVO
  1377. * DDC fails, check to see if the analog output is disconnected, in
  1378. * which case we'll look there for the digital DDC data.
  1379. */
  1380. if (edid == NULL)
  1381. edid = intel_sdvo_get_analog_edid(connector);
  1382. if (edid != NULL) {
  1383. if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
  1384. edid)) {
  1385. drm_mode_connector_update_edid_property(connector, edid);
  1386. drm_add_edid_modes(connector, edid);
  1387. }
  1388. kfree(edid);
  1389. }
  1390. }
  1391. /*
  1392. * Set of SDVO TV modes.
  1393. * Note! This is in reply order (see loop in get_tv_modes).
  1394. * XXX: all 60Hz refresh?
  1395. */
  1396. static const struct drm_display_mode sdvo_tv_modes[] = {
  1397. { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
  1398. 416, 0, 200, 201, 232, 233, 0,
  1399. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1400. { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
  1401. 416, 0, 240, 241, 272, 273, 0,
  1402. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1403. { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
  1404. 496, 0, 300, 301, 332, 333, 0,
  1405. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1406. { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
  1407. 736, 0, 350, 351, 382, 383, 0,
  1408. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1409. { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
  1410. 736, 0, 400, 401, 432, 433, 0,
  1411. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1412. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
  1413. 736, 0, 480, 481, 512, 513, 0,
  1414. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1415. { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
  1416. 800, 0, 480, 481, 512, 513, 0,
  1417. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1418. { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
  1419. 800, 0, 576, 577, 608, 609, 0,
  1420. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1421. { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
  1422. 816, 0, 350, 351, 382, 383, 0,
  1423. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1424. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
  1425. 816, 0, 400, 401, 432, 433, 0,
  1426. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1427. { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
  1428. 816, 0, 480, 481, 512, 513, 0,
  1429. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1430. { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
  1431. 816, 0, 540, 541, 572, 573, 0,
  1432. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1433. { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
  1434. 816, 0, 576, 577, 608, 609, 0,
  1435. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1436. { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
  1437. 864, 0, 576, 577, 608, 609, 0,
  1438. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1439. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
  1440. 896, 0, 600, 601, 632, 633, 0,
  1441. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1442. { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
  1443. 928, 0, 624, 625, 656, 657, 0,
  1444. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1445. { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
  1446. 1016, 0, 766, 767, 798, 799, 0,
  1447. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1448. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
  1449. 1120, 0, 768, 769, 800, 801, 0,
  1450. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1451. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
  1452. 1376, 0, 1024, 1025, 1056, 1057, 0,
  1453. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1454. };
  1455. static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
  1456. {
  1457. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1458. struct intel_sdvo_sdtv_resolution_request tv_res;
  1459. uint32_t reply = 0, format_map = 0;
  1460. int i;
  1461. /* Read the list of supported input resolutions for the selected TV
  1462. * format.
  1463. */
  1464. format_map = 1 << intel_sdvo->tv_format_index;
  1465. memcpy(&tv_res, &format_map,
  1466. min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
  1467. if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
  1468. return;
  1469. BUILD_BUG_ON(sizeof(tv_res) != 3);
  1470. if (!intel_sdvo_write_cmd(intel_sdvo,
  1471. SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
  1472. &tv_res, sizeof(tv_res)))
  1473. return;
  1474. if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
  1475. return;
  1476. for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
  1477. if (reply & (1 << i)) {
  1478. struct drm_display_mode *nmode;
  1479. nmode = drm_mode_duplicate(connector->dev,
  1480. &sdvo_tv_modes[i]);
  1481. if (nmode)
  1482. drm_mode_probed_add(connector, nmode);
  1483. }
  1484. }
  1485. static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
  1486. {
  1487. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1488. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1489. struct drm_display_mode *newmode;
  1490. /*
  1491. * Attempt to get the mode list from DDC.
  1492. * Assume that the preferred modes are
  1493. * arranged in priority order.
  1494. */
  1495. intel_ddc_get_modes(connector, intel_sdvo->i2c);
  1496. if (list_empty(&connector->probed_modes) == false)
  1497. goto end;
  1498. /* Fetch modes from VBT */
  1499. if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
  1500. newmode = drm_mode_duplicate(connector->dev,
  1501. dev_priv->sdvo_lvds_vbt_mode);
  1502. if (newmode != NULL) {
  1503. /* Guarantee the mode is preferred */
  1504. newmode->type = (DRM_MODE_TYPE_PREFERRED |
  1505. DRM_MODE_TYPE_DRIVER);
  1506. drm_mode_probed_add(connector, newmode);
  1507. }
  1508. }
  1509. end:
  1510. list_for_each_entry(newmode, &connector->probed_modes, head) {
  1511. if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
  1512. intel_sdvo->sdvo_lvds_fixed_mode =
  1513. drm_mode_duplicate(connector->dev, newmode);
  1514. intel_sdvo->is_lvds = true;
  1515. break;
  1516. }
  1517. }
  1518. }
  1519. static int intel_sdvo_get_modes(struct drm_connector *connector)
  1520. {
  1521. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1522. if (IS_TV(intel_sdvo_connector))
  1523. intel_sdvo_get_tv_modes(connector);
  1524. else if (IS_LVDS(intel_sdvo_connector))
  1525. intel_sdvo_get_lvds_modes(connector);
  1526. else
  1527. intel_sdvo_get_ddc_modes(connector);
  1528. return !list_empty(&connector->probed_modes);
  1529. }
  1530. static void
  1531. intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
  1532. {
  1533. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1534. struct drm_device *dev = connector->dev;
  1535. if (intel_sdvo_connector->left)
  1536. drm_property_destroy(dev, intel_sdvo_connector->left);
  1537. if (intel_sdvo_connector->right)
  1538. drm_property_destroy(dev, intel_sdvo_connector->right);
  1539. if (intel_sdvo_connector->top)
  1540. drm_property_destroy(dev, intel_sdvo_connector->top);
  1541. if (intel_sdvo_connector->bottom)
  1542. drm_property_destroy(dev, intel_sdvo_connector->bottom);
  1543. if (intel_sdvo_connector->hpos)
  1544. drm_property_destroy(dev, intel_sdvo_connector->hpos);
  1545. if (intel_sdvo_connector->vpos)
  1546. drm_property_destroy(dev, intel_sdvo_connector->vpos);
  1547. if (intel_sdvo_connector->saturation)
  1548. drm_property_destroy(dev, intel_sdvo_connector->saturation);
  1549. if (intel_sdvo_connector->contrast)
  1550. drm_property_destroy(dev, intel_sdvo_connector->contrast);
  1551. if (intel_sdvo_connector->hue)
  1552. drm_property_destroy(dev, intel_sdvo_connector->hue);
  1553. if (intel_sdvo_connector->sharpness)
  1554. drm_property_destroy(dev, intel_sdvo_connector->sharpness);
  1555. if (intel_sdvo_connector->flicker_filter)
  1556. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
  1557. if (intel_sdvo_connector->flicker_filter_2d)
  1558. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
  1559. if (intel_sdvo_connector->flicker_filter_adaptive)
  1560. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
  1561. if (intel_sdvo_connector->tv_luma_filter)
  1562. drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
  1563. if (intel_sdvo_connector->tv_chroma_filter)
  1564. drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
  1565. if (intel_sdvo_connector->dot_crawl)
  1566. drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
  1567. if (intel_sdvo_connector->brightness)
  1568. drm_property_destroy(dev, intel_sdvo_connector->brightness);
  1569. }
  1570. static void intel_sdvo_destroy(struct drm_connector *connector)
  1571. {
  1572. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1573. if (intel_sdvo_connector->tv_format)
  1574. drm_property_destroy(connector->dev,
  1575. intel_sdvo_connector->tv_format);
  1576. intel_sdvo_destroy_enhance_property(connector);
  1577. drm_sysfs_connector_remove(connector);
  1578. drm_connector_cleanup(connector);
  1579. kfree(intel_sdvo_connector);
  1580. }
  1581. static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
  1582. {
  1583. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1584. struct edid *edid;
  1585. bool has_audio = false;
  1586. if (!intel_sdvo->is_hdmi)
  1587. return false;
  1588. edid = intel_sdvo_get_edid(connector);
  1589. if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
  1590. has_audio = drm_detect_monitor_audio(edid);
  1591. kfree(edid);
  1592. return has_audio;
  1593. }
  1594. static int
  1595. intel_sdvo_set_property(struct drm_connector *connector,
  1596. struct drm_property *property,
  1597. uint64_t val)
  1598. {
  1599. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1600. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1601. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1602. uint16_t temp_value;
  1603. uint8_t cmd;
  1604. int ret;
  1605. ret = drm_object_property_set_value(&connector->base, property, val);
  1606. if (ret)
  1607. return ret;
  1608. if (property == dev_priv->force_audio_property) {
  1609. int i = val;
  1610. bool has_audio;
  1611. if (i == intel_sdvo_connector->force_audio)
  1612. return 0;
  1613. intel_sdvo_connector->force_audio = i;
  1614. if (i == HDMI_AUDIO_AUTO)
  1615. has_audio = intel_sdvo_detect_hdmi_audio(connector);
  1616. else
  1617. has_audio = (i == HDMI_AUDIO_ON);
  1618. if (has_audio == intel_sdvo->has_hdmi_audio)
  1619. return 0;
  1620. intel_sdvo->has_hdmi_audio = has_audio;
  1621. goto done;
  1622. }
  1623. if (property == dev_priv->broadcast_rgb_property) {
  1624. if (val == !!intel_sdvo->color_range)
  1625. return 0;
  1626. intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
  1627. goto done;
  1628. }
  1629. #define CHECK_PROPERTY(name, NAME) \
  1630. if (intel_sdvo_connector->name == property) { \
  1631. if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
  1632. if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
  1633. cmd = SDVO_CMD_SET_##NAME; \
  1634. intel_sdvo_connector->cur_##name = temp_value; \
  1635. goto set_value; \
  1636. }
  1637. if (property == intel_sdvo_connector->tv_format) {
  1638. if (val >= TV_FORMAT_NUM)
  1639. return -EINVAL;
  1640. if (intel_sdvo->tv_format_index ==
  1641. intel_sdvo_connector->tv_format_supported[val])
  1642. return 0;
  1643. intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
  1644. goto done;
  1645. } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
  1646. temp_value = val;
  1647. if (intel_sdvo_connector->left == property) {
  1648. drm_object_property_set_value(&connector->base,
  1649. intel_sdvo_connector->right, val);
  1650. if (intel_sdvo_connector->left_margin == temp_value)
  1651. return 0;
  1652. intel_sdvo_connector->left_margin = temp_value;
  1653. intel_sdvo_connector->right_margin = temp_value;
  1654. temp_value = intel_sdvo_connector->max_hscan -
  1655. intel_sdvo_connector->left_margin;
  1656. cmd = SDVO_CMD_SET_OVERSCAN_H;
  1657. goto set_value;
  1658. } else if (intel_sdvo_connector->right == property) {
  1659. drm_object_property_set_value(&connector->base,
  1660. intel_sdvo_connector->left, val);
  1661. if (intel_sdvo_connector->right_margin == temp_value)
  1662. return 0;
  1663. intel_sdvo_connector->left_margin = temp_value;
  1664. intel_sdvo_connector->right_margin = temp_value;
  1665. temp_value = intel_sdvo_connector->max_hscan -
  1666. intel_sdvo_connector->left_margin;
  1667. cmd = SDVO_CMD_SET_OVERSCAN_H;
  1668. goto set_value;
  1669. } else if (intel_sdvo_connector->top == property) {
  1670. drm_object_property_set_value(&connector->base,
  1671. intel_sdvo_connector->bottom, val);
  1672. if (intel_sdvo_connector->top_margin == temp_value)
  1673. return 0;
  1674. intel_sdvo_connector->top_margin = temp_value;
  1675. intel_sdvo_connector->bottom_margin = temp_value;
  1676. temp_value = intel_sdvo_connector->max_vscan -
  1677. intel_sdvo_connector->top_margin;
  1678. cmd = SDVO_CMD_SET_OVERSCAN_V;
  1679. goto set_value;
  1680. } else if (intel_sdvo_connector->bottom == property) {
  1681. drm_object_property_set_value(&connector->base,
  1682. intel_sdvo_connector->top, val);
  1683. if (intel_sdvo_connector->bottom_margin == temp_value)
  1684. return 0;
  1685. intel_sdvo_connector->top_margin = temp_value;
  1686. intel_sdvo_connector->bottom_margin = temp_value;
  1687. temp_value = intel_sdvo_connector->max_vscan -
  1688. intel_sdvo_connector->top_margin;
  1689. cmd = SDVO_CMD_SET_OVERSCAN_V;
  1690. goto set_value;
  1691. }
  1692. CHECK_PROPERTY(hpos, HPOS)
  1693. CHECK_PROPERTY(vpos, VPOS)
  1694. CHECK_PROPERTY(saturation, SATURATION)
  1695. CHECK_PROPERTY(contrast, CONTRAST)
  1696. CHECK_PROPERTY(hue, HUE)
  1697. CHECK_PROPERTY(brightness, BRIGHTNESS)
  1698. CHECK_PROPERTY(sharpness, SHARPNESS)
  1699. CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
  1700. CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
  1701. CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
  1702. CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
  1703. CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
  1704. CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
  1705. }
  1706. return -EINVAL; /* unknown property */
  1707. set_value:
  1708. if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
  1709. return -EIO;
  1710. done:
  1711. if (intel_sdvo->base.base.crtc) {
  1712. struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
  1713. intel_set_mode(crtc, &crtc->mode,
  1714. crtc->x, crtc->y, crtc->fb);
  1715. }
  1716. return 0;
  1717. #undef CHECK_PROPERTY
  1718. }
  1719. static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
  1720. .mode_fixup = intel_sdvo_mode_fixup,
  1721. .mode_set = intel_sdvo_mode_set,
  1722. .disable = intel_encoder_noop,
  1723. };
  1724. static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
  1725. .dpms = intel_sdvo_dpms,
  1726. .detect = intel_sdvo_detect,
  1727. .fill_modes = drm_helper_probe_single_connector_modes,
  1728. .set_property = intel_sdvo_set_property,
  1729. .destroy = intel_sdvo_destroy,
  1730. };
  1731. static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
  1732. .get_modes = intel_sdvo_get_modes,
  1733. .mode_valid = intel_sdvo_mode_valid,
  1734. .best_encoder = intel_best_encoder,
  1735. };
  1736. static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
  1737. {
  1738. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  1739. if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
  1740. drm_mode_destroy(encoder->dev,
  1741. intel_sdvo->sdvo_lvds_fixed_mode);
  1742. i2c_del_adapter(&intel_sdvo->ddc);
  1743. intel_encoder_destroy(encoder);
  1744. }
  1745. static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
  1746. .destroy = intel_sdvo_enc_destroy,
  1747. };
  1748. static void
  1749. intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
  1750. {
  1751. uint16_t mask = 0;
  1752. unsigned int num_bits;
  1753. /* Make a mask of outputs less than or equal to our own priority in the
  1754. * list.
  1755. */
  1756. switch (sdvo->controlled_output) {
  1757. case SDVO_OUTPUT_LVDS1:
  1758. mask |= SDVO_OUTPUT_LVDS1;
  1759. case SDVO_OUTPUT_LVDS0:
  1760. mask |= SDVO_OUTPUT_LVDS0;
  1761. case SDVO_OUTPUT_TMDS1:
  1762. mask |= SDVO_OUTPUT_TMDS1;
  1763. case SDVO_OUTPUT_TMDS0:
  1764. mask |= SDVO_OUTPUT_TMDS0;
  1765. case SDVO_OUTPUT_RGB1:
  1766. mask |= SDVO_OUTPUT_RGB1;
  1767. case SDVO_OUTPUT_RGB0:
  1768. mask |= SDVO_OUTPUT_RGB0;
  1769. break;
  1770. }
  1771. /* Count bits to find what number we are in the priority list. */
  1772. mask &= sdvo->caps.output_flags;
  1773. num_bits = hweight16(mask);
  1774. /* If more than 3 outputs, default to DDC bus 3 for now. */
  1775. if (num_bits > 3)
  1776. num_bits = 3;
  1777. /* Corresponds to SDVO_CONTROL_BUS_DDCx */
  1778. sdvo->ddc_bus = 1 << num_bits;
  1779. }
  1780. /**
  1781. * Choose the appropriate DDC bus for control bus switch command for this
  1782. * SDVO output based on the controlled output.
  1783. *
  1784. * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
  1785. * outputs, then LVDS outputs.
  1786. */
  1787. static void
  1788. intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
  1789. struct intel_sdvo *sdvo, u32 reg)
  1790. {
  1791. struct sdvo_device_mapping *mapping;
  1792. if (sdvo->is_sdvob)
  1793. mapping = &(dev_priv->sdvo_mappings[0]);
  1794. else
  1795. mapping = &(dev_priv->sdvo_mappings[1]);
  1796. if (mapping->initialized)
  1797. sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
  1798. else
  1799. intel_sdvo_guess_ddc_bus(sdvo);
  1800. }
  1801. static void
  1802. intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
  1803. struct intel_sdvo *sdvo, u32 reg)
  1804. {
  1805. struct sdvo_device_mapping *mapping;
  1806. u8 pin;
  1807. if (sdvo->is_sdvob)
  1808. mapping = &dev_priv->sdvo_mappings[0];
  1809. else
  1810. mapping = &dev_priv->sdvo_mappings[1];
  1811. if (mapping->initialized && intel_gmbus_is_port_valid(mapping->i2c_pin))
  1812. pin = mapping->i2c_pin;
  1813. else
  1814. pin = GMBUS_PORT_DPB;
  1815. sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
  1816. /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
  1817. * our code totally fails once we start using gmbus. Hence fall back to
  1818. * bit banging for now. */
  1819. intel_gmbus_force_bit(sdvo->i2c, true);
  1820. }
  1821. /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
  1822. static void
  1823. intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
  1824. {
  1825. intel_gmbus_force_bit(sdvo->i2c, false);
  1826. }
  1827. static bool
  1828. intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
  1829. {
  1830. return intel_sdvo_check_supp_encode(intel_sdvo);
  1831. }
  1832. static u8
  1833. intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
  1834. {
  1835. struct drm_i915_private *dev_priv = dev->dev_private;
  1836. struct sdvo_device_mapping *my_mapping, *other_mapping;
  1837. if (sdvo->is_sdvob) {
  1838. my_mapping = &dev_priv->sdvo_mappings[0];
  1839. other_mapping = &dev_priv->sdvo_mappings[1];
  1840. } else {
  1841. my_mapping = &dev_priv->sdvo_mappings[1];
  1842. other_mapping = &dev_priv->sdvo_mappings[0];
  1843. }
  1844. /* If the BIOS described our SDVO device, take advantage of it. */
  1845. if (my_mapping->slave_addr)
  1846. return my_mapping->slave_addr;
  1847. /* If the BIOS only described a different SDVO device, use the
  1848. * address that it isn't using.
  1849. */
  1850. if (other_mapping->slave_addr) {
  1851. if (other_mapping->slave_addr == 0x70)
  1852. return 0x72;
  1853. else
  1854. return 0x70;
  1855. }
  1856. /* No SDVO device info is found for another DVO port,
  1857. * so use mapping assumption we had before BIOS parsing.
  1858. */
  1859. if (sdvo->is_sdvob)
  1860. return 0x70;
  1861. else
  1862. return 0x72;
  1863. }
  1864. static void
  1865. intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
  1866. struct intel_sdvo *encoder)
  1867. {
  1868. drm_connector_init(encoder->base.base.dev,
  1869. &connector->base.base,
  1870. &intel_sdvo_connector_funcs,
  1871. connector->base.base.connector_type);
  1872. drm_connector_helper_add(&connector->base.base,
  1873. &intel_sdvo_connector_helper_funcs);
  1874. connector->base.base.interlace_allowed = 1;
  1875. connector->base.base.doublescan_allowed = 0;
  1876. connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
  1877. connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
  1878. intel_connector_attach_encoder(&connector->base, &encoder->base);
  1879. drm_sysfs_connector_add(&connector->base.base);
  1880. }
  1881. static void
  1882. intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
  1883. {
  1884. struct drm_device *dev = connector->base.base.dev;
  1885. intel_attach_force_audio_property(&connector->base.base);
  1886. if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
  1887. intel_attach_broadcast_rgb_property(&connector->base.base);
  1888. }
  1889. static bool
  1890. intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
  1891. {
  1892. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1893. struct drm_connector *connector;
  1894. struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
  1895. struct intel_connector *intel_connector;
  1896. struct intel_sdvo_connector *intel_sdvo_connector;
  1897. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1898. if (!intel_sdvo_connector)
  1899. return false;
  1900. if (device == 0) {
  1901. intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
  1902. intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
  1903. } else if (device == 1) {
  1904. intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
  1905. intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
  1906. }
  1907. intel_connector = &intel_sdvo_connector->base;
  1908. connector = &intel_connector->base;
  1909. if (intel_sdvo_get_hotplug_support(intel_sdvo) &
  1910. intel_sdvo_connector->output_flag) {
  1911. connector->polled = DRM_CONNECTOR_POLL_HPD;
  1912. intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
  1913. /* Some SDVO devices have one-shot hotplug interrupts.
  1914. * Ensure that they get re-enabled when an interrupt happens.
  1915. */
  1916. intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
  1917. intel_sdvo_enable_hotplug(intel_encoder);
  1918. } else {
  1919. connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
  1920. }
  1921. encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
  1922. connector->connector_type = DRM_MODE_CONNECTOR_DVID;
  1923. if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
  1924. connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
  1925. intel_sdvo->is_hdmi = true;
  1926. }
  1927. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1928. if (intel_sdvo->is_hdmi)
  1929. intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
  1930. return true;
  1931. }
  1932. static bool
  1933. intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
  1934. {
  1935. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1936. struct drm_connector *connector;
  1937. struct intel_connector *intel_connector;
  1938. struct intel_sdvo_connector *intel_sdvo_connector;
  1939. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1940. if (!intel_sdvo_connector)
  1941. return false;
  1942. intel_connector = &intel_sdvo_connector->base;
  1943. connector = &intel_connector->base;
  1944. encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
  1945. connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
  1946. intel_sdvo->controlled_output |= type;
  1947. intel_sdvo_connector->output_flag = type;
  1948. intel_sdvo->is_tv = true;
  1949. intel_sdvo->base.needs_tv_clock = true;
  1950. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1951. if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
  1952. goto err;
  1953. if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  1954. goto err;
  1955. return true;
  1956. err:
  1957. intel_sdvo_destroy(connector);
  1958. return false;
  1959. }
  1960. static bool
  1961. intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
  1962. {
  1963. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1964. struct drm_connector *connector;
  1965. struct intel_connector *intel_connector;
  1966. struct intel_sdvo_connector *intel_sdvo_connector;
  1967. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1968. if (!intel_sdvo_connector)
  1969. return false;
  1970. intel_connector = &intel_sdvo_connector->base;
  1971. connector = &intel_connector->base;
  1972. connector->polled = DRM_CONNECTOR_POLL_CONNECT;
  1973. encoder->encoder_type = DRM_MODE_ENCODER_DAC;
  1974. connector->connector_type = DRM_MODE_CONNECTOR_VGA;
  1975. if (device == 0) {
  1976. intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
  1977. intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
  1978. } else if (device == 1) {
  1979. intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
  1980. intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
  1981. }
  1982. intel_sdvo_connector_init(intel_sdvo_connector,
  1983. intel_sdvo);
  1984. return true;
  1985. }
  1986. static bool
  1987. intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
  1988. {
  1989. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1990. struct drm_connector *connector;
  1991. struct intel_connector *intel_connector;
  1992. struct intel_sdvo_connector *intel_sdvo_connector;
  1993. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1994. if (!intel_sdvo_connector)
  1995. return false;
  1996. intel_connector = &intel_sdvo_connector->base;
  1997. connector = &intel_connector->base;
  1998. encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
  1999. connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
  2000. if (device == 0) {
  2001. intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
  2002. intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
  2003. } else if (device == 1) {
  2004. intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
  2005. intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
  2006. }
  2007. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  2008. if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  2009. goto err;
  2010. return true;
  2011. err:
  2012. intel_sdvo_destroy(connector);
  2013. return false;
  2014. }
  2015. static bool
  2016. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
  2017. {
  2018. intel_sdvo->is_tv = false;
  2019. intel_sdvo->base.needs_tv_clock = false;
  2020. intel_sdvo->is_lvds = false;
  2021. /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
  2022. if (flags & SDVO_OUTPUT_TMDS0)
  2023. if (!intel_sdvo_dvi_init(intel_sdvo, 0))
  2024. return false;
  2025. if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
  2026. if (!intel_sdvo_dvi_init(intel_sdvo, 1))
  2027. return false;
  2028. /* TV has no XXX1 function block */
  2029. if (flags & SDVO_OUTPUT_SVID0)
  2030. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
  2031. return false;
  2032. if (flags & SDVO_OUTPUT_CVBS0)
  2033. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
  2034. return false;
  2035. if (flags & SDVO_OUTPUT_YPRPB0)
  2036. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
  2037. return false;
  2038. if (flags & SDVO_OUTPUT_RGB0)
  2039. if (!intel_sdvo_analog_init(intel_sdvo, 0))
  2040. return false;
  2041. if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
  2042. if (!intel_sdvo_analog_init(intel_sdvo, 1))
  2043. return false;
  2044. if (flags & SDVO_OUTPUT_LVDS0)
  2045. if (!intel_sdvo_lvds_init(intel_sdvo, 0))
  2046. return false;
  2047. if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
  2048. if (!intel_sdvo_lvds_init(intel_sdvo, 1))
  2049. return false;
  2050. if ((flags & SDVO_OUTPUT_MASK) == 0) {
  2051. unsigned char bytes[2];
  2052. intel_sdvo->controlled_output = 0;
  2053. memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
  2054. DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
  2055. SDVO_NAME(intel_sdvo),
  2056. bytes[0], bytes[1]);
  2057. return false;
  2058. }
  2059. intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  2060. return true;
  2061. }
  2062. static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
  2063. {
  2064. struct drm_device *dev = intel_sdvo->base.base.dev;
  2065. struct drm_connector *connector, *tmp;
  2066. list_for_each_entry_safe(connector, tmp,
  2067. &dev->mode_config.connector_list, head) {
  2068. if (intel_attached_encoder(connector) == &intel_sdvo->base)
  2069. intel_sdvo_destroy(connector);
  2070. }
  2071. }
  2072. static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  2073. struct intel_sdvo_connector *intel_sdvo_connector,
  2074. int type)
  2075. {
  2076. struct drm_device *dev = intel_sdvo->base.base.dev;
  2077. struct intel_sdvo_tv_format format;
  2078. uint32_t format_map, i;
  2079. if (!intel_sdvo_set_target_output(intel_sdvo, type))
  2080. return false;
  2081. BUILD_BUG_ON(sizeof(format) != 6);
  2082. if (!intel_sdvo_get_value(intel_sdvo,
  2083. SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
  2084. &format, sizeof(format)))
  2085. return false;
  2086. memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
  2087. if (format_map == 0)
  2088. return false;
  2089. intel_sdvo_connector->format_supported_num = 0;
  2090. for (i = 0 ; i < TV_FORMAT_NUM; i++)
  2091. if (format_map & (1 << i))
  2092. intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
  2093. intel_sdvo_connector->tv_format =
  2094. drm_property_create(dev, DRM_MODE_PROP_ENUM,
  2095. "mode", intel_sdvo_connector->format_supported_num);
  2096. if (!intel_sdvo_connector->tv_format)
  2097. return false;
  2098. for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
  2099. drm_property_add_enum(
  2100. intel_sdvo_connector->tv_format, i,
  2101. i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
  2102. intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
  2103. drm_object_attach_property(&intel_sdvo_connector->base.base.base,
  2104. intel_sdvo_connector->tv_format, 0);
  2105. return true;
  2106. }
  2107. #define ENHANCEMENT(name, NAME) do { \
  2108. if (enhancements.name) { \
  2109. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
  2110. !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
  2111. return false; \
  2112. intel_sdvo_connector->max_##name = data_value[0]; \
  2113. intel_sdvo_connector->cur_##name = response; \
  2114. intel_sdvo_connector->name = \
  2115. drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
  2116. if (!intel_sdvo_connector->name) return false; \
  2117. drm_object_attach_property(&connector->base, \
  2118. intel_sdvo_connector->name, \
  2119. intel_sdvo_connector->cur_##name); \
  2120. DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
  2121. data_value[0], data_value[1], response); \
  2122. } \
  2123. } while (0)
  2124. static bool
  2125. intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
  2126. struct intel_sdvo_connector *intel_sdvo_connector,
  2127. struct intel_sdvo_enhancements_reply enhancements)
  2128. {
  2129. struct drm_device *dev = intel_sdvo->base.base.dev;
  2130. struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2131. uint16_t response, data_value[2];
  2132. /* when horizontal overscan is supported, Add the left/right property */
  2133. if (enhancements.overscan_h) {
  2134. if (!intel_sdvo_get_value(intel_sdvo,
  2135. SDVO_CMD_GET_MAX_OVERSCAN_H,
  2136. &data_value, 4))
  2137. return false;
  2138. if (!intel_sdvo_get_value(intel_sdvo,
  2139. SDVO_CMD_GET_OVERSCAN_H,
  2140. &response, 2))
  2141. return false;
  2142. intel_sdvo_connector->max_hscan = data_value[0];
  2143. intel_sdvo_connector->left_margin = data_value[0] - response;
  2144. intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
  2145. intel_sdvo_connector->left =
  2146. drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
  2147. if (!intel_sdvo_connector->left)
  2148. return false;
  2149. drm_object_attach_property(&connector->base,
  2150. intel_sdvo_connector->left,
  2151. intel_sdvo_connector->left_margin);
  2152. intel_sdvo_connector->right =
  2153. drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
  2154. if (!intel_sdvo_connector->right)
  2155. return false;
  2156. drm_object_attach_property(&connector->base,
  2157. intel_sdvo_connector->right,
  2158. intel_sdvo_connector->right_margin);
  2159. DRM_DEBUG_KMS("h_overscan: max %d, "
  2160. "default %d, current %d\n",
  2161. data_value[0], data_value[1], response);
  2162. }
  2163. if (enhancements.overscan_v) {
  2164. if (!intel_sdvo_get_value(intel_sdvo,
  2165. SDVO_CMD_GET_MAX_OVERSCAN_V,
  2166. &data_value, 4))
  2167. return false;
  2168. if (!intel_sdvo_get_value(intel_sdvo,
  2169. SDVO_CMD_GET_OVERSCAN_V,
  2170. &response, 2))
  2171. return false;
  2172. intel_sdvo_connector->max_vscan = data_value[0];
  2173. intel_sdvo_connector->top_margin = data_value[0] - response;
  2174. intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
  2175. intel_sdvo_connector->top =
  2176. drm_property_create_range(dev, 0,
  2177. "top_margin", 0, data_value[0]);
  2178. if (!intel_sdvo_connector->top)
  2179. return false;
  2180. drm_object_attach_property(&connector->base,
  2181. intel_sdvo_connector->top,
  2182. intel_sdvo_connector->top_margin);
  2183. intel_sdvo_connector->bottom =
  2184. drm_property_create_range(dev, 0,
  2185. "bottom_margin", 0, data_value[0]);
  2186. if (!intel_sdvo_connector->bottom)
  2187. return false;
  2188. drm_object_attach_property(&connector->base,
  2189. intel_sdvo_connector->bottom,
  2190. intel_sdvo_connector->bottom_margin);
  2191. DRM_DEBUG_KMS("v_overscan: max %d, "
  2192. "default %d, current %d\n",
  2193. data_value[0], data_value[1], response);
  2194. }
  2195. ENHANCEMENT(hpos, HPOS);
  2196. ENHANCEMENT(vpos, VPOS);
  2197. ENHANCEMENT(saturation, SATURATION);
  2198. ENHANCEMENT(contrast, CONTRAST);
  2199. ENHANCEMENT(hue, HUE);
  2200. ENHANCEMENT(sharpness, SHARPNESS);
  2201. ENHANCEMENT(brightness, BRIGHTNESS);
  2202. ENHANCEMENT(flicker_filter, FLICKER_FILTER);
  2203. ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
  2204. ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
  2205. ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
  2206. ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
  2207. if (enhancements.dot_crawl) {
  2208. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
  2209. return false;
  2210. intel_sdvo_connector->max_dot_crawl = 1;
  2211. intel_sdvo_connector->cur_dot_crawl = response & 0x1;
  2212. intel_sdvo_connector->dot_crawl =
  2213. drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
  2214. if (!intel_sdvo_connector->dot_crawl)
  2215. return false;
  2216. drm_object_attach_property(&connector->base,
  2217. intel_sdvo_connector->dot_crawl,
  2218. intel_sdvo_connector->cur_dot_crawl);
  2219. DRM_DEBUG_KMS("dot crawl: current %d\n", response);
  2220. }
  2221. return true;
  2222. }
  2223. static bool
  2224. intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
  2225. struct intel_sdvo_connector *intel_sdvo_connector,
  2226. struct intel_sdvo_enhancements_reply enhancements)
  2227. {
  2228. struct drm_device *dev = intel_sdvo->base.base.dev;
  2229. struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2230. uint16_t response, data_value[2];
  2231. ENHANCEMENT(brightness, BRIGHTNESS);
  2232. return true;
  2233. }
  2234. #undef ENHANCEMENT
  2235. static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  2236. struct intel_sdvo_connector *intel_sdvo_connector)
  2237. {
  2238. union {
  2239. struct intel_sdvo_enhancements_reply reply;
  2240. uint16_t response;
  2241. } enhancements;
  2242. BUILD_BUG_ON(sizeof(enhancements) != 2);
  2243. enhancements.response = 0;
  2244. intel_sdvo_get_value(intel_sdvo,
  2245. SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
  2246. &enhancements, sizeof(enhancements));
  2247. if (enhancements.response == 0) {
  2248. DRM_DEBUG_KMS("No enhancement is supported\n");
  2249. return true;
  2250. }
  2251. if (IS_TV(intel_sdvo_connector))
  2252. return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2253. else if (IS_LVDS(intel_sdvo_connector))
  2254. return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2255. else
  2256. return true;
  2257. }
  2258. static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
  2259. struct i2c_msg *msgs,
  2260. int num)
  2261. {
  2262. struct intel_sdvo *sdvo = adapter->algo_data;
  2263. if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
  2264. return -EIO;
  2265. return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
  2266. }
  2267. static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
  2268. {
  2269. struct intel_sdvo *sdvo = adapter->algo_data;
  2270. return sdvo->i2c->algo->functionality(sdvo->i2c);
  2271. }
  2272. static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
  2273. .master_xfer = intel_sdvo_ddc_proxy_xfer,
  2274. .functionality = intel_sdvo_ddc_proxy_func
  2275. };
  2276. static bool
  2277. intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
  2278. struct drm_device *dev)
  2279. {
  2280. sdvo->ddc.owner = THIS_MODULE;
  2281. sdvo->ddc.class = I2C_CLASS_DDC;
  2282. snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
  2283. sdvo->ddc.dev.parent = &dev->pdev->dev;
  2284. sdvo->ddc.algo_data = sdvo;
  2285. sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
  2286. return i2c_add_adapter(&sdvo->ddc) == 0;
  2287. }
  2288. bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
  2289. {
  2290. struct drm_i915_private *dev_priv = dev->dev_private;
  2291. struct intel_encoder *intel_encoder;
  2292. struct intel_sdvo *intel_sdvo;
  2293. u32 hotplug_mask;
  2294. int i;
  2295. intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
  2296. if (!intel_sdvo)
  2297. return false;
  2298. intel_sdvo->sdvo_reg = sdvo_reg;
  2299. intel_sdvo->is_sdvob = is_sdvob;
  2300. intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
  2301. intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
  2302. if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev))
  2303. goto err_i2c_bus;
  2304. /* encoder type will be decided later */
  2305. intel_encoder = &intel_sdvo->base;
  2306. intel_encoder->type = INTEL_OUTPUT_SDVO;
  2307. drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
  2308. /* Read the regs to test if we can talk to the device */
  2309. for (i = 0; i < 0x40; i++) {
  2310. u8 byte;
  2311. if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
  2312. DRM_DEBUG_KMS("No SDVO device found on %s\n",
  2313. SDVO_NAME(intel_sdvo));
  2314. goto err;
  2315. }
  2316. }
  2317. hotplug_mask = 0;
  2318. if (IS_G4X(dev)) {
  2319. hotplug_mask = intel_sdvo->is_sdvob ?
  2320. SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
  2321. } else if (IS_GEN4(dev)) {
  2322. hotplug_mask = intel_sdvo->is_sdvob ?
  2323. SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
  2324. } else {
  2325. hotplug_mask = intel_sdvo->is_sdvob ?
  2326. SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
  2327. }
  2328. drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
  2329. intel_encoder->disable = intel_disable_sdvo;
  2330. intel_encoder->enable = intel_enable_sdvo;
  2331. intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
  2332. /* In default case sdvo lvds is false */
  2333. if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
  2334. goto err;
  2335. if (intel_sdvo_output_setup(intel_sdvo,
  2336. intel_sdvo->caps.output_flags) != true) {
  2337. DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
  2338. SDVO_NAME(intel_sdvo));
  2339. /* Output_setup can leave behind connectors! */
  2340. goto err_output;
  2341. }
  2342. /*
  2343. * Cloning SDVO with anything is often impossible, since the SDVO
  2344. * encoder can request a special input timing mode. And even if that's
  2345. * not the case we have evidence that cloning a plain unscaled mode with
  2346. * VGA doesn't really work. Furthermore the cloning flags are way too
  2347. * simplistic anyway to express such constraints, so just give up on
  2348. * cloning for SDVO encoders.
  2349. */
  2350. intel_sdvo->base.cloneable = false;
  2351. /* Only enable the hotplug irq if we need it, to work around noisy
  2352. * hotplug lines.
  2353. */
  2354. if (intel_sdvo->hotplug_active)
  2355. dev_priv->hotplug_supported_mask |= hotplug_mask;
  2356. intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
  2357. /* Set the input timing to the screen. Assume always input 0. */
  2358. if (!intel_sdvo_set_target_input(intel_sdvo))
  2359. goto err_output;
  2360. if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
  2361. &intel_sdvo->pixel_clock_min,
  2362. &intel_sdvo->pixel_clock_max))
  2363. goto err_output;
  2364. DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
  2365. "clock range %dMHz - %dMHz, "
  2366. "input 1: %c, input 2: %c, "
  2367. "output 1: %c, output 2: %c\n",
  2368. SDVO_NAME(intel_sdvo),
  2369. intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
  2370. intel_sdvo->caps.device_rev_id,
  2371. intel_sdvo->pixel_clock_min / 1000,
  2372. intel_sdvo->pixel_clock_max / 1000,
  2373. (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
  2374. (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
  2375. /* check currently supported outputs */
  2376. intel_sdvo->caps.output_flags &
  2377. (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
  2378. intel_sdvo->caps.output_flags &
  2379. (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
  2380. return true;
  2381. err_output:
  2382. intel_sdvo_output_cleanup(intel_sdvo);
  2383. err:
  2384. drm_encoder_cleanup(&intel_encoder->base);
  2385. i2c_del_adapter(&intel_sdvo->ddc);
  2386. err_i2c_bus:
  2387. intel_sdvo_unselect_i2c_bus(intel_sdvo);
  2388. kfree(intel_sdvo);
  2389. return false;
  2390. }