intel_lvds.c 33 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm_crtc.h>
  35. #include <drm/drm_edid.h>
  36. #include "intel_drv.h"
  37. #include <drm/i915_drm.h>
  38. #include "i915_drv.h"
  39. #include <linux/acpi.h>
  40. /* Private structure for the integrated LVDS support */
  41. struct intel_lvds_connector {
  42. struct intel_connector base;
  43. struct notifier_block lid_notifier;
  44. };
  45. struct intel_lvds_encoder {
  46. struct intel_encoder base;
  47. u32 pfit_control;
  48. u32 pfit_pgm_ratios;
  49. bool pfit_dirty;
  50. struct intel_lvds_connector *attached_connector;
  51. };
  52. static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  53. {
  54. return container_of(encoder, struct intel_lvds_encoder, base.base);
  55. }
  56. static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  57. {
  58. return container_of(connector, struct intel_lvds_connector, base.base);
  59. }
  60. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  61. enum pipe *pipe)
  62. {
  63. struct drm_device *dev = encoder->base.dev;
  64. struct drm_i915_private *dev_priv = dev->dev_private;
  65. u32 lvds_reg, tmp;
  66. if (HAS_PCH_SPLIT(dev)) {
  67. lvds_reg = PCH_LVDS;
  68. } else {
  69. lvds_reg = LVDS;
  70. }
  71. tmp = I915_READ(lvds_reg);
  72. if (!(tmp & LVDS_PORT_EN))
  73. return false;
  74. if (HAS_PCH_CPT(dev))
  75. *pipe = PORT_TO_PIPE_CPT(tmp);
  76. else
  77. *pipe = PORT_TO_PIPE(tmp);
  78. return true;
  79. }
  80. /**
  81. * Sets the power state for the panel.
  82. */
  83. static void intel_enable_lvds(struct intel_encoder *encoder)
  84. {
  85. struct drm_device *dev = encoder->base.dev;
  86. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  87. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  88. struct drm_i915_private *dev_priv = dev->dev_private;
  89. u32 ctl_reg, lvds_reg, stat_reg;
  90. if (HAS_PCH_SPLIT(dev)) {
  91. ctl_reg = PCH_PP_CONTROL;
  92. lvds_reg = PCH_LVDS;
  93. stat_reg = PCH_PP_STATUS;
  94. } else {
  95. ctl_reg = PP_CONTROL;
  96. lvds_reg = LVDS;
  97. stat_reg = PP_STATUS;
  98. }
  99. I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  100. if (lvds_encoder->pfit_dirty) {
  101. /*
  102. * Enable automatic panel scaling so that non-native modes
  103. * fill the screen. The panel fitter should only be
  104. * adjusted whilst the pipe is disabled, according to
  105. * register description and PRM.
  106. */
  107. DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  108. lvds_encoder->pfit_control,
  109. lvds_encoder->pfit_pgm_ratios);
  110. I915_WRITE(PFIT_PGM_RATIOS, lvds_encoder->pfit_pgm_ratios);
  111. I915_WRITE(PFIT_CONTROL, lvds_encoder->pfit_control);
  112. lvds_encoder->pfit_dirty = false;
  113. }
  114. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  115. POSTING_READ(lvds_reg);
  116. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  117. DRM_ERROR("timed out waiting for panel to power on\n");
  118. intel_panel_enable_backlight(dev, intel_crtc->pipe);
  119. }
  120. static void intel_disable_lvds(struct intel_encoder *encoder)
  121. {
  122. struct drm_device *dev = encoder->base.dev;
  123. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  124. struct drm_i915_private *dev_priv = dev->dev_private;
  125. u32 ctl_reg, lvds_reg, stat_reg;
  126. if (HAS_PCH_SPLIT(dev)) {
  127. ctl_reg = PCH_PP_CONTROL;
  128. lvds_reg = PCH_LVDS;
  129. stat_reg = PCH_PP_STATUS;
  130. } else {
  131. ctl_reg = PP_CONTROL;
  132. lvds_reg = LVDS;
  133. stat_reg = PP_STATUS;
  134. }
  135. intel_panel_disable_backlight(dev);
  136. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  137. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  138. DRM_ERROR("timed out waiting for panel to power off\n");
  139. if (lvds_encoder->pfit_control) {
  140. I915_WRITE(PFIT_CONTROL, 0);
  141. lvds_encoder->pfit_dirty = true;
  142. }
  143. I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
  144. POSTING_READ(lvds_reg);
  145. }
  146. static int intel_lvds_mode_valid(struct drm_connector *connector,
  147. struct drm_display_mode *mode)
  148. {
  149. struct intel_connector *intel_connector = to_intel_connector(connector);
  150. struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
  151. if (mode->hdisplay > fixed_mode->hdisplay)
  152. return MODE_PANEL;
  153. if (mode->vdisplay > fixed_mode->vdisplay)
  154. return MODE_PANEL;
  155. return MODE_OK;
  156. }
  157. static void
  158. centre_horizontally(struct drm_display_mode *mode,
  159. int width)
  160. {
  161. u32 border, sync_pos, blank_width, sync_width;
  162. /* keep the hsync and hblank widths constant */
  163. sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
  164. blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
  165. sync_pos = (blank_width - sync_width + 1) / 2;
  166. border = (mode->hdisplay - width + 1) / 2;
  167. border += border & 1; /* make the border even */
  168. mode->crtc_hdisplay = width;
  169. mode->crtc_hblank_start = width + border;
  170. mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
  171. mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
  172. mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
  173. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  174. }
  175. static void
  176. centre_vertically(struct drm_display_mode *mode,
  177. int height)
  178. {
  179. u32 border, sync_pos, blank_width, sync_width;
  180. /* keep the vsync and vblank widths constant */
  181. sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
  182. blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
  183. sync_pos = (blank_width - sync_width + 1) / 2;
  184. border = (mode->vdisplay - height + 1) / 2;
  185. mode->crtc_vdisplay = height;
  186. mode->crtc_vblank_start = height + border;
  187. mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
  188. mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
  189. mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
  190. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  191. }
  192. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  193. {
  194. /*
  195. * Floating point operation is not supported. So the FACTOR
  196. * is defined, which can avoid the floating point computation
  197. * when calculating the panel ratio.
  198. */
  199. #define ACCURACY 12
  200. #define FACTOR (1 << ACCURACY)
  201. u32 ratio = source * FACTOR / target;
  202. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  203. }
  204. static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
  205. const struct drm_display_mode *mode,
  206. struct drm_display_mode *adjusted_mode)
  207. {
  208. struct drm_device *dev = encoder->dev;
  209. struct drm_i915_private *dev_priv = dev->dev_private;
  210. struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(encoder);
  211. struct intel_connector *intel_connector =
  212. &lvds_encoder->attached_connector->base;
  213. struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
  214. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  215. int pipe;
  216. /* Should never happen!! */
  217. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  218. DRM_ERROR("Can't support LVDS on pipe A\n");
  219. return false;
  220. }
  221. if (intel_encoder_check_is_cloned(&lvds_encoder->base))
  222. return false;
  223. /*
  224. * We have timings from the BIOS for the panel, put them in
  225. * to the adjusted mode. The CRTC will be set up for this mode,
  226. * with the panel scaling set up to source from the H/VDisplay
  227. * of the original mode.
  228. */
  229. intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
  230. adjusted_mode);
  231. if (HAS_PCH_SPLIT(dev)) {
  232. intel_pch_panel_fitting(dev,
  233. intel_connector->panel.fitting_mode,
  234. mode, adjusted_mode);
  235. return true;
  236. }
  237. /* Native modes don't need fitting */
  238. if (adjusted_mode->hdisplay == mode->hdisplay &&
  239. adjusted_mode->vdisplay == mode->vdisplay)
  240. goto out;
  241. /* 965+ wants fuzzy fitting */
  242. if (INTEL_INFO(dev)->gen >= 4)
  243. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  244. PFIT_FILTER_FUZZY);
  245. /*
  246. * Enable automatic panel scaling for non-native modes so that they fill
  247. * the screen. Should be enabled before the pipe is enabled, according
  248. * to register description and PRM.
  249. * Change the value here to see the borders for debugging
  250. */
  251. for_each_pipe(pipe)
  252. I915_WRITE(BCLRPAT(pipe), 0);
  253. drm_mode_set_crtcinfo(adjusted_mode, 0);
  254. switch (intel_connector->panel.fitting_mode) {
  255. case DRM_MODE_SCALE_CENTER:
  256. /*
  257. * For centered modes, we have to calculate border widths &
  258. * heights and modify the values programmed into the CRTC.
  259. */
  260. centre_horizontally(adjusted_mode, mode->hdisplay);
  261. centre_vertically(adjusted_mode, mode->vdisplay);
  262. border = LVDS_BORDER_ENABLE;
  263. break;
  264. case DRM_MODE_SCALE_ASPECT:
  265. /* Scale but preserve the aspect ratio */
  266. if (INTEL_INFO(dev)->gen >= 4) {
  267. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  268. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  269. /* 965+ is easy, it does everything in hw */
  270. if (scaled_width > scaled_height)
  271. pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
  272. else if (scaled_width < scaled_height)
  273. pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
  274. else if (adjusted_mode->hdisplay != mode->hdisplay)
  275. pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  276. } else {
  277. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  278. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  279. /*
  280. * For earlier chips we have to calculate the scaling
  281. * ratio by hand and program it into the
  282. * PFIT_PGM_RATIO register
  283. */
  284. if (scaled_width > scaled_height) { /* pillar */
  285. centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
  286. border = LVDS_BORDER_ENABLE;
  287. if (mode->vdisplay != adjusted_mode->vdisplay) {
  288. u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
  289. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  290. bits << PFIT_VERT_SCALE_SHIFT);
  291. pfit_control |= (PFIT_ENABLE |
  292. VERT_INTERP_BILINEAR |
  293. HORIZ_INTERP_BILINEAR);
  294. }
  295. } else if (scaled_width < scaled_height) { /* letter */
  296. centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
  297. border = LVDS_BORDER_ENABLE;
  298. if (mode->hdisplay != adjusted_mode->hdisplay) {
  299. u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
  300. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  301. bits << PFIT_VERT_SCALE_SHIFT);
  302. pfit_control |= (PFIT_ENABLE |
  303. VERT_INTERP_BILINEAR |
  304. HORIZ_INTERP_BILINEAR);
  305. }
  306. } else
  307. /* Aspects match, Let hw scale both directions */
  308. pfit_control |= (PFIT_ENABLE |
  309. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  310. VERT_INTERP_BILINEAR |
  311. HORIZ_INTERP_BILINEAR);
  312. }
  313. break;
  314. case DRM_MODE_SCALE_FULLSCREEN:
  315. /*
  316. * Full scaling, even if it changes the aspect ratio.
  317. * Fortunately this is all done for us in hw.
  318. */
  319. if (mode->vdisplay != adjusted_mode->vdisplay ||
  320. mode->hdisplay != adjusted_mode->hdisplay) {
  321. pfit_control |= PFIT_ENABLE;
  322. if (INTEL_INFO(dev)->gen >= 4)
  323. pfit_control |= PFIT_SCALING_AUTO;
  324. else
  325. pfit_control |= (VERT_AUTO_SCALE |
  326. VERT_INTERP_BILINEAR |
  327. HORIZ_AUTO_SCALE |
  328. HORIZ_INTERP_BILINEAR);
  329. }
  330. break;
  331. default:
  332. break;
  333. }
  334. out:
  335. /* If not enabling scaling, be consistent and always use 0. */
  336. if ((pfit_control & PFIT_ENABLE) == 0) {
  337. pfit_control = 0;
  338. pfit_pgm_ratios = 0;
  339. }
  340. /* Make sure pre-965 set dither correctly */
  341. if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
  342. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  343. if (pfit_control != lvds_encoder->pfit_control ||
  344. pfit_pgm_ratios != lvds_encoder->pfit_pgm_ratios) {
  345. lvds_encoder->pfit_control = pfit_control;
  346. lvds_encoder->pfit_pgm_ratios = pfit_pgm_ratios;
  347. lvds_encoder->pfit_dirty = true;
  348. }
  349. dev_priv->lvds_border_bits = border;
  350. /*
  351. * XXX: It would be nice to support lower refresh rates on the
  352. * panels to reduce power consumption, and perhaps match the
  353. * user's requested refresh rate.
  354. */
  355. return true;
  356. }
  357. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  358. struct drm_display_mode *mode,
  359. struct drm_display_mode *adjusted_mode)
  360. {
  361. /*
  362. * The LVDS pin pair will already have been turned on in the
  363. * intel_crtc_mode_set since it has a large impact on the DPLL
  364. * settings.
  365. */
  366. }
  367. /**
  368. * Detect the LVDS connection.
  369. *
  370. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  371. * connected and closed means disconnected. We also send hotplug events as
  372. * needed, using lid status notification from the input layer.
  373. */
  374. static enum drm_connector_status
  375. intel_lvds_detect(struct drm_connector *connector, bool force)
  376. {
  377. struct drm_device *dev = connector->dev;
  378. enum drm_connector_status status;
  379. status = intel_panel_detect(dev);
  380. if (status != connector_status_unknown)
  381. return status;
  382. return connector_status_connected;
  383. }
  384. /**
  385. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  386. */
  387. static int intel_lvds_get_modes(struct drm_connector *connector)
  388. {
  389. struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
  390. struct drm_device *dev = connector->dev;
  391. struct drm_display_mode *mode;
  392. /* use cached edid if we have one */
  393. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  394. return drm_add_edid_modes(connector, lvds_connector->base.edid);
  395. mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
  396. if (mode == NULL)
  397. return 0;
  398. drm_mode_probed_add(connector, mode);
  399. return 1;
  400. }
  401. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  402. {
  403. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  404. return 1;
  405. }
  406. /* The GPU hangs up on these systems if modeset is performed on LID open */
  407. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  408. {
  409. .callback = intel_no_modeset_on_lid_dmi_callback,
  410. .ident = "Toshiba Tecra A11",
  411. .matches = {
  412. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  413. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  414. },
  415. },
  416. { } /* terminating entry */
  417. };
  418. /*
  419. * Lid events. Note the use of 'modeset_on_lid':
  420. * - we set it on lid close, and reset it on open
  421. * - we use it as a "only once" bit (ie we ignore
  422. * duplicate events where it was already properly
  423. * set/reset)
  424. * - the suspend/resume paths will also set it to
  425. * zero, since they restore the mode ("lid open").
  426. */
  427. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  428. void *unused)
  429. {
  430. struct intel_lvds_connector *lvds_connector =
  431. container_of(nb, struct intel_lvds_connector, lid_notifier);
  432. struct drm_connector *connector = &lvds_connector->base.base;
  433. struct drm_device *dev = connector->dev;
  434. struct drm_i915_private *dev_priv = dev->dev_private;
  435. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  436. return NOTIFY_OK;
  437. /*
  438. * check and update the status of LVDS connector after receiving
  439. * the LID nofication event.
  440. */
  441. connector->status = connector->funcs->detect(connector, false);
  442. /* Don't force modeset on machines where it causes a GPU lockup */
  443. if (dmi_check_system(intel_no_modeset_on_lid))
  444. return NOTIFY_OK;
  445. if (!acpi_lid_open()) {
  446. dev_priv->modeset_on_lid = 1;
  447. return NOTIFY_OK;
  448. }
  449. if (!dev_priv->modeset_on_lid)
  450. return NOTIFY_OK;
  451. dev_priv->modeset_on_lid = 0;
  452. mutex_lock(&dev->mode_config.mutex);
  453. intel_modeset_setup_hw_state(dev, true);
  454. mutex_unlock(&dev->mode_config.mutex);
  455. return NOTIFY_OK;
  456. }
  457. /**
  458. * intel_lvds_destroy - unregister and free LVDS structures
  459. * @connector: connector to free
  460. *
  461. * Unregister the DDC bus for this connector then free the driver private
  462. * structure.
  463. */
  464. static void intel_lvds_destroy(struct drm_connector *connector)
  465. {
  466. struct intel_lvds_connector *lvds_connector =
  467. to_lvds_connector(connector);
  468. if (lvds_connector->lid_notifier.notifier_call)
  469. acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
  470. if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
  471. kfree(lvds_connector->base.edid);
  472. intel_panel_destroy_backlight(connector->dev);
  473. intel_panel_fini(&lvds_connector->base.panel);
  474. drm_sysfs_connector_remove(connector);
  475. drm_connector_cleanup(connector);
  476. kfree(connector);
  477. }
  478. static int intel_lvds_set_property(struct drm_connector *connector,
  479. struct drm_property *property,
  480. uint64_t value)
  481. {
  482. struct intel_connector *intel_connector = to_intel_connector(connector);
  483. struct drm_device *dev = connector->dev;
  484. if (property == dev->mode_config.scaling_mode_property) {
  485. struct drm_crtc *crtc;
  486. if (value == DRM_MODE_SCALE_NONE) {
  487. DRM_DEBUG_KMS("no scaling not supported\n");
  488. return -EINVAL;
  489. }
  490. if (intel_connector->panel.fitting_mode == value) {
  491. /* the LVDS scaling property is not changed */
  492. return 0;
  493. }
  494. intel_connector->panel.fitting_mode = value;
  495. crtc = intel_attached_encoder(connector)->base.crtc;
  496. if (crtc && crtc->enabled) {
  497. /*
  498. * If the CRTC is enabled, the display will be changed
  499. * according to the new panel fitting mode.
  500. */
  501. intel_set_mode(crtc, &crtc->mode,
  502. crtc->x, crtc->y, crtc->fb);
  503. }
  504. }
  505. return 0;
  506. }
  507. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  508. .mode_fixup = intel_lvds_mode_fixup,
  509. .mode_set = intel_lvds_mode_set,
  510. .disable = intel_encoder_noop,
  511. };
  512. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  513. .get_modes = intel_lvds_get_modes,
  514. .mode_valid = intel_lvds_mode_valid,
  515. .best_encoder = intel_best_encoder,
  516. };
  517. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  518. .dpms = intel_connector_dpms,
  519. .detect = intel_lvds_detect,
  520. .fill_modes = drm_helper_probe_single_connector_modes,
  521. .set_property = intel_lvds_set_property,
  522. .destroy = intel_lvds_destroy,
  523. };
  524. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  525. .destroy = intel_encoder_destroy,
  526. };
  527. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  528. {
  529. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  530. return 1;
  531. }
  532. /* These systems claim to have LVDS, but really don't */
  533. static const struct dmi_system_id intel_no_lvds[] = {
  534. {
  535. .callback = intel_no_lvds_dmi_callback,
  536. .ident = "Apple Mac Mini (Core series)",
  537. .matches = {
  538. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  539. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  540. },
  541. },
  542. {
  543. .callback = intel_no_lvds_dmi_callback,
  544. .ident = "Apple Mac Mini (Core 2 series)",
  545. .matches = {
  546. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  547. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  548. },
  549. },
  550. {
  551. .callback = intel_no_lvds_dmi_callback,
  552. .ident = "MSI IM-945GSE-A",
  553. .matches = {
  554. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  555. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  556. },
  557. },
  558. {
  559. .callback = intel_no_lvds_dmi_callback,
  560. .ident = "Dell Studio Hybrid",
  561. .matches = {
  562. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  563. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  564. },
  565. },
  566. {
  567. .callback = intel_no_lvds_dmi_callback,
  568. .ident = "Dell OptiPlex FX170",
  569. .matches = {
  570. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  571. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  572. },
  573. },
  574. {
  575. .callback = intel_no_lvds_dmi_callback,
  576. .ident = "AOpen Mini PC",
  577. .matches = {
  578. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  579. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  580. },
  581. },
  582. {
  583. .callback = intel_no_lvds_dmi_callback,
  584. .ident = "AOpen Mini PC MP915",
  585. .matches = {
  586. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  587. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  588. },
  589. },
  590. {
  591. .callback = intel_no_lvds_dmi_callback,
  592. .ident = "AOpen i915GMm-HFS",
  593. .matches = {
  594. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  595. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  596. },
  597. },
  598. {
  599. .callback = intel_no_lvds_dmi_callback,
  600. .ident = "AOpen i45GMx-I",
  601. .matches = {
  602. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  603. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  604. },
  605. },
  606. {
  607. .callback = intel_no_lvds_dmi_callback,
  608. .ident = "Aopen i945GTt-VFA",
  609. .matches = {
  610. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  611. },
  612. },
  613. {
  614. .callback = intel_no_lvds_dmi_callback,
  615. .ident = "Clientron U800",
  616. .matches = {
  617. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  618. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  619. },
  620. },
  621. {
  622. .callback = intel_no_lvds_dmi_callback,
  623. .ident = "Clientron E830",
  624. .matches = {
  625. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  626. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  627. },
  628. },
  629. {
  630. .callback = intel_no_lvds_dmi_callback,
  631. .ident = "Asus EeeBox PC EB1007",
  632. .matches = {
  633. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  634. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  635. },
  636. },
  637. {
  638. .callback = intel_no_lvds_dmi_callback,
  639. .ident = "Asus AT5NM10T-I",
  640. .matches = {
  641. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  642. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  643. },
  644. },
  645. {
  646. .callback = intel_no_lvds_dmi_callback,
  647. .ident = "Hewlett-Packard HP t5740e Thin Client",
  648. .matches = {
  649. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  650. DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
  651. },
  652. },
  653. {
  654. .callback = intel_no_lvds_dmi_callback,
  655. .ident = "Hewlett-Packard t5745",
  656. .matches = {
  657. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  658. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  659. },
  660. },
  661. {
  662. .callback = intel_no_lvds_dmi_callback,
  663. .ident = "Hewlett-Packard st5747",
  664. .matches = {
  665. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  666. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  667. },
  668. },
  669. {
  670. .callback = intel_no_lvds_dmi_callback,
  671. .ident = "MSI Wind Box DC500",
  672. .matches = {
  673. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  674. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  675. },
  676. },
  677. {
  678. .callback = intel_no_lvds_dmi_callback,
  679. .ident = "ZOTAC ZBOXSD-ID12/ID13",
  680. .matches = {
  681. DMI_MATCH(DMI_BOARD_VENDOR, "ZOTAC"),
  682. DMI_MATCH(DMI_BOARD_NAME, "ZBOXSD-ID12/ID13"),
  683. },
  684. },
  685. {
  686. .callback = intel_no_lvds_dmi_callback,
  687. .ident = "Gigabyte GA-D525TUD",
  688. .matches = {
  689. DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
  690. DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
  691. },
  692. },
  693. {
  694. .callback = intel_no_lvds_dmi_callback,
  695. .ident = "Supermicro X7SPA-H",
  696. .matches = {
  697. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  698. DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
  699. },
  700. },
  701. { } /* terminating entry */
  702. };
  703. /**
  704. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  705. * @dev: drm device
  706. * @connector: LVDS connector
  707. *
  708. * Find the reduced downclock for LVDS in EDID.
  709. */
  710. static void intel_find_lvds_downclock(struct drm_device *dev,
  711. struct drm_display_mode *fixed_mode,
  712. struct drm_connector *connector)
  713. {
  714. struct drm_i915_private *dev_priv = dev->dev_private;
  715. struct drm_display_mode *scan;
  716. int temp_downclock;
  717. temp_downclock = fixed_mode->clock;
  718. list_for_each_entry(scan, &connector->probed_modes, head) {
  719. /*
  720. * If one mode has the same resolution with the fixed_panel
  721. * mode while they have the different refresh rate, it means
  722. * that the reduced downclock is found for the LVDS. In such
  723. * case we can set the different FPx0/1 to dynamically select
  724. * between low and high frequency.
  725. */
  726. if (scan->hdisplay == fixed_mode->hdisplay &&
  727. scan->hsync_start == fixed_mode->hsync_start &&
  728. scan->hsync_end == fixed_mode->hsync_end &&
  729. scan->htotal == fixed_mode->htotal &&
  730. scan->vdisplay == fixed_mode->vdisplay &&
  731. scan->vsync_start == fixed_mode->vsync_start &&
  732. scan->vsync_end == fixed_mode->vsync_end &&
  733. scan->vtotal == fixed_mode->vtotal) {
  734. if (scan->clock < temp_downclock) {
  735. /*
  736. * The downclock is already found. But we
  737. * expect to find the lower downclock.
  738. */
  739. temp_downclock = scan->clock;
  740. }
  741. }
  742. }
  743. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  744. /* We found the downclock for LVDS. */
  745. dev_priv->lvds_downclock_avail = 1;
  746. dev_priv->lvds_downclock = temp_downclock;
  747. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  748. "Normal clock %dKhz, downclock %dKhz\n",
  749. fixed_mode->clock, temp_downclock);
  750. }
  751. }
  752. /*
  753. * Enumerate the child dev array parsed from VBT to check whether
  754. * the LVDS is present.
  755. * If it is present, return 1.
  756. * If it is not present, return false.
  757. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  758. */
  759. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  760. u8 *i2c_pin)
  761. {
  762. struct drm_i915_private *dev_priv = dev->dev_private;
  763. int i;
  764. if (!dev_priv->child_dev_num)
  765. return true;
  766. for (i = 0; i < dev_priv->child_dev_num; i++) {
  767. struct child_device_config *child = dev_priv->child_dev + i;
  768. /* If the device type is not LFP, continue.
  769. * We have to check both the new identifiers as well as the
  770. * old for compatibility with some BIOSes.
  771. */
  772. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  773. child->device_type != DEVICE_TYPE_LFP)
  774. continue;
  775. if (intel_gmbus_is_port_valid(child->i2c_pin))
  776. *i2c_pin = child->i2c_pin;
  777. /* However, we cannot trust the BIOS writers to populate
  778. * the VBT correctly. Since LVDS requires additional
  779. * information from AIM blocks, a non-zero addin offset is
  780. * a good indicator that the LVDS is actually present.
  781. */
  782. if (child->addin_offset)
  783. return true;
  784. /* But even then some BIOS writers perform some black magic
  785. * and instantiate the device without reference to any
  786. * additional data. Trust that if the VBT was written into
  787. * the OpRegion then they have validated the LVDS's existence.
  788. */
  789. if (dev_priv->opregion.vbt)
  790. return true;
  791. }
  792. return false;
  793. }
  794. static bool intel_lvds_supported(struct drm_device *dev)
  795. {
  796. /* With the introduction of the PCH we gained a dedicated
  797. * LVDS presence pin, use it. */
  798. if (HAS_PCH_SPLIT(dev))
  799. return true;
  800. /* Otherwise LVDS was only attached to mobile products,
  801. * except for the inglorious 830gm */
  802. return IS_MOBILE(dev) && !IS_I830(dev);
  803. }
  804. /**
  805. * intel_lvds_init - setup LVDS connectors on this device
  806. * @dev: drm device
  807. *
  808. * Create the connector, register the LVDS DDC bus, and try to figure out what
  809. * modes we can display on the LVDS panel (if present).
  810. */
  811. bool intel_lvds_init(struct drm_device *dev)
  812. {
  813. struct drm_i915_private *dev_priv = dev->dev_private;
  814. struct intel_lvds_encoder *lvds_encoder;
  815. struct intel_encoder *intel_encoder;
  816. struct intel_lvds_connector *lvds_connector;
  817. struct intel_connector *intel_connector;
  818. struct drm_connector *connector;
  819. struct drm_encoder *encoder;
  820. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  821. struct drm_display_mode *fixed_mode = NULL;
  822. struct edid *edid;
  823. struct drm_crtc *crtc;
  824. u32 lvds;
  825. int pipe;
  826. u8 pin;
  827. if (!intel_lvds_supported(dev))
  828. return false;
  829. /* Skip init on machines we know falsely report LVDS */
  830. if (dmi_check_system(intel_no_lvds))
  831. return false;
  832. pin = GMBUS_PORT_PANEL;
  833. if (!lvds_is_present_in_vbt(dev, &pin)) {
  834. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  835. return false;
  836. }
  837. if (HAS_PCH_SPLIT(dev)) {
  838. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  839. return false;
  840. if (dev_priv->edp.support) {
  841. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  842. return false;
  843. }
  844. }
  845. lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
  846. if (!lvds_encoder)
  847. return false;
  848. lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
  849. if (!lvds_connector) {
  850. kfree(lvds_encoder);
  851. return false;
  852. }
  853. lvds_encoder->attached_connector = lvds_connector;
  854. if (!HAS_PCH_SPLIT(dev)) {
  855. lvds_encoder->pfit_control = I915_READ(PFIT_CONTROL);
  856. }
  857. intel_encoder = &lvds_encoder->base;
  858. encoder = &intel_encoder->base;
  859. intel_connector = &lvds_connector->base;
  860. connector = &intel_connector->base;
  861. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  862. DRM_MODE_CONNECTOR_LVDS);
  863. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  864. DRM_MODE_ENCODER_LVDS);
  865. intel_encoder->enable = intel_enable_lvds;
  866. intel_encoder->disable = intel_disable_lvds;
  867. intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  868. intel_connector->get_hw_state = intel_connector_get_hw_state;
  869. intel_connector_attach_encoder(intel_connector, intel_encoder);
  870. intel_encoder->type = INTEL_OUTPUT_LVDS;
  871. intel_encoder->cloneable = false;
  872. if (HAS_PCH_SPLIT(dev))
  873. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  874. else if (IS_GEN4(dev))
  875. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  876. else
  877. intel_encoder->crtc_mask = (1 << 1);
  878. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  879. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  880. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  881. connector->interlace_allowed = false;
  882. connector->doublescan_allowed = false;
  883. /* create the scaling mode property */
  884. drm_mode_create_scaling_mode_property(dev);
  885. drm_object_attach_property(&connector->base,
  886. dev->mode_config.scaling_mode_property,
  887. DRM_MODE_SCALE_ASPECT);
  888. intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
  889. /*
  890. * LVDS discovery:
  891. * 1) check for EDID on DDC
  892. * 2) check for VBT data
  893. * 3) check to see if LVDS is already on
  894. * if none of the above, no panel
  895. * 4) make sure lid is open
  896. * if closed, act like it's not there for now
  897. */
  898. /*
  899. * Attempt to get the fixed panel mode from DDC. Assume that the
  900. * preferred mode is the right one.
  901. */
  902. edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
  903. if (edid) {
  904. if (drm_add_edid_modes(connector, edid)) {
  905. drm_mode_connector_update_edid_property(connector,
  906. edid);
  907. } else {
  908. kfree(edid);
  909. edid = ERR_PTR(-EINVAL);
  910. }
  911. } else {
  912. edid = ERR_PTR(-ENOENT);
  913. }
  914. lvds_connector->base.edid = edid;
  915. if (IS_ERR_OR_NULL(edid)) {
  916. /* Didn't get an EDID, so
  917. * Set wide sync ranges so we get all modes
  918. * handed to valid_mode for checking
  919. */
  920. connector->display_info.min_vfreq = 0;
  921. connector->display_info.max_vfreq = 200;
  922. connector->display_info.min_hfreq = 0;
  923. connector->display_info.max_hfreq = 200;
  924. }
  925. list_for_each_entry(scan, &connector->probed_modes, head) {
  926. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  927. DRM_DEBUG_KMS("using preferred mode from EDID: ");
  928. drm_mode_debug_printmodeline(scan);
  929. fixed_mode = drm_mode_duplicate(dev, scan);
  930. if (fixed_mode) {
  931. intel_find_lvds_downclock(dev, fixed_mode,
  932. connector);
  933. goto out;
  934. }
  935. }
  936. }
  937. /* Failed to get EDID, what about VBT? */
  938. if (dev_priv->lfp_lvds_vbt_mode) {
  939. DRM_DEBUG_KMS("using mode from VBT: ");
  940. drm_mode_debug_printmodeline(dev_priv->lfp_lvds_vbt_mode);
  941. fixed_mode = drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  942. if (fixed_mode) {
  943. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  944. goto out;
  945. }
  946. }
  947. /*
  948. * If we didn't get EDID, try checking if the panel is already turned
  949. * on. If so, assume that whatever is currently programmed is the
  950. * correct mode.
  951. */
  952. /* Ironlake: FIXME if still fail, not try pipe mode now */
  953. if (HAS_PCH_SPLIT(dev))
  954. goto failed;
  955. lvds = I915_READ(LVDS);
  956. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  957. crtc = intel_get_crtc_for_pipe(dev, pipe);
  958. if (crtc && (lvds & LVDS_PORT_EN)) {
  959. fixed_mode = intel_crtc_mode_get(dev, crtc);
  960. if (fixed_mode) {
  961. DRM_DEBUG_KMS("using current (BIOS) mode: ");
  962. drm_mode_debug_printmodeline(fixed_mode);
  963. fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
  964. goto out;
  965. }
  966. }
  967. /* If we still don't have a mode after all that, give up. */
  968. if (!fixed_mode)
  969. goto failed;
  970. out:
  971. /*
  972. * Unlock registers and just
  973. * leave them unlocked
  974. */
  975. if (HAS_PCH_SPLIT(dev)) {
  976. I915_WRITE(PCH_PP_CONTROL,
  977. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  978. } else {
  979. I915_WRITE(PP_CONTROL,
  980. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  981. }
  982. lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
  983. if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
  984. DRM_DEBUG_KMS("lid notifier registration failed\n");
  985. lvds_connector->lid_notifier.notifier_call = NULL;
  986. }
  987. drm_sysfs_connector_add(connector);
  988. intel_panel_init(&intel_connector->panel, fixed_mode);
  989. intel_panel_setup_backlight(connector);
  990. return true;
  991. failed:
  992. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  993. drm_connector_cleanup(connector);
  994. drm_encoder_cleanup(encoder);
  995. if (fixed_mode)
  996. drm_mode_destroy(dev, fixed_mode);
  997. kfree(lvds_encoder);
  998. kfree(lvds_connector);
  999. return false;
  1000. }