hw.h 4.8 KB

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  1. /*
  2. * Copyright(c) 2004 - 2009 Intel Corporation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the Free
  6. * Software Foundation; either version 2 of the License, or (at your option)
  7. * any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc., 59
  16. * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called COPYING.
  20. */
  21. #ifndef _IOAT_HW_H_
  22. #define _IOAT_HW_H_
  23. /* PCI Configuration Space Values */
  24. #define IOAT_MMIO_BAR 0
  25. /* CB device ID's */
  26. #define IOAT_PCI_DID_5000 0x1A38
  27. #define IOAT_PCI_DID_CNB 0x360B
  28. #define IOAT_PCI_DID_SCNB 0x65FF
  29. #define IOAT_PCI_DID_SNB 0x402F
  30. #define IOAT_VER_1_2 0x12 /* Version 1.2 */
  31. #define IOAT_VER_2_0 0x20 /* Version 2.0 */
  32. #define IOAT_VER_3_0 0x30 /* Version 3.0 */
  33. #define IOAT_VER_3_2 0x32 /* Version 3.2 */
  34. int system_has_dca_enabled(struct pci_dev *pdev);
  35. struct ioat_dma_descriptor {
  36. uint32_t size;
  37. union {
  38. uint32_t ctl;
  39. struct {
  40. unsigned int int_en:1;
  41. unsigned int src_snoop_dis:1;
  42. unsigned int dest_snoop_dis:1;
  43. unsigned int compl_write:1;
  44. unsigned int fence:1;
  45. unsigned int null:1;
  46. unsigned int src_brk:1;
  47. unsigned int dest_brk:1;
  48. unsigned int bundle:1;
  49. unsigned int dest_dca:1;
  50. unsigned int hint:1;
  51. unsigned int rsvd2:13;
  52. #define IOAT_OP_COPY 0x00
  53. unsigned int op:8;
  54. } ctl_f;
  55. };
  56. uint64_t src_addr;
  57. uint64_t dst_addr;
  58. uint64_t next;
  59. uint64_t rsv1;
  60. uint64_t rsv2;
  61. /* store some driver data in an unused portion of the descriptor */
  62. union {
  63. uint64_t user1;
  64. uint64_t tx_cnt;
  65. };
  66. uint64_t user2;
  67. };
  68. struct ioat_fill_descriptor {
  69. uint32_t size;
  70. union {
  71. uint32_t ctl;
  72. struct {
  73. unsigned int int_en:1;
  74. unsigned int rsvd:1;
  75. unsigned int dest_snoop_dis:1;
  76. unsigned int compl_write:1;
  77. unsigned int fence:1;
  78. unsigned int rsvd2:2;
  79. unsigned int dest_brk:1;
  80. unsigned int bundle:1;
  81. unsigned int rsvd4:15;
  82. #define IOAT_OP_FILL 0x01
  83. unsigned int op:8;
  84. } ctl_f;
  85. };
  86. uint64_t src_data;
  87. uint64_t dst_addr;
  88. uint64_t next;
  89. uint64_t rsv1;
  90. uint64_t next_dst_addr;
  91. uint64_t user1;
  92. uint64_t user2;
  93. };
  94. struct ioat_xor_descriptor {
  95. uint32_t size;
  96. union {
  97. uint32_t ctl;
  98. struct {
  99. unsigned int int_en:1;
  100. unsigned int src_snoop_dis:1;
  101. unsigned int dest_snoop_dis:1;
  102. unsigned int compl_write:1;
  103. unsigned int fence:1;
  104. unsigned int src_cnt:3;
  105. unsigned int bundle:1;
  106. unsigned int dest_dca:1;
  107. unsigned int hint:1;
  108. unsigned int rsvd:13;
  109. #define IOAT_OP_XOR 0x87
  110. #define IOAT_OP_XOR_VAL 0x88
  111. unsigned int op:8;
  112. } ctl_f;
  113. };
  114. uint64_t src_addr;
  115. uint64_t dst_addr;
  116. uint64_t next;
  117. uint64_t src_addr2;
  118. uint64_t src_addr3;
  119. uint64_t src_addr4;
  120. uint64_t src_addr5;
  121. };
  122. struct ioat_xor_ext_descriptor {
  123. uint64_t src_addr6;
  124. uint64_t src_addr7;
  125. uint64_t src_addr8;
  126. uint64_t next;
  127. uint64_t rsvd[4];
  128. };
  129. struct ioat_pq_descriptor {
  130. uint32_t size;
  131. union {
  132. uint32_t ctl;
  133. struct {
  134. unsigned int int_en:1;
  135. unsigned int src_snoop_dis:1;
  136. unsigned int dest_snoop_dis:1;
  137. unsigned int compl_write:1;
  138. unsigned int fence:1;
  139. unsigned int src_cnt:3;
  140. unsigned int bundle:1;
  141. unsigned int dest_dca:1;
  142. unsigned int hint:1;
  143. unsigned int p_disable:1;
  144. unsigned int q_disable:1;
  145. unsigned int rsvd:11;
  146. #define IOAT_OP_PQ 0x89
  147. #define IOAT_OP_PQ_VAL 0x8a
  148. unsigned int op:8;
  149. } ctl_f;
  150. };
  151. uint64_t src_addr;
  152. uint64_t p_addr;
  153. uint64_t next;
  154. uint64_t src_addr2;
  155. uint64_t src_addr3;
  156. uint8_t coef[8];
  157. uint64_t q_addr;
  158. };
  159. struct ioat_pq_ext_descriptor {
  160. uint64_t src_addr4;
  161. uint64_t src_addr5;
  162. uint64_t src_addr6;
  163. uint64_t next;
  164. uint64_t src_addr7;
  165. uint64_t src_addr8;
  166. uint64_t rsvd[2];
  167. };
  168. struct ioat_pq_update_descriptor {
  169. uint32_t size;
  170. union {
  171. uint32_t ctl;
  172. struct {
  173. unsigned int int_en:1;
  174. unsigned int src_snoop_dis:1;
  175. unsigned int dest_snoop_dis:1;
  176. unsigned int compl_write:1;
  177. unsigned int fence:1;
  178. unsigned int src_cnt:3;
  179. unsigned int bundle:1;
  180. unsigned int dest_dca:1;
  181. unsigned int hint:1;
  182. unsigned int p_disable:1;
  183. unsigned int q_disable:1;
  184. unsigned int rsvd:3;
  185. unsigned int coef:8;
  186. #define IOAT_OP_PQ_UP 0x8b
  187. unsigned int op:8;
  188. } ctl_f;
  189. };
  190. uint64_t src_addr;
  191. uint64_t p_addr;
  192. uint64_t next;
  193. uint64_t src_addr2;
  194. uint64_t p_src;
  195. uint64_t q_src;
  196. uint64_t q_addr;
  197. };
  198. struct ioat_raw_descriptor {
  199. uint64_t field[8];
  200. };
  201. #endif