setup.c 23 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956
  1. /*
  2. * linux/arch/sh/boards/se/7724/setup.c
  3. *
  4. * Copyright (C) 2009 Renesas Solutions Corp.
  5. *
  6. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/device.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/mmc/host.h>
  17. #include <linux/mmc/sh_mobile_sdhi.h>
  18. #include <linux/mtd/physmap.h>
  19. #include <linux/delay.h>
  20. #include <linux/regulator/fixed.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/smc91x.h>
  23. #include <linux/gpio.h>
  24. #include <linux/input.h>
  25. #include <linux/input/sh_keysc.h>
  26. #include <linux/usb/r8a66597.h>
  27. #include <linux/sh_eth.h>
  28. #include <linux/sh_intc.h>
  29. #include <linux/videodev2.h>
  30. #include <video/sh_mobile_lcdc.h>
  31. #include <media/sh_mobile_ceu.h>
  32. #include <sound/sh_fsi.h>
  33. #include <sound/simple_card.h>
  34. #include <asm/io.h>
  35. #include <asm/heartbeat.h>
  36. #include <asm/clock.h>
  37. #include <asm/suspend.h>
  38. #include <cpu/sh7724.h>
  39. #include <mach-se/mach/se7724.h>
  40. /*
  41. * SWx 1234 5678
  42. * ------------------------------------
  43. * SW31 : 1001 1100 : default
  44. * SW32 : 0111 1111 : use on board flash
  45. *
  46. * SW41 : abxx xxxx -> a = 0 : Analog monitor
  47. * 1 : Digital monitor
  48. * b = 0 : VGA
  49. * 1 : 720p
  50. */
  51. /*
  52. * about 720p
  53. *
  54. * When you use 1280 x 720 lcdc output,
  55. * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
  56. * and change SW41 to use 720p
  57. */
  58. /*
  59. * about sound
  60. *
  61. * This setup.c supports FSI slave mode.
  62. * Please change J20, J21, J22 pin to 1-2 connection.
  63. */
  64. /* Heartbeat */
  65. static struct resource heartbeat_resource = {
  66. .start = PA_LED,
  67. .end = PA_LED,
  68. .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
  69. };
  70. static struct platform_device heartbeat_device = {
  71. .name = "heartbeat",
  72. .id = -1,
  73. .num_resources = 1,
  74. .resource = &heartbeat_resource,
  75. };
  76. /* LAN91C111 */
  77. static struct smc91x_platdata smc91x_info = {
  78. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  79. };
  80. static struct resource smc91x_eth_resources[] = {
  81. [0] = {
  82. .name = "SMC91C111" ,
  83. .start = 0x1a300300,
  84. .end = 0x1a30030f,
  85. .flags = IORESOURCE_MEM,
  86. },
  87. [1] = {
  88. .start = IRQ0_SMC,
  89. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  90. },
  91. };
  92. static struct platform_device smc91x_eth_device = {
  93. .name = "smc91x",
  94. .num_resources = ARRAY_SIZE(smc91x_eth_resources),
  95. .resource = smc91x_eth_resources,
  96. .dev = {
  97. .platform_data = &smc91x_info,
  98. },
  99. };
  100. /* MTD */
  101. static struct mtd_partition nor_flash_partitions[] = {
  102. {
  103. .name = "uboot",
  104. .offset = 0,
  105. .size = (1 * 1024 * 1024),
  106. .mask_flags = MTD_WRITEABLE, /* Read-only */
  107. }, {
  108. .name = "kernel",
  109. .offset = MTDPART_OFS_APPEND,
  110. .size = (2 * 1024 * 1024),
  111. }, {
  112. .name = "free-area",
  113. .offset = MTDPART_OFS_APPEND,
  114. .size = MTDPART_SIZ_FULL,
  115. },
  116. };
  117. static struct physmap_flash_data nor_flash_data = {
  118. .width = 2,
  119. .parts = nor_flash_partitions,
  120. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  121. };
  122. static struct resource nor_flash_resources[] = {
  123. [0] = {
  124. .name = "NOR Flash",
  125. .start = 0x00000000,
  126. .end = 0x01ffffff,
  127. .flags = IORESOURCE_MEM,
  128. }
  129. };
  130. static struct platform_device nor_flash_device = {
  131. .name = "physmap-flash",
  132. .resource = nor_flash_resources,
  133. .num_resources = ARRAY_SIZE(nor_flash_resources),
  134. .dev = {
  135. .platform_data = &nor_flash_data,
  136. },
  137. };
  138. /* LCDC */
  139. static const struct fb_videomode lcdc_720p_modes[] = {
  140. {
  141. .name = "LB070WV1",
  142. .sync = 0, /* hsync and vsync are active low */
  143. .xres = 1280,
  144. .yres = 720,
  145. .left_margin = 220,
  146. .right_margin = 110,
  147. .hsync_len = 40,
  148. .upper_margin = 20,
  149. .lower_margin = 5,
  150. .vsync_len = 5,
  151. },
  152. };
  153. static const struct fb_videomode lcdc_vga_modes[] = {
  154. {
  155. .name = "LB070WV1",
  156. .sync = 0, /* hsync and vsync are active low */
  157. .xres = 640,
  158. .yres = 480,
  159. .left_margin = 105,
  160. .right_margin = 50,
  161. .hsync_len = 96,
  162. .upper_margin = 33,
  163. .lower_margin = 10,
  164. .vsync_len = 2,
  165. },
  166. };
  167. static struct sh_mobile_lcdc_info lcdc_info = {
  168. .clock_source = LCDC_CLK_EXTERNAL,
  169. .ch[0] = {
  170. .chan = LCDC_CHAN_MAINLCD,
  171. .fourcc = V4L2_PIX_FMT_RGB565,
  172. .clock_divider = 1,
  173. .panel_cfg = { /* 7.0 inch */
  174. .width = 152,
  175. .height = 91,
  176. },
  177. }
  178. };
  179. static struct resource lcdc_resources[] = {
  180. [0] = {
  181. .name = "LCDC",
  182. .start = 0xfe940000,
  183. .end = 0xfe942fff,
  184. .flags = IORESOURCE_MEM,
  185. },
  186. [1] = {
  187. .start = evt2irq(0xf40),
  188. .flags = IORESOURCE_IRQ,
  189. },
  190. };
  191. static struct platform_device lcdc_device = {
  192. .name = "sh_mobile_lcdc_fb",
  193. .num_resources = ARRAY_SIZE(lcdc_resources),
  194. .resource = lcdc_resources,
  195. .dev = {
  196. .platform_data = &lcdc_info,
  197. },
  198. };
  199. /* CEU0 */
  200. static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
  201. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  202. };
  203. static struct resource ceu0_resources[] = {
  204. [0] = {
  205. .name = "CEU0",
  206. .start = 0xfe910000,
  207. .end = 0xfe91009f,
  208. .flags = IORESOURCE_MEM,
  209. },
  210. [1] = {
  211. .start = evt2irq(0x880),
  212. .flags = IORESOURCE_IRQ,
  213. },
  214. [2] = {
  215. /* place holder for contiguous memory */
  216. },
  217. };
  218. static struct platform_device ceu0_device = {
  219. .name = "sh_mobile_ceu",
  220. .id = 0, /* "ceu0" clock */
  221. .num_resources = ARRAY_SIZE(ceu0_resources),
  222. .resource = ceu0_resources,
  223. .dev = {
  224. .platform_data = &sh_mobile_ceu0_info,
  225. },
  226. };
  227. /* CEU1 */
  228. static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
  229. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  230. };
  231. static struct resource ceu1_resources[] = {
  232. [0] = {
  233. .name = "CEU1",
  234. .start = 0xfe914000,
  235. .end = 0xfe91409f,
  236. .flags = IORESOURCE_MEM,
  237. },
  238. [1] = {
  239. .start = evt2irq(0x9e0),
  240. .flags = IORESOURCE_IRQ,
  241. },
  242. [2] = {
  243. /* place holder for contiguous memory */
  244. },
  245. };
  246. static struct platform_device ceu1_device = {
  247. .name = "sh_mobile_ceu",
  248. .id = 1, /* "ceu1" clock */
  249. .num_resources = ARRAY_SIZE(ceu1_resources),
  250. .resource = ceu1_resources,
  251. .dev = {
  252. .platform_data = &sh_mobile_ceu1_info,
  253. },
  254. };
  255. /* FSI */
  256. /* change J20, J21, J22 pin to 1-2 connection to use slave mode */
  257. static struct sh_fsi_platform_info fsi_info = {
  258. .port_a = {
  259. .flags = SH_FSI_BRS_INV,
  260. },
  261. };
  262. static struct resource fsi_resources[] = {
  263. [0] = {
  264. .name = "FSI",
  265. .start = 0xFE3C0000,
  266. .end = 0xFE3C021d,
  267. .flags = IORESOURCE_MEM,
  268. },
  269. [1] = {
  270. .start = evt2irq(0xf80),
  271. .flags = IORESOURCE_IRQ,
  272. },
  273. };
  274. static struct platform_device fsi_device = {
  275. .name = "sh_fsi",
  276. .id = 0,
  277. .num_resources = ARRAY_SIZE(fsi_resources),
  278. .resource = fsi_resources,
  279. .dev = {
  280. .platform_data = &fsi_info,
  281. },
  282. };
  283. static struct asoc_simple_dai_init_info fsi2_ak4642_init_info = {
  284. .fmt = SND_SOC_DAIFMT_LEFT_J,
  285. .codec_daifmt = SND_SOC_DAIFMT_CBM_CFM,
  286. .cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
  287. .sysclk = 11289600,
  288. };
  289. static struct asoc_simple_card_info fsi_ak4642_info = {
  290. .name = "AK4642",
  291. .card = "FSIA-AK4642",
  292. .cpu_dai = "fsia-dai",
  293. .codec = "ak4642-codec.0-0012",
  294. .platform = "sh_fsi.0",
  295. .codec_dai = "ak4642-hifi",
  296. .init = &fsi2_ak4642_init_info,
  297. };
  298. static struct platform_device fsi_ak4642_device = {
  299. .name = "asoc-simple-card",
  300. .dev = {
  301. .platform_data = &fsi_ak4642_info,
  302. },
  303. };
  304. /* KEYSC in SoC (Needs SW33-2 set to ON) */
  305. static struct sh_keysc_info keysc_info = {
  306. .mode = SH_KEYSC_MODE_1,
  307. .scan_timing = 3,
  308. .delay = 50,
  309. .keycodes = {
  310. KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
  311. KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
  312. KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
  313. KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
  314. KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
  315. KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
  316. },
  317. };
  318. static struct resource keysc_resources[] = {
  319. [0] = {
  320. .name = "KEYSC",
  321. .start = 0x044b0000,
  322. .end = 0x044b000f,
  323. .flags = IORESOURCE_MEM,
  324. },
  325. [1] = {
  326. .start = evt2irq(0xbe0),
  327. .flags = IORESOURCE_IRQ,
  328. },
  329. };
  330. static struct platform_device keysc_device = {
  331. .name = "sh_keysc",
  332. .id = 0, /* "keysc0" clock */
  333. .num_resources = ARRAY_SIZE(keysc_resources),
  334. .resource = keysc_resources,
  335. .dev = {
  336. .platform_data = &keysc_info,
  337. },
  338. };
  339. /* SH Eth */
  340. static struct resource sh_eth_resources[] = {
  341. [0] = {
  342. .start = SH_ETH_ADDR,
  343. .end = SH_ETH_ADDR + 0x1FC,
  344. .flags = IORESOURCE_MEM,
  345. },
  346. [1] = {
  347. .start = evt2irq(0xd60),
  348. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  349. },
  350. };
  351. static struct sh_eth_plat_data sh_eth_plat = {
  352. .phy = 0x1f, /* SMSC LAN8187 */
  353. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  354. };
  355. static struct platform_device sh_eth_device = {
  356. .name = "sh-eth",
  357. .id = 0,
  358. .dev = {
  359. .platform_data = &sh_eth_plat,
  360. },
  361. .num_resources = ARRAY_SIZE(sh_eth_resources),
  362. .resource = sh_eth_resources,
  363. };
  364. static struct r8a66597_platdata sh7724_usb0_host_data = {
  365. .on_chip = 1,
  366. };
  367. static struct resource sh7724_usb0_host_resources[] = {
  368. [0] = {
  369. .start = 0xa4d80000,
  370. .end = 0xa4d80124 - 1,
  371. .flags = IORESOURCE_MEM,
  372. },
  373. [1] = {
  374. .start = evt2irq(0xa20),
  375. .end = evt2irq(0xa20),
  376. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  377. },
  378. };
  379. static struct platform_device sh7724_usb0_host_device = {
  380. .name = "r8a66597_hcd",
  381. .id = 0,
  382. .dev = {
  383. .dma_mask = NULL, /* not use dma */
  384. .coherent_dma_mask = 0xffffffff,
  385. .platform_data = &sh7724_usb0_host_data,
  386. },
  387. .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources),
  388. .resource = sh7724_usb0_host_resources,
  389. };
  390. static struct r8a66597_platdata sh7724_usb1_gadget_data = {
  391. .on_chip = 1,
  392. };
  393. static struct resource sh7724_usb1_gadget_resources[] = {
  394. [0] = {
  395. .start = 0xa4d90000,
  396. .end = 0xa4d90123,
  397. .flags = IORESOURCE_MEM,
  398. },
  399. [1] = {
  400. .start = evt2irq(0xa40),
  401. .end = evt2irq(0xa40),
  402. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  403. },
  404. };
  405. static struct platform_device sh7724_usb1_gadget_device = {
  406. .name = "r8a66597_udc",
  407. .id = 1, /* USB1 */
  408. .dev = {
  409. .dma_mask = NULL, /* not use dma */
  410. .coherent_dma_mask = 0xffffffff,
  411. .platform_data = &sh7724_usb1_gadget_data,
  412. },
  413. .num_resources = ARRAY_SIZE(sh7724_usb1_gadget_resources),
  414. .resource = sh7724_usb1_gadget_resources,
  415. };
  416. /* Fixed 3.3V regulator to be used by SDHI0, SDHI1 */
  417. static struct regulator_consumer_supply fixed3v3_power_consumers[] =
  418. {
  419. REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
  420. REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
  421. REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
  422. REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
  423. };
  424. static struct resource sdhi0_cn7_resources[] = {
  425. [0] = {
  426. .name = "SDHI0",
  427. .start = 0x04ce0000,
  428. .end = 0x04ce00ff,
  429. .flags = IORESOURCE_MEM,
  430. },
  431. [1] = {
  432. .start = evt2irq(0xe80),
  433. .flags = IORESOURCE_IRQ,
  434. },
  435. };
  436. static struct sh_mobile_sdhi_info sh7724_sdhi0_data = {
  437. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  438. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  439. .tmio_caps = MMC_CAP_SDIO_IRQ,
  440. };
  441. static struct platform_device sdhi0_cn7_device = {
  442. .name = "sh_mobile_sdhi",
  443. .id = 0,
  444. .num_resources = ARRAY_SIZE(sdhi0_cn7_resources),
  445. .resource = sdhi0_cn7_resources,
  446. .dev = {
  447. .platform_data = &sh7724_sdhi0_data,
  448. },
  449. };
  450. static struct resource sdhi1_cn8_resources[] = {
  451. [0] = {
  452. .name = "SDHI1",
  453. .start = 0x04cf0000,
  454. .end = 0x04cf00ff,
  455. .flags = IORESOURCE_MEM,
  456. },
  457. [1] = {
  458. .start = evt2irq(0x4e0),
  459. .flags = IORESOURCE_IRQ,
  460. },
  461. };
  462. static struct sh_mobile_sdhi_info sh7724_sdhi1_data = {
  463. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  464. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  465. .tmio_caps = MMC_CAP_SDIO_IRQ,
  466. };
  467. static struct platform_device sdhi1_cn8_device = {
  468. .name = "sh_mobile_sdhi",
  469. .id = 1,
  470. .num_resources = ARRAY_SIZE(sdhi1_cn8_resources),
  471. .resource = sdhi1_cn8_resources,
  472. .dev = {
  473. .platform_data = &sh7724_sdhi1_data,
  474. },
  475. };
  476. /* IrDA */
  477. static struct resource irda_resources[] = {
  478. [0] = {
  479. .name = "IrDA",
  480. .start = 0xA45D0000,
  481. .end = 0xA45D0049,
  482. .flags = IORESOURCE_MEM,
  483. },
  484. [1] = {
  485. .start = evt2irq(0x480),
  486. .flags = IORESOURCE_IRQ,
  487. },
  488. };
  489. static struct platform_device irda_device = {
  490. .name = "sh_sir",
  491. .num_resources = ARRAY_SIZE(irda_resources),
  492. .resource = irda_resources,
  493. };
  494. #include <media/ak881x.h>
  495. #include <media/sh_vou.h>
  496. static struct ak881x_pdata ak881x_pdata = {
  497. .flags = AK881X_IF_MODE_SLAVE,
  498. };
  499. static struct i2c_board_info ak8813 = {
  500. /* With open J18 jumper address is 0x21 */
  501. I2C_BOARD_INFO("ak8813", 0x20),
  502. .platform_data = &ak881x_pdata,
  503. };
  504. static struct sh_vou_pdata sh_vou_pdata = {
  505. .bus_fmt = SH_VOU_BUS_8BIT,
  506. .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW,
  507. .board_info = &ak8813,
  508. .i2c_adap = 0,
  509. };
  510. static struct resource sh_vou_resources[] = {
  511. [0] = {
  512. .start = 0xfe960000,
  513. .end = 0xfe962043,
  514. .flags = IORESOURCE_MEM,
  515. },
  516. [1] = {
  517. .start = evt2irq(0x8e0),
  518. .flags = IORESOURCE_IRQ,
  519. },
  520. };
  521. static struct platform_device vou_device = {
  522. .name = "sh-vou",
  523. .id = -1,
  524. .num_resources = ARRAY_SIZE(sh_vou_resources),
  525. .resource = sh_vou_resources,
  526. .dev = {
  527. .platform_data = &sh_vou_pdata,
  528. },
  529. };
  530. static struct platform_device *ms7724se_devices[] __initdata = {
  531. &heartbeat_device,
  532. &smc91x_eth_device,
  533. &lcdc_device,
  534. &nor_flash_device,
  535. &ceu0_device,
  536. &ceu1_device,
  537. &keysc_device,
  538. &sh_eth_device,
  539. &sh7724_usb0_host_device,
  540. &sh7724_usb1_gadget_device,
  541. &fsi_device,
  542. &fsi_ak4642_device,
  543. &sdhi0_cn7_device,
  544. &sdhi1_cn8_device,
  545. &irda_device,
  546. &vou_device,
  547. };
  548. /* I2C device */
  549. static struct i2c_board_info i2c0_devices[] = {
  550. {
  551. I2C_BOARD_INFO("ak4642", 0x12),
  552. },
  553. };
  554. #define EEPROM_OP 0xBA206000
  555. #define EEPROM_ADR 0xBA206004
  556. #define EEPROM_DATA 0xBA20600C
  557. #define EEPROM_STAT 0xBA206010
  558. #define EEPROM_STRT 0xBA206014
  559. static int __init sh_eth_is_eeprom_ready(void)
  560. {
  561. int t = 10000;
  562. while (t--) {
  563. if (!__raw_readw(EEPROM_STAT))
  564. return 1;
  565. udelay(1);
  566. }
  567. printk(KERN_ERR "ms7724se can not access to eeprom\n");
  568. return 0;
  569. }
  570. static void __init sh_eth_init(void)
  571. {
  572. int i;
  573. u16 mac;
  574. /* check EEPROM status */
  575. if (!sh_eth_is_eeprom_ready())
  576. return;
  577. /* read MAC addr from EEPROM */
  578. for (i = 0 ; i < 3 ; i++) {
  579. __raw_writew(0x0, EEPROM_OP); /* read */
  580. __raw_writew(i*2, EEPROM_ADR);
  581. __raw_writew(0x1, EEPROM_STRT);
  582. if (!sh_eth_is_eeprom_ready())
  583. return;
  584. mac = __raw_readw(EEPROM_DATA);
  585. sh_eth_plat.mac_addr[i << 1] = mac & 0xff;
  586. sh_eth_plat.mac_addr[(i << 1) + 1] = mac >> 8;
  587. }
  588. }
  589. #define SW4140 0xBA201000
  590. #define FPGA_OUT 0xBA200400
  591. #define PORT_HIZA 0xA4050158
  592. #define PORT_MSELCRB 0xA4050182
  593. #define SW41_A 0x0100
  594. #define SW41_B 0x0200
  595. #define SW41_C 0x0400
  596. #define SW41_D 0x0800
  597. #define SW41_E 0x1000
  598. #define SW41_F 0x2000
  599. #define SW41_G 0x4000
  600. #define SW41_H 0x8000
  601. extern char ms7724se_sdram_enter_start;
  602. extern char ms7724se_sdram_enter_end;
  603. extern char ms7724se_sdram_leave_start;
  604. extern char ms7724se_sdram_leave_end;
  605. static int __init arch_setup(void)
  606. {
  607. /* enable I2C device */
  608. i2c_register_board_info(0, i2c0_devices,
  609. ARRAY_SIZE(i2c0_devices));
  610. return 0;
  611. }
  612. arch_initcall(arch_setup);
  613. static int __init devices_setup(void)
  614. {
  615. u16 sw = __raw_readw(SW4140); /* select camera, monitor */
  616. struct clk *clk;
  617. u16 fpga_out;
  618. /* register board specific self-refresh code */
  619. sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF |
  620. SUSP_SH_RSTANDBY,
  621. &ms7724se_sdram_enter_start,
  622. &ms7724se_sdram_enter_end,
  623. &ms7724se_sdram_leave_start,
  624. &ms7724se_sdram_leave_end);
  625. regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
  626. ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
  627. /* Reset Release */
  628. fpga_out = __raw_readw(FPGA_OUT);
  629. /* bit4: NTSC_PDN, bit5: NTSC_RESET */
  630. fpga_out &= ~((1 << 1) | /* LAN */
  631. (1 << 4) | /* AK8813 PDN */
  632. (1 << 5) | /* AK8813 RESET */
  633. (1 << 6) | /* VIDEO DAC */
  634. (1 << 7) | /* AK4643 */
  635. (1 << 8) | /* IrDA */
  636. (1 << 12) | /* USB0 */
  637. (1 << 14)); /* RMII */
  638. __raw_writew(fpga_out | (1 << 4), FPGA_OUT);
  639. udelay(10);
  640. /* AK8813 RESET */
  641. __raw_writew(fpga_out | (1 << 5), FPGA_OUT);
  642. udelay(10);
  643. __raw_writew(fpga_out, FPGA_OUT);
  644. /* turn on USB clocks, use external clock */
  645. __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
  646. /* Let LED9 show STATUS2 */
  647. gpio_request(GPIO_FN_STATUS2, NULL);
  648. /* Lit LED10 show STATUS0 */
  649. gpio_request(GPIO_FN_STATUS0, NULL);
  650. /* Lit LED11 show PDSTATUS */
  651. gpio_request(GPIO_FN_PDSTATUS, NULL);
  652. /* enable USB0 port */
  653. __raw_writew(0x0600, 0xa40501d4);
  654. /* enable USB1 port */
  655. __raw_writew(0x0600, 0xa4050192);
  656. /* enable IRQ 0,1,2 */
  657. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  658. gpio_request(GPIO_FN_INTC_IRQ1, NULL);
  659. gpio_request(GPIO_FN_INTC_IRQ2, NULL);
  660. /* enable SCIFA3 */
  661. gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
  662. gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
  663. gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
  664. gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
  665. gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
  666. /* enable LCDC */
  667. gpio_request(GPIO_FN_LCDD23, NULL);
  668. gpio_request(GPIO_FN_LCDD22, NULL);
  669. gpio_request(GPIO_FN_LCDD21, NULL);
  670. gpio_request(GPIO_FN_LCDD20, NULL);
  671. gpio_request(GPIO_FN_LCDD19, NULL);
  672. gpio_request(GPIO_FN_LCDD18, NULL);
  673. gpio_request(GPIO_FN_LCDD17, NULL);
  674. gpio_request(GPIO_FN_LCDD16, NULL);
  675. gpio_request(GPIO_FN_LCDD15, NULL);
  676. gpio_request(GPIO_FN_LCDD14, NULL);
  677. gpio_request(GPIO_FN_LCDD13, NULL);
  678. gpio_request(GPIO_FN_LCDD12, NULL);
  679. gpio_request(GPIO_FN_LCDD11, NULL);
  680. gpio_request(GPIO_FN_LCDD10, NULL);
  681. gpio_request(GPIO_FN_LCDD9, NULL);
  682. gpio_request(GPIO_FN_LCDD8, NULL);
  683. gpio_request(GPIO_FN_LCDD7, NULL);
  684. gpio_request(GPIO_FN_LCDD6, NULL);
  685. gpio_request(GPIO_FN_LCDD5, NULL);
  686. gpio_request(GPIO_FN_LCDD4, NULL);
  687. gpio_request(GPIO_FN_LCDD3, NULL);
  688. gpio_request(GPIO_FN_LCDD2, NULL);
  689. gpio_request(GPIO_FN_LCDD1, NULL);
  690. gpio_request(GPIO_FN_LCDD0, NULL);
  691. gpio_request(GPIO_FN_LCDDISP, NULL);
  692. gpio_request(GPIO_FN_LCDHSYN, NULL);
  693. gpio_request(GPIO_FN_LCDDCK, NULL);
  694. gpio_request(GPIO_FN_LCDVSYN, NULL);
  695. gpio_request(GPIO_FN_LCDDON, NULL);
  696. gpio_request(GPIO_FN_LCDVEPWC, NULL);
  697. gpio_request(GPIO_FN_LCDVCPWC, NULL);
  698. gpio_request(GPIO_FN_LCDRD, NULL);
  699. gpio_request(GPIO_FN_LCDLCLK, NULL);
  700. __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA);
  701. /* enable CEU0 */
  702. gpio_request(GPIO_FN_VIO0_D15, NULL);
  703. gpio_request(GPIO_FN_VIO0_D14, NULL);
  704. gpio_request(GPIO_FN_VIO0_D13, NULL);
  705. gpio_request(GPIO_FN_VIO0_D12, NULL);
  706. gpio_request(GPIO_FN_VIO0_D11, NULL);
  707. gpio_request(GPIO_FN_VIO0_D10, NULL);
  708. gpio_request(GPIO_FN_VIO0_D9, NULL);
  709. gpio_request(GPIO_FN_VIO0_D8, NULL);
  710. gpio_request(GPIO_FN_VIO0_D7, NULL);
  711. gpio_request(GPIO_FN_VIO0_D6, NULL);
  712. gpio_request(GPIO_FN_VIO0_D5, NULL);
  713. gpio_request(GPIO_FN_VIO0_D4, NULL);
  714. gpio_request(GPIO_FN_VIO0_D3, NULL);
  715. gpio_request(GPIO_FN_VIO0_D2, NULL);
  716. gpio_request(GPIO_FN_VIO0_D1, NULL);
  717. gpio_request(GPIO_FN_VIO0_D0, NULL);
  718. gpio_request(GPIO_FN_VIO0_VD, NULL);
  719. gpio_request(GPIO_FN_VIO0_CLK, NULL);
  720. gpio_request(GPIO_FN_VIO0_FLD, NULL);
  721. gpio_request(GPIO_FN_VIO0_HD, NULL);
  722. platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
  723. /* enable CEU1 */
  724. gpio_request(GPIO_FN_VIO1_D7, NULL);
  725. gpio_request(GPIO_FN_VIO1_D6, NULL);
  726. gpio_request(GPIO_FN_VIO1_D5, NULL);
  727. gpio_request(GPIO_FN_VIO1_D4, NULL);
  728. gpio_request(GPIO_FN_VIO1_D3, NULL);
  729. gpio_request(GPIO_FN_VIO1_D2, NULL);
  730. gpio_request(GPIO_FN_VIO1_D1, NULL);
  731. gpio_request(GPIO_FN_VIO1_D0, NULL);
  732. gpio_request(GPIO_FN_VIO1_FLD, NULL);
  733. gpio_request(GPIO_FN_VIO1_HD, NULL);
  734. gpio_request(GPIO_FN_VIO1_VD, NULL);
  735. gpio_request(GPIO_FN_VIO1_CLK, NULL);
  736. platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
  737. /* KEYSC */
  738. gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
  739. gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
  740. gpio_request(GPIO_FN_KEYIN4, NULL);
  741. gpio_request(GPIO_FN_KEYIN3, NULL);
  742. gpio_request(GPIO_FN_KEYIN2, NULL);
  743. gpio_request(GPIO_FN_KEYIN1, NULL);
  744. gpio_request(GPIO_FN_KEYIN0, NULL);
  745. gpio_request(GPIO_FN_KEYOUT3, NULL);
  746. gpio_request(GPIO_FN_KEYOUT2, NULL);
  747. gpio_request(GPIO_FN_KEYOUT1, NULL);
  748. gpio_request(GPIO_FN_KEYOUT0, NULL);
  749. /* enable FSI */
  750. gpio_request(GPIO_FN_FSIMCKA, NULL);
  751. gpio_request(GPIO_FN_FSIIASD, NULL);
  752. gpio_request(GPIO_FN_FSIOASD, NULL);
  753. gpio_request(GPIO_FN_FSIIABCK, NULL);
  754. gpio_request(GPIO_FN_FSIIALRCK, NULL);
  755. gpio_request(GPIO_FN_FSIOABCK, NULL);
  756. gpio_request(GPIO_FN_FSIOALRCK, NULL);
  757. gpio_request(GPIO_FN_CLKAUDIOAO, NULL);
  758. /* set SPU2 clock to 83.4 MHz */
  759. clk = clk_get(NULL, "spu_clk");
  760. if (!IS_ERR(clk)) {
  761. clk_set_rate(clk, clk_round_rate(clk, 83333333));
  762. clk_put(clk);
  763. }
  764. /* change parent of FSI A */
  765. clk = clk_get(NULL, "fsia_clk");
  766. if (!IS_ERR(clk)) {
  767. /* 48kHz dummy clock was used to make sure 1/1 divide */
  768. clk_set_rate(&sh7724_fsimcka_clk, 48000);
  769. clk_set_parent(clk, &sh7724_fsimcka_clk);
  770. clk_set_rate(clk, 48000);
  771. clk_put(clk);
  772. }
  773. /* SDHI0 connected to cn7 */
  774. gpio_request(GPIO_FN_SDHI0CD, NULL);
  775. gpio_request(GPIO_FN_SDHI0WP, NULL);
  776. gpio_request(GPIO_FN_SDHI0D3, NULL);
  777. gpio_request(GPIO_FN_SDHI0D2, NULL);
  778. gpio_request(GPIO_FN_SDHI0D1, NULL);
  779. gpio_request(GPIO_FN_SDHI0D0, NULL);
  780. gpio_request(GPIO_FN_SDHI0CMD, NULL);
  781. gpio_request(GPIO_FN_SDHI0CLK, NULL);
  782. /* SDHI1 connected to cn8 */
  783. gpio_request(GPIO_FN_SDHI1CD, NULL);
  784. gpio_request(GPIO_FN_SDHI1WP, NULL);
  785. gpio_request(GPIO_FN_SDHI1D3, NULL);
  786. gpio_request(GPIO_FN_SDHI1D2, NULL);
  787. gpio_request(GPIO_FN_SDHI1D1, NULL);
  788. gpio_request(GPIO_FN_SDHI1D0, NULL);
  789. gpio_request(GPIO_FN_SDHI1CMD, NULL);
  790. gpio_request(GPIO_FN_SDHI1CLK, NULL);
  791. /* enable IrDA */
  792. gpio_request(GPIO_FN_IRDA_OUT, NULL);
  793. gpio_request(GPIO_FN_IRDA_IN, NULL);
  794. /*
  795. * enable SH-Eth
  796. *
  797. * please remove J33 pin from your board !!
  798. *
  799. * ms7724 board should not use GPIO_FN_LNKSTA pin
  800. * So, This time PTX5 is set to input pin
  801. */
  802. gpio_request(GPIO_FN_RMII_RXD0, NULL);
  803. gpio_request(GPIO_FN_RMII_RXD1, NULL);
  804. gpio_request(GPIO_FN_RMII_TXD0, NULL);
  805. gpio_request(GPIO_FN_RMII_TXD1, NULL);
  806. gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
  807. gpio_request(GPIO_FN_RMII_TX_EN, NULL);
  808. gpio_request(GPIO_FN_RMII_RX_ER, NULL);
  809. gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
  810. gpio_request(GPIO_FN_MDIO, NULL);
  811. gpio_request(GPIO_FN_MDC, NULL);
  812. gpio_request(GPIO_PTX5, NULL);
  813. gpio_direction_input(GPIO_PTX5);
  814. sh_eth_init();
  815. if (sw & SW41_B) {
  816. /* 720p */
  817. lcdc_info.ch[0].lcd_modes = lcdc_720p_modes;
  818. lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_720p_modes);
  819. } else {
  820. /* VGA */
  821. lcdc_info.ch[0].lcd_modes = lcdc_vga_modes;
  822. lcdc_info.ch[0].num_modes = ARRAY_SIZE(lcdc_vga_modes);
  823. }
  824. if (sw & SW41_A) {
  825. /* Digital monitor */
  826. lcdc_info.ch[0].interface_type = RGB18;
  827. lcdc_info.ch[0].flags = 0;
  828. } else {
  829. /* Analog monitor */
  830. lcdc_info.ch[0].interface_type = RGB24;
  831. lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
  832. }
  833. /* VOU */
  834. gpio_request(GPIO_FN_DV_D15, NULL);
  835. gpio_request(GPIO_FN_DV_D14, NULL);
  836. gpio_request(GPIO_FN_DV_D13, NULL);
  837. gpio_request(GPIO_FN_DV_D12, NULL);
  838. gpio_request(GPIO_FN_DV_D11, NULL);
  839. gpio_request(GPIO_FN_DV_D10, NULL);
  840. gpio_request(GPIO_FN_DV_D9, NULL);
  841. gpio_request(GPIO_FN_DV_D8, NULL);
  842. gpio_request(GPIO_FN_DV_CLKI, NULL);
  843. gpio_request(GPIO_FN_DV_CLK, NULL);
  844. gpio_request(GPIO_FN_DV_VSYNC, NULL);
  845. gpio_request(GPIO_FN_DV_HSYNC, NULL);
  846. return platform_add_devices(ms7724se_devices,
  847. ARRAY_SIZE(ms7724se_devices));
  848. }
  849. device_initcall(devices_setup);
  850. static struct sh_machine_vector mv_ms7724se __initmv = {
  851. .mv_name = "ms7724se",
  852. .mv_init_irq = init_se7724_IRQ,
  853. };