pci.c 26 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170
  1. /*
  2. * Copyright IBM Corp. 2012
  3. *
  4. * Author(s):
  5. * Jan Glauber <jang@linux.vnet.ibm.com>
  6. *
  7. * The System z PCI code is a rewrite from a prototype by
  8. * the following people (Kudoz!):
  9. * Alexander Schmidt
  10. * Christoph Raisch
  11. * Hannes Hering
  12. * Hoang-Nam Nguyen
  13. * Jan-Bernd Themann
  14. * Stefan Roscher
  15. * Thomas Klein
  16. */
  17. #define COMPONENT "zPCI"
  18. #define pr_fmt(fmt) COMPONENT ": " fmt
  19. #include <linux/kernel.h>
  20. #include <linux/slab.h>
  21. #include <linux/err.h>
  22. #include <linux/export.h>
  23. #include <linux/delay.h>
  24. #include <linux/irq.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/seq_file.h>
  27. #include <linux/pci.h>
  28. #include <linux/msi.h>
  29. #include <asm/isc.h>
  30. #include <asm/airq.h>
  31. #include <asm/facility.h>
  32. #include <asm/pci_insn.h>
  33. #include <asm/pci_clp.h>
  34. #include <asm/pci_dma.h>
  35. #define DEBUG /* enable pr_debug */
  36. #define SIC_IRQ_MODE_ALL 0
  37. #define SIC_IRQ_MODE_SINGLE 1
  38. #define ZPCI_NR_DMA_SPACES 1
  39. #define ZPCI_MSI_VEC_BITS 6
  40. #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS
  41. /* list of all detected zpci devices */
  42. LIST_HEAD(zpci_list);
  43. EXPORT_SYMBOL_GPL(zpci_list);
  44. DEFINE_MUTEX(zpci_list_lock);
  45. EXPORT_SYMBOL_GPL(zpci_list_lock);
  46. struct pci_hp_callback_ops hotplug_ops;
  47. EXPORT_SYMBOL_GPL(hotplug_ops);
  48. static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES);
  49. static DEFINE_SPINLOCK(zpci_domain_lock);
  50. struct callback {
  51. irq_handler_t handler;
  52. void *data;
  53. };
  54. struct zdev_irq_map {
  55. unsigned long aibv; /* AI bit vector */
  56. int msi_vecs; /* consecutive MSI-vectors used */
  57. int __unused;
  58. struct callback cb[ZPCI_NR_MSI_VECS]; /* callback handler array */
  59. spinlock_t lock; /* protect callbacks against de-reg */
  60. };
  61. struct intr_bucket {
  62. /* amap of adapters, one bit per dev, corresponds to one irq nr */
  63. unsigned long *alloc;
  64. /* AI summary bit, global page for all devices */
  65. unsigned long *aisb;
  66. /* pointer to aibv and callback data in zdev */
  67. struct zdev_irq_map *imap[ZPCI_NR_DEVICES];
  68. /* protects the whole bucket struct */
  69. spinlock_t lock;
  70. };
  71. static struct intr_bucket *bucket;
  72. /* Adapter local summary indicator */
  73. static u8 *zpci_irq_si;
  74. static atomic_t irq_retries = ATOMIC_INIT(0);
  75. /* I/O Map */
  76. static DEFINE_SPINLOCK(zpci_iomap_lock);
  77. static DECLARE_BITMAP(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  78. struct zpci_iomap_entry *zpci_iomap_start;
  79. EXPORT_SYMBOL_GPL(zpci_iomap_start);
  80. /* highest irq summary bit */
  81. static int __read_mostly aisb_max;
  82. static struct kmem_cache *zdev_irq_cache;
  83. static struct kmem_cache *zdev_fmb_cache;
  84. debug_info_t *pci_debug_msg_id;
  85. debug_info_t *pci_debug_err_id;
  86. static inline int irq_to_msi_nr(unsigned int irq)
  87. {
  88. return irq & ZPCI_MSI_MASK;
  89. }
  90. static inline int irq_to_dev_nr(unsigned int irq)
  91. {
  92. return irq >> ZPCI_MSI_VEC_BITS;
  93. }
  94. static inline struct zdev_irq_map *get_imap(unsigned int irq)
  95. {
  96. return bucket->imap[irq_to_dev_nr(irq)];
  97. }
  98. struct zpci_dev *get_zdev(struct pci_dev *pdev)
  99. {
  100. return (struct zpci_dev *) pdev->sysdata;
  101. }
  102. struct zpci_dev *get_zdev_by_fid(u32 fid)
  103. {
  104. struct zpci_dev *tmp, *zdev = NULL;
  105. mutex_lock(&zpci_list_lock);
  106. list_for_each_entry(tmp, &zpci_list, entry) {
  107. if (tmp->fid == fid) {
  108. zdev = tmp;
  109. break;
  110. }
  111. }
  112. mutex_unlock(&zpci_list_lock);
  113. return zdev;
  114. }
  115. bool zpci_fid_present(u32 fid)
  116. {
  117. return (get_zdev_by_fid(fid) != NULL) ? true : false;
  118. }
  119. static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus)
  120. {
  121. return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL;
  122. }
  123. int pci_domain_nr(struct pci_bus *bus)
  124. {
  125. return ((struct zpci_dev *) bus->sysdata)->domain;
  126. }
  127. EXPORT_SYMBOL_GPL(pci_domain_nr);
  128. int pci_proc_domain(struct pci_bus *bus)
  129. {
  130. return pci_domain_nr(bus);
  131. }
  132. EXPORT_SYMBOL_GPL(pci_proc_domain);
  133. /* Store PCI function information block */
  134. static int zpci_store_fib(struct zpci_dev *zdev, u8 *fc)
  135. {
  136. struct zpci_fib *fib;
  137. u8 status, cc;
  138. fib = (void *) get_zeroed_page(GFP_KERNEL);
  139. if (!fib)
  140. return -ENOMEM;
  141. do {
  142. cc = __stpcifc(zdev->fh, 0, fib, &status);
  143. if (cc == 2) {
  144. msleep(ZPCI_INSN_BUSY_DELAY);
  145. memset(fib, 0, PAGE_SIZE);
  146. }
  147. } while (cc == 2);
  148. if (cc)
  149. pr_err_once("%s: cc: %u status: %u\n",
  150. __func__, cc, status);
  151. /* Return PCI function controls */
  152. *fc = fib->fc;
  153. free_page((unsigned long) fib);
  154. return (cc) ? -EIO : 0;
  155. }
  156. /* Modify PCI: Register adapter interruptions */
  157. static int zpci_register_airq(struct zpci_dev *zdev, unsigned int aisb,
  158. u64 aibv)
  159. {
  160. u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT);
  161. struct zpci_fib *fib;
  162. int rc;
  163. fib = (void *) get_zeroed_page(GFP_KERNEL);
  164. if (!fib)
  165. return -ENOMEM;
  166. fib->isc = PCI_ISC;
  167. fib->noi = zdev->irq_map->msi_vecs;
  168. fib->sum = 1; /* enable summary notifications */
  169. fib->aibv = aibv;
  170. fib->aibvo = 0; /* every function has its own page */
  171. fib->aisb = (u64) bucket->aisb + aisb / 8;
  172. fib->aisbo = aisb & ZPCI_MSI_MASK;
  173. rc = mpcifc_instr(req, fib);
  174. pr_debug("%s mpcifc returned noi: %d\n", __func__, fib->noi);
  175. free_page((unsigned long) fib);
  176. return rc;
  177. }
  178. struct mod_pci_args {
  179. u64 base;
  180. u64 limit;
  181. u64 iota;
  182. u64 fmb_addr;
  183. };
  184. static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args)
  185. {
  186. u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn);
  187. struct zpci_fib *fib;
  188. int rc;
  189. /* The FIB must be available even if it's not used */
  190. fib = (void *) get_zeroed_page(GFP_KERNEL);
  191. if (!fib)
  192. return -ENOMEM;
  193. fib->pba = args->base;
  194. fib->pal = args->limit;
  195. fib->iota = args->iota;
  196. fib->fmb_addr = args->fmb_addr;
  197. rc = mpcifc_instr(req, fib);
  198. free_page((unsigned long) fib);
  199. return rc;
  200. }
  201. /* Modify PCI: Register I/O address translation parameters */
  202. int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
  203. u64 base, u64 limit, u64 iota)
  204. {
  205. struct mod_pci_args args = { base, limit, iota, 0 };
  206. WARN_ON_ONCE(iota & 0x3fff);
  207. args.iota |= ZPCI_IOTA_RTTO_FLAG;
  208. return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args);
  209. }
  210. /* Modify PCI: Unregister I/O address translation parameters */
  211. int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
  212. {
  213. struct mod_pci_args args = { 0, 0, 0, 0 };
  214. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args);
  215. }
  216. /* Modify PCI: Unregister adapter interruptions */
  217. static int zpci_unregister_airq(struct zpci_dev *zdev)
  218. {
  219. struct mod_pci_args args = { 0, 0, 0, 0 };
  220. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args);
  221. }
  222. /* Modify PCI: Set PCI function measurement parameters */
  223. int zpci_fmb_enable_device(struct zpci_dev *zdev)
  224. {
  225. struct mod_pci_args args = { 0, 0, 0, 0 };
  226. if (zdev->fmb)
  227. return -EINVAL;
  228. zdev->fmb = kmem_cache_alloc(zdev_fmb_cache, GFP_KERNEL);
  229. if (!zdev->fmb)
  230. return -ENOMEM;
  231. memset(zdev->fmb, 0, sizeof(*zdev->fmb));
  232. WARN_ON((u64) zdev->fmb & 0xf);
  233. args.fmb_addr = virt_to_phys(zdev->fmb);
  234. return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  235. }
  236. /* Modify PCI: Disable PCI function measurement */
  237. int zpci_fmb_disable_device(struct zpci_dev *zdev)
  238. {
  239. struct mod_pci_args args = { 0, 0, 0, 0 };
  240. int rc;
  241. if (!zdev->fmb)
  242. return -EINVAL;
  243. /* Function measurement is disabled if fmb address is zero */
  244. rc = mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  245. kmem_cache_free(zdev_fmb_cache, zdev->fmb);
  246. zdev->fmb = NULL;
  247. return rc;
  248. }
  249. #define ZPCI_PCIAS_CFGSPC 15
  250. static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
  251. {
  252. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  253. u64 data;
  254. int rc;
  255. rc = pcilg_instr(&data, req, offset);
  256. data = data << ((8 - len) * 8);
  257. data = le64_to_cpu(data);
  258. if (!rc)
  259. *val = (u32) data;
  260. else
  261. *val = 0xffffffff;
  262. return rc;
  263. }
  264. static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
  265. {
  266. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  267. u64 data = val;
  268. int rc;
  269. data = cpu_to_le64(data);
  270. data = data >> ((8 - len) * 8);
  271. rc = pcistg_instr(data, req, offset);
  272. return rc;
  273. }
  274. void synchronize_irq(unsigned int irq)
  275. {
  276. /*
  277. * Not needed, the handler is protected by a lock and IRQs that occur
  278. * after the handler is deleted are just NOPs.
  279. */
  280. }
  281. EXPORT_SYMBOL_GPL(synchronize_irq);
  282. void enable_irq(unsigned int irq)
  283. {
  284. struct msi_desc *msi = irq_get_msi_desc(irq);
  285. zpci_msi_set_mask_bits(msi, 1, 0);
  286. }
  287. EXPORT_SYMBOL_GPL(enable_irq);
  288. void disable_irq(unsigned int irq)
  289. {
  290. struct msi_desc *msi = irq_get_msi_desc(irq);
  291. zpci_msi_set_mask_bits(msi, 1, 1);
  292. }
  293. EXPORT_SYMBOL_GPL(disable_irq);
  294. void disable_irq_nosync(unsigned int irq)
  295. {
  296. disable_irq(irq);
  297. }
  298. EXPORT_SYMBOL_GPL(disable_irq_nosync);
  299. unsigned long probe_irq_on(void)
  300. {
  301. return 0;
  302. }
  303. EXPORT_SYMBOL_GPL(probe_irq_on);
  304. int probe_irq_off(unsigned long val)
  305. {
  306. return 0;
  307. }
  308. EXPORT_SYMBOL_GPL(probe_irq_off);
  309. unsigned int probe_irq_mask(unsigned long val)
  310. {
  311. return val;
  312. }
  313. EXPORT_SYMBOL_GPL(probe_irq_mask);
  314. void pcibios_fixup_bus(struct pci_bus *bus)
  315. {
  316. }
  317. resource_size_t pcibios_align_resource(void *data, const struct resource *res,
  318. resource_size_t size,
  319. resource_size_t align)
  320. {
  321. return 0;
  322. }
  323. /* combine single writes by using store-block insn */
  324. void __iowrite64_copy(void __iomem *to, const void *from, size_t count)
  325. {
  326. zpci_memcpy_toio(to, from, count);
  327. }
  328. /* Create a virtual mapping cookie for a PCI BAR */
  329. void __iomem *pci_iomap(struct pci_dev *pdev, int bar, unsigned long max)
  330. {
  331. struct zpci_dev *zdev = get_zdev(pdev);
  332. u64 addr;
  333. int idx;
  334. if ((bar & 7) != bar)
  335. return NULL;
  336. idx = zdev->bars[bar].map_idx;
  337. spin_lock(&zpci_iomap_lock);
  338. zpci_iomap_start[idx].fh = zdev->fh;
  339. zpci_iomap_start[idx].bar = bar;
  340. spin_unlock(&zpci_iomap_lock);
  341. addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48);
  342. return (void __iomem *) addr;
  343. }
  344. EXPORT_SYMBOL_GPL(pci_iomap);
  345. void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
  346. {
  347. unsigned int idx;
  348. idx = (((__force u64) addr) & ~ZPCI_IOMAP_ADDR_BASE) >> 48;
  349. spin_lock(&zpci_iomap_lock);
  350. zpci_iomap_start[idx].fh = 0;
  351. zpci_iomap_start[idx].bar = 0;
  352. spin_unlock(&zpci_iomap_lock);
  353. }
  354. EXPORT_SYMBOL_GPL(pci_iounmap);
  355. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
  356. int size, u32 *val)
  357. {
  358. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  359. if (!zdev || devfn != ZPCI_DEVFN)
  360. return 0;
  361. return zpci_cfg_load(zdev, where, val, size);
  362. }
  363. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
  364. int size, u32 val)
  365. {
  366. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  367. if (!zdev || devfn != ZPCI_DEVFN)
  368. return 0;
  369. return zpci_cfg_store(zdev, where, val, size);
  370. }
  371. static struct pci_ops pci_root_ops = {
  372. .read = pci_read,
  373. .write = pci_write,
  374. };
  375. /* store the last handled bit to implement fair scheduling of devices */
  376. static DEFINE_PER_CPU(unsigned long, next_sbit);
  377. static void zpci_irq_handler(void *dont, void *need)
  378. {
  379. unsigned long sbit, mbit, last = 0, start = __get_cpu_var(next_sbit);
  380. int rescan = 0, max = aisb_max;
  381. struct zdev_irq_map *imap;
  382. kstat_cpu(smp_processor_id()).irqs[IOINT_PCI]++;
  383. sbit = start;
  384. scan:
  385. /* find summary_bit */
  386. for_each_set_bit_left_cont(sbit, bucket->aisb, max) {
  387. clear_bit(63 - (sbit & 63), bucket->aisb + (sbit >> 6));
  388. last = sbit;
  389. /* find vector bit */
  390. imap = bucket->imap[sbit];
  391. for_each_set_bit_left(mbit, &imap->aibv, imap->msi_vecs) {
  392. kstat_cpu(smp_processor_id()).irqs[IOINT_MSI]++;
  393. clear_bit(63 - mbit, &imap->aibv);
  394. spin_lock(&imap->lock);
  395. if (imap->cb[mbit].handler)
  396. imap->cb[mbit].handler(mbit,
  397. imap->cb[mbit].data);
  398. spin_unlock(&imap->lock);
  399. }
  400. }
  401. if (rescan)
  402. goto out;
  403. /* scan the skipped bits */
  404. if (start > 0) {
  405. sbit = 0;
  406. max = start;
  407. start = 0;
  408. goto scan;
  409. }
  410. /* enable interrupts again */
  411. sic_instr(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  412. /* check again to not lose initiative */
  413. rmb();
  414. max = aisb_max;
  415. sbit = find_first_bit_left(bucket->aisb, max);
  416. if (sbit != max) {
  417. atomic_inc(&irq_retries);
  418. rescan++;
  419. goto scan;
  420. }
  421. out:
  422. /* store next device bit to scan */
  423. __get_cpu_var(next_sbit) = (++last >= aisb_max) ? 0 : last;
  424. }
  425. /* msi_vecs - number of requested interrupts, 0 place function to error state */
  426. static int zpci_setup_msi(struct pci_dev *pdev, int msi_vecs)
  427. {
  428. struct zpci_dev *zdev = get_zdev(pdev);
  429. unsigned int aisb, msi_nr;
  430. struct msi_desc *msi;
  431. int rc;
  432. /* store the number of used MSI vectors */
  433. zdev->irq_map->msi_vecs = min(msi_vecs, ZPCI_NR_MSI_VECS);
  434. spin_lock(&bucket->lock);
  435. aisb = find_first_zero_bit(bucket->alloc, PAGE_SIZE);
  436. /* alloc map exhausted? */
  437. if (aisb == PAGE_SIZE) {
  438. spin_unlock(&bucket->lock);
  439. return -EIO;
  440. }
  441. set_bit(aisb, bucket->alloc);
  442. spin_unlock(&bucket->lock);
  443. zdev->aisb = aisb;
  444. if (aisb + 1 > aisb_max)
  445. aisb_max = aisb + 1;
  446. /* wire up IRQ shortcut pointer */
  447. bucket->imap[zdev->aisb] = zdev->irq_map;
  448. pr_debug("%s: imap[%u] linked to %p\n", __func__, zdev->aisb, zdev->irq_map);
  449. /* TODO: irq number 0 wont be found if we return less than requested MSIs.
  450. * ignore it for now and fix in common code.
  451. */
  452. msi_nr = aisb << ZPCI_MSI_VEC_BITS;
  453. list_for_each_entry(msi, &pdev->msi_list, list) {
  454. rc = zpci_setup_msi_irq(zdev, msi, msi_nr,
  455. aisb << ZPCI_MSI_VEC_BITS);
  456. if (rc)
  457. return rc;
  458. msi_nr++;
  459. }
  460. rc = zpci_register_airq(zdev, aisb, (u64) &zdev->irq_map->aibv);
  461. if (rc) {
  462. clear_bit(aisb, bucket->alloc);
  463. dev_err(&pdev->dev, "register MSI failed with: %d\n", rc);
  464. return rc;
  465. }
  466. return (zdev->irq_map->msi_vecs == msi_vecs) ?
  467. 0 : zdev->irq_map->msi_vecs;
  468. }
  469. static void zpci_teardown_msi(struct pci_dev *pdev)
  470. {
  471. struct zpci_dev *zdev = get_zdev(pdev);
  472. struct msi_desc *msi;
  473. int aisb, rc;
  474. rc = zpci_unregister_airq(zdev);
  475. if (rc) {
  476. dev_err(&pdev->dev, "deregister MSI failed with: %d\n", rc);
  477. return;
  478. }
  479. msi = list_first_entry(&pdev->msi_list, struct msi_desc, list);
  480. aisb = irq_to_dev_nr(msi->irq);
  481. list_for_each_entry(msi, &pdev->msi_list, list)
  482. zpci_teardown_msi_irq(zdev, msi);
  483. clear_bit(aisb, bucket->alloc);
  484. if (aisb + 1 == aisb_max)
  485. aisb_max--;
  486. }
  487. int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
  488. {
  489. pr_debug("%s: requesting %d MSI-X interrupts...", __func__, nvec);
  490. if (type != PCI_CAP_ID_MSIX && type != PCI_CAP_ID_MSI)
  491. return -EINVAL;
  492. return zpci_setup_msi(pdev, nvec);
  493. }
  494. void arch_teardown_msi_irqs(struct pci_dev *pdev)
  495. {
  496. pr_info("%s: on pdev: %p\n", __func__, pdev);
  497. zpci_teardown_msi(pdev);
  498. }
  499. static void zpci_map_resources(struct zpci_dev *zdev)
  500. {
  501. struct pci_dev *pdev = zdev->pdev;
  502. resource_size_t len;
  503. int i;
  504. for (i = 0; i < PCI_BAR_COUNT; i++) {
  505. len = pci_resource_len(pdev, i);
  506. if (!len)
  507. continue;
  508. pdev->resource[i].start = (resource_size_t) pci_iomap(pdev, i, 0);
  509. pdev->resource[i].end = pdev->resource[i].start + len - 1;
  510. pr_debug("BAR%i: -> start: %Lx end: %Lx\n",
  511. i, pdev->resource[i].start, pdev->resource[i].end);
  512. }
  513. };
  514. static void zpci_unmap_resources(struct pci_dev *pdev)
  515. {
  516. resource_size_t len;
  517. int i;
  518. for (i = 0; i < PCI_BAR_COUNT; i++) {
  519. len = pci_resource_len(pdev, i);
  520. if (!len)
  521. continue;
  522. pci_iounmap(pdev, (void *) pdev->resource[i].start);
  523. }
  524. };
  525. struct zpci_dev *zpci_alloc_device(void)
  526. {
  527. struct zpci_dev *zdev;
  528. /* Alloc memory for our private pci device data */
  529. zdev = kzalloc(sizeof(*zdev), GFP_KERNEL);
  530. if (!zdev)
  531. return ERR_PTR(-ENOMEM);
  532. /* Alloc aibv & callback space */
  533. zdev->irq_map = kmem_cache_zalloc(zdev_irq_cache, GFP_KERNEL);
  534. if (!zdev->irq_map)
  535. goto error;
  536. WARN_ON((u64) zdev->irq_map & 0xff);
  537. return zdev;
  538. error:
  539. kfree(zdev);
  540. return ERR_PTR(-ENOMEM);
  541. }
  542. void zpci_free_device(struct zpci_dev *zdev)
  543. {
  544. kmem_cache_free(zdev_irq_cache, zdev->irq_map);
  545. kfree(zdev);
  546. }
  547. /* Called on removal of pci_dev, leaves zpci and bus device */
  548. static void zpci_remove_device(struct pci_dev *pdev)
  549. {
  550. struct zpci_dev *zdev = get_zdev(pdev);
  551. dev_info(&pdev->dev, "Removing device %u\n", zdev->domain);
  552. zdev->state = ZPCI_FN_STATE_CONFIGURED;
  553. zpci_dma_exit_device(zdev);
  554. zpci_fmb_disable_device(zdev);
  555. zpci_sysfs_remove_device(&pdev->dev);
  556. zpci_unmap_resources(pdev);
  557. list_del(&zdev->entry); /* can be called from init */
  558. zdev->pdev = NULL;
  559. }
  560. static void zpci_scan_devices(void)
  561. {
  562. struct zpci_dev *zdev;
  563. mutex_lock(&zpci_list_lock);
  564. list_for_each_entry(zdev, &zpci_list, entry)
  565. if (zdev->state == ZPCI_FN_STATE_CONFIGURED)
  566. zpci_scan_device(zdev);
  567. mutex_unlock(&zpci_list_lock);
  568. }
  569. /*
  570. * Too late for any s390 specific setup, since interrupts must be set up
  571. * already which requires DMA setup too and the pci scan will access the
  572. * config space, which only works if the function handle is enabled.
  573. */
  574. int pcibios_enable_device(struct pci_dev *pdev, int mask)
  575. {
  576. struct resource *res;
  577. u16 cmd;
  578. int i;
  579. pci_read_config_word(pdev, PCI_COMMAND, &cmd);
  580. for (i = 0; i < PCI_BAR_COUNT; i++) {
  581. res = &pdev->resource[i];
  582. if (res->flags & IORESOURCE_IO)
  583. return -EINVAL;
  584. if (res->flags & IORESOURCE_MEM)
  585. cmd |= PCI_COMMAND_MEMORY;
  586. }
  587. pci_write_config_word(pdev, PCI_COMMAND, cmd);
  588. return 0;
  589. }
  590. void pcibios_disable_device(struct pci_dev *pdev)
  591. {
  592. zpci_remove_device(pdev);
  593. pdev->sysdata = NULL;
  594. }
  595. int pcibios_add_platform_entries(struct pci_dev *pdev)
  596. {
  597. return zpci_sysfs_add_device(&pdev->dev);
  598. }
  599. int zpci_request_irq(unsigned int irq, irq_handler_t handler, void *data)
  600. {
  601. int msi_nr = irq_to_msi_nr(irq);
  602. struct zdev_irq_map *imap;
  603. struct msi_desc *msi;
  604. msi = irq_get_msi_desc(irq);
  605. if (!msi)
  606. return -EIO;
  607. imap = get_imap(irq);
  608. spin_lock_init(&imap->lock);
  609. pr_debug("%s: register handler for IRQ:MSI %d:%d\n", __func__, irq >> 6, msi_nr);
  610. imap->cb[msi_nr].handler = handler;
  611. imap->cb[msi_nr].data = data;
  612. /*
  613. * The generic MSI code returns with the interrupt disabled on the
  614. * card, using the MSI mask bits. Firmware doesn't appear to unmask
  615. * at that level, so we do it here by hand.
  616. */
  617. zpci_msi_set_mask_bits(msi, 1, 0);
  618. return 0;
  619. }
  620. void zpci_free_irq(unsigned int irq)
  621. {
  622. struct zdev_irq_map *imap = get_imap(irq);
  623. int msi_nr = irq_to_msi_nr(irq);
  624. unsigned long flags;
  625. pr_debug("%s: for irq: %d\n", __func__, irq);
  626. spin_lock_irqsave(&imap->lock, flags);
  627. imap->cb[msi_nr].handler = NULL;
  628. imap->cb[msi_nr].data = NULL;
  629. spin_unlock_irqrestore(&imap->lock, flags);
  630. }
  631. int request_irq(unsigned int irq, irq_handler_t handler,
  632. unsigned long irqflags, const char *devname, void *dev_id)
  633. {
  634. pr_debug("%s: irq: %d handler: %p flags: %lx dev: %s\n",
  635. __func__, irq, handler, irqflags, devname);
  636. return zpci_request_irq(irq, handler, dev_id);
  637. }
  638. EXPORT_SYMBOL_GPL(request_irq);
  639. void free_irq(unsigned int irq, void *dev_id)
  640. {
  641. zpci_free_irq(irq);
  642. }
  643. EXPORT_SYMBOL_GPL(free_irq);
  644. static int __init zpci_irq_init(void)
  645. {
  646. int cpu, rc;
  647. bucket = kzalloc(sizeof(*bucket), GFP_KERNEL);
  648. if (!bucket)
  649. return -ENOMEM;
  650. bucket->aisb = (unsigned long *) get_zeroed_page(GFP_KERNEL);
  651. if (!bucket->aisb) {
  652. rc = -ENOMEM;
  653. goto out_aisb;
  654. }
  655. bucket->alloc = (unsigned long *) get_zeroed_page(GFP_KERNEL);
  656. if (!bucket->alloc) {
  657. rc = -ENOMEM;
  658. goto out_alloc;
  659. }
  660. isc_register(PCI_ISC);
  661. zpci_irq_si = s390_register_adapter_interrupt(&zpci_irq_handler, NULL, PCI_ISC);
  662. if (IS_ERR(zpci_irq_si)) {
  663. rc = PTR_ERR(zpci_irq_si);
  664. zpci_irq_si = NULL;
  665. goto out_ai;
  666. }
  667. for_each_online_cpu(cpu)
  668. per_cpu(next_sbit, cpu) = 0;
  669. spin_lock_init(&bucket->lock);
  670. /* set summary to 1 to be called every time for the ISC */
  671. *zpci_irq_si = 1;
  672. sic_instr(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  673. return 0;
  674. out_ai:
  675. isc_unregister(PCI_ISC);
  676. free_page((unsigned long) bucket->alloc);
  677. out_alloc:
  678. free_page((unsigned long) bucket->aisb);
  679. out_aisb:
  680. kfree(bucket);
  681. return rc;
  682. }
  683. static void zpci_irq_exit(void)
  684. {
  685. free_page((unsigned long) bucket->alloc);
  686. free_page((unsigned long) bucket->aisb);
  687. s390_unregister_adapter_interrupt(zpci_irq_si, PCI_ISC);
  688. isc_unregister(PCI_ISC);
  689. kfree(bucket);
  690. }
  691. void zpci_debug_info(struct zpci_dev *zdev, struct seq_file *m)
  692. {
  693. if (!zdev)
  694. return;
  695. seq_printf(m, "global irq retries: %u\n", atomic_read(&irq_retries));
  696. seq_printf(m, "aibv[0]:%016lx aibv[1]:%016lx aisb:%016lx\n",
  697. get_imap(0)->aibv, get_imap(1)->aibv, *bucket->aisb);
  698. }
  699. static struct resource *zpci_alloc_bus_resource(unsigned long start, unsigned long size,
  700. unsigned long flags, int domain)
  701. {
  702. struct resource *r;
  703. char *name;
  704. int rc;
  705. r = kzalloc(sizeof(*r), GFP_KERNEL);
  706. if (!r)
  707. return ERR_PTR(-ENOMEM);
  708. r->start = start;
  709. r->end = r->start + size - 1;
  710. r->flags = flags;
  711. r->parent = &iomem_resource;
  712. name = kmalloc(18, GFP_KERNEL);
  713. if (!name) {
  714. kfree(r);
  715. return ERR_PTR(-ENOMEM);
  716. }
  717. sprintf(name, "PCI Bus: %04x:%02x", domain, ZPCI_BUS_NR);
  718. r->name = name;
  719. rc = request_resource(&iomem_resource, r);
  720. if (rc)
  721. pr_debug("request resource %pR failed\n", r);
  722. return r;
  723. }
  724. static int zpci_alloc_iomap(struct zpci_dev *zdev)
  725. {
  726. int entry;
  727. spin_lock(&zpci_iomap_lock);
  728. entry = find_first_zero_bit(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  729. if (entry == ZPCI_IOMAP_MAX_ENTRIES) {
  730. spin_unlock(&zpci_iomap_lock);
  731. return -ENOSPC;
  732. }
  733. set_bit(entry, zpci_iomap);
  734. spin_unlock(&zpci_iomap_lock);
  735. return entry;
  736. }
  737. static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
  738. {
  739. spin_lock(&zpci_iomap_lock);
  740. memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
  741. clear_bit(entry, zpci_iomap);
  742. spin_unlock(&zpci_iomap_lock);
  743. }
  744. static int zpci_create_device_bus(struct zpci_dev *zdev)
  745. {
  746. struct resource *res;
  747. LIST_HEAD(resources);
  748. int i;
  749. /* allocate mapping entry for each used bar */
  750. for (i = 0; i < PCI_BAR_COUNT; i++) {
  751. unsigned long addr, size, flags;
  752. int entry;
  753. if (!zdev->bars[i].size)
  754. continue;
  755. entry = zpci_alloc_iomap(zdev);
  756. if (entry < 0)
  757. return entry;
  758. zdev->bars[i].map_idx = entry;
  759. /* only MMIO is supported */
  760. flags = IORESOURCE_MEM;
  761. if (zdev->bars[i].val & 8)
  762. flags |= IORESOURCE_PREFETCH;
  763. if (zdev->bars[i].val & 4)
  764. flags |= IORESOURCE_MEM_64;
  765. addr = ZPCI_IOMAP_ADDR_BASE + ((u64) entry << 48);
  766. size = 1UL << zdev->bars[i].size;
  767. res = zpci_alloc_bus_resource(addr, size, flags, zdev->domain);
  768. if (IS_ERR(res)) {
  769. zpci_free_iomap(zdev, entry);
  770. return PTR_ERR(res);
  771. }
  772. pci_add_resource(&resources, res);
  773. }
  774. zdev->bus = pci_create_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops,
  775. zdev, &resources);
  776. if (!zdev->bus)
  777. return -EIO;
  778. zdev->bus->max_bus_speed = zdev->max_bus_speed;
  779. return 0;
  780. }
  781. static int zpci_alloc_domain(struct zpci_dev *zdev)
  782. {
  783. spin_lock(&zpci_domain_lock);
  784. zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
  785. if (zdev->domain == ZPCI_NR_DEVICES) {
  786. spin_unlock(&zpci_domain_lock);
  787. return -ENOSPC;
  788. }
  789. set_bit(zdev->domain, zpci_domain);
  790. spin_unlock(&zpci_domain_lock);
  791. return 0;
  792. }
  793. static void zpci_free_domain(struct zpci_dev *zdev)
  794. {
  795. spin_lock(&zpci_domain_lock);
  796. clear_bit(zdev->domain, zpci_domain);
  797. spin_unlock(&zpci_domain_lock);
  798. }
  799. int zpci_enable_device(struct zpci_dev *zdev)
  800. {
  801. int rc;
  802. rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
  803. if (rc)
  804. goto out;
  805. pr_info("Enabled fh: 0x%x fid: 0x%x\n", zdev->fh, zdev->fid);
  806. rc = zpci_dma_init_device(zdev);
  807. if (rc)
  808. goto out_dma;
  809. return 0;
  810. out_dma:
  811. clp_disable_fh(zdev);
  812. out:
  813. return rc;
  814. }
  815. EXPORT_SYMBOL_GPL(zpci_enable_device);
  816. int zpci_create_device(struct zpci_dev *zdev)
  817. {
  818. int rc;
  819. rc = zpci_alloc_domain(zdev);
  820. if (rc)
  821. goto out;
  822. rc = zpci_create_device_bus(zdev);
  823. if (rc)
  824. goto out_bus;
  825. mutex_lock(&zpci_list_lock);
  826. list_add_tail(&zdev->entry, &zpci_list);
  827. if (hotplug_ops.create_slot)
  828. hotplug_ops.create_slot(zdev);
  829. mutex_unlock(&zpci_list_lock);
  830. if (zdev->state == ZPCI_FN_STATE_STANDBY)
  831. return 0;
  832. rc = zpci_enable_device(zdev);
  833. if (rc)
  834. goto out_start;
  835. return 0;
  836. out_start:
  837. mutex_lock(&zpci_list_lock);
  838. list_del(&zdev->entry);
  839. if (hotplug_ops.remove_slot)
  840. hotplug_ops.remove_slot(zdev);
  841. mutex_unlock(&zpci_list_lock);
  842. out_bus:
  843. zpci_free_domain(zdev);
  844. out:
  845. return rc;
  846. }
  847. void zpci_stop_device(struct zpci_dev *zdev)
  848. {
  849. zpci_dma_exit_device(zdev);
  850. /*
  851. * Note: SCLP disables fh via set-pci-fn so don't
  852. * do that here.
  853. */
  854. }
  855. EXPORT_SYMBOL_GPL(zpci_stop_device);
  856. int zpci_scan_device(struct zpci_dev *zdev)
  857. {
  858. zdev->pdev = pci_scan_single_device(zdev->bus, ZPCI_DEVFN);
  859. if (!zdev->pdev) {
  860. pr_err("pci_scan_single_device failed for fid: 0x%x\n",
  861. zdev->fid);
  862. goto out;
  863. }
  864. zpci_debug_init_device(zdev);
  865. zpci_fmb_enable_device(zdev);
  866. zpci_map_resources(zdev);
  867. pci_bus_add_devices(zdev->bus);
  868. /* now that pdev was added to the bus mark it as used */
  869. zdev->state = ZPCI_FN_STATE_ONLINE;
  870. return 0;
  871. out:
  872. zpci_dma_exit_device(zdev);
  873. clp_disable_fh(zdev);
  874. return -EIO;
  875. }
  876. EXPORT_SYMBOL_GPL(zpci_scan_device);
  877. static inline int barsize(u8 size)
  878. {
  879. return (size) ? (1 << size) >> 10 : 0;
  880. }
  881. static int zpci_mem_init(void)
  882. {
  883. zdev_irq_cache = kmem_cache_create("PCI_IRQ_cache", sizeof(struct zdev_irq_map),
  884. L1_CACHE_BYTES, SLAB_HWCACHE_ALIGN, NULL);
  885. if (!zdev_irq_cache)
  886. goto error_zdev;
  887. zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb),
  888. 16, 0, NULL);
  889. if (!zdev_fmb_cache)
  890. goto error_fmb;
  891. /* TODO: use realloc */
  892. zpci_iomap_start = kzalloc(ZPCI_IOMAP_MAX_ENTRIES * sizeof(*zpci_iomap_start),
  893. GFP_KERNEL);
  894. if (!zpci_iomap_start)
  895. goto error_iomap;
  896. return 0;
  897. error_iomap:
  898. kmem_cache_destroy(zdev_fmb_cache);
  899. error_fmb:
  900. kmem_cache_destroy(zdev_irq_cache);
  901. error_zdev:
  902. return -ENOMEM;
  903. }
  904. static void zpci_mem_exit(void)
  905. {
  906. kfree(zpci_iomap_start);
  907. kmem_cache_destroy(zdev_irq_cache);
  908. kmem_cache_destroy(zdev_fmb_cache);
  909. }
  910. unsigned int pci_probe = 1;
  911. EXPORT_SYMBOL_GPL(pci_probe);
  912. char * __init pcibios_setup(char *str)
  913. {
  914. if (!strcmp(str, "off")) {
  915. pci_probe = 0;
  916. return NULL;
  917. }
  918. return str;
  919. }
  920. static int __init pci_base_init(void)
  921. {
  922. int rc;
  923. if (!pci_probe)
  924. return 0;
  925. if (!test_facility(2) || !test_facility(69)
  926. || !test_facility(71) || !test_facility(72))
  927. return 0;
  928. pr_info("Probing PCI hardware: PCI:%d SID:%d AEN:%d\n",
  929. test_facility(69), test_facility(70),
  930. test_facility(71));
  931. rc = zpci_debug_init();
  932. if (rc)
  933. return rc;
  934. rc = zpci_mem_init();
  935. if (rc)
  936. goto out_mem;
  937. rc = zpci_msihash_init();
  938. if (rc)
  939. goto out_hash;
  940. rc = zpci_irq_init();
  941. if (rc)
  942. goto out_irq;
  943. rc = zpci_dma_init();
  944. if (rc)
  945. goto out_dma;
  946. rc = clp_find_pci_devices();
  947. if (rc)
  948. goto out_find;
  949. zpci_scan_devices();
  950. return 0;
  951. out_find:
  952. zpci_dma_exit();
  953. out_dma:
  954. zpci_irq_exit();
  955. out_irq:
  956. zpci_msihash_exit();
  957. out_hash:
  958. zpci_mem_exit();
  959. out_mem:
  960. zpci_debug_exit();
  961. return rc;
  962. }
  963. subsys_initcall(pci_base_init);