irq.c 7.7 KB

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  1. /*
  2. * Copyright IBM Corp. 2004, 2011
  3. * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
  4. * Holger Smolinski <Holger.Smolinski@de.ibm.com>,
  5. * Thomas Spatzier <tspat@de.ibm.com>,
  6. *
  7. * This file contains interrupt related functions.
  8. */
  9. #include <linux/kernel_stat.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/seq_file.h>
  12. #include <linux/proc_fs.h>
  13. #include <linux/profile.h>
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/ftrace.h>
  17. #include <linux/errno.h>
  18. #include <linux/slab.h>
  19. #include <linux/cpu.h>
  20. #include <asm/irq_regs.h>
  21. #include <asm/cputime.h>
  22. #include <asm/lowcore.h>
  23. #include <asm/irq.h>
  24. #include "entry.h"
  25. struct irq_class {
  26. char *name;
  27. char *desc;
  28. };
  29. static const struct irq_class intrclass_names[] = {
  30. [EXTERNAL_INTERRUPT] = {.name = "EXT"},
  31. [IO_INTERRUPT] = {.name = "I/O"},
  32. [EXTINT_CLK] = {.name = "CLK", .desc = "[EXT] Clock Comparator"},
  33. [EXTINT_EXC] = {.name = "EXC", .desc = "[EXT] External Call"},
  34. [EXTINT_EMS] = {.name = "EMS", .desc = "[EXT] Emergency Signal"},
  35. [EXTINT_TMR] = {.name = "TMR", .desc = "[EXT] CPU Timer"},
  36. [EXTINT_TLA] = {.name = "TAL", .desc = "[EXT] Timing Alert"},
  37. [EXTINT_PFL] = {.name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
  38. [EXTINT_DSD] = {.name = "DSD", .desc = "[EXT] DASD Diag"},
  39. [EXTINT_VRT] = {.name = "VRT", .desc = "[EXT] Virtio"},
  40. [EXTINT_SCP] = {.name = "SCP", .desc = "[EXT] Service Call"},
  41. [EXTINT_IUC] = {.name = "IUC", .desc = "[EXT] IUCV"},
  42. [EXTINT_CMS] = {.name = "CMS", .desc = "[EXT] CPU-Measurement: Sampling"},
  43. [EXTINT_CMC] = {.name = "CMC", .desc = "[EXT] CPU-Measurement: Counter"},
  44. [EXTINT_CMR] = {.name = "CMR", .desc = "[EXT] CPU-Measurement: RI"},
  45. [IOINT_CIO] = {.name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt"},
  46. [IOINT_QAI] = {.name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt"},
  47. [IOINT_DAS] = {.name = "DAS", .desc = "[I/O] DASD"},
  48. [IOINT_C15] = {.name = "C15", .desc = "[I/O] 3215"},
  49. [IOINT_C70] = {.name = "C70", .desc = "[I/O] 3270"},
  50. [IOINT_TAP] = {.name = "TAP", .desc = "[I/O] Tape"},
  51. [IOINT_VMR] = {.name = "VMR", .desc = "[I/O] Unit Record Devices"},
  52. [IOINT_LCS] = {.name = "LCS", .desc = "[I/O] LCS"},
  53. [IOINT_CLW] = {.name = "CLW", .desc = "[I/O] CLAW"},
  54. [IOINT_CTC] = {.name = "CTC", .desc = "[I/O] CTC"},
  55. [IOINT_APB] = {.name = "APB", .desc = "[I/O] AP Bus"},
  56. [IOINT_ADM] = {.name = "ADM", .desc = "[I/O] EADM Subchannel"},
  57. [IOINT_CSC] = {.name = "CSC", .desc = "[I/O] CHSC Subchannel"},
  58. [IOINT_PCI] = {.name = "PCI", .desc = "[I/O] PCI Interrupt" },
  59. [IOINT_MSI] = {.name = "MSI", .desc = "[I/O] MSI Interrupt" },
  60. [NMI_NMI] = {.name = "NMI", .desc = "[NMI] Machine Check"},
  61. };
  62. /*
  63. * show_interrupts is needed by /proc/interrupts.
  64. */
  65. int show_interrupts(struct seq_file *p, void *v)
  66. {
  67. int i = *(loff_t *) v, j;
  68. get_online_cpus();
  69. if (i == 0) {
  70. seq_puts(p, " ");
  71. for_each_online_cpu(j)
  72. seq_printf(p, "CPU%d ",j);
  73. seq_putc(p, '\n');
  74. }
  75. if (i < NR_IRQS) {
  76. seq_printf(p, "%s: ", intrclass_names[i].name);
  77. #ifndef CONFIG_SMP
  78. seq_printf(p, "%10u ", kstat_irqs(i));
  79. #else
  80. for_each_online_cpu(j)
  81. seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
  82. #endif
  83. if (intrclass_names[i].desc)
  84. seq_printf(p, " %s", intrclass_names[i].desc);
  85. seq_putc(p, '\n');
  86. }
  87. put_online_cpus();
  88. return 0;
  89. }
  90. /*
  91. * Switch to the asynchronous interrupt stack for softirq execution.
  92. */
  93. asmlinkage void do_softirq(void)
  94. {
  95. unsigned long flags, old, new;
  96. if (in_interrupt())
  97. return;
  98. local_irq_save(flags);
  99. if (local_softirq_pending()) {
  100. /* Get current stack pointer. */
  101. asm volatile("la %0,0(15)" : "=a" (old));
  102. /* Check against async. stack address range. */
  103. new = S390_lowcore.async_stack;
  104. if (((new - old) >> (PAGE_SHIFT + THREAD_ORDER)) != 0) {
  105. /* Need to switch to the async. stack. */
  106. new -= STACK_FRAME_OVERHEAD;
  107. ((struct stack_frame *) new)->back_chain = old;
  108. asm volatile(" la 15,0(%0)\n"
  109. " basr 14,%2\n"
  110. " la 15,0(%1)\n"
  111. : : "a" (new), "a" (old),
  112. "a" (__do_softirq)
  113. : "0", "1", "2", "3", "4", "5", "14",
  114. "cc", "memory" );
  115. } else {
  116. /* We are already on the async stack. */
  117. __do_softirq();
  118. }
  119. }
  120. local_irq_restore(flags);
  121. }
  122. #ifdef CONFIG_PROC_FS
  123. void init_irq_proc(void)
  124. {
  125. struct proc_dir_entry *root_irq_dir;
  126. root_irq_dir = proc_mkdir("irq", NULL);
  127. create_prof_cpu_mask(root_irq_dir);
  128. }
  129. #endif
  130. /*
  131. * ext_int_hash[index] is the list head for all external interrupts that hash
  132. * to this index.
  133. */
  134. static struct list_head ext_int_hash[256];
  135. struct ext_int_info {
  136. ext_int_handler_t handler;
  137. u16 code;
  138. struct list_head entry;
  139. struct rcu_head rcu;
  140. };
  141. /* ext_int_hash_lock protects the handler lists for external interrupts */
  142. DEFINE_SPINLOCK(ext_int_hash_lock);
  143. static void __init init_external_interrupts(void)
  144. {
  145. int idx;
  146. for (idx = 0; idx < ARRAY_SIZE(ext_int_hash); idx++)
  147. INIT_LIST_HEAD(&ext_int_hash[idx]);
  148. }
  149. static inline int ext_hash(u16 code)
  150. {
  151. return (code + (code >> 9)) & 0xff;
  152. }
  153. int register_external_interrupt(u16 code, ext_int_handler_t handler)
  154. {
  155. struct ext_int_info *p;
  156. unsigned long flags;
  157. int index;
  158. p = kmalloc(sizeof(*p), GFP_ATOMIC);
  159. if (!p)
  160. return -ENOMEM;
  161. p->code = code;
  162. p->handler = handler;
  163. index = ext_hash(code);
  164. spin_lock_irqsave(&ext_int_hash_lock, flags);
  165. list_add_rcu(&p->entry, &ext_int_hash[index]);
  166. spin_unlock_irqrestore(&ext_int_hash_lock, flags);
  167. return 0;
  168. }
  169. EXPORT_SYMBOL(register_external_interrupt);
  170. int unregister_external_interrupt(u16 code, ext_int_handler_t handler)
  171. {
  172. struct ext_int_info *p;
  173. unsigned long flags;
  174. int index = ext_hash(code);
  175. spin_lock_irqsave(&ext_int_hash_lock, flags);
  176. list_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
  177. if (p->code == code && p->handler == handler) {
  178. list_del_rcu(&p->entry);
  179. kfree_rcu(p, rcu);
  180. }
  181. }
  182. spin_unlock_irqrestore(&ext_int_hash_lock, flags);
  183. return 0;
  184. }
  185. EXPORT_SYMBOL(unregister_external_interrupt);
  186. void __irq_entry do_extint(struct pt_regs *regs, struct ext_code ext_code,
  187. unsigned int param32, unsigned long param64)
  188. {
  189. struct pt_regs *old_regs;
  190. struct ext_int_info *p;
  191. int index;
  192. old_regs = set_irq_regs(regs);
  193. irq_enter();
  194. if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator) {
  195. /* Serve timer interrupts first. */
  196. clock_comparator_work();
  197. }
  198. kstat_cpu(smp_processor_id()).irqs[EXTERNAL_INTERRUPT]++;
  199. if (ext_code.code != 0x1004)
  200. __get_cpu_var(s390_idle).nohz_delay = 1;
  201. index = ext_hash(ext_code.code);
  202. rcu_read_lock();
  203. list_for_each_entry_rcu(p, &ext_int_hash[index], entry)
  204. if (likely(p->code == ext_code.code))
  205. p->handler(ext_code, param32, param64);
  206. rcu_read_unlock();
  207. irq_exit();
  208. set_irq_regs(old_regs);
  209. }
  210. void __init init_IRQ(void)
  211. {
  212. init_external_interrupts();
  213. }
  214. static DEFINE_SPINLOCK(sc_irq_lock);
  215. static int sc_irq_refcount;
  216. void service_subclass_irq_register(void)
  217. {
  218. spin_lock(&sc_irq_lock);
  219. if (!sc_irq_refcount)
  220. ctl_set_bit(0, 9);
  221. sc_irq_refcount++;
  222. spin_unlock(&sc_irq_lock);
  223. }
  224. EXPORT_SYMBOL(service_subclass_irq_register);
  225. void service_subclass_irq_unregister(void)
  226. {
  227. spin_lock(&sc_irq_lock);
  228. sc_irq_refcount--;
  229. if (!sc_irq_refcount)
  230. ctl_clear_bit(0, 9);
  231. spin_unlock(&sc_irq_lock);
  232. }
  233. EXPORT_SYMBOL(service_subclass_irq_unregister);
  234. static DEFINE_SPINLOCK(ma_subclass_lock);
  235. static int ma_subclass_refcount;
  236. void measurement_alert_subclass_register(void)
  237. {
  238. spin_lock(&ma_subclass_lock);
  239. if (!ma_subclass_refcount)
  240. ctl_set_bit(0, 5);
  241. ma_subclass_refcount++;
  242. spin_unlock(&ma_subclass_lock);
  243. }
  244. EXPORT_SYMBOL(measurement_alert_subclass_register);
  245. void measurement_alert_subclass_unregister(void)
  246. {
  247. spin_lock(&ma_subclass_lock);
  248. ma_subclass_refcount--;
  249. if (!ma_subclass_refcount)
  250. ctl_clear_bit(0, 5);
  251. spin_unlock(&ma_subclass_lock);
  252. }
  253. EXPORT_SYMBOL(measurement_alert_subclass_unregister);