process.c 31 KB

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  1. /*
  2. * Derived from "arch/i386/kernel/process.c"
  3. * Copyright (C) 1995 Linus Torvalds
  4. *
  5. * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and
  6. * Paul Mackerras (paulus@cs.anu.edu.au)
  7. *
  8. * PowerPC version
  9. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version
  14. * 2 of the License, or (at your option) any later version.
  15. */
  16. #include <linux/errno.h>
  17. #include <linux/sched.h>
  18. #include <linux/kernel.h>
  19. #include <linux/mm.h>
  20. #include <linux/smp.h>
  21. #include <linux/stddef.h>
  22. #include <linux/unistd.h>
  23. #include <linux/ptrace.h>
  24. #include <linux/slab.h>
  25. #include <linux/user.h>
  26. #include <linux/elf.h>
  27. #include <linux/init.h>
  28. #include <linux/prctl.h>
  29. #include <linux/init_task.h>
  30. #include <linux/export.h>
  31. #include <linux/kallsyms.h>
  32. #include <linux/mqueue.h>
  33. #include <linux/hardirq.h>
  34. #include <linux/utsname.h>
  35. #include <linux/ftrace.h>
  36. #include <linux/kernel_stat.h>
  37. #include <linux/personality.h>
  38. #include <linux/random.h>
  39. #include <linux/hw_breakpoint.h>
  40. #include <asm/pgtable.h>
  41. #include <asm/uaccess.h>
  42. #include <asm/io.h>
  43. #include <asm/processor.h>
  44. #include <asm/mmu.h>
  45. #include <asm/prom.h>
  46. #include <asm/machdep.h>
  47. #include <asm/time.h>
  48. #include <asm/runlatch.h>
  49. #include <asm/syscalls.h>
  50. #include <asm/switch_to.h>
  51. #include <asm/debug.h>
  52. #ifdef CONFIG_PPC64
  53. #include <asm/firmware.h>
  54. #endif
  55. #include <linux/kprobes.h>
  56. #include <linux/kdebug.h>
  57. extern unsigned long _get_SP(void);
  58. #ifndef CONFIG_SMP
  59. struct task_struct *last_task_used_math = NULL;
  60. struct task_struct *last_task_used_altivec = NULL;
  61. struct task_struct *last_task_used_vsx = NULL;
  62. struct task_struct *last_task_used_spe = NULL;
  63. #endif
  64. /*
  65. * Make sure the floating-point register state in the
  66. * the thread_struct is up to date for task tsk.
  67. */
  68. void flush_fp_to_thread(struct task_struct *tsk)
  69. {
  70. if (tsk->thread.regs) {
  71. /*
  72. * We need to disable preemption here because if we didn't,
  73. * another process could get scheduled after the regs->msr
  74. * test but before we have finished saving the FP registers
  75. * to the thread_struct. That process could take over the
  76. * FPU, and then when we get scheduled again we would store
  77. * bogus values for the remaining FP registers.
  78. */
  79. preempt_disable();
  80. if (tsk->thread.regs->msr & MSR_FP) {
  81. #ifdef CONFIG_SMP
  82. /*
  83. * This should only ever be called for current or
  84. * for a stopped child process. Since we save away
  85. * the FP register state on context switch on SMP,
  86. * there is something wrong if a stopped child appears
  87. * to still have its FP state in the CPU registers.
  88. */
  89. BUG_ON(tsk != current);
  90. #endif
  91. giveup_fpu(tsk);
  92. }
  93. preempt_enable();
  94. }
  95. }
  96. EXPORT_SYMBOL_GPL(flush_fp_to_thread);
  97. void enable_kernel_fp(void)
  98. {
  99. WARN_ON(preemptible());
  100. #ifdef CONFIG_SMP
  101. if (current->thread.regs && (current->thread.regs->msr & MSR_FP))
  102. giveup_fpu(current);
  103. else
  104. giveup_fpu(NULL); /* just enables FP for kernel */
  105. #else
  106. giveup_fpu(last_task_used_math);
  107. #endif /* CONFIG_SMP */
  108. }
  109. EXPORT_SYMBOL(enable_kernel_fp);
  110. #ifdef CONFIG_ALTIVEC
  111. void enable_kernel_altivec(void)
  112. {
  113. WARN_ON(preemptible());
  114. #ifdef CONFIG_SMP
  115. if (current->thread.regs && (current->thread.regs->msr & MSR_VEC))
  116. giveup_altivec(current);
  117. else
  118. giveup_altivec_notask();
  119. #else
  120. giveup_altivec(last_task_used_altivec);
  121. #endif /* CONFIG_SMP */
  122. }
  123. EXPORT_SYMBOL(enable_kernel_altivec);
  124. /*
  125. * Make sure the VMX/Altivec register state in the
  126. * the thread_struct is up to date for task tsk.
  127. */
  128. void flush_altivec_to_thread(struct task_struct *tsk)
  129. {
  130. if (tsk->thread.regs) {
  131. preempt_disable();
  132. if (tsk->thread.regs->msr & MSR_VEC) {
  133. #ifdef CONFIG_SMP
  134. BUG_ON(tsk != current);
  135. #endif
  136. giveup_altivec(tsk);
  137. }
  138. preempt_enable();
  139. }
  140. }
  141. EXPORT_SYMBOL_GPL(flush_altivec_to_thread);
  142. #endif /* CONFIG_ALTIVEC */
  143. #ifdef CONFIG_VSX
  144. #if 0
  145. /* not currently used, but some crazy RAID module might want to later */
  146. void enable_kernel_vsx(void)
  147. {
  148. WARN_ON(preemptible());
  149. #ifdef CONFIG_SMP
  150. if (current->thread.regs && (current->thread.regs->msr & MSR_VSX))
  151. giveup_vsx(current);
  152. else
  153. giveup_vsx(NULL); /* just enable vsx for kernel - force */
  154. #else
  155. giveup_vsx(last_task_used_vsx);
  156. #endif /* CONFIG_SMP */
  157. }
  158. EXPORT_SYMBOL(enable_kernel_vsx);
  159. #endif
  160. void giveup_vsx(struct task_struct *tsk)
  161. {
  162. giveup_fpu(tsk);
  163. giveup_altivec(tsk);
  164. __giveup_vsx(tsk);
  165. }
  166. void flush_vsx_to_thread(struct task_struct *tsk)
  167. {
  168. if (tsk->thread.regs) {
  169. preempt_disable();
  170. if (tsk->thread.regs->msr & MSR_VSX) {
  171. #ifdef CONFIG_SMP
  172. BUG_ON(tsk != current);
  173. #endif
  174. giveup_vsx(tsk);
  175. }
  176. preempt_enable();
  177. }
  178. }
  179. EXPORT_SYMBOL_GPL(flush_vsx_to_thread);
  180. #endif /* CONFIG_VSX */
  181. #ifdef CONFIG_SPE
  182. void enable_kernel_spe(void)
  183. {
  184. WARN_ON(preemptible());
  185. #ifdef CONFIG_SMP
  186. if (current->thread.regs && (current->thread.regs->msr & MSR_SPE))
  187. giveup_spe(current);
  188. else
  189. giveup_spe(NULL); /* just enable SPE for kernel - force */
  190. #else
  191. giveup_spe(last_task_used_spe);
  192. #endif /* __SMP __ */
  193. }
  194. EXPORT_SYMBOL(enable_kernel_spe);
  195. void flush_spe_to_thread(struct task_struct *tsk)
  196. {
  197. if (tsk->thread.regs) {
  198. preempt_disable();
  199. if (tsk->thread.regs->msr & MSR_SPE) {
  200. #ifdef CONFIG_SMP
  201. BUG_ON(tsk != current);
  202. #endif
  203. tsk->thread.spefscr = mfspr(SPRN_SPEFSCR);
  204. giveup_spe(tsk);
  205. }
  206. preempt_enable();
  207. }
  208. }
  209. #endif /* CONFIG_SPE */
  210. #ifndef CONFIG_SMP
  211. /*
  212. * If we are doing lazy switching of CPU state (FP, altivec or SPE),
  213. * and the current task has some state, discard it.
  214. */
  215. void discard_lazy_cpu_state(void)
  216. {
  217. preempt_disable();
  218. if (last_task_used_math == current)
  219. last_task_used_math = NULL;
  220. #ifdef CONFIG_ALTIVEC
  221. if (last_task_used_altivec == current)
  222. last_task_used_altivec = NULL;
  223. #endif /* CONFIG_ALTIVEC */
  224. #ifdef CONFIG_VSX
  225. if (last_task_used_vsx == current)
  226. last_task_used_vsx = NULL;
  227. #endif /* CONFIG_VSX */
  228. #ifdef CONFIG_SPE
  229. if (last_task_used_spe == current)
  230. last_task_used_spe = NULL;
  231. #endif
  232. preempt_enable();
  233. }
  234. #endif /* CONFIG_SMP */
  235. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  236. void do_send_trap(struct pt_regs *regs, unsigned long address,
  237. unsigned long error_code, int signal_code, int breakpt)
  238. {
  239. siginfo_t info;
  240. current->thread.trap_nr = signal_code;
  241. if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
  242. 11, SIGSEGV) == NOTIFY_STOP)
  243. return;
  244. /* Deliver the signal to userspace */
  245. info.si_signo = SIGTRAP;
  246. info.si_errno = breakpt; /* breakpoint or watchpoint id */
  247. info.si_code = signal_code;
  248. info.si_addr = (void __user *)address;
  249. force_sig_info(SIGTRAP, &info, current);
  250. }
  251. #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
  252. void do_dabr(struct pt_regs *regs, unsigned long address,
  253. unsigned long error_code)
  254. {
  255. siginfo_t info;
  256. current->thread.trap_nr = TRAP_HWBKPT;
  257. if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
  258. 11, SIGSEGV) == NOTIFY_STOP)
  259. return;
  260. if (debugger_dabr_match(regs))
  261. return;
  262. /* Clear the DABR */
  263. set_dabr(0, 0);
  264. /* Deliver the signal to userspace */
  265. info.si_signo = SIGTRAP;
  266. info.si_errno = 0;
  267. info.si_code = TRAP_HWBKPT;
  268. info.si_addr = (void __user *)address;
  269. force_sig_info(SIGTRAP, &info, current);
  270. }
  271. #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
  272. static DEFINE_PER_CPU(unsigned long, current_dabr);
  273. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  274. /*
  275. * Set the debug registers back to their default "safe" values.
  276. */
  277. static void set_debug_reg_defaults(struct thread_struct *thread)
  278. {
  279. thread->iac1 = thread->iac2 = 0;
  280. #if CONFIG_PPC_ADV_DEBUG_IACS > 2
  281. thread->iac3 = thread->iac4 = 0;
  282. #endif
  283. thread->dac1 = thread->dac2 = 0;
  284. #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
  285. thread->dvc1 = thread->dvc2 = 0;
  286. #endif
  287. thread->dbcr0 = 0;
  288. #ifdef CONFIG_BOOKE
  289. /*
  290. * Force User/Supervisor bits to b11 (user-only MSR[PR]=1)
  291. */
  292. thread->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | \
  293. DBCR1_IAC3US | DBCR1_IAC4US;
  294. /*
  295. * Force Data Address Compare User/Supervisor bits to be User-only
  296. * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0.
  297. */
  298. thread->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
  299. #else
  300. thread->dbcr1 = 0;
  301. #endif
  302. }
  303. static void prime_debug_regs(struct thread_struct *thread)
  304. {
  305. mtspr(SPRN_IAC1, thread->iac1);
  306. mtspr(SPRN_IAC2, thread->iac2);
  307. #if CONFIG_PPC_ADV_DEBUG_IACS > 2
  308. mtspr(SPRN_IAC3, thread->iac3);
  309. mtspr(SPRN_IAC4, thread->iac4);
  310. #endif
  311. mtspr(SPRN_DAC1, thread->dac1);
  312. mtspr(SPRN_DAC2, thread->dac2);
  313. #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
  314. mtspr(SPRN_DVC1, thread->dvc1);
  315. mtspr(SPRN_DVC2, thread->dvc2);
  316. #endif
  317. mtspr(SPRN_DBCR0, thread->dbcr0);
  318. mtspr(SPRN_DBCR1, thread->dbcr1);
  319. #ifdef CONFIG_BOOKE
  320. mtspr(SPRN_DBCR2, thread->dbcr2);
  321. #endif
  322. }
  323. /*
  324. * Unless neither the old or new thread are making use of the
  325. * debug registers, set the debug registers from the values
  326. * stored in the new thread.
  327. */
  328. static void switch_booke_debug_regs(struct thread_struct *new_thread)
  329. {
  330. if ((current->thread.dbcr0 & DBCR0_IDM)
  331. || (new_thread->dbcr0 & DBCR0_IDM))
  332. prime_debug_regs(new_thread);
  333. }
  334. #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
  335. #ifndef CONFIG_HAVE_HW_BREAKPOINT
  336. static void set_debug_reg_defaults(struct thread_struct *thread)
  337. {
  338. if (thread->dabr) {
  339. thread->dabr = 0;
  340. thread->dabrx = 0;
  341. set_dabr(0, 0);
  342. }
  343. }
  344. #endif /* !CONFIG_HAVE_HW_BREAKPOINT */
  345. #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
  346. int set_dabr(unsigned long dabr, unsigned long dabrx)
  347. {
  348. __get_cpu_var(current_dabr) = dabr;
  349. if (ppc_md.set_dabr)
  350. return ppc_md.set_dabr(dabr, dabrx);
  351. /* XXX should we have a CPU_FTR_HAS_DABR ? */
  352. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  353. mtspr(SPRN_DAC1, dabr);
  354. #ifdef CONFIG_PPC_47x
  355. isync();
  356. #endif
  357. #elif defined(CONFIG_PPC_BOOK3S)
  358. mtspr(SPRN_DABR, dabr);
  359. mtspr(SPRN_DABRX, dabrx);
  360. #endif
  361. return 0;
  362. }
  363. #ifdef CONFIG_PPC64
  364. DEFINE_PER_CPU(struct cpu_usage, cpu_usage_array);
  365. #endif
  366. struct task_struct *__switch_to(struct task_struct *prev,
  367. struct task_struct *new)
  368. {
  369. struct thread_struct *new_thread, *old_thread;
  370. unsigned long flags;
  371. struct task_struct *last;
  372. #ifdef CONFIG_PPC_BOOK3S_64
  373. struct ppc64_tlb_batch *batch;
  374. #endif
  375. #ifdef CONFIG_SMP
  376. /* avoid complexity of lazy save/restore of fpu
  377. * by just saving it every time we switch out if
  378. * this task used the fpu during the last quantum.
  379. *
  380. * If it tries to use the fpu again, it'll trap and
  381. * reload its fp regs. So we don't have to do a restore
  382. * every switch, just a save.
  383. * -- Cort
  384. */
  385. if (prev->thread.regs && (prev->thread.regs->msr & MSR_FP))
  386. giveup_fpu(prev);
  387. #ifdef CONFIG_ALTIVEC
  388. /*
  389. * If the previous thread used altivec in the last quantum
  390. * (thus changing altivec regs) then save them.
  391. * We used to check the VRSAVE register but not all apps
  392. * set it, so we don't rely on it now (and in fact we need
  393. * to save & restore VSCR even if VRSAVE == 0). -- paulus
  394. *
  395. * On SMP we always save/restore altivec regs just to avoid the
  396. * complexity of changing processors.
  397. * -- Cort
  398. */
  399. if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
  400. giveup_altivec(prev);
  401. #endif /* CONFIG_ALTIVEC */
  402. #ifdef CONFIG_VSX
  403. if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX))
  404. /* VMX and FPU registers are already save here */
  405. __giveup_vsx(prev);
  406. #endif /* CONFIG_VSX */
  407. #ifdef CONFIG_SPE
  408. /*
  409. * If the previous thread used spe in the last quantum
  410. * (thus changing spe regs) then save them.
  411. *
  412. * On SMP we always save/restore spe regs just to avoid the
  413. * complexity of changing processors.
  414. */
  415. if ((prev->thread.regs && (prev->thread.regs->msr & MSR_SPE)))
  416. giveup_spe(prev);
  417. #endif /* CONFIG_SPE */
  418. #else /* CONFIG_SMP */
  419. #ifdef CONFIG_ALTIVEC
  420. /* Avoid the trap. On smp this this never happens since
  421. * we don't set last_task_used_altivec -- Cort
  422. */
  423. if (new->thread.regs && last_task_used_altivec == new)
  424. new->thread.regs->msr |= MSR_VEC;
  425. #endif /* CONFIG_ALTIVEC */
  426. #ifdef CONFIG_VSX
  427. if (new->thread.regs && last_task_used_vsx == new)
  428. new->thread.regs->msr |= MSR_VSX;
  429. #endif /* CONFIG_VSX */
  430. #ifdef CONFIG_SPE
  431. /* Avoid the trap. On smp this this never happens since
  432. * we don't set last_task_used_spe
  433. */
  434. if (new->thread.regs && last_task_used_spe == new)
  435. new->thread.regs->msr |= MSR_SPE;
  436. #endif /* CONFIG_SPE */
  437. #endif /* CONFIG_SMP */
  438. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  439. switch_booke_debug_regs(&new->thread);
  440. #else
  441. /*
  442. * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would
  443. * schedule DABR
  444. */
  445. #ifndef CONFIG_HAVE_HW_BREAKPOINT
  446. if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr))
  447. set_dabr(new->thread.dabr, new->thread.dabrx);
  448. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  449. #endif
  450. new_thread = &new->thread;
  451. old_thread = &current->thread;
  452. #ifdef CONFIG_PPC64
  453. /*
  454. * Collect processor utilization data per process
  455. */
  456. if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
  457. struct cpu_usage *cu = &__get_cpu_var(cpu_usage_array);
  458. long unsigned start_tb, current_tb;
  459. start_tb = old_thread->start_tb;
  460. cu->current_tb = current_tb = mfspr(SPRN_PURR);
  461. old_thread->accum_tb += (current_tb - start_tb);
  462. new_thread->start_tb = current_tb;
  463. }
  464. #endif /* CONFIG_PPC64 */
  465. #ifdef CONFIG_PPC_BOOK3S_64
  466. batch = &__get_cpu_var(ppc64_tlb_batch);
  467. if (batch->active) {
  468. current_thread_info()->local_flags |= _TLF_LAZY_MMU;
  469. if (batch->index)
  470. __flush_tlb_pending(batch);
  471. batch->active = 0;
  472. }
  473. #endif /* CONFIG_PPC_BOOK3S_64 */
  474. local_irq_save(flags);
  475. /*
  476. * We can't take a PMU exception inside _switch() since there is a
  477. * window where the kernel stack SLB and the kernel stack are out
  478. * of sync. Hard disable here.
  479. */
  480. hard_irq_disable();
  481. last = _switch(old_thread, new_thread);
  482. #ifdef CONFIG_PPC_BOOK3S_64
  483. if (current_thread_info()->local_flags & _TLF_LAZY_MMU) {
  484. current_thread_info()->local_flags &= ~_TLF_LAZY_MMU;
  485. batch = &__get_cpu_var(ppc64_tlb_batch);
  486. batch->active = 1;
  487. }
  488. #endif /* CONFIG_PPC_BOOK3S_64 */
  489. local_irq_restore(flags);
  490. return last;
  491. }
  492. static int instructions_to_print = 16;
  493. static void show_instructions(struct pt_regs *regs)
  494. {
  495. int i;
  496. unsigned long pc = regs->nip - (instructions_to_print * 3 / 4 *
  497. sizeof(int));
  498. printk("Instruction dump:");
  499. for (i = 0; i < instructions_to_print; i++) {
  500. int instr;
  501. if (!(i % 8))
  502. printk("\n");
  503. #if !defined(CONFIG_BOOKE)
  504. /* If executing with the IMMU off, adjust pc rather
  505. * than print XXXXXXXX.
  506. */
  507. if (!(regs->msr & MSR_IR))
  508. pc = (unsigned long)phys_to_virt(pc);
  509. #endif
  510. /* We use __get_user here *only* to avoid an OOPS on a
  511. * bad address because the pc *should* only be a
  512. * kernel address.
  513. */
  514. if (!__kernel_text_address(pc) ||
  515. __get_user(instr, (unsigned int __user *)pc)) {
  516. printk(KERN_CONT "XXXXXXXX ");
  517. } else {
  518. if (regs->nip == pc)
  519. printk(KERN_CONT "<%08x> ", instr);
  520. else
  521. printk(KERN_CONT "%08x ", instr);
  522. }
  523. pc += sizeof(int);
  524. }
  525. printk("\n");
  526. }
  527. static struct regbit {
  528. unsigned long bit;
  529. const char *name;
  530. } msr_bits[] = {
  531. #if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE)
  532. {MSR_SF, "SF"},
  533. {MSR_HV, "HV"},
  534. #endif
  535. {MSR_VEC, "VEC"},
  536. {MSR_VSX, "VSX"},
  537. #ifdef CONFIG_BOOKE
  538. {MSR_CE, "CE"},
  539. #endif
  540. {MSR_EE, "EE"},
  541. {MSR_PR, "PR"},
  542. {MSR_FP, "FP"},
  543. {MSR_ME, "ME"},
  544. #ifdef CONFIG_BOOKE
  545. {MSR_DE, "DE"},
  546. #else
  547. {MSR_SE, "SE"},
  548. {MSR_BE, "BE"},
  549. #endif
  550. {MSR_IR, "IR"},
  551. {MSR_DR, "DR"},
  552. {MSR_PMM, "PMM"},
  553. #ifndef CONFIG_BOOKE
  554. {MSR_RI, "RI"},
  555. {MSR_LE, "LE"},
  556. #endif
  557. {0, NULL}
  558. };
  559. static void printbits(unsigned long val, struct regbit *bits)
  560. {
  561. const char *sep = "";
  562. printk("<");
  563. for (; bits->bit; ++bits)
  564. if (val & bits->bit) {
  565. printk("%s%s", sep, bits->name);
  566. sep = ",";
  567. }
  568. printk(">");
  569. }
  570. #ifdef CONFIG_PPC64
  571. #define REG "%016lx"
  572. #define REGS_PER_LINE 4
  573. #define LAST_VOLATILE 13
  574. #else
  575. #define REG "%08lx"
  576. #define REGS_PER_LINE 8
  577. #define LAST_VOLATILE 12
  578. #endif
  579. void show_regs(struct pt_regs * regs)
  580. {
  581. int i, trap;
  582. printk("NIP: "REG" LR: "REG" CTR: "REG"\n",
  583. regs->nip, regs->link, regs->ctr);
  584. printk("REGS: %p TRAP: %04lx %s (%s)\n",
  585. regs, regs->trap, print_tainted(), init_utsname()->release);
  586. printk("MSR: "REG" ", regs->msr);
  587. printbits(regs->msr, msr_bits);
  588. printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
  589. #ifdef CONFIG_PPC64
  590. printk("SOFTE: %ld\n", regs->softe);
  591. #endif
  592. trap = TRAP(regs);
  593. if ((regs->trap != 0xc00) && cpu_has_feature(CPU_FTR_CFAR))
  594. printk("CFAR: "REG"\n", regs->orig_gpr3);
  595. if (trap == 0x300 || trap == 0x600)
  596. #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
  597. printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
  598. #else
  599. printk("DAR: "REG", DSISR: %08lx\n", regs->dar, regs->dsisr);
  600. #endif
  601. printk("TASK = %p[%d] '%s' THREAD: %p",
  602. current, task_pid_nr(current), current->comm, task_thread_info(current));
  603. #ifdef CONFIG_SMP
  604. printk(" CPU: %d", raw_smp_processor_id());
  605. #endif /* CONFIG_SMP */
  606. for (i = 0; i < 32; i++) {
  607. if ((i % REGS_PER_LINE) == 0)
  608. printk("\nGPR%02d: ", i);
  609. printk(REG " ", regs->gpr[i]);
  610. if (i == LAST_VOLATILE && !FULL_REGS(regs))
  611. break;
  612. }
  613. printk("\n");
  614. #ifdef CONFIG_KALLSYMS
  615. /*
  616. * Lookup NIP late so we have the best change of getting the
  617. * above info out without failing
  618. */
  619. printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip);
  620. printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link);
  621. #endif
  622. show_stack(current, (unsigned long *) regs->gpr[1]);
  623. if (!user_mode(regs))
  624. show_instructions(regs);
  625. }
  626. void exit_thread(void)
  627. {
  628. discard_lazy_cpu_state();
  629. }
  630. void flush_thread(void)
  631. {
  632. discard_lazy_cpu_state();
  633. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  634. flush_ptrace_hw_breakpoint(current);
  635. #else /* CONFIG_HAVE_HW_BREAKPOINT */
  636. set_debug_reg_defaults(&current->thread);
  637. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  638. }
  639. void
  640. release_thread(struct task_struct *t)
  641. {
  642. }
  643. /*
  644. * this gets called so that we can store coprocessor state into memory and
  645. * copy the current task into the new thread.
  646. */
  647. int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
  648. {
  649. flush_fp_to_thread(src);
  650. flush_altivec_to_thread(src);
  651. flush_vsx_to_thread(src);
  652. flush_spe_to_thread(src);
  653. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  654. flush_ptrace_hw_breakpoint(src);
  655. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  656. *dst = *src;
  657. return 0;
  658. }
  659. /*
  660. * Copy a thread..
  661. */
  662. extern unsigned long dscr_default; /* defined in arch/powerpc/kernel/sysfs.c */
  663. int copy_thread(unsigned long clone_flags, unsigned long usp,
  664. unsigned long arg, struct task_struct *p)
  665. {
  666. struct pt_regs *childregs, *kregs;
  667. extern void ret_from_fork(void);
  668. extern void ret_from_kernel_thread(void);
  669. void (*f)(void);
  670. unsigned long sp = (unsigned long)task_stack_page(p) + THREAD_SIZE;
  671. /* Copy registers */
  672. sp -= sizeof(struct pt_regs);
  673. childregs = (struct pt_regs *) sp;
  674. if (unlikely(p->flags & PF_KTHREAD)) {
  675. struct thread_info *ti = (void *)task_stack_page(p);
  676. memset(childregs, 0, sizeof(struct pt_regs));
  677. childregs->gpr[1] = sp + sizeof(struct pt_regs);
  678. childregs->gpr[14] = usp; /* function */
  679. #ifdef CONFIG_PPC64
  680. clear_tsk_thread_flag(p, TIF_32BIT);
  681. childregs->softe = 1;
  682. #endif
  683. childregs->gpr[15] = arg;
  684. p->thread.regs = NULL; /* no user register state */
  685. ti->flags |= _TIF_RESTOREALL;
  686. f = ret_from_kernel_thread;
  687. } else {
  688. struct pt_regs *regs = current_pt_regs();
  689. CHECK_FULL_REGS(regs);
  690. *childregs = *regs;
  691. if (usp)
  692. childregs->gpr[1] = usp;
  693. p->thread.regs = childregs;
  694. childregs->gpr[3] = 0; /* Result from fork() */
  695. if (clone_flags & CLONE_SETTLS) {
  696. #ifdef CONFIG_PPC64
  697. if (!is_32bit_task())
  698. childregs->gpr[13] = childregs->gpr[6];
  699. else
  700. #endif
  701. childregs->gpr[2] = childregs->gpr[6];
  702. }
  703. f = ret_from_fork;
  704. }
  705. sp -= STACK_FRAME_OVERHEAD;
  706. /*
  707. * The way this works is that at some point in the future
  708. * some task will call _switch to switch to the new task.
  709. * That will pop off the stack frame created below and start
  710. * the new task running at ret_from_fork. The new task will
  711. * do some house keeping and then return from the fork or clone
  712. * system call, using the stack frame created above.
  713. */
  714. sp -= sizeof(struct pt_regs);
  715. kregs = (struct pt_regs *) sp;
  716. sp -= STACK_FRAME_OVERHEAD;
  717. p->thread.ksp = sp;
  718. p->thread.ksp_limit = (unsigned long)task_stack_page(p) +
  719. _ALIGN_UP(sizeof(struct thread_info), 16);
  720. #ifdef CONFIG_PPC_STD_MMU_64
  721. if (mmu_has_feature(MMU_FTR_SLB)) {
  722. unsigned long sp_vsid;
  723. unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
  724. if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
  725. sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
  726. << SLB_VSID_SHIFT_1T;
  727. else
  728. sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M)
  729. << SLB_VSID_SHIFT;
  730. sp_vsid |= SLB_VSID_KERNEL | llp;
  731. p->thread.ksp_vsid = sp_vsid;
  732. }
  733. #endif /* CONFIG_PPC_STD_MMU_64 */
  734. #ifdef CONFIG_PPC64
  735. if (cpu_has_feature(CPU_FTR_DSCR)) {
  736. p->thread.dscr_inherit = current->thread.dscr_inherit;
  737. p->thread.dscr = current->thread.dscr;
  738. }
  739. #endif
  740. /*
  741. * The PPC64 ABI makes use of a TOC to contain function
  742. * pointers. The function (ret_from_except) is actually a pointer
  743. * to the TOC entry. The first entry is a pointer to the actual
  744. * function.
  745. */
  746. #ifdef CONFIG_PPC64
  747. kregs->nip = *((unsigned long *)f);
  748. #else
  749. kregs->nip = (unsigned long)f;
  750. #endif
  751. return 0;
  752. }
  753. /*
  754. * Set up a thread for executing a new program
  755. */
  756. void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
  757. {
  758. #ifdef CONFIG_PPC64
  759. unsigned long load_addr = regs->gpr[2]; /* saved by ELF_PLAT_INIT */
  760. #endif
  761. /*
  762. * If we exec out of a kernel thread then thread.regs will not be
  763. * set. Do it now.
  764. */
  765. if (!current->thread.regs) {
  766. struct pt_regs *regs = task_stack_page(current) + THREAD_SIZE;
  767. current->thread.regs = regs - 1;
  768. }
  769. memset(regs->gpr, 0, sizeof(regs->gpr));
  770. regs->ctr = 0;
  771. regs->link = 0;
  772. regs->xer = 0;
  773. regs->ccr = 0;
  774. regs->gpr[1] = sp;
  775. /*
  776. * We have just cleared all the nonvolatile GPRs, so make
  777. * FULL_REGS(regs) return true. This is necessary to allow
  778. * ptrace to examine the thread immediately after exec.
  779. */
  780. regs->trap &= ~1UL;
  781. #ifdef CONFIG_PPC32
  782. regs->mq = 0;
  783. regs->nip = start;
  784. regs->msr = MSR_USER;
  785. #else
  786. if (!is_32bit_task()) {
  787. unsigned long entry, toc;
  788. /* start is a relocated pointer to the function descriptor for
  789. * the elf _start routine. The first entry in the function
  790. * descriptor is the entry address of _start and the second
  791. * entry is the TOC value we need to use.
  792. */
  793. __get_user(entry, (unsigned long __user *)start);
  794. __get_user(toc, (unsigned long __user *)start+1);
  795. /* Check whether the e_entry function descriptor entries
  796. * need to be relocated before we can use them.
  797. */
  798. if (load_addr != 0) {
  799. entry += load_addr;
  800. toc += load_addr;
  801. }
  802. regs->nip = entry;
  803. regs->gpr[2] = toc;
  804. regs->msr = MSR_USER64;
  805. } else {
  806. regs->nip = start;
  807. regs->gpr[2] = 0;
  808. regs->msr = MSR_USER32;
  809. }
  810. #endif
  811. discard_lazy_cpu_state();
  812. #ifdef CONFIG_VSX
  813. current->thread.used_vsr = 0;
  814. #endif
  815. memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
  816. current->thread.fpscr.val = 0;
  817. #ifdef CONFIG_ALTIVEC
  818. memset(current->thread.vr, 0, sizeof(current->thread.vr));
  819. memset(&current->thread.vscr, 0, sizeof(current->thread.vscr));
  820. current->thread.vscr.u[3] = 0x00010000; /* Java mode disabled */
  821. current->thread.vrsave = 0;
  822. current->thread.used_vr = 0;
  823. #endif /* CONFIG_ALTIVEC */
  824. #ifdef CONFIG_SPE
  825. memset(current->thread.evr, 0, sizeof(current->thread.evr));
  826. current->thread.acc = 0;
  827. current->thread.spefscr = 0;
  828. current->thread.used_spe = 0;
  829. #endif /* CONFIG_SPE */
  830. }
  831. #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
  832. | PR_FP_EXC_RES | PR_FP_EXC_INV)
  833. int set_fpexc_mode(struct task_struct *tsk, unsigned int val)
  834. {
  835. struct pt_regs *regs = tsk->thread.regs;
  836. /* This is a bit hairy. If we are an SPE enabled processor
  837. * (have embedded fp) we store the IEEE exception enable flags in
  838. * fpexc_mode. fpexc_mode is also used for setting FP exception
  839. * mode (asyn, precise, disabled) for 'Classic' FP. */
  840. if (val & PR_FP_EXC_SW_ENABLE) {
  841. #ifdef CONFIG_SPE
  842. if (cpu_has_feature(CPU_FTR_SPE)) {
  843. tsk->thread.fpexc_mode = val &
  844. (PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
  845. return 0;
  846. } else {
  847. return -EINVAL;
  848. }
  849. #else
  850. return -EINVAL;
  851. #endif
  852. }
  853. /* on a CONFIG_SPE this does not hurt us. The bits that
  854. * __pack_fe01 use do not overlap with bits used for
  855. * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits
  856. * on CONFIG_SPE implementations are reserved so writing to
  857. * them does not change anything */
  858. if (val > PR_FP_EXC_PRECISE)
  859. return -EINVAL;
  860. tsk->thread.fpexc_mode = __pack_fe01(val);
  861. if (regs != NULL && (regs->msr & MSR_FP) != 0)
  862. regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1))
  863. | tsk->thread.fpexc_mode;
  864. return 0;
  865. }
  866. int get_fpexc_mode(struct task_struct *tsk, unsigned long adr)
  867. {
  868. unsigned int val;
  869. if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE)
  870. #ifdef CONFIG_SPE
  871. if (cpu_has_feature(CPU_FTR_SPE))
  872. val = tsk->thread.fpexc_mode;
  873. else
  874. return -EINVAL;
  875. #else
  876. return -EINVAL;
  877. #endif
  878. else
  879. val = __unpack_fe01(tsk->thread.fpexc_mode);
  880. return put_user(val, (unsigned int __user *) adr);
  881. }
  882. int set_endian(struct task_struct *tsk, unsigned int val)
  883. {
  884. struct pt_regs *regs = tsk->thread.regs;
  885. if ((val == PR_ENDIAN_LITTLE && !cpu_has_feature(CPU_FTR_REAL_LE)) ||
  886. (val == PR_ENDIAN_PPC_LITTLE && !cpu_has_feature(CPU_FTR_PPC_LE)))
  887. return -EINVAL;
  888. if (regs == NULL)
  889. return -EINVAL;
  890. if (val == PR_ENDIAN_BIG)
  891. regs->msr &= ~MSR_LE;
  892. else if (val == PR_ENDIAN_LITTLE || val == PR_ENDIAN_PPC_LITTLE)
  893. regs->msr |= MSR_LE;
  894. else
  895. return -EINVAL;
  896. return 0;
  897. }
  898. int get_endian(struct task_struct *tsk, unsigned long adr)
  899. {
  900. struct pt_regs *regs = tsk->thread.regs;
  901. unsigned int val;
  902. if (!cpu_has_feature(CPU_FTR_PPC_LE) &&
  903. !cpu_has_feature(CPU_FTR_REAL_LE))
  904. return -EINVAL;
  905. if (regs == NULL)
  906. return -EINVAL;
  907. if (regs->msr & MSR_LE) {
  908. if (cpu_has_feature(CPU_FTR_REAL_LE))
  909. val = PR_ENDIAN_LITTLE;
  910. else
  911. val = PR_ENDIAN_PPC_LITTLE;
  912. } else
  913. val = PR_ENDIAN_BIG;
  914. return put_user(val, (unsigned int __user *)adr);
  915. }
  916. int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
  917. {
  918. tsk->thread.align_ctl = val;
  919. return 0;
  920. }
  921. int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
  922. {
  923. return put_user(tsk->thread.align_ctl, (unsigned int __user *)adr);
  924. }
  925. static inline int valid_irq_stack(unsigned long sp, struct task_struct *p,
  926. unsigned long nbytes)
  927. {
  928. unsigned long stack_page;
  929. unsigned long cpu = task_cpu(p);
  930. /*
  931. * Avoid crashing if the stack has overflowed and corrupted
  932. * task_cpu(p), which is in the thread_info struct.
  933. */
  934. if (cpu < NR_CPUS && cpu_possible(cpu)) {
  935. stack_page = (unsigned long) hardirq_ctx[cpu];
  936. if (sp >= stack_page + sizeof(struct thread_struct)
  937. && sp <= stack_page + THREAD_SIZE - nbytes)
  938. return 1;
  939. stack_page = (unsigned long) softirq_ctx[cpu];
  940. if (sp >= stack_page + sizeof(struct thread_struct)
  941. && sp <= stack_page + THREAD_SIZE - nbytes)
  942. return 1;
  943. }
  944. return 0;
  945. }
  946. int validate_sp(unsigned long sp, struct task_struct *p,
  947. unsigned long nbytes)
  948. {
  949. unsigned long stack_page = (unsigned long)task_stack_page(p);
  950. if (sp >= stack_page + sizeof(struct thread_struct)
  951. && sp <= stack_page + THREAD_SIZE - nbytes)
  952. return 1;
  953. return valid_irq_stack(sp, p, nbytes);
  954. }
  955. EXPORT_SYMBOL(validate_sp);
  956. unsigned long get_wchan(struct task_struct *p)
  957. {
  958. unsigned long ip, sp;
  959. int count = 0;
  960. if (!p || p == current || p->state == TASK_RUNNING)
  961. return 0;
  962. sp = p->thread.ksp;
  963. if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
  964. return 0;
  965. do {
  966. sp = *(unsigned long *)sp;
  967. if (!validate_sp(sp, p, STACK_FRAME_OVERHEAD))
  968. return 0;
  969. if (count > 0) {
  970. ip = ((unsigned long *)sp)[STACK_FRAME_LR_SAVE];
  971. if (!in_sched_functions(ip))
  972. return ip;
  973. }
  974. } while (count++ < 16);
  975. return 0;
  976. }
  977. static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
  978. void show_stack(struct task_struct *tsk, unsigned long *stack)
  979. {
  980. unsigned long sp, ip, lr, newsp;
  981. int count = 0;
  982. int firstframe = 1;
  983. #ifdef CONFIG_FUNCTION_GRAPH_TRACER
  984. int curr_frame = current->curr_ret_stack;
  985. extern void return_to_handler(void);
  986. unsigned long rth = (unsigned long)return_to_handler;
  987. unsigned long mrth = -1;
  988. #ifdef CONFIG_PPC64
  989. extern void mod_return_to_handler(void);
  990. rth = *(unsigned long *)rth;
  991. mrth = (unsigned long)mod_return_to_handler;
  992. mrth = *(unsigned long *)mrth;
  993. #endif
  994. #endif
  995. sp = (unsigned long) stack;
  996. if (tsk == NULL)
  997. tsk = current;
  998. if (sp == 0) {
  999. if (tsk == current)
  1000. asm("mr %0,1" : "=r" (sp));
  1001. else
  1002. sp = tsk->thread.ksp;
  1003. }
  1004. lr = 0;
  1005. printk("Call Trace:\n");
  1006. do {
  1007. if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD))
  1008. return;
  1009. stack = (unsigned long *) sp;
  1010. newsp = stack[0];
  1011. ip = stack[STACK_FRAME_LR_SAVE];
  1012. if (!firstframe || ip != lr) {
  1013. printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
  1014. #ifdef CONFIG_FUNCTION_GRAPH_TRACER
  1015. if ((ip == rth || ip == mrth) && curr_frame >= 0) {
  1016. printk(" (%pS)",
  1017. (void *)current->ret_stack[curr_frame].ret);
  1018. curr_frame--;
  1019. }
  1020. #endif
  1021. if (firstframe)
  1022. printk(" (unreliable)");
  1023. printk("\n");
  1024. }
  1025. firstframe = 0;
  1026. /*
  1027. * See if this is an exception frame.
  1028. * We look for the "regshere" marker in the current frame.
  1029. */
  1030. if (validate_sp(sp, tsk, STACK_INT_FRAME_SIZE)
  1031. && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) {
  1032. struct pt_regs *regs = (struct pt_regs *)
  1033. (sp + STACK_FRAME_OVERHEAD);
  1034. lr = regs->link;
  1035. printk("--- Exception: %lx at %pS\n LR = %pS\n",
  1036. regs->trap, (void *)regs->nip, (void *)lr);
  1037. firstframe = 1;
  1038. }
  1039. sp = newsp;
  1040. } while (count++ < kstack_depth_to_print);
  1041. }
  1042. void dump_stack(void)
  1043. {
  1044. show_stack(current, NULL);
  1045. }
  1046. EXPORT_SYMBOL(dump_stack);
  1047. #ifdef CONFIG_PPC64
  1048. /* Called with hard IRQs off */
  1049. void __ppc64_runlatch_on(void)
  1050. {
  1051. struct thread_info *ti = current_thread_info();
  1052. unsigned long ctrl;
  1053. ctrl = mfspr(SPRN_CTRLF);
  1054. ctrl |= CTRL_RUNLATCH;
  1055. mtspr(SPRN_CTRLT, ctrl);
  1056. ti->local_flags |= _TLF_RUNLATCH;
  1057. }
  1058. /* Called with hard IRQs off */
  1059. void __ppc64_runlatch_off(void)
  1060. {
  1061. struct thread_info *ti = current_thread_info();
  1062. unsigned long ctrl;
  1063. ti->local_flags &= ~_TLF_RUNLATCH;
  1064. ctrl = mfspr(SPRN_CTRLF);
  1065. ctrl &= ~CTRL_RUNLATCH;
  1066. mtspr(SPRN_CTRLT, ctrl);
  1067. }
  1068. #endif /* CONFIG_PPC64 */
  1069. unsigned long arch_align_stack(unsigned long sp)
  1070. {
  1071. if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
  1072. sp -= get_random_int() & ~PAGE_MASK;
  1073. return sp & ~0xf;
  1074. }
  1075. static inline unsigned long brk_rnd(void)
  1076. {
  1077. unsigned long rnd = 0;
  1078. /* 8MB for 32bit, 1GB for 64bit */
  1079. if (is_32bit_task())
  1080. rnd = (long)(get_random_int() % (1<<(23-PAGE_SHIFT)));
  1081. else
  1082. rnd = (long)(get_random_int() % (1<<(30-PAGE_SHIFT)));
  1083. return rnd << PAGE_SHIFT;
  1084. }
  1085. unsigned long arch_randomize_brk(struct mm_struct *mm)
  1086. {
  1087. unsigned long base = mm->brk;
  1088. unsigned long ret;
  1089. #ifdef CONFIG_PPC_STD_MMU_64
  1090. /*
  1091. * If we are using 1TB segments and we are allowed to randomise
  1092. * the heap, we can put it above 1TB so it is backed by a 1TB
  1093. * segment. Otherwise the heap will be in the bottom 1TB
  1094. * which always uses 256MB segments and this may result in a
  1095. * performance penalty.
  1096. */
  1097. if (!is_32bit_task() && (mmu_highuser_ssize == MMU_SEGSIZE_1T))
  1098. base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T);
  1099. #endif
  1100. ret = PAGE_ALIGN(base + brk_rnd());
  1101. if (ret < mm->brk)
  1102. return mm->brk;
  1103. return ret;
  1104. }
  1105. unsigned long randomize_et_dyn(unsigned long base)
  1106. {
  1107. unsigned long ret = PAGE_ALIGN(base + brk_rnd());
  1108. if (ret < base)
  1109. return base;
  1110. return ret;
  1111. }