dev-usb.c 6.1 KB

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  1. /*
  2. * Atheros AR7XXX/AR9XXX USB Host Controller device
  3. *
  4. * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
  5. * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  6. *
  7. * Parts of this file are based on Atheros' 2.6.15 BSP
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License version 2 as published
  11. * by the Free Software Foundation.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/init.h>
  15. #include <linux/delay.h>
  16. #include <linux/irq.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/usb/ehci_pdriver.h>
  20. #include <linux/usb/ohci_pdriver.h>
  21. #include <asm/mach-ath79/ath79.h>
  22. #include <asm/mach-ath79/ar71xx_regs.h>
  23. #include "common.h"
  24. #include "dev-usb.h"
  25. static struct resource ath79_ohci_resources[2];
  26. static u64 ath79_ohci_dmamask = DMA_BIT_MASK(32);
  27. static struct usb_ohci_pdata ath79_ohci_pdata = {
  28. };
  29. static struct platform_device ath79_ohci_device = {
  30. .name = "ohci-platform",
  31. .id = -1,
  32. .resource = ath79_ohci_resources,
  33. .num_resources = ARRAY_SIZE(ath79_ohci_resources),
  34. .dev = {
  35. .dma_mask = &ath79_ohci_dmamask,
  36. .coherent_dma_mask = DMA_BIT_MASK(32),
  37. .platform_data = &ath79_ohci_pdata,
  38. },
  39. };
  40. static struct resource ath79_ehci_resources[2];
  41. static u64 ath79_ehci_dmamask = DMA_BIT_MASK(32);
  42. static struct usb_ehci_pdata ath79_ehci_pdata_v1 = {
  43. .has_synopsys_hc_bug = 1,
  44. };
  45. static struct usb_ehci_pdata ath79_ehci_pdata_v2 = {
  46. .caps_offset = 0x100,
  47. .has_tt = 1,
  48. };
  49. static struct platform_device ath79_ehci_device = {
  50. .name = "ehci-platform",
  51. .id = -1,
  52. .resource = ath79_ehci_resources,
  53. .num_resources = ARRAY_SIZE(ath79_ehci_resources),
  54. .dev = {
  55. .dma_mask = &ath79_ehci_dmamask,
  56. .coherent_dma_mask = DMA_BIT_MASK(32),
  57. },
  58. };
  59. static void __init ath79_usb_init_resource(struct resource res[2],
  60. unsigned long base,
  61. unsigned long size,
  62. int irq)
  63. {
  64. res[0].flags = IORESOURCE_MEM;
  65. res[0].start = base;
  66. res[0].end = base + size - 1;
  67. res[1].flags = IORESOURCE_IRQ;
  68. res[1].start = irq;
  69. res[1].end = irq;
  70. }
  71. #define AR71XX_USB_RESET_MASK (AR71XX_RESET_USB_HOST | \
  72. AR71XX_RESET_USB_PHY | \
  73. AR71XX_RESET_USB_OHCI_DLL)
  74. static void __init ath79_usb_setup(void)
  75. {
  76. void __iomem *usb_ctrl_base;
  77. ath79_device_reset_set(AR71XX_USB_RESET_MASK);
  78. mdelay(1000);
  79. ath79_device_reset_clear(AR71XX_USB_RESET_MASK);
  80. usb_ctrl_base = ioremap(AR71XX_USB_CTRL_BASE, AR71XX_USB_CTRL_SIZE);
  81. /* Turning on the Buff and Desc swap bits */
  82. __raw_writel(0xf0000, usb_ctrl_base + AR71XX_USB_CTRL_REG_CONFIG);
  83. /* WAR for HW bug. Here it adjusts the duration between two SOFS */
  84. __raw_writel(0x20c00, usb_ctrl_base + AR71XX_USB_CTRL_REG_FLADJ);
  85. iounmap(usb_ctrl_base);
  86. mdelay(900);
  87. ath79_usb_init_resource(ath79_ohci_resources, AR71XX_OHCI_BASE,
  88. AR71XX_OHCI_SIZE, ATH79_MISC_IRQ_OHCI);
  89. platform_device_register(&ath79_ohci_device);
  90. ath79_usb_init_resource(ath79_ehci_resources, AR71XX_EHCI_BASE,
  91. AR71XX_EHCI_SIZE, ATH79_CPU_IRQ_USB);
  92. ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v1;
  93. platform_device_register(&ath79_ehci_device);
  94. }
  95. static void __init ar7240_usb_setup(void)
  96. {
  97. void __iomem *usb_ctrl_base;
  98. ath79_device_reset_clear(AR7240_RESET_OHCI_DLL);
  99. ath79_device_reset_set(AR7240_RESET_USB_HOST);
  100. mdelay(1000);
  101. ath79_device_reset_set(AR7240_RESET_OHCI_DLL);
  102. ath79_device_reset_clear(AR7240_RESET_USB_HOST);
  103. usb_ctrl_base = ioremap(AR7240_USB_CTRL_BASE, AR7240_USB_CTRL_SIZE);
  104. /* WAR for HW bug. Here it adjusts the duration between two SOFS */
  105. __raw_writel(0x3, usb_ctrl_base + AR71XX_USB_CTRL_REG_FLADJ);
  106. iounmap(usb_ctrl_base);
  107. ath79_usb_init_resource(ath79_ohci_resources, AR7240_OHCI_BASE,
  108. AR7240_OHCI_SIZE, ATH79_CPU_IRQ_USB);
  109. platform_device_register(&ath79_ohci_device);
  110. }
  111. static void __init ar724x_usb_setup(void)
  112. {
  113. ath79_device_reset_set(AR724X_RESET_USBSUS_OVERRIDE);
  114. mdelay(10);
  115. ath79_device_reset_clear(AR724X_RESET_USB_HOST);
  116. mdelay(10);
  117. ath79_device_reset_clear(AR724X_RESET_USB_PHY);
  118. mdelay(10);
  119. ath79_usb_init_resource(ath79_ehci_resources, AR724X_EHCI_BASE,
  120. AR724X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
  121. ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
  122. platform_device_register(&ath79_ehci_device);
  123. }
  124. static void __init ar913x_usb_setup(void)
  125. {
  126. ath79_device_reset_set(AR913X_RESET_USBSUS_OVERRIDE);
  127. mdelay(10);
  128. ath79_device_reset_clear(AR913X_RESET_USB_HOST);
  129. mdelay(10);
  130. ath79_device_reset_clear(AR913X_RESET_USB_PHY);
  131. mdelay(10);
  132. ath79_usb_init_resource(ath79_ehci_resources, AR913X_EHCI_BASE,
  133. AR913X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
  134. ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
  135. platform_device_register(&ath79_ehci_device);
  136. }
  137. static void __init ar933x_usb_setup(void)
  138. {
  139. ath79_device_reset_set(AR933X_RESET_USBSUS_OVERRIDE);
  140. mdelay(10);
  141. ath79_device_reset_clear(AR933X_RESET_USB_HOST);
  142. mdelay(10);
  143. ath79_device_reset_clear(AR933X_RESET_USB_PHY);
  144. mdelay(10);
  145. ath79_usb_init_resource(ath79_ehci_resources, AR933X_EHCI_BASE,
  146. AR933X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
  147. ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
  148. platform_device_register(&ath79_ehci_device);
  149. }
  150. static void __init ar934x_usb_setup(void)
  151. {
  152. u32 bootstrap;
  153. bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
  154. if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE)
  155. return;
  156. ath79_device_reset_set(AR934X_RESET_USBSUS_OVERRIDE);
  157. udelay(1000);
  158. ath79_device_reset_clear(AR934X_RESET_USB_PHY);
  159. udelay(1000);
  160. ath79_device_reset_clear(AR934X_RESET_USB_PHY_ANALOG);
  161. udelay(1000);
  162. ath79_device_reset_clear(AR934X_RESET_USB_HOST);
  163. udelay(1000);
  164. ath79_usb_init_resource(ath79_ehci_resources, AR934X_EHCI_BASE,
  165. AR934X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
  166. ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
  167. platform_device_register(&ath79_ehci_device);
  168. }
  169. void __init ath79_register_usb(void)
  170. {
  171. if (soc_is_ar71xx())
  172. ath79_usb_setup();
  173. else if (soc_is_ar7240())
  174. ar7240_usb_setup();
  175. else if (soc_is_ar7241() || soc_is_ar7242())
  176. ar724x_usb_setup();
  177. else if (soc_is_ar913x())
  178. ar913x_usb_setup();
  179. else if (soc_is_ar933x())
  180. ar933x_usb_setup();
  181. else if (soc_is_ar934x())
  182. ar934x_usb_setup();
  183. else
  184. BUG();
  185. }