pmu.h 2.4 KB

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  1. /*
  2. * Based on arch/arm/include/asm/pmu.h
  3. *
  4. * Copyright (C) 2009 picoChip Designs Ltd, Jamie Iles
  5. * Copyright (C) 2012 ARM Ltd.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #ifndef __ASM_PMU_H
  20. #define __ASM_PMU_H
  21. #ifdef CONFIG_HW_PERF_EVENTS
  22. /* The events for a given PMU register set. */
  23. struct pmu_hw_events {
  24. /*
  25. * The events that are active on the PMU for the given index.
  26. */
  27. struct perf_event **events;
  28. /*
  29. * A 1 bit for an index indicates that the counter is being used for
  30. * an event. A 0 means that the counter can be used.
  31. */
  32. unsigned long *used_mask;
  33. /*
  34. * Hardware lock to serialize accesses to PMU registers. Needed for the
  35. * read/modify/write sequences.
  36. */
  37. raw_spinlock_t pmu_lock;
  38. };
  39. struct arm_pmu {
  40. struct pmu pmu;
  41. cpumask_t active_irqs;
  42. const char *name;
  43. irqreturn_t (*handle_irq)(int irq_num, void *dev);
  44. void (*enable)(struct hw_perf_event *evt, int idx);
  45. void (*disable)(struct hw_perf_event *evt, int idx);
  46. int (*get_event_idx)(struct pmu_hw_events *hw_events,
  47. struct hw_perf_event *hwc);
  48. int (*set_event_filter)(struct hw_perf_event *evt,
  49. struct perf_event_attr *attr);
  50. u32 (*read_counter)(int idx);
  51. void (*write_counter)(int idx, u32 val);
  52. void (*start)(void);
  53. void (*stop)(void);
  54. void (*reset)(void *);
  55. int (*map_event)(struct perf_event *event);
  56. int num_events;
  57. atomic_t active_events;
  58. struct mutex reserve_mutex;
  59. u64 max_period;
  60. struct platform_device *plat_device;
  61. struct pmu_hw_events *(*get_hw_events)(void);
  62. };
  63. #define to_arm_pmu(p) (container_of(p, struct arm_pmu, pmu))
  64. int __init armpmu_register(struct arm_pmu *armpmu, char *name, int type);
  65. u64 armpmu_event_update(struct perf_event *event,
  66. struct hw_perf_event *hwc,
  67. int idx);
  68. int armpmu_event_set_period(struct perf_event *event,
  69. struct hw_perf_event *hwc,
  70. int idx);
  71. #endif /* CONFIG_HW_PERF_EVENTS */
  72. #endif /* __ASM_PMU_H */