motherboard.h 2.3 KB

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  1. #ifndef __MACH_MOTHERBOARD_H
  2. #define __MACH_MOTHERBOARD_H
  3. /*
  4. * Physical addresses, offset from V2M_PA_CS0-3
  5. */
  6. #define V2M_NOR0 (V2M_PA_CS0)
  7. #define V2M_NOR1 (V2M_PA_CS1)
  8. #define V2M_SRAM (V2M_PA_CS2)
  9. #define V2M_VIDEO_SRAM (V2M_PA_CS3 + 0x00000000)
  10. #define V2M_LAN9118 (V2M_PA_CS3 + 0x02000000)
  11. #define V2M_ISP1761 (V2M_PA_CS3 + 0x03000000)
  12. /*
  13. * Physical addresses, offset from V2M_PA_CS7
  14. */
  15. #define V2M_SYSREGS (V2M_PA_CS7 + 0x00000000)
  16. #define V2M_SYSCTL (V2M_PA_CS7 + 0x00001000)
  17. #define V2M_SERIAL_BUS_PCI (V2M_PA_CS7 + 0x00002000)
  18. #define V2M_AACI (V2M_PA_CS7 + 0x00004000)
  19. #define V2M_MMCI (V2M_PA_CS7 + 0x00005000)
  20. #define V2M_KMI0 (V2M_PA_CS7 + 0x00006000)
  21. #define V2M_KMI1 (V2M_PA_CS7 + 0x00007000)
  22. #define V2M_UART0 (V2M_PA_CS7 + 0x00009000)
  23. #define V2M_UART1 (V2M_PA_CS7 + 0x0000a000)
  24. #define V2M_UART2 (V2M_PA_CS7 + 0x0000b000)
  25. #define V2M_UART3 (V2M_PA_CS7 + 0x0000c000)
  26. #define V2M_WDT (V2M_PA_CS7 + 0x0000f000)
  27. #define V2M_TIMER01 (V2M_PA_CS7 + 0x00011000)
  28. #define V2M_TIMER23 (V2M_PA_CS7 + 0x00012000)
  29. #define V2M_SERIAL_BUS_DVI (V2M_PA_CS7 + 0x00016000)
  30. #define V2M_RTC (V2M_PA_CS7 + 0x00017000)
  31. #define V2M_CF (V2M_PA_CS7 + 0x0001a000)
  32. #define V2M_CLCD (V2M_PA_CS7 + 0x0001f000)
  33. /*
  34. * Interrupts. Those in {} are for AMBA devices
  35. */
  36. #define IRQ_V2M_WDT { (32 + 0) }
  37. #define IRQ_V2M_TIMER0 (32 + 2)
  38. #define IRQ_V2M_TIMER1 (32 + 2)
  39. #define IRQ_V2M_TIMER2 (32 + 3)
  40. #define IRQ_V2M_TIMER3 (32 + 3)
  41. #define IRQ_V2M_RTC { (32 + 4) }
  42. #define IRQ_V2M_UART0 { (32 + 5) }
  43. #define IRQ_V2M_UART1 { (32 + 6) }
  44. #define IRQ_V2M_UART2 { (32 + 7) }
  45. #define IRQ_V2M_UART3 { (32 + 8) }
  46. #define IRQ_V2M_MMCI { (32 + 9), (32 + 10) }
  47. #define IRQ_V2M_AACI { (32 + 11) }
  48. #define IRQ_V2M_KMI0 { (32 + 12) }
  49. #define IRQ_V2M_KMI1 { (32 + 13) }
  50. #define IRQ_V2M_CLCD { (32 + 14) }
  51. #define IRQ_V2M_LAN9118 (32 + 15)
  52. #define IRQ_V2M_ISP1761 (32 + 16)
  53. #define IRQ_V2M_PCIE (32 + 17)
  54. /*
  55. * Core tile IDs
  56. */
  57. #define V2M_CT_ID_CA9 0x0c000191
  58. #define V2M_CT_ID_UNSUPPORTED 0xff000191
  59. #define V2M_CT_ID_MASK 0xff000fff
  60. struct ct_desc {
  61. u32 id;
  62. const char *name;
  63. void (*map_io)(void);
  64. void (*init_early)(void);
  65. void (*init_irq)(void);
  66. void (*init_tile)(void);
  67. #ifdef CONFIG_SMP
  68. void (*init_cpu_map)(void);
  69. void (*smp_enable)(unsigned int);
  70. #endif
  71. };
  72. extern struct ct_desc *ct_desc;
  73. #endif