assabet.c 15 KB

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  1. /*
  2. * linux/arch/arm/mach-sa1100/assabet.c
  3. *
  4. * Author: Nicolas Pitre
  5. *
  6. * This file contains all Assabet-specific tweaks.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/module.h>
  15. #include <linux/errno.h>
  16. #include <linux/ioport.h>
  17. #include <linux/platform_data/sa11x0-serial.h>
  18. #include <linux/serial_core.h>
  19. #include <linux/mfd/ucb1x00.h>
  20. #include <linux/mtd/mtd.h>
  21. #include <linux/mtd/partitions.h>
  22. #include <linux/delay.h>
  23. #include <linux/mm.h>
  24. #include <linux/leds.h>
  25. #include <linux/slab.h>
  26. #include <video/sa1100fb.h>
  27. #include <mach/hardware.h>
  28. #include <asm/mach-types.h>
  29. #include <asm/setup.h>
  30. #include <asm/page.h>
  31. #include <asm/pgtable-hwdef.h>
  32. #include <asm/pgtable.h>
  33. #include <asm/tlbflush.h>
  34. #include <asm/mach/arch.h>
  35. #include <asm/mach/flash.h>
  36. #include <asm/mach/irda.h>
  37. #include <asm/mach/map.h>
  38. #include <mach/assabet.h>
  39. #include <linux/platform_data/mfd-mcp-sa11x0.h>
  40. #include <mach/irqs.h>
  41. #include "generic.h"
  42. #define ASSABET_BCR_DB1110 \
  43. (ASSABET_BCR_SPK_OFF | \
  44. ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
  45. ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
  46. ASSABET_BCR_IRDA_MD0)
  47. #define ASSABET_BCR_DB1111 \
  48. (ASSABET_BCR_SPK_OFF | \
  49. ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
  50. ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
  51. ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
  52. ASSABET_BCR_IRDA_MD0 | ASSABET_BCR_CF_RST)
  53. unsigned long SCR_value = ASSABET_SCR_INIT;
  54. EXPORT_SYMBOL(SCR_value);
  55. static unsigned long BCR_value = ASSABET_BCR_DB1110;
  56. void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
  57. {
  58. unsigned long flags;
  59. local_irq_save(flags);
  60. BCR_value = (BCR_value & ~mask) | val;
  61. ASSABET_BCR = BCR_value;
  62. local_irq_restore(flags);
  63. }
  64. EXPORT_SYMBOL(ASSABET_BCR_frob);
  65. static void assabet_ucb1x00_reset(enum ucb1x00_reset state)
  66. {
  67. if (state == UCB_RST_PROBE)
  68. ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
  69. }
  70. /*
  71. * Assabet flash support code.
  72. */
  73. #ifdef ASSABET_REV_4
  74. /*
  75. * Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
  76. */
  77. static struct mtd_partition assabet_partitions[] = {
  78. {
  79. .name = "bootloader",
  80. .size = 0x00020000,
  81. .offset = 0,
  82. .mask_flags = MTD_WRITEABLE,
  83. }, {
  84. .name = "bootloader params",
  85. .size = 0x00020000,
  86. .offset = MTDPART_OFS_APPEND,
  87. .mask_flags = MTD_WRITEABLE,
  88. }, {
  89. .name = "jffs",
  90. .size = MTDPART_SIZ_FULL,
  91. .offset = MTDPART_OFS_APPEND,
  92. }
  93. };
  94. #else
  95. /*
  96. * Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
  97. */
  98. static struct mtd_partition assabet_partitions[] = {
  99. {
  100. .name = "bootloader",
  101. .size = 0x00040000,
  102. .offset = 0,
  103. .mask_flags = MTD_WRITEABLE,
  104. }, {
  105. .name = "bootloader params",
  106. .size = 0x00040000,
  107. .offset = MTDPART_OFS_APPEND,
  108. .mask_flags = MTD_WRITEABLE,
  109. }, {
  110. .name = "jffs",
  111. .size = MTDPART_SIZ_FULL,
  112. .offset = MTDPART_OFS_APPEND,
  113. }
  114. };
  115. #endif
  116. static struct flash_platform_data assabet_flash_data = {
  117. .map_name = "cfi_probe",
  118. .parts = assabet_partitions,
  119. .nr_parts = ARRAY_SIZE(assabet_partitions),
  120. };
  121. static struct resource assabet_flash_resources[] = {
  122. DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
  123. DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
  124. };
  125. /*
  126. * Assabet IrDA support code.
  127. */
  128. static int assabet_irda_set_power(struct device *dev, unsigned int state)
  129. {
  130. static unsigned int bcr_state[4] = {
  131. ASSABET_BCR_IRDA_MD0,
  132. ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
  133. ASSABET_BCR_IRDA_MD1,
  134. 0
  135. };
  136. if (state < 4) {
  137. state = bcr_state[state];
  138. ASSABET_BCR_clear(state ^ (ASSABET_BCR_IRDA_MD1|
  139. ASSABET_BCR_IRDA_MD0));
  140. ASSABET_BCR_set(state);
  141. }
  142. return 0;
  143. }
  144. static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
  145. {
  146. if (speed < 4000000)
  147. ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
  148. else
  149. ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
  150. }
  151. static struct irda_platform_data assabet_irda_data = {
  152. .set_power = assabet_irda_set_power,
  153. .set_speed = assabet_irda_set_speed,
  154. };
  155. static struct ucb1x00_plat_data assabet_ucb1x00_data = {
  156. .reset = assabet_ucb1x00_reset,
  157. .gpio_base = -1,
  158. };
  159. static struct mcp_plat_data assabet_mcp_data = {
  160. .mccr0 = MCCR0_ADM,
  161. .sclk_rate = 11981000,
  162. .codec_pdata = &assabet_ucb1x00_data,
  163. };
  164. static void assabet_lcd_set_visual(u32 visual)
  165. {
  166. u_int is_true_color = visual == FB_VISUAL_TRUECOLOR;
  167. if (machine_is_assabet()) {
  168. #if 1 // phase 4 or newer Assabet's
  169. if (is_true_color)
  170. ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
  171. else
  172. ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
  173. #else
  174. // older Assabet's
  175. if (is_true_color)
  176. ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
  177. else
  178. ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
  179. #endif
  180. }
  181. }
  182. #ifndef ASSABET_PAL_VIDEO
  183. static void assabet_lcd_backlight_power(int on)
  184. {
  185. if (on)
  186. ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
  187. else
  188. ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
  189. }
  190. /*
  191. * Turn on/off the backlight. When turning the backlight on, we wait
  192. * 500us after turning it on so we don't cause the supplies to droop
  193. * when we enable the LCD controller (and cause a hard reset.)
  194. */
  195. static void assabet_lcd_power(int on)
  196. {
  197. if (on) {
  198. ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
  199. udelay(500);
  200. } else
  201. ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
  202. }
  203. /*
  204. * The assabet uses a sharp LQ039Q2DS54 LCD module. It is actually
  205. * takes an RGB666 signal, but we provide it with an RGB565 signal
  206. * instead (def_rgb_16).
  207. */
  208. static struct sa1100fb_mach_info lq039q2ds54_info = {
  209. .pixclock = 171521, .bpp = 16,
  210. .xres = 320, .yres = 240,
  211. .hsync_len = 5, .vsync_len = 1,
  212. .left_margin = 61, .upper_margin = 3,
  213. .right_margin = 9, .lower_margin = 0,
  214. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  215. .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
  216. .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
  217. .backlight_power = assabet_lcd_backlight_power,
  218. .lcd_power = assabet_lcd_power,
  219. .set_visual = assabet_lcd_set_visual,
  220. };
  221. #else
  222. static void assabet_pal_backlight_power(int on)
  223. {
  224. ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
  225. }
  226. static void assabet_pal_power(int on)
  227. {
  228. ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
  229. }
  230. static struct sa1100fb_mach_info pal_info = {
  231. .pixclock = 67797, .bpp = 16,
  232. .xres = 640, .yres = 512,
  233. .hsync_len = 64, .vsync_len = 6,
  234. .left_margin = 125, .upper_margin = 70,
  235. .right_margin = 115, .lower_margin = 36,
  236. .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
  237. .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
  238. .backlight_power = assabet_pal_backlight_power,
  239. .lcd_power = assabet_pal_power,
  240. .set_visual = assabet_lcd_set_visual,
  241. };
  242. #endif
  243. #ifdef CONFIG_ASSABET_NEPONSET
  244. static struct resource neponset_resources[] = {
  245. DEFINE_RES_MEM(0x10000000, 0x08000000),
  246. DEFINE_RES_MEM(0x18000000, 0x04000000),
  247. DEFINE_RES_MEM(0x40000000, SZ_8K),
  248. DEFINE_RES_IRQ(IRQ_GPIO25),
  249. };
  250. #endif
  251. static void __init assabet_init(void)
  252. {
  253. /*
  254. * Ensure that the power supply is in "high power" mode.
  255. */
  256. GPSR = GPIO_GPIO16;
  257. GPDR |= GPIO_GPIO16;
  258. /*
  259. * Ensure that these pins are set as outputs and are driving
  260. * logic 0. This ensures that we won't inadvertently toggle
  261. * the WS latch in the CPLD, and we don't float causing
  262. * excessive power drain. --rmk
  263. */
  264. GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
  265. GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
  266. /*
  267. * Also set GPIO27 as an output; this is used to clock UART3
  268. * via the FPGA and as otherwise has no pullups or pulldowns,
  269. * so stop it floating.
  270. */
  271. GPCR = GPIO_GPIO27;
  272. GPDR |= GPIO_GPIO27;
  273. /*
  274. * Set up registers for sleep mode.
  275. */
  276. PWER = PWER_GPIO0;
  277. PGSR = 0;
  278. PCFR = 0;
  279. PSDR = 0;
  280. PPDR |= PPC_TXD3 | PPC_TXD1;
  281. PPSR |= PPC_TXD3 | PPC_TXD1;
  282. sa11x0_ppc_configure_mcp();
  283. if (machine_has_neponset()) {
  284. /*
  285. * Angel sets this, but other bootloaders may not.
  286. *
  287. * This must precede any driver calls to BCR_set()
  288. * or BCR_clear().
  289. */
  290. ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111;
  291. #ifndef CONFIG_ASSABET_NEPONSET
  292. printk( "Warning: Neponset detected but full support "
  293. "hasn't been configured in the kernel\n" );
  294. #else
  295. platform_device_register_simple("neponset", 0,
  296. neponset_resources, ARRAY_SIZE(neponset_resources));
  297. #endif
  298. }
  299. #ifndef ASSABET_PAL_VIDEO
  300. sa11x0_register_lcd(&lq039q2ds54_info);
  301. #else
  302. sa11x0_register_lcd(&pal_video);
  303. #endif
  304. sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
  305. ARRAY_SIZE(assabet_flash_resources));
  306. sa11x0_register_irda(&assabet_irda_data);
  307. sa11x0_register_mcp(&assabet_mcp_data);
  308. }
  309. /*
  310. * On Assabet, we must probe for the Neponset board _before_
  311. * paging_init() has occurred to actually determine the amount
  312. * of RAM available. To do so, we map the appropriate IO section
  313. * in the page table here in order to access GPIO registers.
  314. */
  315. static void __init map_sa1100_gpio_regs( void )
  316. {
  317. unsigned long phys = __PREG(GPLR) & PMD_MASK;
  318. unsigned long virt = (unsigned long)io_p2v(phys);
  319. int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
  320. pmd_t *pmd;
  321. pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
  322. *pmd = __pmd(phys | prot);
  323. flush_pmd_entry(pmd);
  324. }
  325. /*
  326. * Read System Configuration "Register"
  327. * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
  328. * User's Guide", section 4.4.1)
  329. *
  330. * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
  331. * to set up the serial port for decompression status messages. We
  332. * repeat it here because the kernel may not be loaded as a zImage, and
  333. * also because it's a hassle to communicate the SCR value to the kernel
  334. * from the decompressor.
  335. *
  336. * Note that IRQs are guaranteed to be disabled.
  337. */
  338. static void __init get_assabet_scr(void)
  339. {
  340. unsigned long uninitialized_var(scr), i;
  341. GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */
  342. GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */
  343. GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */
  344. for(i = 100; i--; ) /* Read GPIO 9:2 */
  345. scr = GPLR;
  346. GPDR |= 0x3fc; /* restore correct pin direction */
  347. scr &= 0x3fc; /* save as system configuration byte. */
  348. SCR_value = scr;
  349. }
  350. static void __init
  351. fixup_assabet(struct tag *tags, char **cmdline, struct meminfo *mi)
  352. {
  353. /* This must be done before any call to machine_has_neponset() */
  354. map_sa1100_gpio_regs();
  355. get_assabet_scr();
  356. if (machine_has_neponset())
  357. printk("Neponset expansion board detected\n");
  358. }
  359. static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
  360. {
  361. if (port->mapbase == _Ser1UTCR0) {
  362. if (state)
  363. ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
  364. ASSABET_BCR_COM_RTS |
  365. ASSABET_BCR_COM_DTR);
  366. else
  367. ASSABET_BCR_set(ASSABET_BCR_RS232EN |
  368. ASSABET_BCR_COM_RTS |
  369. ASSABET_BCR_COM_DTR);
  370. }
  371. }
  372. /*
  373. * Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
  374. * and UART3 (radio module). We only handle them for UART1 here.
  375. */
  376. static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
  377. {
  378. if (port->mapbase == _Ser1UTCR0) {
  379. u_int set = 0, clear = 0;
  380. if (mctrl & TIOCM_RTS)
  381. clear |= ASSABET_BCR_COM_RTS;
  382. else
  383. set |= ASSABET_BCR_COM_RTS;
  384. if (mctrl & TIOCM_DTR)
  385. clear |= ASSABET_BCR_COM_DTR;
  386. else
  387. set |= ASSABET_BCR_COM_DTR;
  388. ASSABET_BCR_clear(clear);
  389. ASSABET_BCR_set(set);
  390. }
  391. }
  392. static u_int assabet_get_mctrl(struct uart_port *port)
  393. {
  394. u_int ret = 0;
  395. u_int bsr = ASSABET_BSR;
  396. /* need 2 reads to read current value */
  397. bsr = ASSABET_BSR;
  398. if (port->mapbase == _Ser1UTCR0) {
  399. if (bsr & ASSABET_BSR_COM_DCD)
  400. ret |= TIOCM_CD;
  401. if (bsr & ASSABET_BSR_COM_CTS)
  402. ret |= TIOCM_CTS;
  403. if (bsr & ASSABET_BSR_COM_DSR)
  404. ret |= TIOCM_DSR;
  405. } else if (port->mapbase == _Ser3UTCR0) {
  406. if (bsr & ASSABET_BSR_RAD_DCD)
  407. ret |= TIOCM_CD;
  408. if (bsr & ASSABET_BSR_RAD_CTS)
  409. ret |= TIOCM_CTS;
  410. if (bsr & ASSABET_BSR_RAD_DSR)
  411. ret |= TIOCM_DSR;
  412. if (bsr & ASSABET_BSR_RAD_RI)
  413. ret |= TIOCM_RI;
  414. } else {
  415. ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
  416. }
  417. return ret;
  418. }
  419. static struct sa1100_port_fns assabet_port_fns __initdata = {
  420. .set_mctrl = assabet_set_mctrl,
  421. .get_mctrl = assabet_get_mctrl,
  422. .pm = assabet_uart_pm,
  423. };
  424. static struct map_desc assabet_io_desc[] __initdata = {
  425. { /* Board Control Register */
  426. .virtual = 0xf1000000,
  427. .pfn = __phys_to_pfn(0x12000000),
  428. .length = 0x00100000,
  429. .type = MT_DEVICE
  430. }, { /* MQ200 */
  431. .virtual = 0xf2800000,
  432. .pfn = __phys_to_pfn(0x4b800000),
  433. .length = 0x00800000,
  434. .type = MT_DEVICE
  435. }
  436. };
  437. static void __init assabet_map_io(void)
  438. {
  439. sa1100_map_io();
  440. iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
  441. /*
  442. * Set SUS bit in SDCR0 so serial port 1 functions.
  443. * Its called GPCLKR0 in my SA1110 manual.
  444. */
  445. Ser1SDCR0 |= SDCR0_SUS;
  446. if (!machine_has_neponset())
  447. sa1100_register_uart_fns(&assabet_port_fns);
  448. /*
  449. * When Neponset is attached, the first UART should be
  450. * UART3. That's what Angel is doing and many documents
  451. * are stating this.
  452. *
  453. * We do the Neponset mapping even if Neponset support
  454. * isn't compiled in so the user will still get something on
  455. * the expected physical serial port.
  456. *
  457. * We no longer do this; not all boot loaders support it,
  458. * and UART3 appears to be somewhat unreliable with blob.
  459. */
  460. sa1100_register_uart(0, 1);
  461. sa1100_register_uart(2, 3);
  462. }
  463. /* LEDs */
  464. #if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
  465. struct assabet_led {
  466. struct led_classdev cdev;
  467. u32 mask;
  468. };
  469. /*
  470. * The triggers lines up below will only be used if the
  471. * LED triggers are compiled in.
  472. */
  473. static const struct {
  474. const char *name;
  475. const char *trigger;
  476. } assabet_leds[] = {
  477. { "assabet:red", "cpu0",},
  478. { "assabet:green", "heartbeat", },
  479. };
  480. /*
  481. * The LED control in Assabet is reversed:
  482. * - setting bit means turn off LED
  483. * - clearing bit means turn on LED
  484. */
  485. static void assabet_led_set(struct led_classdev *cdev,
  486. enum led_brightness b)
  487. {
  488. struct assabet_led *led = container_of(cdev,
  489. struct assabet_led, cdev);
  490. if (b != LED_OFF)
  491. ASSABET_BCR_clear(led->mask);
  492. else
  493. ASSABET_BCR_set(led->mask);
  494. }
  495. static enum led_brightness assabet_led_get(struct led_classdev *cdev)
  496. {
  497. struct assabet_led *led = container_of(cdev,
  498. struct assabet_led, cdev);
  499. return (ASSABET_BCR & led->mask) ? LED_OFF : LED_FULL;
  500. }
  501. static int __init assabet_leds_init(void)
  502. {
  503. int i;
  504. if (!machine_is_assabet())
  505. return -ENODEV;
  506. for (i = 0; i < ARRAY_SIZE(assabet_leds); i++) {
  507. struct assabet_led *led;
  508. led = kzalloc(sizeof(*led), GFP_KERNEL);
  509. if (!led)
  510. break;
  511. led->cdev.name = assabet_leds[i].name;
  512. led->cdev.brightness_set = assabet_led_set;
  513. led->cdev.brightness_get = assabet_led_get;
  514. led->cdev.default_trigger = assabet_leds[i].trigger;
  515. if (!i)
  516. led->mask = ASSABET_BCR_LED_RED;
  517. else
  518. led->mask = ASSABET_BCR_LED_GREEN;
  519. if (led_classdev_register(NULL, &led->cdev) < 0) {
  520. kfree(led);
  521. break;
  522. }
  523. }
  524. return 0;
  525. }
  526. /*
  527. * Since we may have triggers on any subsystem, defer registration
  528. * until after subsystem_init.
  529. */
  530. fs_initcall(assabet_leds_init);
  531. #endif
  532. MACHINE_START(ASSABET, "Intel-Assabet")
  533. .atag_offset = 0x100,
  534. .fixup = fixup_assabet,
  535. .map_io = assabet_map_io,
  536. .nr_irqs = SA1100_NR_IRQS,
  537. .init_irq = sa1100_init_irq,
  538. .timer = &sa1100_timer,
  539. .init_machine = assabet_init,
  540. .init_late = sa11x0_init_late,
  541. #ifdef CONFIG_SA1111
  542. .dma_zone_size = SZ_1M,
  543. #endif
  544. .restart = sa11x0_restart,
  545. MACHINE_END