highbank.c 5.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217
  1. /*
  2. * Copyright 2010-2011 Calxeda, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License along with
  14. * this program. If not, see <http://www.gnu.org/licenses/>.
  15. */
  16. #include <linux/clk.h>
  17. #include <linux/clkdev.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/io.h>
  20. #include <linux/irq.h>
  21. #include <linux/irqdomain.h>
  22. #include <linux/of.h>
  23. #include <linux/of_irq.h>
  24. #include <linux/of_platform.h>
  25. #include <linux/of_address.h>
  26. #include <linux/smp.h>
  27. #include <linux/amba/bus.h>
  28. #include <asm/arch_timer.h>
  29. #include <asm/cacheflush.h>
  30. #include <asm/smp_plat.h>
  31. #include <asm/smp_twd.h>
  32. #include <asm/hardware/arm_timer.h>
  33. #include <asm/hardware/timer-sp.h>
  34. #include <asm/hardware/gic.h>
  35. #include <asm/hardware/cache-l2x0.h>
  36. #include <asm/mach/arch.h>
  37. #include <asm/mach/map.h>
  38. #include <asm/mach/time.h>
  39. #include "core.h"
  40. #include "sysregs.h"
  41. void __iomem *sregs_base;
  42. void __iomem *scu_base_addr;
  43. static void __init highbank_scu_map_io(void)
  44. {
  45. unsigned long base;
  46. /* Get SCU base */
  47. asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
  48. scu_base_addr = ioremap(base, SZ_4K);
  49. }
  50. #define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu)))
  51. #define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu))
  52. void highbank_set_cpu_jump(int cpu, void *jump_addr)
  53. {
  54. cpu = cpu_logical_map(cpu);
  55. writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu));
  56. __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
  57. outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
  58. HB_JUMP_TABLE_PHYS(cpu) + 15);
  59. }
  60. const static struct of_device_id irq_match[] = {
  61. { .compatible = "arm,cortex-a15-gic", .data = gic_of_init, },
  62. { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
  63. {}
  64. };
  65. #ifdef CONFIG_CACHE_L2X0
  66. static void highbank_l2x0_disable(void)
  67. {
  68. /* Disable PL310 L2 Cache controller */
  69. highbank_smc1(0x102, 0x0);
  70. }
  71. #endif
  72. static void __init highbank_init_irq(void)
  73. {
  74. of_irq_init(irq_match);
  75. if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
  76. highbank_scu_map_io();
  77. #ifdef CONFIG_CACHE_L2X0
  78. /* Enable PL310 L2 Cache controller */
  79. highbank_smc1(0x102, 0x1);
  80. l2x0_of_init(0, ~0UL);
  81. outer_cache.disable = highbank_l2x0_disable;
  82. #endif
  83. }
  84. static struct clk_lookup lookup = {
  85. .dev_id = "sp804",
  86. .con_id = NULL,
  87. };
  88. static void __init highbank_timer_init(void)
  89. {
  90. int irq;
  91. struct device_node *np;
  92. void __iomem *timer_base;
  93. /* Map system registers */
  94. np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
  95. sregs_base = of_iomap(np, 0);
  96. WARN_ON(!sregs_base);
  97. np = of_find_compatible_node(NULL, NULL, "arm,sp804");
  98. timer_base = of_iomap(np, 0);
  99. WARN_ON(!timer_base);
  100. irq = irq_of_parse_and_map(np, 0);
  101. highbank_clocks_init();
  102. lookup.clk = of_clk_get(np, 0);
  103. clkdev_add(&lookup);
  104. sp804_clocksource_and_sched_clock_init(timer_base + 0x20, "timer1");
  105. sp804_clockevents_init(timer_base, irq, "timer0");
  106. twd_local_timer_of_register();
  107. arch_timer_of_register();
  108. arch_timer_sched_clock_init();
  109. }
  110. static struct sys_timer highbank_timer = {
  111. .init = highbank_timer_init,
  112. };
  113. static void highbank_power_off(void)
  114. {
  115. highbank_set_pwr_shutdown();
  116. while (1)
  117. cpu_do_idle();
  118. }
  119. static int highbank_platform_notifier(struct notifier_block *nb,
  120. unsigned long event, void *__dev)
  121. {
  122. struct resource *res;
  123. int reg = -1;
  124. struct device *dev = __dev;
  125. if (event != BUS_NOTIFY_ADD_DEVICE)
  126. return NOTIFY_DONE;
  127. if (of_device_is_compatible(dev->of_node, "calxeda,hb-ahci"))
  128. reg = 0xc;
  129. else if (of_device_is_compatible(dev->of_node, "calxeda,hb-sdhci"))
  130. reg = 0x18;
  131. else if (of_device_is_compatible(dev->of_node, "arm,pl330"))
  132. reg = 0x20;
  133. else if (of_device_is_compatible(dev->of_node, "calxeda,hb-xgmac")) {
  134. res = platform_get_resource(to_platform_device(dev),
  135. IORESOURCE_MEM, 0);
  136. if (res) {
  137. if (res->start == 0xfff50000)
  138. reg = 0;
  139. else if (res->start == 0xfff51000)
  140. reg = 4;
  141. }
  142. }
  143. if (reg < 0)
  144. return NOTIFY_DONE;
  145. if (of_property_read_bool(dev->of_node, "dma-coherent")) {
  146. writel(0xff31, sregs_base + reg);
  147. set_dma_ops(dev, &arm_coherent_dma_ops);
  148. } else
  149. writel(0, sregs_base + reg);
  150. return NOTIFY_OK;
  151. }
  152. static struct notifier_block highbank_amba_nb = {
  153. .notifier_call = highbank_platform_notifier,
  154. };
  155. static struct notifier_block highbank_platform_nb = {
  156. .notifier_call = highbank_platform_notifier,
  157. };
  158. static void __init highbank_init(void)
  159. {
  160. pm_power_off = highbank_power_off;
  161. highbank_pm_init();
  162. bus_register_notifier(&platform_bus_type, &highbank_platform_nb);
  163. bus_register_notifier(&amba_bustype, &highbank_amba_nb);
  164. of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  165. }
  166. static const char *highbank_match[] __initconst = {
  167. "calxeda,highbank",
  168. "calxeda,ecx-2000",
  169. NULL,
  170. };
  171. DT_MACHINE_START(HIGHBANK, "Highbank")
  172. .smp = smp_ops(highbank_smp_ops),
  173. .map_io = debug_ll_io_init,
  174. .init_irq = highbank_init_irq,
  175. .timer = &highbank_timer,
  176. .handle_irq = gic_handle_irq,
  177. .init_machine = highbank_init,
  178. .dt_compat = highbank_match,
  179. .restart = highbank_restart,
  180. MACHINE_END