mach-universal_c210.c 29 KB

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  1. /* linux/arch/arm/mach-exynos4/mach-universal_c210.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/platform_device.h>
  10. #include <linux/serial_core.h>
  11. #include <linux/input.h>
  12. #include <linux/i2c.h>
  13. #include <linux/gpio_keys.h>
  14. #include <linux/gpio.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/fb.h>
  17. #include <linux/mfd/max8998.h>
  18. #include <linux/regulator/machine.h>
  19. #include <linux/regulator/fixed.h>
  20. #include <linux/regulator/max8952.h>
  21. #include <linux/mmc/host.h>
  22. #include <linux/i2c-gpio.h>
  23. #include <linux/i2c/mcs.h>
  24. #include <linux/i2c/atmel_mxt_ts.h>
  25. #include <linux/platform_data/i2c-s3c2410.h>
  26. #include <linux/platform_data/mipi-csis.h>
  27. #include <linux/platform_data/s3c-hsotg.h>
  28. #include <drm/exynos_drm.h>
  29. #include <asm/mach/arch.h>
  30. #include <asm/hardware/gic.h>
  31. #include <asm/mach-types.h>
  32. #include <video/samsung_fimd.h>
  33. #include <plat/regs-serial.h>
  34. #include <plat/clock.h>
  35. #include <plat/cpu.h>
  36. #include <plat/devs.h>
  37. #include <plat/gpio-cfg.h>
  38. #include <plat/fb.h>
  39. #include <plat/mfc.h>
  40. #include <plat/sdhci.h>
  41. #include <plat/fimc-core.h>
  42. #include <plat/s5p-time.h>
  43. #include <plat/camport.h>
  44. #include <mach/map.h>
  45. #include <media/v4l2-mediabus.h>
  46. #include <media/s5p_fimc.h>
  47. #include <media/m5mols.h>
  48. #include <media/s5k6aa.h>
  49. #include "common.h"
  50. /* Following are default values for UCON, ULCON and UFCON UART registers */
  51. #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
  52. S3C2410_UCON_RXILEVEL | \
  53. S3C2410_UCON_TXIRQMODE | \
  54. S3C2410_UCON_RXIRQMODE | \
  55. S3C2410_UCON_RXFIFO_TOI | \
  56. S3C2443_UCON_RXERR_IRQEN)
  57. #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
  58. #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
  59. S5PV210_UFCON_TXTRIG256 | \
  60. S5PV210_UFCON_RXTRIG256)
  61. static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
  62. [0] = {
  63. .hwport = 0,
  64. .ucon = UNIVERSAL_UCON_DEFAULT,
  65. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  66. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  67. },
  68. [1] = {
  69. .hwport = 1,
  70. .ucon = UNIVERSAL_UCON_DEFAULT,
  71. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  72. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  73. },
  74. [2] = {
  75. .hwport = 2,
  76. .ucon = UNIVERSAL_UCON_DEFAULT,
  77. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  78. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  79. },
  80. [3] = {
  81. .hwport = 3,
  82. .ucon = UNIVERSAL_UCON_DEFAULT,
  83. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  84. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  85. },
  86. };
  87. static struct regulator_consumer_supply max8952_consumer =
  88. REGULATOR_SUPPLY("vdd_arm", NULL);
  89. static struct max8952_platform_data universal_max8952_pdata __initdata = {
  90. .gpio_vid0 = EXYNOS4_GPX0(3),
  91. .gpio_vid1 = EXYNOS4_GPX0(4),
  92. .gpio_en = -1, /* Not controllable, set "Always High" */
  93. .default_mode = 0, /* vid0 = 0, vid1 = 0 */
  94. .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
  95. .sync_freq = 0, /* default: fastest */
  96. .ramp_speed = 0, /* default: fastest */
  97. .reg_data = {
  98. .constraints = {
  99. .name = "VARM_1.2V",
  100. .min_uV = 770000,
  101. .max_uV = 1400000,
  102. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  103. .always_on = 1,
  104. .boot_on = 1,
  105. },
  106. .num_consumer_supplies = 1,
  107. .consumer_supplies = &max8952_consumer,
  108. },
  109. };
  110. static struct regulator_consumer_supply lp3974_buck1_consumer =
  111. REGULATOR_SUPPLY("vdd_int", NULL);
  112. static struct regulator_consumer_supply lp3974_buck2_consumer =
  113. REGULATOR_SUPPLY("vddg3d", NULL);
  114. static struct regulator_consumer_supply lp3974_buck3_consumer[] = {
  115. REGULATOR_SUPPLY("vdet", "s5p-sdo"),
  116. REGULATOR_SUPPLY("vdd_reg", "0-003c"),
  117. };
  118. static struct regulator_init_data lp3974_buck1_data = {
  119. .constraints = {
  120. .name = "VINT_1.1V",
  121. .min_uV = 750000,
  122. .max_uV = 1500000,
  123. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  124. REGULATOR_CHANGE_STATUS,
  125. .boot_on = 1,
  126. .state_mem = {
  127. .disabled = 1,
  128. },
  129. },
  130. .num_consumer_supplies = 1,
  131. .consumer_supplies = &lp3974_buck1_consumer,
  132. };
  133. static struct regulator_init_data lp3974_buck2_data = {
  134. .constraints = {
  135. .name = "VG3D_1.1V",
  136. .min_uV = 750000,
  137. .max_uV = 1500000,
  138. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  139. REGULATOR_CHANGE_STATUS,
  140. .boot_on = 1,
  141. .state_mem = {
  142. .disabled = 1,
  143. },
  144. },
  145. .num_consumer_supplies = 1,
  146. .consumer_supplies = &lp3974_buck2_consumer,
  147. };
  148. static struct regulator_init_data lp3974_buck3_data = {
  149. .constraints = {
  150. .name = "VCC_1.8V",
  151. .min_uV = 1800000,
  152. .max_uV = 1800000,
  153. .apply_uV = 1,
  154. .always_on = 1,
  155. .state_mem = {
  156. .enabled = 1,
  157. },
  158. },
  159. .num_consumer_supplies = ARRAY_SIZE(lp3974_buck3_consumer),
  160. .consumer_supplies = lp3974_buck3_consumer,
  161. };
  162. static struct regulator_init_data lp3974_buck4_data = {
  163. .constraints = {
  164. .name = "VMEM_1.2V",
  165. .min_uV = 1200000,
  166. .max_uV = 1200000,
  167. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  168. .apply_uV = 1,
  169. .state_mem = {
  170. .disabled = 1,
  171. },
  172. },
  173. };
  174. static struct regulator_init_data lp3974_ldo2_data = {
  175. .constraints = {
  176. .name = "VALIVE_1.2V",
  177. .min_uV = 1200000,
  178. .max_uV = 1200000,
  179. .apply_uV = 1,
  180. .always_on = 1,
  181. .state_mem = {
  182. .enabled = 1,
  183. },
  184. },
  185. };
  186. static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
  187. REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"),
  188. REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
  189. REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
  190. REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"),
  191. };
  192. static struct regulator_init_data lp3974_ldo3_data = {
  193. .constraints = {
  194. .name = "VUSB+MIPI_1.1V",
  195. .min_uV = 1100000,
  196. .max_uV = 1100000,
  197. .apply_uV = 1,
  198. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  199. .state_mem = {
  200. .disabled = 1,
  201. },
  202. },
  203. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
  204. .consumer_supplies = lp3974_ldo3_consumer,
  205. };
  206. static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
  207. REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
  208. };
  209. static struct regulator_init_data lp3974_ldo4_data = {
  210. .constraints = {
  211. .name = "VADC_3.3V",
  212. .min_uV = 3300000,
  213. .max_uV = 3300000,
  214. .apply_uV = 1,
  215. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  216. .state_mem = {
  217. .disabled = 1,
  218. },
  219. },
  220. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
  221. .consumer_supplies = lp3974_ldo4_consumer,
  222. };
  223. static struct regulator_init_data lp3974_ldo5_data = {
  224. .constraints = {
  225. .name = "VTF_2.8V",
  226. .min_uV = 2800000,
  227. .max_uV = 2800000,
  228. .apply_uV = 1,
  229. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  230. .state_mem = {
  231. .disabled = 1,
  232. },
  233. },
  234. };
  235. static struct regulator_init_data lp3974_ldo6_data = {
  236. .constraints = {
  237. .name = "LDO6",
  238. .min_uV = 2000000,
  239. .max_uV = 2000000,
  240. .apply_uV = 1,
  241. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  242. .state_mem = {
  243. .disabled = 1,
  244. },
  245. },
  246. };
  247. static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
  248. REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"),
  249. };
  250. static struct regulator_init_data lp3974_ldo7_data = {
  251. .constraints = {
  252. .name = "VLCD+VMIPI_1.8V",
  253. .min_uV = 1800000,
  254. .max_uV = 1800000,
  255. .apply_uV = 1,
  256. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  257. .state_mem = {
  258. .disabled = 1,
  259. },
  260. },
  261. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer),
  262. .consumer_supplies = lp3974_ldo7_consumer,
  263. };
  264. static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
  265. REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"),
  266. REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
  267. };
  268. static struct regulator_init_data lp3974_ldo8_data = {
  269. .constraints = {
  270. .name = "VUSB+VDAC_3.3V",
  271. .min_uV = 3300000,
  272. .max_uV = 3300000,
  273. .apply_uV = 1,
  274. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  275. .state_mem = {
  276. .disabled = 1,
  277. },
  278. },
  279. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
  280. .consumer_supplies = lp3974_ldo8_consumer,
  281. };
  282. static struct regulator_consumer_supply lp3974_ldo9_consumer =
  283. REGULATOR_SUPPLY("vddio", "0-003c");
  284. static struct regulator_init_data lp3974_ldo9_data = {
  285. .constraints = {
  286. .name = "VCC_2.8V",
  287. .min_uV = 2800000,
  288. .max_uV = 2800000,
  289. .apply_uV = 1,
  290. .always_on = 1,
  291. .state_mem = {
  292. .enabled = 1,
  293. },
  294. },
  295. .num_consumer_supplies = 1,
  296. .consumer_supplies = &lp3974_ldo9_consumer,
  297. };
  298. static struct regulator_init_data lp3974_ldo10_data = {
  299. .constraints = {
  300. .name = "VPLL_1.1V",
  301. .min_uV = 1100000,
  302. .max_uV = 1100000,
  303. .boot_on = 1,
  304. .apply_uV = 1,
  305. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  306. .state_mem = {
  307. .disabled = 1,
  308. },
  309. },
  310. };
  311. static struct regulator_consumer_supply lp3974_ldo11_consumer =
  312. REGULATOR_SUPPLY("dig_28", "0-001f");
  313. static struct regulator_init_data lp3974_ldo11_data = {
  314. .constraints = {
  315. .name = "CAM_AF_3.3V",
  316. .min_uV = 3300000,
  317. .max_uV = 3300000,
  318. .apply_uV = 1,
  319. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  320. .state_mem = {
  321. .disabled = 1,
  322. },
  323. },
  324. .num_consumer_supplies = 1,
  325. .consumer_supplies = &lp3974_ldo11_consumer,
  326. };
  327. static struct regulator_init_data lp3974_ldo12_data = {
  328. .constraints = {
  329. .name = "PS_2.8V",
  330. .min_uV = 2800000,
  331. .max_uV = 2800000,
  332. .apply_uV = 1,
  333. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  334. .state_mem = {
  335. .disabled = 1,
  336. },
  337. },
  338. };
  339. static struct regulator_init_data lp3974_ldo13_data = {
  340. .constraints = {
  341. .name = "VHIC_1.2V",
  342. .min_uV = 1200000,
  343. .max_uV = 1200000,
  344. .apply_uV = 1,
  345. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  346. .state_mem = {
  347. .disabled = 1,
  348. },
  349. },
  350. };
  351. static struct regulator_consumer_supply lp3974_ldo14_consumer =
  352. REGULATOR_SUPPLY("dig_18", "0-001f");
  353. static struct regulator_init_data lp3974_ldo14_data = {
  354. .constraints = {
  355. .name = "CAM_I_HOST_1.8V",
  356. .min_uV = 1800000,
  357. .max_uV = 1800000,
  358. .apply_uV = 1,
  359. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  360. .state_mem = {
  361. .disabled = 1,
  362. },
  363. },
  364. .num_consumer_supplies = 1,
  365. .consumer_supplies = &lp3974_ldo14_consumer,
  366. };
  367. static struct regulator_consumer_supply lp3974_ldo15_consumer =
  368. REGULATOR_SUPPLY("dig_12", "0-001f");
  369. static struct regulator_init_data lp3974_ldo15_data = {
  370. .constraints = {
  371. .name = "CAM_S_DIG+FM33_CORE_1.2V",
  372. .min_uV = 1200000,
  373. .max_uV = 1200000,
  374. .apply_uV = 1,
  375. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  376. .state_mem = {
  377. .disabled = 1,
  378. },
  379. },
  380. .num_consumer_supplies = 1,
  381. .consumer_supplies = &lp3974_ldo15_consumer,
  382. };
  383. static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
  384. REGULATOR_SUPPLY("vdda", "0-003c"),
  385. REGULATOR_SUPPLY("a_sensor", "0-001f"),
  386. };
  387. static struct regulator_init_data lp3974_ldo16_data = {
  388. .constraints = {
  389. .name = "CAM_S_ANA_2.8V",
  390. .min_uV = 2800000,
  391. .max_uV = 2800000,
  392. .apply_uV = 1,
  393. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  394. .state_mem = {
  395. .disabled = 1,
  396. },
  397. },
  398. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer),
  399. .consumer_supplies = lp3974_ldo16_consumer,
  400. };
  401. static struct regulator_init_data lp3974_ldo17_data = {
  402. .constraints = {
  403. .name = "VCC_3.0V_LCD",
  404. .min_uV = 3000000,
  405. .max_uV = 3000000,
  406. .apply_uV = 1,
  407. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  408. .boot_on = 1,
  409. .state_mem = {
  410. .disabled = 1,
  411. },
  412. },
  413. };
  414. static struct regulator_init_data lp3974_32khz_ap_data = {
  415. .constraints = {
  416. .name = "32KHz AP",
  417. .always_on = 1,
  418. .state_mem = {
  419. .enabled = 1,
  420. },
  421. },
  422. };
  423. static struct regulator_init_data lp3974_32khz_cp_data = {
  424. .constraints = {
  425. .name = "32KHz CP",
  426. .state_mem = {
  427. .disabled = 1,
  428. },
  429. },
  430. };
  431. static struct regulator_init_data lp3974_vichg_data = {
  432. .constraints = {
  433. .name = "VICHG",
  434. .state_mem = {
  435. .disabled = 1,
  436. },
  437. },
  438. };
  439. static struct regulator_init_data lp3974_esafeout1_data = {
  440. .constraints = {
  441. .name = "SAFEOUT1",
  442. .min_uV = 4800000,
  443. .max_uV = 4800000,
  444. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  445. .always_on = 1,
  446. .state_mem = {
  447. .enabled = 1,
  448. },
  449. },
  450. };
  451. static struct regulator_init_data lp3974_esafeout2_data = {
  452. .constraints = {
  453. .name = "SAFEOUT2",
  454. .boot_on = 1,
  455. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  456. .state_mem = {
  457. .enabled = 1,
  458. },
  459. },
  460. };
  461. static struct max8998_regulator_data lp3974_regulators[] = {
  462. { MAX8998_LDO2, &lp3974_ldo2_data },
  463. { MAX8998_LDO3, &lp3974_ldo3_data },
  464. { MAX8998_LDO4, &lp3974_ldo4_data },
  465. { MAX8998_LDO5, &lp3974_ldo5_data },
  466. { MAX8998_LDO6, &lp3974_ldo6_data },
  467. { MAX8998_LDO7, &lp3974_ldo7_data },
  468. { MAX8998_LDO8, &lp3974_ldo8_data },
  469. { MAX8998_LDO9, &lp3974_ldo9_data },
  470. { MAX8998_LDO10, &lp3974_ldo10_data },
  471. { MAX8998_LDO11, &lp3974_ldo11_data },
  472. { MAX8998_LDO12, &lp3974_ldo12_data },
  473. { MAX8998_LDO13, &lp3974_ldo13_data },
  474. { MAX8998_LDO14, &lp3974_ldo14_data },
  475. { MAX8998_LDO15, &lp3974_ldo15_data },
  476. { MAX8998_LDO16, &lp3974_ldo16_data },
  477. { MAX8998_LDO17, &lp3974_ldo17_data },
  478. { MAX8998_BUCK1, &lp3974_buck1_data },
  479. { MAX8998_BUCK2, &lp3974_buck2_data },
  480. { MAX8998_BUCK3, &lp3974_buck3_data },
  481. { MAX8998_BUCK4, &lp3974_buck4_data },
  482. { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
  483. { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
  484. { MAX8998_ENVICHG, &lp3974_vichg_data },
  485. { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
  486. { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
  487. };
  488. static struct max8998_platform_data universal_lp3974_pdata = {
  489. .num_regulators = ARRAY_SIZE(lp3974_regulators),
  490. .regulators = lp3974_regulators,
  491. .buck1_voltage1 = 1100000, /* INT */
  492. .buck1_voltage2 = 1000000,
  493. .buck1_voltage3 = 1100000,
  494. .buck1_voltage4 = 1000000,
  495. .buck1_set1 = EXYNOS4_GPX0(5),
  496. .buck1_set2 = EXYNOS4_GPX0(6),
  497. .buck2_voltage1 = 1200000, /* G3D */
  498. .buck2_voltage2 = 1100000,
  499. .buck1_default_idx = 0,
  500. .buck2_set3 = EXYNOS4_GPE2(0),
  501. .buck2_default_idx = 0,
  502. .wakeup = true,
  503. };
  504. enum fixed_regulator_id {
  505. FIXED_REG_ID_MMC0,
  506. FIXED_REG_ID_HDMI_5V,
  507. FIXED_REG_ID_CAM_S_IF,
  508. FIXED_REG_ID_CAM_I_CORE,
  509. FIXED_REG_ID_CAM_VT_DIO,
  510. };
  511. static struct regulator_consumer_supply hdmi_fixed_consumer =
  512. REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
  513. static struct regulator_init_data hdmi_fixed_voltage_init_data = {
  514. .constraints = {
  515. .name = "HDMI_5V",
  516. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  517. },
  518. .num_consumer_supplies = 1,
  519. .consumer_supplies = &hdmi_fixed_consumer,
  520. };
  521. static struct fixed_voltage_config hdmi_fixed_voltage_config = {
  522. .supply_name = "HDMI_EN1",
  523. .microvolts = 5000000,
  524. .gpio = EXYNOS4_GPE0(1),
  525. .enable_high = true,
  526. .init_data = &hdmi_fixed_voltage_init_data,
  527. };
  528. static struct platform_device hdmi_fixed_voltage = {
  529. .name = "reg-fixed-voltage",
  530. .id = FIXED_REG_ID_HDMI_5V,
  531. .dev = {
  532. .platform_data = &hdmi_fixed_voltage_config,
  533. },
  534. };
  535. /* GPIO I2C 5 (PMIC) */
  536. static struct i2c_board_info i2c5_devs[] __initdata = {
  537. {
  538. I2C_BOARD_INFO("max8952", 0xC0 >> 1),
  539. .platform_data = &universal_max8952_pdata,
  540. }, {
  541. I2C_BOARD_INFO("lp3974", 0xCC >> 1),
  542. .platform_data = &universal_lp3974_pdata,
  543. },
  544. };
  545. /* I2C3 (TSP) */
  546. static struct mxt_platform_data qt602240_platform_data = {
  547. .x_line = 19,
  548. .y_line = 11,
  549. .x_size = 800,
  550. .y_size = 480,
  551. .blen = 0x11,
  552. .threshold = 0x28,
  553. .voltage = 2800000, /* 2.8V */
  554. .orient = MXT_DIAGONAL,
  555. .irqflags = IRQF_TRIGGER_FALLING,
  556. };
  557. static struct i2c_board_info i2c3_devs[] __initdata = {
  558. {
  559. I2C_BOARD_INFO("qt602240_ts", 0x4a),
  560. .platform_data = &qt602240_platform_data,
  561. },
  562. };
  563. static void __init universal_tsp_init(void)
  564. {
  565. int gpio;
  566. /* TSP_LDO_ON: XMDMADDR_11 */
  567. gpio = EXYNOS4_GPE2(3);
  568. gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
  569. gpio_export(gpio, 0);
  570. /* TSP_INT: XMDMADDR_7 */
  571. gpio = EXYNOS4_GPE1(7);
  572. gpio_request(gpio, "TSP_INT");
  573. s5p_register_gpio_interrupt(gpio);
  574. s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
  575. s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
  576. i2c3_devs[0].irq = gpio_to_irq(gpio);
  577. }
  578. /* GPIO I2C 12 (3 Touchkey) */
  579. static uint32_t touchkey_keymap[] = {
  580. /* MCS_KEY_MAP(value, keycode) */
  581. MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
  582. MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
  583. };
  584. static struct mcs_platform_data touchkey_data = {
  585. .keymap = touchkey_keymap,
  586. .keymap_size = ARRAY_SIZE(touchkey_keymap),
  587. .key_maxval = 2,
  588. };
  589. /* GPIO I2C 3_TOUCH 2.8V */
  590. #define I2C_GPIO_BUS_12 12
  591. static struct i2c_gpio_platform_data i2c_gpio12_data = {
  592. .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
  593. .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
  594. };
  595. static struct platform_device i2c_gpio12 = {
  596. .name = "i2c-gpio",
  597. .id = I2C_GPIO_BUS_12,
  598. .dev = {
  599. .platform_data = &i2c_gpio12_data,
  600. },
  601. };
  602. static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
  603. {
  604. I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
  605. .platform_data = &touchkey_data,
  606. },
  607. };
  608. static void __init universal_touchkey_init(void)
  609. {
  610. int gpio;
  611. gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
  612. gpio_request(gpio, "3_TOUCH_INT");
  613. s5p_register_gpio_interrupt(gpio);
  614. s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
  615. i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
  616. gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
  617. gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN");
  618. }
  619. static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
  620. .frequency = 300 * 1000,
  621. .sda_delay = 200,
  622. };
  623. /* GPIO KEYS */
  624. static struct gpio_keys_button universal_gpio_keys_tables[] = {
  625. {
  626. .code = KEY_VOLUMEUP,
  627. .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
  628. .desc = "gpio-keys: KEY_VOLUMEUP",
  629. .type = EV_KEY,
  630. .active_low = 1,
  631. .debounce_interval = 1,
  632. }, {
  633. .code = KEY_VOLUMEDOWN,
  634. .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
  635. .desc = "gpio-keys: KEY_VOLUMEDOWN",
  636. .type = EV_KEY,
  637. .active_low = 1,
  638. .debounce_interval = 1,
  639. }, {
  640. .code = KEY_CONFIG,
  641. .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
  642. .desc = "gpio-keys: KEY_CONFIG",
  643. .type = EV_KEY,
  644. .active_low = 1,
  645. .debounce_interval = 1,
  646. }, {
  647. .code = KEY_CAMERA,
  648. .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
  649. .desc = "gpio-keys: KEY_CAMERA",
  650. .type = EV_KEY,
  651. .active_low = 1,
  652. .debounce_interval = 1,
  653. }, {
  654. .code = KEY_OK,
  655. .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
  656. .desc = "gpio-keys: KEY_OK",
  657. .type = EV_KEY,
  658. .active_low = 1,
  659. .debounce_interval = 1,
  660. },
  661. };
  662. static struct gpio_keys_platform_data universal_gpio_keys_data = {
  663. .buttons = universal_gpio_keys_tables,
  664. .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
  665. };
  666. static struct platform_device universal_gpio_keys = {
  667. .name = "gpio-keys",
  668. .dev = {
  669. .platform_data = &universal_gpio_keys_data,
  670. },
  671. };
  672. /* eMMC */
  673. static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
  674. .max_width = 8,
  675. .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
  676. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  677. .cd_type = S3C_SDHCI_CD_PERMANENT,
  678. };
  679. static struct regulator_consumer_supply mmc0_supplies[] = {
  680. REGULATOR_SUPPLY("vmmc", "exynos4-sdhci.0"),
  681. };
  682. static struct regulator_init_data mmc0_fixed_voltage_init_data = {
  683. .constraints = {
  684. .name = "VMEM_VDD_2.8V",
  685. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  686. },
  687. .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
  688. .consumer_supplies = mmc0_supplies,
  689. };
  690. static struct fixed_voltage_config mmc0_fixed_voltage_config = {
  691. .supply_name = "MASSMEMORY_EN",
  692. .microvolts = 2800000,
  693. .gpio = EXYNOS4_GPE1(3),
  694. .enable_high = true,
  695. .init_data = &mmc0_fixed_voltage_init_data,
  696. };
  697. static struct platform_device mmc0_fixed_voltage = {
  698. .name = "reg-fixed-voltage",
  699. .id = FIXED_REG_ID_MMC0,
  700. .dev = {
  701. .platform_data = &mmc0_fixed_voltage_config,
  702. },
  703. };
  704. /* SD */
  705. static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
  706. .max_width = 4,
  707. .host_caps = MMC_CAP_4_BIT_DATA |
  708. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
  709. .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
  710. .ext_cd_gpio_invert = 1,
  711. .cd_type = S3C_SDHCI_CD_GPIO,
  712. };
  713. /* WiFi */
  714. static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
  715. .max_width = 4,
  716. .host_caps = MMC_CAP_4_BIT_DATA |
  717. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
  718. .cd_type = S3C_SDHCI_CD_EXTERNAL,
  719. };
  720. static void __init universal_sdhci_init(void)
  721. {
  722. s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
  723. s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
  724. s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
  725. }
  726. /* I2C1 */
  727. static struct i2c_board_info i2c1_devs[] __initdata = {
  728. /* Gyro, To be updated */
  729. };
  730. #ifdef CONFIG_DRM_EXYNOS
  731. static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
  732. .panel = {
  733. .timing = {
  734. .left_margin = 16,
  735. .right_margin = 16,
  736. .upper_margin = 2,
  737. .lower_margin = 28,
  738. .hsync_len = 2,
  739. .vsync_len = 1,
  740. .xres = 480,
  741. .yres = 800,
  742. .refresh = 55,
  743. },
  744. },
  745. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
  746. VIDCON0_CLKSEL_LCD,
  747. .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
  748. | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  749. .default_win = 3,
  750. .bpp = 32,
  751. };
  752. #else
  753. /* Frame Buffer */
  754. static struct s3c_fb_pd_win universal_fb_win0 = {
  755. .max_bpp = 32,
  756. .default_bpp = 16,
  757. .xres = 480,
  758. .yres = 800,
  759. .virtual_x = 480,
  760. .virtual_y = 2 * 800,
  761. };
  762. static struct fb_videomode universal_lcd_timing = {
  763. .left_margin = 16,
  764. .right_margin = 16,
  765. .upper_margin = 2,
  766. .lower_margin = 28,
  767. .hsync_len = 2,
  768. .vsync_len = 1,
  769. .xres = 480,
  770. .yres = 800,
  771. .refresh = 55,
  772. };
  773. static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
  774. .win[0] = &universal_fb_win0,
  775. .vtiming = &universal_lcd_timing,
  776. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
  777. VIDCON0_CLKSEL_LCD,
  778. .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
  779. | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  780. .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
  781. };
  782. #endif
  783. static struct regulator_consumer_supply cam_vt_dio_supply =
  784. REGULATOR_SUPPLY("vdd_core", "0-003c");
  785. static struct regulator_init_data cam_vt_dio_reg_init_data = {
  786. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  787. .num_consumer_supplies = 1,
  788. .consumer_supplies = &cam_vt_dio_supply,
  789. };
  790. static struct fixed_voltage_config cam_vt_dio_fixed_voltage_cfg = {
  791. .supply_name = "CAM_VT_D_IO",
  792. .microvolts = 2800000,
  793. .gpio = EXYNOS4_GPE2(1), /* CAM_PWR_EN2 */
  794. .enable_high = 1,
  795. .init_data = &cam_vt_dio_reg_init_data,
  796. };
  797. static struct platform_device cam_vt_dio_fixed_reg_dev = {
  798. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_VT_DIO,
  799. .dev = { .platform_data = &cam_vt_dio_fixed_voltage_cfg },
  800. };
  801. static struct regulator_consumer_supply cam_i_core_supply =
  802. REGULATOR_SUPPLY("core", "0-001f");
  803. static struct regulator_init_data cam_i_core_reg_init_data = {
  804. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  805. .num_consumer_supplies = 1,
  806. .consumer_supplies = &cam_i_core_supply,
  807. };
  808. static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = {
  809. .supply_name = "CAM_I_CORE_1.2V",
  810. .microvolts = 1200000,
  811. .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */
  812. .enable_high = 1,
  813. .init_data = &cam_i_core_reg_init_data,
  814. };
  815. static struct platform_device cam_i_core_fixed_reg_dev = {
  816. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE,
  817. .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg },
  818. };
  819. static struct regulator_consumer_supply cam_s_if_supply =
  820. REGULATOR_SUPPLY("d_sensor", "0-001f");
  821. static struct regulator_init_data cam_s_if_reg_init_data = {
  822. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  823. .num_consumer_supplies = 1,
  824. .consumer_supplies = &cam_s_if_supply,
  825. };
  826. static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = {
  827. .supply_name = "CAM_S_IF_1.8V",
  828. .microvolts = 1800000,
  829. .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */
  830. .enable_high = 1,
  831. .init_data = &cam_s_if_reg_init_data,
  832. };
  833. static struct platform_device cam_s_if_fixed_reg_dev = {
  834. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF,
  835. .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg },
  836. };
  837. static struct s5p_platform_mipi_csis mipi_csis_platdata = {
  838. .clk_rate = 166000000UL,
  839. .lanes = 2,
  840. .hs_settle = 12,
  841. };
  842. #define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
  843. #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */
  844. #define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5)
  845. #define GPIO_CAM_VGA_NRST EXYNOS4_GPE4(7)
  846. #define GPIO_CAM_VGA_NSTBY EXYNOS4_GPE4(6)
  847. static int s5k6aa_set_power(int on)
  848. {
  849. gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
  850. return 0;
  851. }
  852. static struct s5k6aa_platform_data s5k6aa_platdata = {
  853. .mclk_frequency = 21600000UL,
  854. .gpio_reset = { GPIO_CAM_VGA_NRST, 0 },
  855. .gpio_stby = { GPIO_CAM_VGA_NSTBY, 0 },
  856. .bus_type = V4L2_MBUS_PARALLEL,
  857. .horiz_flip = 1,
  858. .set_power = s5k6aa_set_power,
  859. };
  860. static struct i2c_board_info s5k6aa_board_info = {
  861. I2C_BOARD_INFO("S5K6AA", 0x3C),
  862. .platform_data = &s5k6aa_platdata,
  863. };
  864. static int m5mols_set_power(struct device *dev, int on)
  865. {
  866. gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on);
  867. gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
  868. return 0;
  869. }
  870. static struct m5mols_platform_data m5mols_platdata = {
  871. .gpio_reset = GPIO_CAM_MEGA_nRST,
  872. .reset_polarity = 0,
  873. .set_power = m5mols_set_power,
  874. };
  875. static struct i2c_board_info m5mols_board_info = {
  876. I2C_BOARD_INFO("M5MOLS", 0x1F),
  877. .platform_data = &m5mols_platdata,
  878. };
  879. static struct fimc_source_info universal_camera_sensors[] = {
  880. {
  881. .mux_id = 0,
  882. .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
  883. V4L2_MBUS_VSYNC_ACTIVE_LOW,
  884. .fimc_bus_type = FIMC_BUS_TYPE_ITU_601,
  885. .board_info = &s5k6aa_board_info,
  886. .i2c_bus_num = 0,
  887. .clk_frequency = 24000000UL,
  888. }, {
  889. .mux_id = 0,
  890. .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
  891. V4L2_MBUS_VSYNC_ACTIVE_LOW,
  892. .fimc_bus_type = FIMC_BUS_TYPE_MIPI_CSI2,
  893. .board_info = &m5mols_board_info,
  894. .i2c_bus_num = 0,
  895. .clk_frequency = 24000000UL,
  896. },
  897. };
  898. static struct s5p_platform_fimc fimc_md_platdata = {
  899. .source_info = universal_camera_sensors,
  900. .num_clients = ARRAY_SIZE(universal_camera_sensors),
  901. };
  902. static struct gpio universal_camera_gpios[] = {
  903. { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" },
  904. { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" },
  905. { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" },
  906. { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
  907. { GPIO_CAM_VGA_NRST, GPIOF_OUT_INIT_LOW, "CAM_VGA_NRST" },
  908. { GPIO_CAM_VGA_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" },
  909. };
  910. /* USB OTG */
  911. static struct s3c_hsotg_plat universal_hsotg_pdata;
  912. static void __init universal_camera_init(void)
  913. {
  914. s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
  915. &s5p_device_mipi_csis0);
  916. s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
  917. &s5p_device_fimc_md);
  918. if (gpio_request_array(universal_camera_gpios,
  919. ARRAY_SIZE(universal_camera_gpios))) {
  920. pr_err("%s: GPIO request failed\n", __func__);
  921. return;
  922. }
  923. if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf)))
  924. m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT);
  925. else
  926. pr_err("Failed to configure 8M_ISP_INT GPIO\n");
  927. /* Free GPIOs controlled directly by the sensor drivers. */
  928. gpio_free(GPIO_CAM_MEGA_nRST);
  929. gpio_free(GPIO_CAM_8M_ISP_INT);
  930. gpio_free(GPIO_CAM_VGA_NRST);
  931. gpio_free(GPIO_CAM_VGA_NSTBY);
  932. if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A))
  933. pr_err("Camera port A setup failed\n");
  934. }
  935. static struct platform_device *universal_devices[] __initdata = {
  936. /* Samsung Platform Devices */
  937. &s5p_device_mipi_csis0,
  938. &s5p_device_fimc0,
  939. &s5p_device_fimc1,
  940. &s5p_device_fimc2,
  941. &s5p_device_fimc3,
  942. &s5p_device_g2d,
  943. &mmc0_fixed_voltage,
  944. &s3c_device_hsmmc0,
  945. &s3c_device_hsmmc2,
  946. &s3c_device_hsmmc3,
  947. &s3c_device_i2c0,
  948. &s3c_device_i2c3,
  949. &s3c_device_i2c5,
  950. &s5p_device_i2c_hdmiphy,
  951. &hdmi_fixed_voltage,
  952. &s5p_device_hdmi,
  953. &s5p_device_sdo,
  954. &s5p_device_mixer,
  955. /* Universal Devices */
  956. &i2c_gpio12,
  957. &universal_gpio_keys,
  958. &s5p_device_onenand,
  959. &s5p_device_fimd0,
  960. &s5p_device_jpeg,
  961. &s3c_device_usb_hsotg,
  962. &s5p_device_mfc,
  963. &s5p_device_mfc_l,
  964. &s5p_device_mfc_r,
  965. &cam_vt_dio_fixed_reg_dev,
  966. &cam_i_core_fixed_reg_dev,
  967. &cam_s_if_fixed_reg_dev,
  968. &s5p_device_fimc_md,
  969. };
  970. static void __init universal_map_io(void)
  971. {
  972. exynos_init_io(NULL, 0);
  973. s3c24xx_init_clocks(clk_xusbxti.rate);
  974. s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
  975. s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
  976. }
  977. static void s5p_tv_setup(void)
  978. {
  979. /* direct HPD to HDMI chip */
  980. gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
  981. s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
  982. s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
  983. }
  984. static void __init universal_reserve(void)
  985. {
  986. s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
  987. }
  988. static void __init universal_machine_init(void)
  989. {
  990. universal_sdhci_init();
  991. s5p_tv_setup();
  992. s3c_i2c0_set_platdata(&universal_i2c0_platdata);
  993. i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
  994. universal_tsp_init();
  995. s3c_i2c3_set_platdata(NULL);
  996. i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
  997. s3c_i2c5_set_platdata(NULL);
  998. s5p_i2c_hdmiphy_set_platdata(NULL);
  999. i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
  1000. #ifdef CONFIG_DRM_EXYNOS
  1001. s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
  1002. exynos4_fimd0_gpio_setup_24bpp();
  1003. #else
  1004. s5p_fimd0_set_platdata(&universal_lcd_pdata);
  1005. #endif
  1006. universal_touchkey_init();
  1007. i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
  1008. ARRAY_SIZE(i2c_gpio12_devs));
  1009. s3c_hsotg_set_platdata(&universal_hsotg_pdata);
  1010. universal_camera_init();
  1011. /* Last */
  1012. platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
  1013. }
  1014. MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
  1015. /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
  1016. .atag_offset = 0x100,
  1017. .smp = smp_ops(exynos_smp_ops),
  1018. .init_irq = exynos4_init_irq,
  1019. .map_io = universal_map_io,
  1020. .handle_irq = gic_handle_irq,
  1021. .init_machine = universal_machine_init,
  1022. .init_late = exynos_init_late,
  1023. .timer = &s5p_timer,
  1024. .reserve = &universal_reserve,
  1025. .restart = exynos4_restart,
  1026. MACHINE_END