hyp-stub.S 6.1 KB

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  1. /*
  2. * Copyright (c) 2012 Linaro Limited.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along
  15. * with this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  17. */
  18. #include <linux/init.h>
  19. #include <linux/linkage.h>
  20. #include <asm/assembler.h>
  21. #include <asm/virt.h>
  22. #ifndef ZIMAGE
  23. /*
  24. * For the kernel proper, we need to find out the CPU boot mode long after
  25. * boot, so we need to store it in a writable variable.
  26. *
  27. * This is not in .bss, because we set it sufficiently early that the boot-time
  28. * zeroing of .bss would clobber it.
  29. */
  30. .data
  31. ENTRY(__boot_cpu_mode)
  32. .long 0
  33. .text
  34. /*
  35. * Save the primary CPU boot mode. Requires 3 scratch registers.
  36. */
  37. .macro store_primary_cpu_mode reg1, reg2, reg3
  38. mrs \reg1, cpsr
  39. and \reg1, \reg1, #MODE_MASK
  40. adr \reg2, .L__boot_cpu_mode_offset
  41. ldr \reg3, [\reg2]
  42. str \reg1, [\reg2, \reg3]
  43. .endm
  44. /*
  45. * Compare the current mode with the one saved on the primary CPU.
  46. * If they don't match, record that fact. The Z bit indicates
  47. * if there's a match or not.
  48. * Requires 3 additionnal scratch registers.
  49. */
  50. .macro compare_cpu_mode_with_primary mode, reg1, reg2, reg3
  51. adr \reg2, .L__boot_cpu_mode_offset
  52. ldr \reg3, [\reg2]
  53. ldr \reg1, [\reg2, \reg3]
  54. cmp \mode, \reg1 @ matches primary CPU boot mode?
  55. orrne r7, r7, #BOOT_CPU_MODE_MISMATCH
  56. strne r7, [r5, r6] @ record what happened and give up
  57. .endm
  58. #else /* ZIMAGE */
  59. .macro store_primary_cpu_mode reg1:req, reg2:req, reg3:req
  60. .endm
  61. /*
  62. * The zImage loader only runs on one CPU, so we don't bother with mult-CPU
  63. * consistency checking:
  64. */
  65. .macro compare_cpu_mode_with_primary mode, reg1, reg2, reg3
  66. cmp \mode, \mode
  67. .endm
  68. #endif /* ZIMAGE */
  69. /*
  70. * Hypervisor stub installation functions.
  71. *
  72. * These must be called with the MMU and D-cache off.
  73. * They are not ABI compliant and are only intended to be called from the kernel
  74. * entry points in head.S.
  75. */
  76. @ Call this from the primary CPU
  77. ENTRY(__hyp_stub_install)
  78. store_primary_cpu_mode r4, r5, r6
  79. ENDPROC(__hyp_stub_install)
  80. @ fall through...
  81. @ Secondary CPUs should call here
  82. ENTRY(__hyp_stub_install_secondary)
  83. mrs r4, cpsr
  84. and r4, r4, #MODE_MASK
  85. /*
  86. * If the secondary has booted with a different mode, give up
  87. * immediately.
  88. */
  89. compare_cpu_mode_with_primary r4, r5, r6, r7
  90. bxne lr
  91. /*
  92. * Once we have given up on one CPU, we do not try to install the
  93. * stub hypervisor on the remaining ones: because the saved boot mode
  94. * is modified, it can't compare equal to the CPSR mode field any
  95. * more.
  96. *
  97. * Otherwise...
  98. */
  99. cmp r4, #HYP_MODE
  100. bxne lr @ give up if the CPU is not in HYP mode
  101. /*
  102. * Configure HSCTLR to set correct exception endianness/instruction set
  103. * state etc.
  104. * Turn off all traps
  105. * Eventually, CPU-specific code might be needed -- assume not for now
  106. *
  107. * This code relies on the "eret" instruction to synchronize the
  108. * various coprocessor accesses.
  109. */
  110. @ Now install the hypervisor stub:
  111. adr r7, __hyp_stub_vectors
  112. mcr p15, 4, r7, c12, c0, 0 @ set hypervisor vector base (HVBAR)
  113. @ Disable all traps, so we don't get any nasty surprise
  114. mov r7, #0
  115. mcr p15, 4, r7, c1, c1, 0 @ HCR
  116. mcr p15, 4, r7, c1, c1, 2 @ HCPTR
  117. mcr p15, 4, r7, c1, c1, 3 @ HSTR
  118. THUMB( orr r7, #(1 << 30) ) @ HSCTLR.TE
  119. #ifdef CONFIG_CPU_BIG_ENDIAN
  120. orr r7, #(1 << 9) @ HSCTLR.EE
  121. #endif
  122. mcr p15, 4, r7, c1, c0, 0 @ HSCTLR
  123. mrc p15, 4, r7, c1, c1, 1 @ HDCR
  124. and r7, #0x1f @ Preserve HPMN
  125. mcr p15, 4, r7, c1, c1, 1 @ HDCR
  126. #if !defined(ZIMAGE) && defined(CONFIG_ARM_ARCH_TIMER)
  127. @ make CNTP_* and CNTPCT accessible from PL1
  128. mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1
  129. lsr r7, #16
  130. and r7, #0xf
  131. cmp r7, #1
  132. bne 1f
  133. mrc p15, 4, r7, c14, c1, 0 @ CNTHCTL
  134. orr r7, r7, #3 @ PL1PCEN | PL1PCTEN
  135. mcr p15, 4, r7, c14, c1, 0 @ CNTHCTL
  136. 1:
  137. #endif
  138. bic r7, r4, #MODE_MASK
  139. orr r7, r7, #SVC_MODE
  140. THUMB( orr r7, r7, #PSR_T_BIT )
  141. msr spsr_cxsf, r7 @ This is SPSR_hyp.
  142. __MSR_ELR_HYP(14) @ msr elr_hyp, lr
  143. __ERET @ return, switching to SVC mode
  144. @ The boot CPU mode is left in r4.
  145. ENDPROC(__hyp_stub_install_secondary)
  146. __hyp_stub_do_trap:
  147. cmp r0, #-1
  148. mrceq p15, 4, r0, c12, c0, 0 @ get HVBAR
  149. mcrne p15, 4, r0, c12, c0, 0 @ set HVBAR
  150. __ERET
  151. ENDPROC(__hyp_stub_do_trap)
  152. /*
  153. * __hyp_set_vectors: Call this after boot to set the initial hypervisor
  154. * vectors as part of hypervisor installation. On an SMP system, this should
  155. * be called on each CPU.
  156. *
  157. * r0 must be the physical address of the new vector table (which must lie in
  158. * the bottom 4GB of physical address space.
  159. *
  160. * r0 must be 32-byte aligned.
  161. *
  162. * Before calling this, you must check that the stub hypervisor is installed
  163. * everywhere, by waiting for any secondary CPUs to be brought up and then
  164. * checking that BOOT_CPU_MODE_HAVE_HYP(__boot_cpu_mode) is true.
  165. *
  166. * If not, there is a pre-existing hypervisor, some CPUs failed to boot, or
  167. * something else went wrong... in such cases, trying to install a new
  168. * hypervisor is unlikely to work as desired.
  169. *
  170. * When you call into your shiny new hypervisor, sp_hyp will contain junk,
  171. * so you will need to set that to something sensible at the new hypervisor's
  172. * initialisation entry point.
  173. */
  174. ENTRY(__hyp_get_vectors)
  175. mov r0, #-1
  176. ENDPROC(__hyp_get_vectors)
  177. @ fall through
  178. ENTRY(__hyp_set_vectors)
  179. __HVC(0)
  180. bx lr
  181. ENDPROC(__hyp_set_vectors)
  182. #ifndef ZIMAGE
  183. .align 2
  184. .L__boot_cpu_mode_offset:
  185. .long __boot_cpu_mode - .
  186. #endif
  187. .align 5
  188. __hyp_stub_vectors:
  189. __hyp_stub_reset: W(b) .
  190. __hyp_stub_und: W(b) .
  191. __hyp_stub_svc: W(b) .
  192. __hyp_stub_pabort: W(b) .
  193. __hyp_stub_dabort: W(b) .
  194. __hyp_stub_trap: W(b) __hyp_stub_do_trap
  195. __hyp_stub_irq: W(b) .
  196. __hyp_stub_fiq: W(b) .
  197. ENDPROC(__hyp_stub_vectors)