exynos5440.dtsi 3.1 KB

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  1. /*
  2. * SAMSUNG EXYNOS5440 SoC device tree source
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. compatible = "samsung,exynos5440";
  14. interrupt-parent = <&gic>;
  15. gic:interrupt-controller@2E0000 {
  16. compatible = "arm,cortex-a15-gic";
  17. #interrupt-cells = <3>;
  18. interrupt-controller;
  19. reg = <0x2E1000 0x1000>, <0x2E2000 0x1000>;
  20. };
  21. cpus {
  22. cpu@0 {
  23. compatible = "arm,cortex-a15";
  24. timer {
  25. compatible = "arm,armv7-timer";
  26. interrupts = <1 13 0xf08>;
  27. clock-frequency = <1000000>;
  28. };
  29. };
  30. cpu@1 {
  31. compatible = "arm,cortex-a15";
  32. timer {
  33. compatible = "arm,armv7-timer";
  34. interrupts = <1 14 0xf08>;
  35. clock-frequency = <1000000>;
  36. };
  37. };
  38. cpu@2 {
  39. compatible = "arm,cortex-a15";
  40. timer {
  41. compatible = "arm,armv7-timer";
  42. interrupts = <1 14 0xf08>;
  43. clock-frequency = <1000000>;
  44. };
  45. };
  46. cpu@3 {
  47. compatible = "arm,cortex-a15";
  48. timer {
  49. compatible = "arm,armv7-timer";
  50. interrupts = <1 14 0xf08>;
  51. clock-frequency = <1000000>;
  52. };
  53. };
  54. };
  55. common {
  56. compatible = "samsung,exynos5440";
  57. };
  58. serial@B0000 {
  59. compatible = "samsung,exynos4210-uart";
  60. reg = <0xB0000 0x1000>;
  61. interrupts = <0 2 0>;
  62. };
  63. serial@C0000 {
  64. compatible = "samsung,exynos4210-uart";
  65. reg = <0xC0000 0x1000>;
  66. interrupts = <0 3 0>;
  67. };
  68. spi {
  69. compatible = "samsung,exynos4210-spi";
  70. reg = <0xD0000 0x1000>;
  71. interrupts = <0 4 0>;
  72. tx-dma-channel = <&pdma0 5>; /* preliminary */
  73. rx-dma-channel = <&pdma0 4>; /* preliminary */
  74. #address-cells = <1>;
  75. #size-cells = <0>;
  76. };
  77. pinctrl {
  78. compatible = "samsung,pinctrl-exynos5440";
  79. reg = <0xE0000 0x1000>;
  80. interrupt-controller;
  81. #interrupt-cells = <2>;
  82. #gpio-cells = <2>;
  83. fan: fan {
  84. samsung,exynos5440-pin-function = <1>;
  85. };
  86. hdd_led0: hdd_led0 {
  87. samsung,exynos5440-pin-function = <2>;
  88. };
  89. hdd_led1: hdd_led1 {
  90. samsung,exynos5440-pin-function = <3>;
  91. };
  92. uart1: uart1 {
  93. samsung,exynos5440-pin-function = <4>;
  94. };
  95. };
  96. i2c@F0000 {
  97. compatible = "samsung,s3c2440-i2c";
  98. reg = <0xF0000 0x1000>;
  99. interrupts = <0 5 0>;
  100. #address-cells = <1>;
  101. #size-cells = <0>;
  102. };
  103. i2c@100000 {
  104. compatible = "samsung,s3c2440-i2c";
  105. reg = <0x100000 0x1000>;
  106. interrupts = <0 6 0>;
  107. #address-cells = <1>;
  108. #size-cells = <0>;
  109. };
  110. watchdog {
  111. compatible = "samsung,s3c2410-wdt";
  112. reg = <0x110000 0x1000>;
  113. interrupts = <0 1 0>;
  114. };
  115. amba {
  116. #address-cells = <1>;
  117. #size-cells = <1>;
  118. compatible = "arm,amba-bus";
  119. interrupt-parent = <&gic>;
  120. ranges;
  121. pdma0: pdma@121A0000 {
  122. compatible = "arm,pl330", "arm,primecell";
  123. reg = <0x120000 0x1000>;
  124. interrupts = <0 34 0>;
  125. };
  126. pdma1: pdma@121B0000 {
  127. compatible = "arm,pl330", "arm,primecell";
  128. reg = <0x121000 0x1000>;
  129. interrupts = <0 35 0>;
  130. };
  131. };
  132. rtc {
  133. compatible = "samsung,s3c6410-rtc";
  134. reg = <0x130000 0x1000>;
  135. interrupts = <0 16 0>, <0 17 0>;
  136. };
  137. };