geode.h 4.7 KB

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  1. /*
  2. * AMD Geode definitions
  3. * Copyright (C) 2006, Advanced Micro Devices, Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of version 2 of the GNU General Public License
  7. * as published by the Free Software Foundation.
  8. */
  9. #ifndef _ASM_X86_GEODE_H
  10. #define _ASM_X86_GEODE_H
  11. #include <asm/processor.h>
  12. #include <linux/io.h>
  13. #include <linux/cs5535.h>
  14. /* Generic southbridge functions */
  15. #define GEODE_DEV_PMS 0
  16. #define GEODE_DEV_ACPI 1
  17. #define GEODE_DEV_GPIO 2
  18. #define GEODE_DEV_MFGPT 3
  19. extern int geode_get_dev_base(unsigned int dev);
  20. /* Useful macros */
  21. #define geode_pms_base() geode_get_dev_base(GEODE_DEV_PMS)
  22. #define geode_acpi_base() geode_get_dev_base(GEODE_DEV_ACPI)
  23. #define geode_gpio_base() geode_get_dev_base(GEODE_DEV_GPIO)
  24. #define geode_mfgpt_base() geode_get_dev_base(GEODE_DEV_MFGPT)
  25. /* MSRS */
  26. #define MSR_GLIU_P2D_RO0 0x10000029
  27. #define MSR_LX_GLD_MSR_CONFIG 0x48002001
  28. #define MSR_LX_MSR_PADSEL 0x48002011 /* NOT 0x48000011; the data
  29. * sheet has the wrong value */
  30. #define MSR_GLCP_SYS_RSTPLL 0x4C000014
  31. #define MSR_GLCP_DOTPLL 0x4C000015
  32. #define MSR_LBAR_SMB 0x5140000B
  33. #define MSR_LBAR_GPIO 0x5140000C
  34. #define MSR_LBAR_MFGPT 0x5140000D
  35. #define MSR_LBAR_ACPI 0x5140000E
  36. #define MSR_LBAR_PMS 0x5140000F
  37. #define MSR_DIVIL_SOFT_RESET 0x51400017
  38. #define MSR_LX_SPARE_MSR 0x80000011 /* DC-specific */
  39. #define MSR_GX_GLD_MSR_CONFIG 0xC0002001
  40. #define MSR_GX_MSR_PADSEL 0xC0002011
  41. /* Resource Sizes */
  42. #define LBAR_GPIO_SIZE 0xFF
  43. #define LBAR_MFGPT_SIZE 0x40
  44. #define LBAR_ACPI_SIZE 0x40
  45. #define LBAR_PMS_SIZE 0x80
  46. /* ACPI registers (PMS block) */
  47. /*
  48. * PM1_EN is only valid when VSA is enabled for 16 bit reads.
  49. * When VSA is not enabled, *always* read both PM1_STS and PM1_EN
  50. * with a 32 bit read at offset 0x0
  51. */
  52. #define PM1_STS 0x00
  53. #define PM1_EN 0x02
  54. #define PM1_CNT 0x08
  55. #define PM2_CNT 0x0C
  56. #define PM_TMR 0x10
  57. #define PM_GPE0_STS 0x18
  58. #define PM_GPE0_EN 0x1C
  59. /* PMC registers (PMS block) */
  60. #define PM_SSD 0x00
  61. #define PM_SCXA 0x04
  62. #define PM_SCYA 0x08
  63. #define PM_OUT_SLPCTL 0x0C
  64. #define PM_SCLK 0x10
  65. #define PM_SED 0x1
  66. #define PM_SCXD 0x18
  67. #define PM_SCYD 0x1C
  68. #define PM_IN_SLPCTL 0x20
  69. #define PM_WKD 0x30
  70. #define PM_WKXD 0x34
  71. #define PM_RD 0x38
  72. #define PM_WKXA 0x3C
  73. #define PM_FSD 0x40
  74. #define PM_TSD 0x44
  75. #define PM_PSD 0x48
  76. #define PM_NWKD 0x4C
  77. #define PM_AWKD 0x50
  78. #define PM_SSC 0x54
  79. /* VSA2 magic values */
  80. #define VSA_VRC_INDEX 0xAC1C
  81. #define VSA_VRC_DATA 0xAC1E
  82. #define VSA_VR_UNLOCK 0xFC53 /* unlock virtual register */
  83. #define VSA_VR_SIGNATURE 0x0003
  84. #define VSA_VR_MEM_SIZE 0x0200
  85. #define AMD_VSA_SIG 0x4132 /* signature is ascii 'VSA2' */
  86. #define GSW_VSA_SIG 0x534d /* General Software signature */
  87. static inline u32 geode_gpio(unsigned int nr)
  88. {
  89. BUG_ON(nr > 28);
  90. return 1 << nr;
  91. }
  92. extern void geode_gpio_set(u32, unsigned int);
  93. extern void geode_gpio_clear(u32, unsigned int);
  94. extern int geode_gpio_isset(u32, unsigned int);
  95. extern void geode_gpio_setup_event(unsigned int, int, int);
  96. extern void geode_gpio_set_irq(unsigned int, unsigned int);
  97. static inline void geode_gpio_event_irq(unsigned int gpio, int pair)
  98. {
  99. geode_gpio_setup_event(gpio, pair, 0);
  100. }
  101. static inline void geode_gpio_event_pme(unsigned int gpio, int pair)
  102. {
  103. geode_gpio_setup_event(gpio, pair, 1);
  104. }
  105. /* Specific geode tests */
  106. static inline int is_geode_gx(void)
  107. {
  108. return ((boot_cpu_data.x86_vendor == X86_VENDOR_NSC) &&
  109. (boot_cpu_data.x86 == 5) &&
  110. (boot_cpu_data.x86_model == 5));
  111. }
  112. static inline int is_geode_lx(void)
  113. {
  114. return ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) &&
  115. (boot_cpu_data.x86 == 5) &&
  116. (boot_cpu_data.x86_model == 10));
  117. }
  118. static inline int is_geode(void)
  119. {
  120. return (is_geode_gx() || is_geode_lx());
  121. }
  122. #ifdef CONFIG_MGEODE_LX
  123. extern int geode_has_vsa2(void);
  124. #else
  125. static inline int geode_has_vsa2(void)
  126. {
  127. return 0;
  128. }
  129. #endif
  130. static inline void geode_mfgpt_write(int timer, u16 reg, u16 value)
  131. {
  132. u32 base = geode_get_dev_base(GEODE_DEV_MFGPT);
  133. outw(value, base + reg + (timer * 8));
  134. }
  135. static inline u16 geode_mfgpt_read(int timer, u16 reg)
  136. {
  137. u32 base = geode_get_dev_base(GEODE_DEV_MFGPT);
  138. return inw(base + reg + (timer * 8));
  139. }
  140. extern int geode_mfgpt_toggle_event(int timer, int cmp, int event, int enable);
  141. extern int geode_mfgpt_set_irq(int timer, int cmp, int *irq, int enable);
  142. extern int geode_mfgpt_alloc_timer(int timer, int domain);
  143. #define geode_mfgpt_setup_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 1)
  144. #define geode_mfgpt_release_irq(t, c, i) geode_mfgpt_set_irq((t), (c), (i), 0)
  145. #ifdef CONFIG_GEODE_MFGPT_TIMER
  146. extern int __init mfgpt_timer_setup(void);
  147. #else
  148. static inline int mfgpt_timer_setup(void) { return 0; }
  149. #endif
  150. #endif /* _ASM_X86_GEODE_H */