am335x-evm.dts 12 KB

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  1. /*
  2. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /dts-v1/;
  9. #include "am33xx.dtsi"
  10. / {
  11. model = "TI AM335x EVM";
  12. compatible = "ti,am335x-evm", "ti,am33xx";
  13. cpus {
  14. cpu@0 {
  15. cpu0-supply = <&vdd1_reg>;
  16. };
  17. };
  18. memory {
  19. device_type = "memory";
  20. reg = <0x80000000 0x10000000>; /* 256 MB */
  21. };
  22. ocp {
  23. uart0: serial@44e09000 {
  24. pinctrl-names = "default";
  25. pinctrl-0 = <&uart0_pins>;
  26. status = "okay";
  27. };
  28. i2c0: i2c@44e0b000 {
  29. pinctrl-names = "default";
  30. pinctrl-0 = <&i2c0_pins>;
  31. status = "okay";
  32. clock-frequency = <400000>;
  33. tps: tps@2d {
  34. reg = <0x2d>;
  35. };
  36. };
  37. musb: usb@47400000 {
  38. status = "okay";
  39. control@44e10000 {
  40. status = "okay";
  41. };
  42. usb-phy@47401300 {
  43. status = "okay";
  44. };
  45. usb-phy@47401b00 {
  46. status = "okay";
  47. };
  48. usb@47401000 {
  49. status = "okay";
  50. };
  51. usb@47401800 {
  52. status = "okay";
  53. dr_mode = "host";
  54. };
  55. dma-controller@07402000 {
  56. status = "okay";
  57. };
  58. };
  59. i2c1: i2c@4802a000 {
  60. pinctrl-names = "default";
  61. pinctrl-0 = <&i2c1_pins>;
  62. status = "okay";
  63. clock-frequency = <100000>;
  64. lis331dlh: lis331dlh@18 {
  65. compatible = "st,lis331dlh", "st,lis3lv02d";
  66. reg = <0x18>;
  67. Vdd-supply = <&lis3_reg>;
  68. Vdd_IO-supply = <&lis3_reg>;
  69. st,click-single-x;
  70. st,click-single-y;
  71. st,click-single-z;
  72. st,click-thresh-x = <10>;
  73. st,click-thresh-y = <10>;
  74. st,click-thresh-z = <10>;
  75. st,irq1-click;
  76. st,irq2-click;
  77. st,wakeup-x-lo;
  78. st,wakeup-x-hi;
  79. st,wakeup-y-lo;
  80. st,wakeup-y-hi;
  81. st,wakeup-z-lo;
  82. st,wakeup-z-hi;
  83. st,min-limit-x = <120>;
  84. st,min-limit-y = <120>;
  85. st,min-limit-z = <140>;
  86. st,max-limit-x = <550>;
  87. st,max-limit-y = <550>;
  88. st,max-limit-z = <750>;
  89. };
  90. tsl2550: tsl2550@39 {
  91. compatible = "taos,tsl2550";
  92. reg = <0x39>;
  93. };
  94. tmp275: tmp275@48 {
  95. compatible = "ti,tmp275";
  96. reg = <0x48>;
  97. };
  98. };
  99. elm: elm@48080000 {
  100. status = "okay";
  101. };
  102. epwmss0: epwmss@48300000 {
  103. status = "okay";
  104. ecap0: ecap@48300100 {
  105. status = "okay";
  106. pinctrl-names = "default";
  107. pinctrl-0 = <&ecap0_pins>;
  108. };
  109. };
  110. gpmc: gpmc@50000000 {
  111. status = "okay";
  112. pinctrl-names = "default";
  113. pinctrl-0 = <&nandflash_pins_s0>;
  114. ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
  115. nand@0,0 {
  116. reg = <0 0 0>; /* CS0, offset 0 */
  117. nand-bus-width = <8>;
  118. ti,nand-ecc-opt = "bch8";
  119. gpmc,device-nand = "true";
  120. gpmc,device-width = <1>;
  121. gpmc,sync-clk-ps = <0>;
  122. gpmc,cs-on-ns = <0>;
  123. gpmc,cs-rd-off-ns = <44>;
  124. gpmc,cs-wr-off-ns = <44>;
  125. gpmc,adv-on-ns = <6>;
  126. gpmc,adv-rd-off-ns = <34>;
  127. gpmc,adv-wr-off-ns = <44>;
  128. gpmc,we-on-ns = <0>;
  129. gpmc,we-off-ns = <40>;
  130. gpmc,oe-on-ns = <0>;
  131. gpmc,oe-off-ns = <54>;
  132. gpmc,access-ns = <64>;
  133. gpmc,rd-cycle-ns = <82>;
  134. gpmc,wr-cycle-ns = <82>;
  135. gpmc,wait-on-read = "true";
  136. gpmc,wait-on-write = "true";
  137. gpmc,bus-turnaround-ns = <0>;
  138. gpmc,cycle2cycle-delay-ns = <0>;
  139. gpmc,clk-activation-ns = <0>;
  140. gpmc,wait-monitoring-ns = <0>;
  141. gpmc,wr-access-ns = <40>;
  142. gpmc,wr-data-mux-bus-ns = <0>;
  143. #address-cells = <1>;
  144. #size-cells = <1>;
  145. elm_id = <&elm>;
  146. /* MTD partition table */
  147. partition@0 {
  148. label = "SPL1";
  149. reg = <0x00000000 0x000020000>;
  150. };
  151. partition@1 {
  152. label = "SPL2";
  153. reg = <0x00020000 0x00020000>;
  154. };
  155. partition@2 {
  156. label = "SPL3";
  157. reg = <0x00040000 0x00020000>;
  158. };
  159. partition@3 {
  160. label = "SPL4";
  161. reg = <0x00060000 0x00020000>;
  162. };
  163. partition@4 {
  164. label = "U-boot";
  165. reg = <0x00080000 0x001e0000>;
  166. };
  167. partition@5 {
  168. label = "environment";
  169. reg = <0x00260000 0x00020000>;
  170. };
  171. partition@6 {
  172. label = "Kernel";
  173. reg = <0x00280000 0x00500000>;
  174. };
  175. partition@7 {
  176. label = "File-System";
  177. reg = <0x00780000 0x0F880000>;
  178. };
  179. };
  180. };
  181. };
  182. vbat: fixedregulator@0 {
  183. compatible = "regulator-fixed";
  184. regulator-name = "vbat";
  185. regulator-min-microvolt = <5000000>;
  186. regulator-max-microvolt = <5000000>;
  187. regulator-boot-on;
  188. };
  189. lis3_reg: fixedregulator@1 {
  190. compatible = "regulator-fixed";
  191. regulator-name = "lis3_reg";
  192. regulator-boot-on;
  193. };
  194. matrix_keypad: matrix_keypad@0 {
  195. compatible = "gpio-matrix-keypad";
  196. debounce-delay-ms = <5>;
  197. col-scan-delay-us = <2>;
  198. row-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH /* Bank1, pin25 */
  199. &gpio1 26 GPIO_ACTIVE_HIGH /* Bank1, pin26 */
  200. &gpio1 27 GPIO_ACTIVE_HIGH>; /* Bank1, pin27 */
  201. col-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH /* Bank1, pin21 */
  202. &gpio1 22 GPIO_ACTIVE_HIGH>; /* Bank1, pin22 */
  203. linux,keymap = <0x0000008b /* MENU */
  204. 0x0100009e /* BACK */
  205. 0x02000069 /* LEFT */
  206. 0x0001006a /* RIGHT */
  207. 0x0101001c /* ENTER */
  208. 0x0201006c>; /* DOWN */
  209. };
  210. gpio_keys: volume_keys@0 {
  211. compatible = "gpio-keys";
  212. #address-cells = <1>;
  213. #size-cells = <0>;
  214. autorepeat;
  215. switch@9 {
  216. label = "volume-up";
  217. linux,code = <115>;
  218. gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  219. gpio-key,wakeup;
  220. };
  221. switch@10 {
  222. label = "volume-down";
  223. linux,code = <114>;
  224. gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
  225. gpio-key,wakeup;
  226. };
  227. };
  228. backlight {
  229. compatible = "pwm-backlight";
  230. pwms = <&ecap0 0 50000 0>;
  231. brightness-levels = <0 51 53 56 62 75 101 152 255>;
  232. default-brightness-level = <8>;
  233. };
  234. };
  235. &am33xx_pinmux {
  236. pinctrl-names = "default";
  237. pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
  238. matrix_keypad_s0: matrix_keypad_s0 {
  239. pinctrl-single,pins = <
  240. 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
  241. 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
  242. 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
  243. 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */
  244. 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
  245. >;
  246. };
  247. volume_keys_s0: volume_keys_s0 {
  248. pinctrl-single,pins = <
  249. 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */
  250. 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */
  251. >;
  252. };
  253. i2c0_pins: pinmux_i2c0_pins {
  254. pinctrl-single,pins = <
  255. 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
  256. 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
  257. >;
  258. };
  259. i2c1_pins: pinmux_i2c1_pins {
  260. pinctrl-single,pins = <
  261. 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
  262. 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
  263. >;
  264. };
  265. uart0_pins: pinmux_uart0_pins {
  266. pinctrl-single,pins = <
  267. 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
  268. 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
  269. >;
  270. };
  271. clkout2_pin: pinmux_clkout2_pin {
  272. pinctrl-single,pins = <
  273. 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
  274. >;
  275. };
  276. nandflash_pins_s0: nandflash_pins_s0 {
  277. pinctrl-single,pins = <
  278. 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
  279. 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
  280. 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
  281. 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
  282. 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
  283. 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
  284. 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
  285. 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
  286. 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
  287. 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
  288. 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
  289. 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
  290. 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
  291. 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
  292. 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
  293. >;
  294. };
  295. ecap0_pins: backlight_pins {
  296. pinctrl-single,pins = <
  297. 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
  298. >;
  299. };
  300. cpsw_default: cpsw_default {
  301. pinctrl-single,pins = <
  302. /* Slave 1 */
  303. 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
  304. 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
  305. 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
  306. 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
  307. 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
  308. 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
  309. 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
  310. 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
  311. 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
  312. 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
  313. 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
  314. 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
  315. >;
  316. };
  317. cpsw_sleep: cpsw_sleep {
  318. pinctrl-single,pins = <
  319. /* Slave 1 reset value */
  320. 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  321. 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  322. 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  323. 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  324. 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  325. 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  326. 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  327. 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  328. 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  329. 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  330. 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  331. 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  332. >;
  333. };
  334. davinci_mdio_default: davinci_mdio_default {
  335. pinctrl-single,pins = <
  336. /* MDIO */
  337. 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
  338. 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
  339. >;
  340. };
  341. davinci_mdio_sleep: davinci_mdio_sleep {
  342. pinctrl-single,pins = <
  343. /* MDIO reset value */
  344. 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  345. 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  346. >;
  347. };
  348. };
  349. #include "tps65910.dtsi"
  350. &tps {
  351. vcc1-supply = <&vbat>;
  352. vcc2-supply = <&vbat>;
  353. vcc3-supply = <&vbat>;
  354. vcc4-supply = <&vbat>;
  355. vcc5-supply = <&vbat>;
  356. vcc6-supply = <&vbat>;
  357. vcc7-supply = <&vbat>;
  358. vccio-supply = <&vbat>;
  359. regulators {
  360. vrtc_reg: regulator@0 {
  361. regulator-always-on;
  362. };
  363. vio_reg: regulator@1 {
  364. regulator-always-on;
  365. };
  366. vdd1_reg: regulator@2 {
  367. /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
  368. regulator-name = "vdd_mpu";
  369. regulator-min-microvolt = <912500>;
  370. regulator-max-microvolt = <1312500>;
  371. regulator-boot-on;
  372. regulator-always-on;
  373. };
  374. vdd2_reg: regulator@3 {
  375. /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
  376. regulator-name = "vdd_core";
  377. regulator-min-microvolt = <912500>;
  378. regulator-max-microvolt = <1150000>;
  379. regulator-boot-on;
  380. regulator-always-on;
  381. };
  382. vdd3_reg: regulator@4 {
  383. regulator-always-on;
  384. };
  385. vdig1_reg: regulator@5 {
  386. regulator-always-on;
  387. };
  388. vdig2_reg: regulator@6 {
  389. regulator-always-on;
  390. };
  391. vpll_reg: regulator@7 {
  392. regulator-always-on;
  393. };
  394. vdac_reg: regulator@8 {
  395. regulator-always-on;
  396. };
  397. vaux1_reg: regulator@9 {
  398. regulator-always-on;
  399. };
  400. vaux2_reg: regulator@10 {
  401. regulator-always-on;
  402. };
  403. vaux33_reg: regulator@11 {
  404. regulator-always-on;
  405. };
  406. vmmc_reg: regulator@12 {
  407. regulator-min-microvolt = <1800000>;
  408. regulator-max-microvolt = <3300000>;
  409. regulator-always-on;
  410. };
  411. };
  412. };
  413. &mac {
  414. pinctrl-names = "default", "sleep";
  415. pinctrl-0 = <&cpsw_default>;
  416. pinctrl-1 = <&cpsw_sleep>;
  417. };
  418. &davinci_mdio {
  419. pinctrl-names = "default", "sleep";
  420. pinctrl-0 = <&davinci_mdio_default>;
  421. pinctrl-1 = <&davinci_mdio_sleep>;
  422. };
  423. &cpsw_emac0 {
  424. phy_id = <&davinci_mdio>, <0>;
  425. phy-mode = "rgmii-txid";
  426. };
  427. &cpsw_emac1 {
  428. phy_id = <&davinci_mdio>, <1>;
  429. phy-mode = "rgmii-txid";
  430. };
  431. &tscadc {
  432. status = "okay";
  433. tsc {
  434. ti,wires = <4>;
  435. ti,x-plate-resistance = <200>;
  436. ti,coordiante-readouts = <5>;
  437. ti,wire-config = <0x00 0x11 0x22 0x33>;
  438. };
  439. adc {
  440. ti,adc-channels = <4 5 6 7>;
  441. };
  442. };
  443. &mmc1 {
  444. status = "okay";
  445. vmmc-supply = <&vmmc_reg>;
  446. };