mmu.c 76 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "mmu.h"
  20. #include <linux/kvm_host.h>
  21. #include <linux/types.h>
  22. #include <linux/string.h>
  23. #include <linux/mm.h>
  24. #include <linux/highmem.h>
  25. #include <linux/module.h>
  26. #include <linux/swap.h>
  27. #include <linux/hugetlb.h>
  28. #include <linux/compiler.h>
  29. #include <asm/page.h>
  30. #include <asm/cmpxchg.h>
  31. #include <asm/io.h>
  32. #include <asm/vmx.h>
  33. /*
  34. * When setting this variable to true it enables Two-Dimensional-Paging
  35. * where the hardware walks 2 page tables:
  36. * 1. the guest-virtual to guest-physical
  37. * 2. while doing 1. it walks guest-physical to host-physical
  38. * If the hardware supports that we don't need to do shadow paging.
  39. */
  40. bool tdp_enabled = false;
  41. #undef MMU_DEBUG
  42. #undef AUDIT
  43. #ifdef AUDIT
  44. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  45. #else
  46. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  47. #endif
  48. #ifdef MMU_DEBUG
  49. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  50. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  51. #else
  52. #define pgprintk(x...) do { } while (0)
  53. #define rmap_printk(x...) do { } while (0)
  54. #endif
  55. #if defined(MMU_DEBUG) || defined(AUDIT)
  56. static int dbg = 0;
  57. module_param(dbg, bool, 0644);
  58. #endif
  59. static int oos_shadow = 1;
  60. module_param(oos_shadow, bool, 0644);
  61. #ifndef MMU_DEBUG
  62. #define ASSERT(x) do { } while (0)
  63. #else
  64. #define ASSERT(x) \
  65. if (!(x)) { \
  66. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  67. __FILE__, __LINE__, #x); \
  68. }
  69. #endif
  70. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  71. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  72. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  73. #define PT64_LEVEL_BITS 9
  74. #define PT64_LEVEL_SHIFT(level) \
  75. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  76. #define PT64_LEVEL_MASK(level) \
  77. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  78. #define PT64_INDEX(address, level)\
  79. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  80. #define PT32_LEVEL_BITS 10
  81. #define PT32_LEVEL_SHIFT(level) \
  82. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  83. #define PT32_LEVEL_MASK(level) \
  84. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  85. #define PT32_INDEX(address, level)\
  86. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  87. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  88. #define PT64_DIR_BASE_ADDR_MASK \
  89. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  90. #define PT32_BASE_ADDR_MASK PAGE_MASK
  91. #define PT32_DIR_BASE_ADDR_MASK \
  92. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  93. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  94. | PT64_NX_MASK)
  95. #define PFERR_PRESENT_MASK (1U << 0)
  96. #define PFERR_WRITE_MASK (1U << 1)
  97. #define PFERR_USER_MASK (1U << 2)
  98. #define PFERR_RSVD_MASK (1U << 3)
  99. #define PFERR_FETCH_MASK (1U << 4)
  100. #define PT_DIRECTORY_LEVEL 2
  101. #define PT_PAGE_TABLE_LEVEL 1
  102. #define RMAP_EXT 4
  103. #define ACC_EXEC_MASK 1
  104. #define ACC_WRITE_MASK PT_WRITABLE_MASK
  105. #define ACC_USER_MASK PT_USER_MASK
  106. #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
  107. #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  108. struct kvm_rmap_desc {
  109. u64 *shadow_ptes[RMAP_EXT];
  110. struct kvm_rmap_desc *more;
  111. };
  112. struct kvm_shadow_walk_iterator {
  113. u64 addr;
  114. hpa_t shadow_addr;
  115. int level;
  116. u64 *sptep;
  117. unsigned index;
  118. };
  119. #define for_each_shadow_entry(_vcpu, _addr, _walker) \
  120. for (shadow_walk_init(&(_walker), _vcpu, _addr); \
  121. shadow_walk_okay(&(_walker)); \
  122. shadow_walk_next(&(_walker)))
  123. struct kvm_unsync_walk {
  124. int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
  125. };
  126. typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
  127. static struct kmem_cache *pte_chain_cache;
  128. static struct kmem_cache *rmap_desc_cache;
  129. static struct kmem_cache *mmu_page_header_cache;
  130. static u64 __read_mostly shadow_trap_nonpresent_pte;
  131. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  132. static u64 __read_mostly shadow_base_present_pte;
  133. static u64 __read_mostly shadow_nx_mask;
  134. static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
  135. static u64 __read_mostly shadow_user_mask;
  136. static u64 __read_mostly shadow_accessed_mask;
  137. static u64 __read_mostly shadow_dirty_mask;
  138. static u64 __read_mostly shadow_mt_mask;
  139. static inline u64 rsvd_bits(int s, int e)
  140. {
  141. return ((1ULL << (e - s + 1)) - 1) << s;
  142. }
  143. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  144. {
  145. shadow_trap_nonpresent_pte = trap_pte;
  146. shadow_notrap_nonpresent_pte = notrap_pte;
  147. }
  148. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  149. void kvm_mmu_set_base_ptes(u64 base_pte)
  150. {
  151. shadow_base_present_pte = base_pte;
  152. }
  153. EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
  154. void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
  155. u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask)
  156. {
  157. shadow_user_mask = user_mask;
  158. shadow_accessed_mask = accessed_mask;
  159. shadow_dirty_mask = dirty_mask;
  160. shadow_nx_mask = nx_mask;
  161. shadow_x_mask = x_mask;
  162. shadow_mt_mask = mt_mask;
  163. }
  164. EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
  165. static int is_write_protection(struct kvm_vcpu *vcpu)
  166. {
  167. return vcpu->arch.cr0 & X86_CR0_WP;
  168. }
  169. static int is_cpuid_PSE36(void)
  170. {
  171. return 1;
  172. }
  173. static int is_nx(struct kvm_vcpu *vcpu)
  174. {
  175. return vcpu->arch.shadow_efer & EFER_NX;
  176. }
  177. static int is_present_pte(unsigned long pte)
  178. {
  179. return pte & PT_PRESENT_MASK;
  180. }
  181. static int is_shadow_present_pte(u64 pte)
  182. {
  183. return pte != shadow_trap_nonpresent_pte
  184. && pte != shadow_notrap_nonpresent_pte;
  185. }
  186. static int is_large_pte(u64 pte)
  187. {
  188. return pte & PT_PAGE_SIZE_MASK;
  189. }
  190. static int is_writeble_pte(unsigned long pte)
  191. {
  192. return pte & PT_WRITABLE_MASK;
  193. }
  194. static int is_dirty_pte(unsigned long pte)
  195. {
  196. return pte & shadow_dirty_mask;
  197. }
  198. static int is_rmap_pte(u64 pte)
  199. {
  200. return is_shadow_present_pte(pte);
  201. }
  202. static pfn_t spte_to_pfn(u64 pte)
  203. {
  204. return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  205. }
  206. static gfn_t pse36_gfn_delta(u32 gpte)
  207. {
  208. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  209. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  210. }
  211. static void set_shadow_pte(u64 *sptep, u64 spte)
  212. {
  213. #ifdef CONFIG_X86_64
  214. set_64bit((unsigned long *)sptep, spte);
  215. #else
  216. set_64bit((unsigned long long *)sptep, spte);
  217. #endif
  218. }
  219. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  220. struct kmem_cache *base_cache, int min)
  221. {
  222. void *obj;
  223. if (cache->nobjs >= min)
  224. return 0;
  225. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  226. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  227. if (!obj)
  228. return -ENOMEM;
  229. cache->objects[cache->nobjs++] = obj;
  230. }
  231. return 0;
  232. }
  233. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  234. {
  235. while (mc->nobjs)
  236. kfree(mc->objects[--mc->nobjs]);
  237. }
  238. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  239. int min)
  240. {
  241. struct page *page;
  242. if (cache->nobjs >= min)
  243. return 0;
  244. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  245. page = alloc_page(GFP_KERNEL);
  246. if (!page)
  247. return -ENOMEM;
  248. set_page_private(page, 0);
  249. cache->objects[cache->nobjs++] = page_address(page);
  250. }
  251. return 0;
  252. }
  253. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  254. {
  255. while (mc->nobjs)
  256. free_page((unsigned long)mc->objects[--mc->nobjs]);
  257. }
  258. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  259. {
  260. int r;
  261. r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
  262. pte_chain_cache, 4);
  263. if (r)
  264. goto out;
  265. r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
  266. rmap_desc_cache, 4);
  267. if (r)
  268. goto out;
  269. r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
  270. if (r)
  271. goto out;
  272. r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
  273. mmu_page_header_cache, 4);
  274. out:
  275. return r;
  276. }
  277. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  278. {
  279. mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
  280. mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
  281. mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
  282. mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
  283. }
  284. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  285. size_t size)
  286. {
  287. void *p;
  288. BUG_ON(!mc->nobjs);
  289. p = mc->objects[--mc->nobjs];
  290. return p;
  291. }
  292. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  293. {
  294. return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
  295. sizeof(struct kvm_pte_chain));
  296. }
  297. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  298. {
  299. kfree(pc);
  300. }
  301. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  302. {
  303. return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
  304. sizeof(struct kvm_rmap_desc));
  305. }
  306. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  307. {
  308. kfree(rd);
  309. }
  310. /*
  311. * Return the pointer to the largepage write count for a given
  312. * gfn, handling slots that are not large page aligned.
  313. */
  314. static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
  315. {
  316. unsigned long idx;
  317. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  318. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  319. return &slot->lpage_info[idx].write_count;
  320. }
  321. static void account_shadowed(struct kvm *kvm, gfn_t gfn)
  322. {
  323. int *write_count;
  324. gfn = unalias_gfn(kvm, gfn);
  325. write_count = slot_largepage_idx(gfn,
  326. gfn_to_memslot_unaliased(kvm, gfn));
  327. *write_count += 1;
  328. }
  329. static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
  330. {
  331. int *write_count;
  332. gfn = unalias_gfn(kvm, gfn);
  333. write_count = slot_largepage_idx(gfn,
  334. gfn_to_memslot_unaliased(kvm, gfn));
  335. *write_count -= 1;
  336. WARN_ON(*write_count < 0);
  337. }
  338. static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
  339. {
  340. struct kvm_memory_slot *slot;
  341. int *largepage_idx;
  342. gfn = unalias_gfn(kvm, gfn);
  343. slot = gfn_to_memslot_unaliased(kvm, gfn);
  344. if (slot) {
  345. largepage_idx = slot_largepage_idx(gfn, slot);
  346. return *largepage_idx;
  347. }
  348. return 1;
  349. }
  350. static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
  351. {
  352. struct vm_area_struct *vma;
  353. unsigned long addr;
  354. int ret = 0;
  355. addr = gfn_to_hva(kvm, gfn);
  356. if (kvm_is_error_hva(addr))
  357. return ret;
  358. down_read(&current->mm->mmap_sem);
  359. vma = find_vma(current->mm, addr);
  360. if (vma && is_vm_hugetlb_page(vma))
  361. ret = 1;
  362. up_read(&current->mm->mmap_sem);
  363. return ret;
  364. }
  365. static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
  366. {
  367. struct kvm_memory_slot *slot;
  368. if (has_wrprotected_page(vcpu->kvm, large_gfn))
  369. return 0;
  370. if (!host_largepage_backed(vcpu->kvm, large_gfn))
  371. return 0;
  372. slot = gfn_to_memslot(vcpu->kvm, large_gfn);
  373. if (slot && slot->dirty_bitmap)
  374. return 0;
  375. return 1;
  376. }
  377. /*
  378. * Take gfn and return the reverse mapping to it.
  379. * Note: gfn must be unaliased before this function get called
  380. */
  381. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
  382. {
  383. struct kvm_memory_slot *slot;
  384. unsigned long idx;
  385. slot = gfn_to_memslot(kvm, gfn);
  386. if (!lpage)
  387. return &slot->rmap[gfn - slot->base_gfn];
  388. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  389. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  390. return &slot->lpage_info[idx].rmap_pde;
  391. }
  392. /*
  393. * Reverse mapping data structures:
  394. *
  395. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  396. * that points to page_address(page).
  397. *
  398. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  399. * containing more mappings.
  400. */
  401. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
  402. {
  403. struct kvm_mmu_page *sp;
  404. struct kvm_rmap_desc *desc;
  405. unsigned long *rmapp;
  406. int i;
  407. if (!is_rmap_pte(*spte))
  408. return;
  409. gfn = unalias_gfn(vcpu->kvm, gfn);
  410. sp = page_header(__pa(spte));
  411. sp->gfns[spte - sp->spt] = gfn;
  412. rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
  413. if (!*rmapp) {
  414. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  415. *rmapp = (unsigned long)spte;
  416. } else if (!(*rmapp & 1)) {
  417. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  418. desc = mmu_alloc_rmap_desc(vcpu);
  419. desc->shadow_ptes[0] = (u64 *)*rmapp;
  420. desc->shadow_ptes[1] = spte;
  421. *rmapp = (unsigned long)desc | 1;
  422. } else {
  423. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  424. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  425. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  426. desc = desc->more;
  427. if (desc->shadow_ptes[RMAP_EXT-1]) {
  428. desc->more = mmu_alloc_rmap_desc(vcpu);
  429. desc = desc->more;
  430. }
  431. for (i = 0; desc->shadow_ptes[i]; ++i)
  432. ;
  433. desc->shadow_ptes[i] = spte;
  434. }
  435. }
  436. static void rmap_desc_remove_entry(unsigned long *rmapp,
  437. struct kvm_rmap_desc *desc,
  438. int i,
  439. struct kvm_rmap_desc *prev_desc)
  440. {
  441. int j;
  442. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  443. ;
  444. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  445. desc->shadow_ptes[j] = NULL;
  446. if (j != 0)
  447. return;
  448. if (!prev_desc && !desc->more)
  449. *rmapp = (unsigned long)desc->shadow_ptes[0];
  450. else
  451. if (prev_desc)
  452. prev_desc->more = desc->more;
  453. else
  454. *rmapp = (unsigned long)desc->more | 1;
  455. mmu_free_rmap_desc(desc);
  456. }
  457. static void rmap_remove(struct kvm *kvm, u64 *spte)
  458. {
  459. struct kvm_rmap_desc *desc;
  460. struct kvm_rmap_desc *prev_desc;
  461. struct kvm_mmu_page *sp;
  462. pfn_t pfn;
  463. unsigned long *rmapp;
  464. int i;
  465. if (!is_rmap_pte(*spte))
  466. return;
  467. sp = page_header(__pa(spte));
  468. pfn = spte_to_pfn(*spte);
  469. if (*spte & shadow_accessed_mask)
  470. kvm_set_pfn_accessed(pfn);
  471. if (is_writeble_pte(*spte))
  472. kvm_release_pfn_dirty(pfn);
  473. else
  474. kvm_release_pfn_clean(pfn);
  475. rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
  476. if (!*rmapp) {
  477. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  478. BUG();
  479. } else if (!(*rmapp & 1)) {
  480. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  481. if ((u64 *)*rmapp != spte) {
  482. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  483. spte, *spte);
  484. BUG();
  485. }
  486. *rmapp = 0;
  487. } else {
  488. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  489. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  490. prev_desc = NULL;
  491. while (desc) {
  492. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  493. if (desc->shadow_ptes[i] == spte) {
  494. rmap_desc_remove_entry(rmapp,
  495. desc, i,
  496. prev_desc);
  497. return;
  498. }
  499. prev_desc = desc;
  500. desc = desc->more;
  501. }
  502. BUG();
  503. }
  504. }
  505. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  506. {
  507. struct kvm_rmap_desc *desc;
  508. struct kvm_rmap_desc *prev_desc;
  509. u64 *prev_spte;
  510. int i;
  511. if (!*rmapp)
  512. return NULL;
  513. else if (!(*rmapp & 1)) {
  514. if (!spte)
  515. return (u64 *)*rmapp;
  516. return NULL;
  517. }
  518. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  519. prev_desc = NULL;
  520. prev_spte = NULL;
  521. while (desc) {
  522. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
  523. if (prev_spte == spte)
  524. return desc->shadow_ptes[i];
  525. prev_spte = desc->shadow_ptes[i];
  526. }
  527. desc = desc->more;
  528. }
  529. return NULL;
  530. }
  531. static int rmap_write_protect(struct kvm *kvm, u64 gfn)
  532. {
  533. unsigned long *rmapp;
  534. u64 *spte;
  535. int write_protected = 0;
  536. gfn = unalias_gfn(kvm, gfn);
  537. rmapp = gfn_to_rmap(kvm, gfn, 0);
  538. spte = rmap_next(kvm, rmapp, NULL);
  539. while (spte) {
  540. BUG_ON(!spte);
  541. BUG_ON(!(*spte & PT_PRESENT_MASK));
  542. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  543. if (is_writeble_pte(*spte)) {
  544. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  545. write_protected = 1;
  546. }
  547. spte = rmap_next(kvm, rmapp, spte);
  548. }
  549. if (write_protected) {
  550. pfn_t pfn;
  551. spte = rmap_next(kvm, rmapp, NULL);
  552. pfn = spte_to_pfn(*spte);
  553. kvm_set_pfn_dirty(pfn);
  554. }
  555. /* check for huge page mappings */
  556. rmapp = gfn_to_rmap(kvm, gfn, 1);
  557. spte = rmap_next(kvm, rmapp, NULL);
  558. while (spte) {
  559. BUG_ON(!spte);
  560. BUG_ON(!(*spte & PT_PRESENT_MASK));
  561. BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
  562. pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
  563. if (is_writeble_pte(*spte)) {
  564. rmap_remove(kvm, spte);
  565. --kvm->stat.lpages;
  566. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  567. spte = NULL;
  568. write_protected = 1;
  569. }
  570. spte = rmap_next(kvm, rmapp, spte);
  571. }
  572. return write_protected;
  573. }
  574. static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
  575. {
  576. u64 *spte;
  577. int need_tlb_flush = 0;
  578. while ((spte = rmap_next(kvm, rmapp, NULL))) {
  579. BUG_ON(!(*spte & PT_PRESENT_MASK));
  580. rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
  581. rmap_remove(kvm, spte);
  582. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  583. need_tlb_flush = 1;
  584. }
  585. return need_tlb_flush;
  586. }
  587. static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
  588. int (*handler)(struct kvm *kvm, unsigned long *rmapp))
  589. {
  590. int i;
  591. int retval = 0;
  592. /*
  593. * If mmap_sem isn't taken, we can look the memslots with only
  594. * the mmu_lock by skipping over the slots with userspace_addr == 0.
  595. */
  596. for (i = 0; i < kvm->nmemslots; i++) {
  597. struct kvm_memory_slot *memslot = &kvm->memslots[i];
  598. unsigned long start = memslot->userspace_addr;
  599. unsigned long end;
  600. /* mmu_lock protects userspace_addr */
  601. if (!start)
  602. continue;
  603. end = start + (memslot->npages << PAGE_SHIFT);
  604. if (hva >= start && hva < end) {
  605. gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
  606. retval |= handler(kvm, &memslot->rmap[gfn_offset]);
  607. retval |= handler(kvm,
  608. &memslot->lpage_info[
  609. gfn_offset /
  610. KVM_PAGES_PER_HPAGE].rmap_pde);
  611. }
  612. }
  613. return retval;
  614. }
  615. int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
  616. {
  617. return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
  618. }
  619. static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
  620. {
  621. u64 *spte;
  622. int young = 0;
  623. /* always return old for EPT */
  624. if (!shadow_accessed_mask)
  625. return 0;
  626. spte = rmap_next(kvm, rmapp, NULL);
  627. while (spte) {
  628. int _young;
  629. u64 _spte = *spte;
  630. BUG_ON(!(_spte & PT_PRESENT_MASK));
  631. _young = _spte & PT_ACCESSED_MASK;
  632. if (_young) {
  633. young = 1;
  634. clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  635. }
  636. spte = rmap_next(kvm, rmapp, spte);
  637. }
  638. return young;
  639. }
  640. int kvm_age_hva(struct kvm *kvm, unsigned long hva)
  641. {
  642. return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
  643. }
  644. #ifdef MMU_DEBUG
  645. static int is_empty_shadow_page(u64 *spt)
  646. {
  647. u64 *pos;
  648. u64 *end;
  649. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  650. if (is_shadow_present_pte(*pos)) {
  651. printk(KERN_ERR "%s: %p %llx\n", __func__,
  652. pos, *pos);
  653. return 0;
  654. }
  655. return 1;
  656. }
  657. #endif
  658. static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  659. {
  660. ASSERT(is_empty_shadow_page(sp->spt));
  661. list_del(&sp->link);
  662. __free_page(virt_to_page(sp->spt));
  663. __free_page(virt_to_page(sp->gfns));
  664. kfree(sp);
  665. ++kvm->arch.n_free_mmu_pages;
  666. }
  667. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  668. {
  669. return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
  670. }
  671. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  672. u64 *parent_pte)
  673. {
  674. struct kvm_mmu_page *sp;
  675. sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
  676. sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  677. sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  678. set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
  679. list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
  680. INIT_LIST_HEAD(&sp->oos_link);
  681. bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
  682. sp->multimapped = 0;
  683. sp->parent_pte = parent_pte;
  684. --vcpu->kvm->arch.n_free_mmu_pages;
  685. return sp;
  686. }
  687. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  688. struct kvm_mmu_page *sp, u64 *parent_pte)
  689. {
  690. struct kvm_pte_chain *pte_chain;
  691. struct hlist_node *node;
  692. int i;
  693. if (!parent_pte)
  694. return;
  695. if (!sp->multimapped) {
  696. u64 *old = sp->parent_pte;
  697. if (!old) {
  698. sp->parent_pte = parent_pte;
  699. return;
  700. }
  701. sp->multimapped = 1;
  702. pte_chain = mmu_alloc_pte_chain(vcpu);
  703. INIT_HLIST_HEAD(&sp->parent_ptes);
  704. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  705. pte_chain->parent_ptes[0] = old;
  706. }
  707. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
  708. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  709. continue;
  710. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  711. if (!pte_chain->parent_ptes[i]) {
  712. pte_chain->parent_ptes[i] = parent_pte;
  713. return;
  714. }
  715. }
  716. pte_chain = mmu_alloc_pte_chain(vcpu);
  717. BUG_ON(!pte_chain);
  718. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  719. pte_chain->parent_ptes[0] = parent_pte;
  720. }
  721. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
  722. u64 *parent_pte)
  723. {
  724. struct kvm_pte_chain *pte_chain;
  725. struct hlist_node *node;
  726. int i;
  727. if (!sp->multimapped) {
  728. BUG_ON(sp->parent_pte != parent_pte);
  729. sp->parent_pte = NULL;
  730. return;
  731. }
  732. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  733. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  734. if (!pte_chain->parent_ptes[i])
  735. break;
  736. if (pte_chain->parent_ptes[i] != parent_pte)
  737. continue;
  738. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  739. && pte_chain->parent_ptes[i + 1]) {
  740. pte_chain->parent_ptes[i]
  741. = pte_chain->parent_ptes[i + 1];
  742. ++i;
  743. }
  744. pte_chain->parent_ptes[i] = NULL;
  745. if (i == 0) {
  746. hlist_del(&pte_chain->link);
  747. mmu_free_pte_chain(pte_chain);
  748. if (hlist_empty(&sp->parent_ptes)) {
  749. sp->multimapped = 0;
  750. sp->parent_pte = NULL;
  751. }
  752. }
  753. return;
  754. }
  755. BUG();
  756. }
  757. static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
  758. mmu_parent_walk_fn fn)
  759. {
  760. struct kvm_pte_chain *pte_chain;
  761. struct hlist_node *node;
  762. struct kvm_mmu_page *parent_sp;
  763. int i;
  764. if (!sp->multimapped && sp->parent_pte) {
  765. parent_sp = page_header(__pa(sp->parent_pte));
  766. fn(vcpu, parent_sp);
  767. mmu_parent_walk(vcpu, parent_sp, fn);
  768. return;
  769. }
  770. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  771. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  772. if (!pte_chain->parent_ptes[i])
  773. break;
  774. parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
  775. fn(vcpu, parent_sp);
  776. mmu_parent_walk(vcpu, parent_sp, fn);
  777. }
  778. }
  779. static void kvm_mmu_update_unsync_bitmap(u64 *spte)
  780. {
  781. unsigned int index;
  782. struct kvm_mmu_page *sp = page_header(__pa(spte));
  783. index = spte - sp->spt;
  784. if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
  785. sp->unsync_children++;
  786. WARN_ON(!sp->unsync_children);
  787. }
  788. static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
  789. {
  790. struct kvm_pte_chain *pte_chain;
  791. struct hlist_node *node;
  792. int i;
  793. if (!sp->parent_pte)
  794. return;
  795. if (!sp->multimapped) {
  796. kvm_mmu_update_unsync_bitmap(sp->parent_pte);
  797. return;
  798. }
  799. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  800. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  801. if (!pte_chain->parent_ptes[i])
  802. break;
  803. kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
  804. }
  805. }
  806. static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  807. {
  808. kvm_mmu_update_parents_unsync(sp);
  809. return 1;
  810. }
  811. static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
  812. struct kvm_mmu_page *sp)
  813. {
  814. mmu_parent_walk(vcpu, sp, unsync_walk_fn);
  815. kvm_mmu_update_parents_unsync(sp);
  816. }
  817. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  818. struct kvm_mmu_page *sp)
  819. {
  820. int i;
  821. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  822. sp->spt[i] = shadow_trap_nonpresent_pte;
  823. }
  824. static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
  825. struct kvm_mmu_page *sp)
  826. {
  827. return 1;
  828. }
  829. static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  830. {
  831. }
  832. #define KVM_PAGE_ARRAY_NR 16
  833. struct kvm_mmu_pages {
  834. struct mmu_page_and_offset {
  835. struct kvm_mmu_page *sp;
  836. unsigned int idx;
  837. } page[KVM_PAGE_ARRAY_NR];
  838. unsigned int nr;
  839. };
  840. #define for_each_unsync_children(bitmap, idx) \
  841. for (idx = find_first_bit(bitmap, 512); \
  842. idx < 512; \
  843. idx = find_next_bit(bitmap, 512, idx+1))
  844. static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
  845. int idx)
  846. {
  847. int i;
  848. if (sp->unsync)
  849. for (i=0; i < pvec->nr; i++)
  850. if (pvec->page[i].sp == sp)
  851. return 0;
  852. pvec->page[pvec->nr].sp = sp;
  853. pvec->page[pvec->nr].idx = idx;
  854. pvec->nr++;
  855. return (pvec->nr == KVM_PAGE_ARRAY_NR);
  856. }
  857. static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
  858. struct kvm_mmu_pages *pvec)
  859. {
  860. int i, ret, nr_unsync_leaf = 0;
  861. for_each_unsync_children(sp->unsync_child_bitmap, i) {
  862. u64 ent = sp->spt[i];
  863. if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
  864. struct kvm_mmu_page *child;
  865. child = page_header(ent & PT64_BASE_ADDR_MASK);
  866. if (child->unsync_children) {
  867. if (mmu_pages_add(pvec, child, i))
  868. return -ENOSPC;
  869. ret = __mmu_unsync_walk(child, pvec);
  870. if (!ret)
  871. __clear_bit(i, sp->unsync_child_bitmap);
  872. else if (ret > 0)
  873. nr_unsync_leaf += ret;
  874. else
  875. return ret;
  876. }
  877. if (child->unsync) {
  878. nr_unsync_leaf++;
  879. if (mmu_pages_add(pvec, child, i))
  880. return -ENOSPC;
  881. }
  882. }
  883. }
  884. if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
  885. sp->unsync_children = 0;
  886. return nr_unsync_leaf;
  887. }
  888. static int mmu_unsync_walk(struct kvm_mmu_page *sp,
  889. struct kvm_mmu_pages *pvec)
  890. {
  891. if (!sp->unsync_children)
  892. return 0;
  893. mmu_pages_add(pvec, sp, 0);
  894. return __mmu_unsync_walk(sp, pvec);
  895. }
  896. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
  897. {
  898. unsigned index;
  899. struct hlist_head *bucket;
  900. struct kvm_mmu_page *sp;
  901. struct hlist_node *node;
  902. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  903. index = kvm_page_table_hashfn(gfn);
  904. bucket = &kvm->arch.mmu_page_hash[index];
  905. hlist_for_each_entry(sp, node, bucket, hash_link)
  906. if (sp->gfn == gfn && !sp->role.direct
  907. && !sp->role.invalid) {
  908. pgprintk("%s: found role %x\n",
  909. __func__, sp->role.word);
  910. return sp;
  911. }
  912. return NULL;
  913. }
  914. static void kvm_unlink_unsync_global(struct kvm *kvm, struct kvm_mmu_page *sp)
  915. {
  916. list_del(&sp->oos_link);
  917. --kvm->stat.mmu_unsync_global;
  918. }
  919. static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  920. {
  921. WARN_ON(!sp->unsync);
  922. sp->unsync = 0;
  923. if (sp->global)
  924. kvm_unlink_unsync_global(kvm, sp);
  925. --kvm->stat.mmu_unsync;
  926. }
  927. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
  928. static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  929. {
  930. if (sp->role.glevels != vcpu->arch.mmu.root_level) {
  931. kvm_mmu_zap_page(vcpu->kvm, sp);
  932. return 1;
  933. }
  934. if (rmap_write_protect(vcpu->kvm, sp->gfn))
  935. kvm_flush_remote_tlbs(vcpu->kvm);
  936. kvm_unlink_unsync_page(vcpu->kvm, sp);
  937. if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
  938. kvm_mmu_zap_page(vcpu->kvm, sp);
  939. return 1;
  940. }
  941. kvm_mmu_flush_tlb(vcpu);
  942. return 0;
  943. }
  944. struct mmu_page_path {
  945. struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
  946. unsigned int idx[PT64_ROOT_LEVEL-1];
  947. };
  948. #define for_each_sp(pvec, sp, parents, i) \
  949. for (i = mmu_pages_next(&pvec, &parents, -1), \
  950. sp = pvec.page[i].sp; \
  951. i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
  952. i = mmu_pages_next(&pvec, &parents, i))
  953. static int mmu_pages_next(struct kvm_mmu_pages *pvec,
  954. struct mmu_page_path *parents,
  955. int i)
  956. {
  957. int n;
  958. for (n = i+1; n < pvec->nr; n++) {
  959. struct kvm_mmu_page *sp = pvec->page[n].sp;
  960. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  961. parents->idx[0] = pvec->page[n].idx;
  962. return n;
  963. }
  964. parents->parent[sp->role.level-2] = sp;
  965. parents->idx[sp->role.level-1] = pvec->page[n].idx;
  966. }
  967. return n;
  968. }
  969. static void mmu_pages_clear_parents(struct mmu_page_path *parents)
  970. {
  971. struct kvm_mmu_page *sp;
  972. unsigned int level = 0;
  973. do {
  974. unsigned int idx = parents->idx[level];
  975. sp = parents->parent[level];
  976. if (!sp)
  977. return;
  978. --sp->unsync_children;
  979. WARN_ON((int)sp->unsync_children < 0);
  980. __clear_bit(idx, sp->unsync_child_bitmap);
  981. level++;
  982. } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
  983. }
  984. static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
  985. struct mmu_page_path *parents,
  986. struct kvm_mmu_pages *pvec)
  987. {
  988. parents->parent[parent->role.level-1] = NULL;
  989. pvec->nr = 0;
  990. }
  991. static void mmu_sync_children(struct kvm_vcpu *vcpu,
  992. struct kvm_mmu_page *parent)
  993. {
  994. int i;
  995. struct kvm_mmu_page *sp;
  996. struct mmu_page_path parents;
  997. struct kvm_mmu_pages pages;
  998. kvm_mmu_pages_init(parent, &parents, &pages);
  999. while (mmu_unsync_walk(parent, &pages)) {
  1000. int protected = 0;
  1001. for_each_sp(pages, sp, parents, i)
  1002. protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
  1003. if (protected)
  1004. kvm_flush_remote_tlbs(vcpu->kvm);
  1005. for_each_sp(pages, sp, parents, i) {
  1006. kvm_sync_page(vcpu, sp);
  1007. mmu_pages_clear_parents(&parents);
  1008. }
  1009. cond_resched_lock(&vcpu->kvm->mmu_lock);
  1010. kvm_mmu_pages_init(parent, &parents, &pages);
  1011. }
  1012. }
  1013. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  1014. gfn_t gfn,
  1015. gva_t gaddr,
  1016. unsigned level,
  1017. int direct,
  1018. unsigned access,
  1019. u64 *parent_pte)
  1020. {
  1021. union kvm_mmu_page_role role;
  1022. unsigned index;
  1023. unsigned quadrant;
  1024. struct hlist_head *bucket;
  1025. struct kvm_mmu_page *sp;
  1026. struct hlist_node *node, *tmp;
  1027. role = vcpu->arch.mmu.base_role;
  1028. role.level = level;
  1029. role.direct = direct;
  1030. role.access = access;
  1031. if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
  1032. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  1033. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  1034. role.quadrant = quadrant;
  1035. }
  1036. pgprintk("%s: looking gfn %lx role %x\n", __func__,
  1037. gfn, role.word);
  1038. index = kvm_page_table_hashfn(gfn);
  1039. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1040. hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
  1041. if (sp->gfn == gfn) {
  1042. if (sp->unsync)
  1043. if (kvm_sync_page(vcpu, sp))
  1044. continue;
  1045. if (sp->role.word != role.word)
  1046. continue;
  1047. mmu_page_add_parent_pte(vcpu, sp, parent_pte);
  1048. if (sp->unsync_children) {
  1049. set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
  1050. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1051. }
  1052. pgprintk("%s: found\n", __func__);
  1053. return sp;
  1054. }
  1055. ++vcpu->kvm->stat.mmu_cache_miss;
  1056. sp = kvm_mmu_alloc_page(vcpu, parent_pte);
  1057. if (!sp)
  1058. return sp;
  1059. pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
  1060. sp->gfn = gfn;
  1061. sp->role = role;
  1062. sp->global = 0;
  1063. hlist_add_head(&sp->hash_link, bucket);
  1064. if (!direct) {
  1065. if (rmap_write_protect(vcpu->kvm, gfn))
  1066. kvm_flush_remote_tlbs(vcpu->kvm);
  1067. account_shadowed(vcpu->kvm, gfn);
  1068. }
  1069. if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
  1070. vcpu->arch.mmu.prefetch_page(vcpu, sp);
  1071. else
  1072. nonpaging_prefetch_page(vcpu, sp);
  1073. return sp;
  1074. }
  1075. static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
  1076. struct kvm_vcpu *vcpu, u64 addr)
  1077. {
  1078. iterator->addr = addr;
  1079. iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
  1080. iterator->level = vcpu->arch.mmu.shadow_root_level;
  1081. if (iterator->level == PT32E_ROOT_LEVEL) {
  1082. iterator->shadow_addr
  1083. = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
  1084. iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
  1085. --iterator->level;
  1086. if (!iterator->shadow_addr)
  1087. iterator->level = 0;
  1088. }
  1089. }
  1090. static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
  1091. {
  1092. if (iterator->level < PT_PAGE_TABLE_LEVEL)
  1093. return false;
  1094. iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
  1095. iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
  1096. return true;
  1097. }
  1098. static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
  1099. {
  1100. iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
  1101. --iterator->level;
  1102. }
  1103. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  1104. struct kvm_mmu_page *sp)
  1105. {
  1106. unsigned i;
  1107. u64 *pt;
  1108. u64 ent;
  1109. pt = sp->spt;
  1110. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  1111. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1112. if (is_shadow_present_pte(pt[i]))
  1113. rmap_remove(kvm, &pt[i]);
  1114. pt[i] = shadow_trap_nonpresent_pte;
  1115. }
  1116. return;
  1117. }
  1118. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1119. ent = pt[i];
  1120. if (is_shadow_present_pte(ent)) {
  1121. if (!is_large_pte(ent)) {
  1122. ent &= PT64_BASE_ADDR_MASK;
  1123. mmu_page_remove_parent_pte(page_header(ent),
  1124. &pt[i]);
  1125. } else {
  1126. --kvm->stat.lpages;
  1127. rmap_remove(kvm, &pt[i]);
  1128. }
  1129. }
  1130. pt[i] = shadow_trap_nonpresent_pte;
  1131. }
  1132. }
  1133. static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
  1134. {
  1135. mmu_page_remove_parent_pte(sp, parent_pte);
  1136. }
  1137. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  1138. {
  1139. int i;
  1140. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  1141. if (kvm->vcpus[i])
  1142. kvm->vcpus[i]->arch.last_pte_updated = NULL;
  1143. }
  1144. static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
  1145. {
  1146. u64 *parent_pte;
  1147. while (sp->multimapped || sp->parent_pte) {
  1148. if (!sp->multimapped)
  1149. parent_pte = sp->parent_pte;
  1150. else {
  1151. struct kvm_pte_chain *chain;
  1152. chain = container_of(sp->parent_ptes.first,
  1153. struct kvm_pte_chain, link);
  1154. parent_pte = chain->parent_ptes[0];
  1155. }
  1156. BUG_ON(!parent_pte);
  1157. kvm_mmu_put_page(sp, parent_pte);
  1158. set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
  1159. }
  1160. }
  1161. static int mmu_zap_unsync_children(struct kvm *kvm,
  1162. struct kvm_mmu_page *parent)
  1163. {
  1164. int i, zapped = 0;
  1165. struct mmu_page_path parents;
  1166. struct kvm_mmu_pages pages;
  1167. if (parent->role.level == PT_PAGE_TABLE_LEVEL)
  1168. return 0;
  1169. kvm_mmu_pages_init(parent, &parents, &pages);
  1170. while (mmu_unsync_walk(parent, &pages)) {
  1171. struct kvm_mmu_page *sp;
  1172. for_each_sp(pages, sp, parents, i) {
  1173. kvm_mmu_zap_page(kvm, sp);
  1174. mmu_pages_clear_parents(&parents);
  1175. }
  1176. zapped += pages.nr;
  1177. kvm_mmu_pages_init(parent, &parents, &pages);
  1178. }
  1179. return zapped;
  1180. }
  1181. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  1182. {
  1183. int ret;
  1184. ++kvm->stat.mmu_shadow_zapped;
  1185. ret = mmu_zap_unsync_children(kvm, sp);
  1186. kvm_mmu_page_unlink_children(kvm, sp);
  1187. kvm_mmu_unlink_parents(kvm, sp);
  1188. kvm_flush_remote_tlbs(kvm);
  1189. if (!sp->role.invalid && !sp->role.direct)
  1190. unaccount_shadowed(kvm, sp->gfn);
  1191. if (sp->unsync)
  1192. kvm_unlink_unsync_page(kvm, sp);
  1193. if (!sp->root_count) {
  1194. hlist_del(&sp->hash_link);
  1195. kvm_mmu_free_page(kvm, sp);
  1196. } else {
  1197. sp->role.invalid = 1;
  1198. list_move(&sp->link, &kvm->arch.active_mmu_pages);
  1199. kvm_reload_remote_mmus(kvm);
  1200. }
  1201. kvm_mmu_reset_last_pte_updated(kvm);
  1202. return ret;
  1203. }
  1204. /*
  1205. * Changing the number of mmu pages allocated to the vm
  1206. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  1207. */
  1208. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  1209. {
  1210. /*
  1211. * If we set the number of mmu pages to be smaller be than the
  1212. * number of actived pages , we must to free some mmu pages before we
  1213. * change the value
  1214. */
  1215. if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
  1216. kvm_nr_mmu_pages) {
  1217. int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
  1218. - kvm->arch.n_free_mmu_pages;
  1219. while (n_used_mmu_pages > kvm_nr_mmu_pages) {
  1220. struct kvm_mmu_page *page;
  1221. page = container_of(kvm->arch.active_mmu_pages.prev,
  1222. struct kvm_mmu_page, link);
  1223. kvm_mmu_zap_page(kvm, page);
  1224. n_used_mmu_pages--;
  1225. }
  1226. kvm->arch.n_free_mmu_pages = 0;
  1227. }
  1228. else
  1229. kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
  1230. - kvm->arch.n_alloc_mmu_pages;
  1231. kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
  1232. }
  1233. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  1234. {
  1235. unsigned index;
  1236. struct hlist_head *bucket;
  1237. struct kvm_mmu_page *sp;
  1238. struct hlist_node *node, *n;
  1239. int r;
  1240. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  1241. r = 0;
  1242. index = kvm_page_table_hashfn(gfn);
  1243. bucket = &kvm->arch.mmu_page_hash[index];
  1244. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
  1245. if (sp->gfn == gfn && !sp->role.direct) {
  1246. pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
  1247. sp->role.word);
  1248. r = 1;
  1249. if (kvm_mmu_zap_page(kvm, sp))
  1250. n = bucket->first;
  1251. }
  1252. return r;
  1253. }
  1254. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  1255. {
  1256. unsigned index;
  1257. struct hlist_head *bucket;
  1258. struct kvm_mmu_page *sp;
  1259. struct hlist_node *node, *nn;
  1260. index = kvm_page_table_hashfn(gfn);
  1261. bucket = &kvm->arch.mmu_page_hash[index];
  1262. hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
  1263. if (sp->gfn == gfn && !sp->role.direct
  1264. && !sp->role.invalid) {
  1265. pgprintk("%s: zap %lx %x\n",
  1266. __func__, gfn, sp->role.word);
  1267. kvm_mmu_zap_page(kvm, sp);
  1268. }
  1269. }
  1270. }
  1271. static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
  1272. {
  1273. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
  1274. struct kvm_mmu_page *sp = page_header(__pa(pte));
  1275. __set_bit(slot, sp->slot_bitmap);
  1276. }
  1277. static void mmu_convert_notrap(struct kvm_mmu_page *sp)
  1278. {
  1279. int i;
  1280. u64 *pt = sp->spt;
  1281. if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
  1282. return;
  1283. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1284. if (pt[i] == shadow_notrap_nonpresent_pte)
  1285. set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
  1286. }
  1287. }
  1288. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  1289. {
  1290. struct page *page;
  1291. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  1292. if (gpa == UNMAPPED_GVA)
  1293. return NULL;
  1294. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1295. return page;
  1296. }
  1297. /*
  1298. * The function is based on mtrr_type_lookup() in
  1299. * arch/x86/kernel/cpu/mtrr/generic.c
  1300. */
  1301. static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
  1302. u64 start, u64 end)
  1303. {
  1304. int i;
  1305. u64 base, mask;
  1306. u8 prev_match, curr_match;
  1307. int num_var_ranges = KVM_NR_VAR_MTRR;
  1308. if (!mtrr_state->enabled)
  1309. return 0xFF;
  1310. /* Make end inclusive end, instead of exclusive */
  1311. end--;
  1312. /* Look in fixed ranges. Just return the type as per start */
  1313. if (mtrr_state->have_fixed && (start < 0x100000)) {
  1314. int idx;
  1315. if (start < 0x80000) {
  1316. idx = 0;
  1317. idx += (start >> 16);
  1318. return mtrr_state->fixed_ranges[idx];
  1319. } else if (start < 0xC0000) {
  1320. idx = 1 * 8;
  1321. idx += ((start - 0x80000) >> 14);
  1322. return mtrr_state->fixed_ranges[idx];
  1323. } else if (start < 0x1000000) {
  1324. idx = 3 * 8;
  1325. idx += ((start - 0xC0000) >> 12);
  1326. return mtrr_state->fixed_ranges[idx];
  1327. }
  1328. }
  1329. /*
  1330. * Look in variable ranges
  1331. * Look of multiple ranges matching this address and pick type
  1332. * as per MTRR precedence
  1333. */
  1334. if (!(mtrr_state->enabled & 2))
  1335. return mtrr_state->def_type;
  1336. prev_match = 0xFF;
  1337. for (i = 0; i < num_var_ranges; ++i) {
  1338. unsigned short start_state, end_state;
  1339. if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
  1340. continue;
  1341. base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
  1342. (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
  1343. mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
  1344. (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
  1345. start_state = ((start & mask) == (base & mask));
  1346. end_state = ((end & mask) == (base & mask));
  1347. if (start_state != end_state)
  1348. return 0xFE;
  1349. if ((start & mask) != (base & mask))
  1350. continue;
  1351. curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
  1352. if (prev_match == 0xFF) {
  1353. prev_match = curr_match;
  1354. continue;
  1355. }
  1356. if (prev_match == MTRR_TYPE_UNCACHABLE ||
  1357. curr_match == MTRR_TYPE_UNCACHABLE)
  1358. return MTRR_TYPE_UNCACHABLE;
  1359. if ((prev_match == MTRR_TYPE_WRBACK &&
  1360. curr_match == MTRR_TYPE_WRTHROUGH) ||
  1361. (prev_match == MTRR_TYPE_WRTHROUGH &&
  1362. curr_match == MTRR_TYPE_WRBACK)) {
  1363. prev_match = MTRR_TYPE_WRTHROUGH;
  1364. curr_match = MTRR_TYPE_WRTHROUGH;
  1365. }
  1366. if (prev_match != curr_match)
  1367. return MTRR_TYPE_UNCACHABLE;
  1368. }
  1369. if (prev_match != 0xFF)
  1370. return prev_match;
  1371. return mtrr_state->def_type;
  1372. }
  1373. static u8 get_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
  1374. {
  1375. u8 mtrr;
  1376. mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
  1377. (gfn << PAGE_SHIFT) + PAGE_SIZE);
  1378. if (mtrr == 0xfe || mtrr == 0xff)
  1379. mtrr = MTRR_TYPE_WRBACK;
  1380. return mtrr;
  1381. }
  1382. static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  1383. {
  1384. unsigned index;
  1385. struct hlist_head *bucket;
  1386. struct kvm_mmu_page *s;
  1387. struct hlist_node *node, *n;
  1388. index = kvm_page_table_hashfn(sp->gfn);
  1389. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1390. /* don't unsync if pagetable is shadowed with multiple roles */
  1391. hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
  1392. if (s->gfn != sp->gfn || s->role.direct)
  1393. continue;
  1394. if (s->role.word != sp->role.word)
  1395. return 1;
  1396. }
  1397. ++vcpu->kvm->stat.mmu_unsync;
  1398. sp->unsync = 1;
  1399. if (sp->global) {
  1400. list_add(&sp->oos_link, &vcpu->kvm->arch.oos_global_pages);
  1401. ++vcpu->kvm->stat.mmu_unsync_global;
  1402. } else
  1403. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1404. mmu_convert_notrap(sp);
  1405. return 0;
  1406. }
  1407. static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
  1408. bool can_unsync)
  1409. {
  1410. struct kvm_mmu_page *shadow;
  1411. shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
  1412. if (shadow) {
  1413. if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
  1414. return 1;
  1415. if (shadow->unsync)
  1416. return 0;
  1417. if (can_unsync && oos_shadow)
  1418. return kvm_unsync_page(vcpu, shadow);
  1419. return 1;
  1420. }
  1421. return 0;
  1422. }
  1423. static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  1424. unsigned pte_access, int user_fault,
  1425. int write_fault, int dirty, int largepage,
  1426. int global, gfn_t gfn, pfn_t pfn, bool speculative,
  1427. bool can_unsync)
  1428. {
  1429. u64 spte;
  1430. int ret = 0;
  1431. u64 mt_mask = shadow_mt_mask;
  1432. struct kvm_mmu_page *sp = page_header(__pa(shadow_pte));
  1433. if (!global && sp->global) {
  1434. sp->global = 0;
  1435. if (sp->unsync) {
  1436. kvm_unlink_unsync_global(vcpu->kvm, sp);
  1437. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1438. }
  1439. }
  1440. /*
  1441. * We don't set the accessed bit, since we sometimes want to see
  1442. * whether the guest actually used the pte (in order to detect
  1443. * demand paging).
  1444. */
  1445. spte = shadow_base_present_pte | shadow_dirty_mask;
  1446. if (!speculative)
  1447. spte |= shadow_accessed_mask;
  1448. if (!dirty)
  1449. pte_access &= ~ACC_WRITE_MASK;
  1450. if (pte_access & ACC_EXEC_MASK)
  1451. spte |= shadow_x_mask;
  1452. else
  1453. spte |= shadow_nx_mask;
  1454. if (pte_access & ACC_USER_MASK)
  1455. spte |= shadow_user_mask;
  1456. if (largepage)
  1457. spte |= PT_PAGE_SIZE_MASK;
  1458. if (mt_mask) {
  1459. if (!kvm_is_mmio_pfn(pfn)) {
  1460. mt_mask = get_memory_type(vcpu, gfn) <<
  1461. kvm_x86_ops->get_mt_mask_shift();
  1462. mt_mask |= VMX_EPT_IGMT_BIT;
  1463. } else
  1464. mt_mask = MTRR_TYPE_UNCACHABLE <<
  1465. kvm_x86_ops->get_mt_mask_shift();
  1466. spte |= mt_mask;
  1467. }
  1468. spte |= (u64)pfn << PAGE_SHIFT;
  1469. if ((pte_access & ACC_WRITE_MASK)
  1470. || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
  1471. if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
  1472. ret = 1;
  1473. spte = shadow_trap_nonpresent_pte;
  1474. goto set_pte;
  1475. }
  1476. spte |= PT_WRITABLE_MASK;
  1477. /*
  1478. * Optimization: for pte sync, if spte was writable the hash
  1479. * lookup is unnecessary (and expensive). Write protection
  1480. * is responsibility of mmu_get_page / kvm_sync_page.
  1481. * Same reasoning can be applied to dirty page accounting.
  1482. */
  1483. if (!can_unsync && is_writeble_pte(*shadow_pte))
  1484. goto set_pte;
  1485. if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
  1486. pgprintk("%s: found shadow page for %lx, marking ro\n",
  1487. __func__, gfn);
  1488. ret = 1;
  1489. pte_access &= ~ACC_WRITE_MASK;
  1490. if (is_writeble_pte(spte))
  1491. spte &= ~PT_WRITABLE_MASK;
  1492. }
  1493. }
  1494. if (pte_access & ACC_WRITE_MASK)
  1495. mark_page_dirty(vcpu->kvm, gfn);
  1496. set_pte:
  1497. set_shadow_pte(shadow_pte, spte);
  1498. return ret;
  1499. }
  1500. static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  1501. unsigned pt_access, unsigned pte_access,
  1502. int user_fault, int write_fault, int dirty,
  1503. int *ptwrite, int largepage, int global,
  1504. gfn_t gfn, pfn_t pfn, bool speculative)
  1505. {
  1506. int was_rmapped = 0;
  1507. int was_writeble = is_writeble_pte(*shadow_pte);
  1508. pgprintk("%s: spte %llx access %x write_fault %d"
  1509. " user_fault %d gfn %lx\n",
  1510. __func__, *shadow_pte, pt_access,
  1511. write_fault, user_fault, gfn);
  1512. if (is_rmap_pte(*shadow_pte)) {
  1513. /*
  1514. * If we overwrite a PTE page pointer with a 2MB PMD, unlink
  1515. * the parent of the now unreachable PTE.
  1516. */
  1517. if (largepage && !is_large_pte(*shadow_pte)) {
  1518. struct kvm_mmu_page *child;
  1519. u64 pte = *shadow_pte;
  1520. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1521. mmu_page_remove_parent_pte(child, shadow_pte);
  1522. } else if (pfn != spte_to_pfn(*shadow_pte)) {
  1523. pgprintk("hfn old %lx new %lx\n",
  1524. spte_to_pfn(*shadow_pte), pfn);
  1525. rmap_remove(vcpu->kvm, shadow_pte);
  1526. } else
  1527. was_rmapped = 1;
  1528. }
  1529. if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
  1530. dirty, largepage, global, gfn, pfn, speculative, true)) {
  1531. if (write_fault)
  1532. *ptwrite = 1;
  1533. kvm_x86_ops->tlb_flush(vcpu);
  1534. }
  1535. pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
  1536. pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
  1537. is_large_pte(*shadow_pte)? "2MB" : "4kB",
  1538. is_present_pte(*shadow_pte)?"RW":"R", gfn,
  1539. *shadow_pte, shadow_pte);
  1540. if (!was_rmapped && is_large_pte(*shadow_pte))
  1541. ++vcpu->kvm->stat.lpages;
  1542. page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
  1543. if (!was_rmapped) {
  1544. rmap_add(vcpu, shadow_pte, gfn, largepage);
  1545. if (!is_rmap_pte(*shadow_pte))
  1546. kvm_release_pfn_clean(pfn);
  1547. } else {
  1548. if (was_writeble)
  1549. kvm_release_pfn_dirty(pfn);
  1550. else
  1551. kvm_release_pfn_clean(pfn);
  1552. }
  1553. if (speculative) {
  1554. vcpu->arch.last_pte_updated = shadow_pte;
  1555. vcpu->arch.last_pte_gfn = gfn;
  1556. }
  1557. }
  1558. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  1559. {
  1560. }
  1561. static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
  1562. int largepage, gfn_t gfn, pfn_t pfn)
  1563. {
  1564. struct kvm_shadow_walk_iterator iterator;
  1565. struct kvm_mmu_page *sp;
  1566. int pt_write = 0;
  1567. gfn_t pseudo_gfn;
  1568. for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
  1569. if (iterator.level == PT_PAGE_TABLE_LEVEL
  1570. || (largepage && iterator.level == PT_DIRECTORY_LEVEL)) {
  1571. mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
  1572. 0, write, 1, &pt_write,
  1573. largepage, 0, gfn, pfn, false);
  1574. ++vcpu->stat.pf_fixed;
  1575. break;
  1576. }
  1577. if (*iterator.sptep == shadow_trap_nonpresent_pte) {
  1578. pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
  1579. sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
  1580. iterator.level - 1,
  1581. 1, ACC_ALL, iterator.sptep);
  1582. if (!sp) {
  1583. pgprintk("nonpaging_map: ENOMEM\n");
  1584. kvm_release_pfn_clean(pfn);
  1585. return -ENOMEM;
  1586. }
  1587. set_shadow_pte(iterator.sptep,
  1588. __pa(sp->spt)
  1589. | PT_PRESENT_MASK | PT_WRITABLE_MASK
  1590. | shadow_user_mask | shadow_x_mask);
  1591. }
  1592. }
  1593. return pt_write;
  1594. }
  1595. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
  1596. {
  1597. int r;
  1598. int largepage = 0;
  1599. pfn_t pfn;
  1600. unsigned long mmu_seq;
  1601. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1602. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1603. largepage = 1;
  1604. }
  1605. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1606. smp_rmb();
  1607. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1608. /* mmio */
  1609. if (is_error_pfn(pfn)) {
  1610. kvm_release_pfn_clean(pfn);
  1611. return 1;
  1612. }
  1613. spin_lock(&vcpu->kvm->mmu_lock);
  1614. if (mmu_notifier_retry(vcpu, mmu_seq))
  1615. goto out_unlock;
  1616. kvm_mmu_free_some_pages(vcpu);
  1617. r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
  1618. spin_unlock(&vcpu->kvm->mmu_lock);
  1619. return r;
  1620. out_unlock:
  1621. spin_unlock(&vcpu->kvm->mmu_lock);
  1622. kvm_release_pfn_clean(pfn);
  1623. return 0;
  1624. }
  1625. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  1626. {
  1627. int i;
  1628. struct kvm_mmu_page *sp;
  1629. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1630. return;
  1631. spin_lock(&vcpu->kvm->mmu_lock);
  1632. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1633. hpa_t root = vcpu->arch.mmu.root_hpa;
  1634. sp = page_header(root);
  1635. --sp->root_count;
  1636. if (!sp->root_count && sp->role.invalid)
  1637. kvm_mmu_zap_page(vcpu->kvm, sp);
  1638. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1639. spin_unlock(&vcpu->kvm->mmu_lock);
  1640. return;
  1641. }
  1642. for (i = 0; i < 4; ++i) {
  1643. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1644. if (root) {
  1645. root &= PT64_BASE_ADDR_MASK;
  1646. sp = page_header(root);
  1647. --sp->root_count;
  1648. if (!sp->root_count && sp->role.invalid)
  1649. kvm_mmu_zap_page(vcpu->kvm, sp);
  1650. }
  1651. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1652. }
  1653. spin_unlock(&vcpu->kvm->mmu_lock);
  1654. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1655. }
  1656. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  1657. {
  1658. int i;
  1659. gfn_t root_gfn;
  1660. struct kvm_mmu_page *sp;
  1661. int direct = 0;
  1662. root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
  1663. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1664. hpa_t root = vcpu->arch.mmu.root_hpa;
  1665. ASSERT(!VALID_PAGE(root));
  1666. if (tdp_enabled)
  1667. direct = 1;
  1668. sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
  1669. PT64_ROOT_LEVEL, direct,
  1670. ACC_ALL, NULL);
  1671. root = __pa(sp->spt);
  1672. ++sp->root_count;
  1673. vcpu->arch.mmu.root_hpa = root;
  1674. return;
  1675. }
  1676. direct = !is_paging(vcpu);
  1677. if (tdp_enabled)
  1678. direct = 1;
  1679. for (i = 0; i < 4; ++i) {
  1680. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1681. ASSERT(!VALID_PAGE(root));
  1682. if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
  1683. if (!is_present_pte(vcpu->arch.pdptrs[i])) {
  1684. vcpu->arch.mmu.pae_root[i] = 0;
  1685. continue;
  1686. }
  1687. root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
  1688. } else if (vcpu->arch.mmu.root_level == 0)
  1689. root_gfn = 0;
  1690. sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  1691. PT32_ROOT_LEVEL, direct,
  1692. ACC_ALL, NULL);
  1693. root = __pa(sp->spt);
  1694. ++sp->root_count;
  1695. vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
  1696. }
  1697. vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
  1698. }
  1699. static void mmu_sync_roots(struct kvm_vcpu *vcpu)
  1700. {
  1701. int i;
  1702. struct kvm_mmu_page *sp;
  1703. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1704. return;
  1705. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1706. hpa_t root = vcpu->arch.mmu.root_hpa;
  1707. sp = page_header(root);
  1708. mmu_sync_children(vcpu, sp);
  1709. return;
  1710. }
  1711. for (i = 0; i < 4; ++i) {
  1712. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1713. if (root) {
  1714. root &= PT64_BASE_ADDR_MASK;
  1715. sp = page_header(root);
  1716. mmu_sync_children(vcpu, sp);
  1717. }
  1718. }
  1719. }
  1720. static void mmu_sync_global(struct kvm_vcpu *vcpu)
  1721. {
  1722. struct kvm *kvm = vcpu->kvm;
  1723. struct kvm_mmu_page *sp, *n;
  1724. list_for_each_entry_safe(sp, n, &kvm->arch.oos_global_pages, oos_link)
  1725. kvm_sync_page(vcpu, sp);
  1726. }
  1727. void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
  1728. {
  1729. spin_lock(&vcpu->kvm->mmu_lock);
  1730. mmu_sync_roots(vcpu);
  1731. spin_unlock(&vcpu->kvm->mmu_lock);
  1732. }
  1733. void kvm_mmu_sync_global(struct kvm_vcpu *vcpu)
  1734. {
  1735. spin_lock(&vcpu->kvm->mmu_lock);
  1736. mmu_sync_global(vcpu);
  1737. spin_unlock(&vcpu->kvm->mmu_lock);
  1738. }
  1739. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  1740. {
  1741. return vaddr;
  1742. }
  1743. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  1744. u32 error_code)
  1745. {
  1746. gfn_t gfn;
  1747. int r;
  1748. pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
  1749. r = mmu_topup_memory_caches(vcpu);
  1750. if (r)
  1751. return r;
  1752. ASSERT(vcpu);
  1753. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1754. gfn = gva >> PAGE_SHIFT;
  1755. return nonpaging_map(vcpu, gva & PAGE_MASK,
  1756. error_code & PFERR_WRITE_MASK, gfn);
  1757. }
  1758. static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
  1759. u32 error_code)
  1760. {
  1761. pfn_t pfn;
  1762. int r;
  1763. int largepage = 0;
  1764. gfn_t gfn = gpa >> PAGE_SHIFT;
  1765. unsigned long mmu_seq;
  1766. ASSERT(vcpu);
  1767. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1768. r = mmu_topup_memory_caches(vcpu);
  1769. if (r)
  1770. return r;
  1771. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1772. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1773. largepage = 1;
  1774. }
  1775. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1776. smp_rmb();
  1777. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1778. if (is_error_pfn(pfn)) {
  1779. kvm_release_pfn_clean(pfn);
  1780. return 1;
  1781. }
  1782. spin_lock(&vcpu->kvm->mmu_lock);
  1783. if (mmu_notifier_retry(vcpu, mmu_seq))
  1784. goto out_unlock;
  1785. kvm_mmu_free_some_pages(vcpu);
  1786. r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
  1787. largepage, gfn, pfn);
  1788. spin_unlock(&vcpu->kvm->mmu_lock);
  1789. return r;
  1790. out_unlock:
  1791. spin_unlock(&vcpu->kvm->mmu_lock);
  1792. kvm_release_pfn_clean(pfn);
  1793. return 0;
  1794. }
  1795. static void nonpaging_free(struct kvm_vcpu *vcpu)
  1796. {
  1797. mmu_free_roots(vcpu);
  1798. }
  1799. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  1800. {
  1801. struct kvm_mmu *context = &vcpu->arch.mmu;
  1802. context->new_cr3 = nonpaging_new_cr3;
  1803. context->page_fault = nonpaging_page_fault;
  1804. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1805. context->free = nonpaging_free;
  1806. context->prefetch_page = nonpaging_prefetch_page;
  1807. context->sync_page = nonpaging_sync_page;
  1808. context->invlpg = nonpaging_invlpg;
  1809. context->root_level = 0;
  1810. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1811. context->root_hpa = INVALID_PAGE;
  1812. return 0;
  1813. }
  1814. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  1815. {
  1816. ++vcpu->stat.tlb_flush;
  1817. kvm_x86_ops->tlb_flush(vcpu);
  1818. }
  1819. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  1820. {
  1821. pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
  1822. mmu_free_roots(vcpu);
  1823. }
  1824. static void inject_page_fault(struct kvm_vcpu *vcpu,
  1825. u64 addr,
  1826. u32 err_code)
  1827. {
  1828. kvm_inject_page_fault(vcpu, addr, err_code);
  1829. }
  1830. static void paging_free(struct kvm_vcpu *vcpu)
  1831. {
  1832. nonpaging_free(vcpu);
  1833. }
  1834. static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
  1835. {
  1836. int bit7;
  1837. bit7 = (gpte >> 7) & 1;
  1838. return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
  1839. }
  1840. #define PTTYPE 64
  1841. #include "paging_tmpl.h"
  1842. #undef PTTYPE
  1843. #define PTTYPE 32
  1844. #include "paging_tmpl.h"
  1845. #undef PTTYPE
  1846. static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
  1847. {
  1848. struct kvm_mmu *context = &vcpu->arch.mmu;
  1849. int maxphyaddr = cpuid_maxphyaddr(vcpu);
  1850. u64 exb_bit_rsvd = 0;
  1851. if (!is_nx(vcpu))
  1852. exb_bit_rsvd = rsvd_bits(63, 63);
  1853. switch (level) {
  1854. case PT32_ROOT_LEVEL:
  1855. /* no rsvd bits for 2 level 4K page table entries */
  1856. context->rsvd_bits_mask[0][1] = 0;
  1857. context->rsvd_bits_mask[0][0] = 0;
  1858. if (is_cpuid_PSE36())
  1859. /* 36bits PSE 4MB page */
  1860. context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
  1861. else
  1862. /* 32 bits PSE 4MB page */
  1863. context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
  1864. context->rsvd_bits_mask[1][0] = ~0ull;
  1865. break;
  1866. case PT32E_ROOT_LEVEL:
  1867. context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
  1868. rsvd_bits(maxphyaddr, 62); /* PDE */
  1869. context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
  1870. rsvd_bits(maxphyaddr, 62); /* PTE */
  1871. context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
  1872. rsvd_bits(maxphyaddr, 62) |
  1873. rsvd_bits(13, 20); /* large page */
  1874. context->rsvd_bits_mask[1][0] = ~0ull;
  1875. break;
  1876. case PT64_ROOT_LEVEL:
  1877. context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
  1878. rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
  1879. context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
  1880. rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
  1881. context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
  1882. rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
  1883. context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
  1884. rsvd_bits(maxphyaddr, 51);
  1885. context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
  1886. context->rsvd_bits_mask[1][2] = context->rsvd_bits_mask[0][2];
  1887. context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
  1888. rsvd_bits(maxphyaddr, 51) | rsvd_bits(13, 20);
  1889. context->rsvd_bits_mask[1][0] = ~0ull;
  1890. break;
  1891. }
  1892. }
  1893. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  1894. {
  1895. struct kvm_mmu *context = &vcpu->arch.mmu;
  1896. ASSERT(is_pae(vcpu));
  1897. context->new_cr3 = paging_new_cr3;
  1898. context->page_fault = paging64_page_fault;
  1899. context->gva_to_gpa = paging64_gva_to_gpa;
  1900. context->prefetch_page = paging64_prefetch_page;
  1901. context->sync_page = paging64_sync_page;
  1902. context->invlpg = paging64_invlpg;
  1903. context->free = paging_free;
  1904. context->root_level = level;
  1905. context->shadow_root_level = level;
  1906. context->root_hpa = INVALID_PAGE;
  1907. return 0;
  1908. }
  1909. static int paging64_init_context(struct kvm_vcpu *vcpu)
  1910. {
  1911. reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
  1912. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  1913. }
  1914. static int paging32_init_context(struct kvm_vcpu *vcpu)
  1915. {
  1916. struct kvm_mmu *context = &vcpu->arch.mmu;
  1917. reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
  1918. context->new_cr3 = paging_new_cr3;
  1919. context->page_fault = paging32_page_fault;
  1920. context->gva_to_gpa = paging32_gva_to_gpa;
  1921. context->free = paging_free;
  1922. context->prefetch_page = paging32_prefetch_page;
  1923. context->sync_page = paging32_sync_page;
  1924. context->invlpg = paging32_invlpg;
  1925. context->root_level = PT32_ROOT_LEVEL;
  1926. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1927. context->root_hpa = INVALID_PAGE;
  1928. return 0;
  1929. }
  1930. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  1931. {
  1932. reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
  1933. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  1934. }
  1935. static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
  1936. {
  1937. struct kvm_mmu *context = &vcpu->arch.mmu;
  1938. context->new_cr3 = nonpaging_new_cr3;
  1939. context->page_fault = tdp_page_fault;
  1940. context->free = nonpaging_free;
  1941. context->prefetch_page = nonpaging_prefetch_page;
  1942. context->sync_page = nonpaging_sync_page;
  1943. context->invlpg = nonpaging_invlpg;
  1944. context->shadow_root_level = kvm_x86_ops->get_tdp_level();
  1945. context->root_hpa = INVALID_PAGE;
  1946. if (!is_paging(vcpu)) {
  1947. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1948. context->root_level = 0;
  1949. } else if (is_long_mode(vcpu)) {
  1950. reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
  1951. context->gva_to_gpa = paging64_gva_to_gpa;
  1952. context->root_level = PT64_ROOT_LEVEL;
  1953. } else if (is_pae(vcpu)) {
  1954. reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
  1955. context->gva_to_gpa = paging64_gva_to_gpa;
  1956. context->root_level = PT32E_ROOT_LEVEL;
  1957. } else {
  1958. reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
  1959. context->gva_to_gpa = paging32_gva_to_gpa;
  1960. context->root_level = PT32_ROOT_LEVEL;
  1961. }
  1962. return 0;
  1963. }
  1964. static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
  1965. {
  1966. int r;
  1967. ASSERT(vcpu);
  1968. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1969. if (!is_paging(vcpu))
  1970. r = nonpaging_init_context(vcpu);
  1971. else if (is_long_mode(vcpu))
  1972. r = paging64_init_context(vcpu);
  1973. else if (is_pae(vcpu))
  1974. r = paging32E_init_context(vcpu);
  1975. else
  1976. r = paging32_init_context(vcpu);
  1977. vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
  1978. return r;
  1979. }
  1980. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  1981. {
  1982. vcpu->arch.update_pte.pfn = bad_pfn;
  1983. if (tdp_enabled)
  1984. return init_kvm_tdp_mmu(vcpu);
  1985. else
  1986. return init_kvm_softmmu(vcpu);
  1987. }
  1988. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  1989. {
  1990. ASSERT(vcpu);
  1991. if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
  1992. vcpu->arch.mmu.free(vcpu);
  1993. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1994. }
  1995. }
  1996. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  1997. {
  1998. destroy_kvm_mmu(vcpu);
  1999. return init_kvm_mmu(vcpu);
  2000. }
  2001. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  2002. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  2003. {
  2004. int r;
  2005. r = mmu_topup_memory_caches(vcpu);
  2006. if (r)
  2007. goto out;
  2008. spin_lock(&vcpu->kvm->mmu_lock);
  2009. kvm_mmu_free_some_pages(vcpu);
  2010. mmu_alloc_roots(vcpu);
  2011. mmu_sync_roots(vcpu);
  2012. spin_unlock(&vcpu->kvm->mmu_lock);
  2013. kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
  2014. kvm_mmu_flush_tlb(vcpu);
  2015. out:
  2016. return r;
  2017. }
  2018. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  2019. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  2020. {
  2021. mmu_free_roots(vcpu);
  2022. }
  2023. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  2024. struct kvm_mmu_page *sp,
  2025. u64 *spte)
  2026. {
  2027. u64 pte;
  2028. struct kvm_mmu_page *child;
  2029. pte = *spte;
  2030. if (is_shadow_present_pte(pte)) {
  2031. if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
  2032. is_large_pte(pte))
  2033. rmap_remove(vcpu->kvm, spte);
  2034. else {
  2035. child = page_header(pte & PT64_BASE_ADDR_MASK);
  2036. mmu_page_remove_parent_pte(child, spte);
  2037. }
  2038. }
  2039. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  2040. if (is_large_pte(pte))
  2041. --vcpu->kvm->stat.lpages;
  2042. }
  2043. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  2044. struct kvm_mmu_page *sp,
  2045. u64 *spte,
  2046. const void *new)
  2047. {
  2048. if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
  2049. if (!vcpu->arch.update_pte.largepage ||
  2050. sp->role.glevels == PT32_ROOT_LEVEL) {
  2051. ++vcpu->kvm->stat.mmu_pde_zapped;
  2052. return;
  2053. }
  2054. }
  2055. ++vcpu->kvm->stat.mmu_pte_updated;
  2056. if (sp->role.glevels == PT32_ROOT_LEVEL)
  2057. paging32_update_pte(vcpu, sp, spte, new);
  2058. else
  2059. paging64_update_pte(vcpu, sp, spte, new);
  2060. }
  2061. static bool need_remote_flush(u64 old, u64 new)
  2062. {
  2063. if (!is_shadow_present_pte(old))
  2064. return false;
  2065. if (!is_shadow_present_pte(new))
  2066. return true;
  2067. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  2068. return true;
  2069. old ^= PT64_NX_MASK;
  2070. new ^= PT64_NX_MASK;
  2071. return (old & ~new & PT64_PERM_MASK) != 0;
  2072. }
  2073. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  2074. {
  2075. if (need_remote_flush(old, new))
  2076. kvm_flush_remote_tlbs(vcpu->kvm);
  2077. else
  2078. kvm_mmu_flush_tlb(vcpu);
  2079. }
  2080. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  2081. {
  2082. u64 *spte = vcpu->arch.last_pte_updated;
  2083. return !!(spte && (*spte & shadow_accessed_mask));
  2084. }
  2085. static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  2086. const u8 *new, int bytes)
  2087. {
  2088. gfn_t gfn;
  2089. int r;
  2090. u64 gpte = 0;
  2091. pfn_t pfn;
  2092. vcpu->arch.update_pte.largepage = 0;
  2093. if (bytes != 4 && bytes != 8)
  2094. return;
  2095. /*
  2096. * Assume that the pte write on a page table of the same type
  2097. * as the current vcpu paging mode. This is nearly always true
  2098. * (might be false while changing modes). Note it is verified later
  2099. * by update_pte().
  2100. */
  2101. if (is_pae(vcpu)) {
  2102. /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
  2103. if ((bytes == 4) && (gpa % 4 == 0)) {
  2104. r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
  2105. if (r)
  2106. return;
  2107. memcpy((void *)&gpte + (gpa % 8), new, 4);
  2108. } else if ((bytes == 8) && (gpa % 8 == 0)) {
  2109. memcpy((void *)&gpte, new, 8);
  2110. }
  2111. } else {
  2112. if ((bytes == 4) && (gpa % 4 == 0))
  2113. memcpy((void *)&gpte, new, 4);
  2114. }
  2115. if (!is_present_pte(gpte))
  2116. return;
  2117. gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  2118. if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
  2119. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  2120. vcpu->arch.update_pte.largepage = 1;
  2121. }
  2122. vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
  2123. smp_rmb();
  2124. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  2125. if (is_error_pfn(pfn)) {
  2126. kvm_release_pfn_clean(pfn);
  2127. return;
  2128. }
  2129. vcpu->arch.update_pte.gfn = gfn;
  2130. vcpu->arch.update_pte.pfn = pfn;
  2131. }
  2132. static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
  2133. {
  2134. u64 *spte = vcpu->arch.last_pte_updated;
  2135. if (spte
  2136. && vcpu->arch.last_pte_gfn == gfn
  2137. && shadow_accessed_mask
  2138. && !(*spte & shadow_accessed_mask)
  2139. && is_shadow_present_pte(*spte))
  2140. set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  2141. }
  2142. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  2143. const u8 *new, int bytes,
  2144. bool guest_initiated)
  2145. {
  2146. gfn_t gfn = gpa >> PAGE_SHIFT;
  2147. struct kvm_mmu_page *sp;
  2148. struct hlist_node *node, *n;
  2149. struct hlist_head *bucket;
  2150. unsigned index;
  2151. u64 entry, gentry;
  2152. u64 *spte;
  2153. unsigned offset = offset_in_page(gpa);
  2154. unsigned pte_size;
  2155. unsigned page_offset;
  2156. unsigned misaligned;
  2157. unsigned quadrant;
  2158. int level;
  2159. int flooded = 0;
  2160. int npte;
  2161. int r;
  2162. pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
  2163. mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
  2164. spin_lock(&vcpu->kvm->mmu_lock);
  2165. kvm_mmu_access_page(vcpu, gfn);
  2166. kvm_mmu_free_some_pages(vcpu);
  2167. ++vcpu->kvm->stat.mmu_pte_write;
  2168. kvm_mmu_audit(vcpu, "pre pte write");
  2169. if (guest_initiated) {
  2170. if (gfn == vcpu->arch.last_pt_write_gfn
  2171. && !last_updated_pte_accessed(vcpu)) {
  2172. ++vcpu->arch.last_pt_write_count;
  2173. if (vcpu->arch.last_pt_write_count >= 3)
  2174. flooded = 1;
  2175. } else {
  2176. vcpu->arch.last_pt_write_gfn = gfn;
  2177. vcpu->arch.last_pt_write_count = 1;
  2178. vcpu->arch.last_pte_updated = NULL;
  2179. }
  2180. }
  2181. index = kvm_page_table_hashfn(gfn);
  2182. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  2183. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
  2184. if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
  2185. continue;
  2186. pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  2187. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  2188. misaligned |= bytes < 4;
  2189. if (misaligned || flooded) {
  2190. /*
  2191. * Misaligned accesses are too much trouble to fix
  2192. * up; also, they usually indicate a page is not used
  2193. * as a page table.
  2194. *
  2195. * If we're seeing too many writes to a page,
  2196. * it may no longer be a page table, or we may be
  2197. * forking, in which case it is better to unmap the
  2198. * page.
  2199. */
  2200. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  2201. gpa, bytes, sp->role.word);
  2202. if (kvm_mmu_zap_page(vcpu->kvm, sp))
  2203. n = bucket->first;
  2204. ++vcpu->kvm->stat.mmu_flooded;
  2205. continue;
  2206. }
  2207. page_offset = offset;
  2208. level = sp->role.level;
  2209. npte = 1;
  2210. if (sp->role.glevels == PT32_ROOT_LEVEL) {
  2211. page_offset <<= 1; /* 32->64 */
  2212. /*
  2213. * A 32-bit pde maps 4MB while the shadow pdes map
  2214. * only 2MB. So we need to double the offset again
  2215. * and zap two pdes instead of one.
  2216. */
  2217. if (level == PT32_ROOT_LEVEL) {
  2218. page_offset &= ~7; /* kill rounding error */
  2219. page_offset <<= 1;
  2220. npte = 2;
  2221. }
  2222. quadrant = page_offset >> PAGE_SHIFT;
  2223. page_offset &= ~PAGE_MASK;
  2224. if (quadrant != sp->role.quadrant)
  2225. continue;
  2226. }
  2227. spte = &sp->spt[page_offset / sizeof(*spte)];
  2228. if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
  2229. gentry = 0;
  2230. r = kvm_read_guest_atomic(vcpu->kvm,
  2231. gpa & ~(u64)(pte_size - 1),
  2232. &gentry, pte_size);
  2233. new = (const void *)&gentry;
  2234. if (r < 0)
  2235. new = NULL;
  2236. }
  2237. while (npte--) {
  2238. entry = *spte;
  2239. mmu_pte_write_zap_pte(vcpu, sp, spte);
  2240. if (new)
  2241. mmu_pte_write_new_pte(vcpu, sp, spte, new);
  2242. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  2243. ++spte;
  2244. }
  2245. }
  2246. kvm_mmu_audit(vcpu, "post pte write");
  2247. spin_unlock(&vcpu->kvm->mmu_lock);
  2248. if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
  2249. kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
  2250. vcpu->arch.update_pte.pfn = bad_pfn;
  2251. }
  2252. }
  2253. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  2254. {
  2255. gpa_t gpa;
  2256. int r;
  2257. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  2258. spin_lock(&vcpu->kvm->mmu_lock);
  2259. r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  2260. spin_unlock(&vcpu->kvm->mmu_lock);
  2261. return r;
  2262. }
  2263. EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
  2264. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  2265. {
  2266. while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
  2267. struct kvm_mmu_page *sp;
  2268. sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
  2269. struct kvm_mmu_page, link);
  2270. kvm_mmu_zap_page(vcpu->kvm, sp);
  2271. ++vcpu->kvm->stat.mmu_recycled;
  2272. }
  2273. }
  2274. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  2275. {
  2276. int r;
  2277. enum emulation_result er;
  2278. r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
  2279. if (r < 0)
  2280. goto out;
  2281. if (!r) {
  2282. r = 1;
  2283. goto out;
  2284. }
  2285. r = mmu_topup_memory_caches(vcpu);
  2286. if (r)
  2287. goto out;
  2288. er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
  2289. switch (er) {
  2290. case EMULATE_DONE:
  2291. return 1;
  2292. case EMULATE_DO_MMIO:
  2293. ++vcpu->stat.mmio_exits;
  2294. return 0;
  2295. case EMULATE_FAIL:
  2296. kvm_report_emulation_failure(vcpu, "pagetable");
  2297. return 1;
  2298. default:
  2299. BUG();
  2300. }
  2301. out:
  2302. return r;
  2303. }
  2304. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  2305. void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  2306. {
  2307. vcpu->arch.mmu.invlpg(vcpu, gva);
  2308. kvm_mmu_flush_tlb(vcpu);
  2309. ++vcpu->stat.invlpg;
  2310. }
  2311. EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
  2312. void kvm_enable_tdp(void)
  2313. {
  2314. tdp_enabled = true;
  2315. }
  2316. EXPORT_SYMBOL_GPL(kvm_enable_tdp);
  2317. void kvm_disable_tdp(void)
  2318. {
  2319. tdp_enabled = false;
  2320. }
  2321. EXPORT_SYMBOL_GPL(kvm_disable_tdp);
  2322. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  2323. {
  2324. free_page((unsigned long)vcpu->arch.mmu.pae_root);
  2325. }
  2326. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  2327. {
  2328. struct page *page;
  2329. int i;
  2330. ASSERT(vcpu);
  2331. if (vcpu->kvm->arch.n_requested_mmu_pages)
  2332. vcpu->kvm->arch.n_free_mmu_pages =
  2333. vcpu->kvm->arch.n_requested_mmu_pages;
  2334. else
  2335. vcpu->kvm->arch.n_free_mmu_pages =
  2336. vcpu->kvm->arch.n_alloc_mmu_pages;
  2337. /*
  2338. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  2339. * Therefore we need to allocate shadow page tables in the first
  2340. * 4GB of memory, which happens to fit the DMA32 zone.
  2341. */
  2342. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  2343. if (!page)
  2344. goto error_1;
  2345. vcpu->arch.mmu.pae_root = page_address(page);
  2346. for (i = 0; i < 4; ++i)
  2347. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  2348. return 0;
  2349. error_1:
  2350. free_mmu_pages(vcpu);
  2351. return -ENOMEM;
  2352. }
  2353. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  2354. {
  2355. ASSERT(vcpu);
  2356. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2357. return alloc_mmu_pages(vcpu);
  2358. }
  2359. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  2360. {
  2361. ASSERT(vcpu);
  2362. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2363. return init_kvm_mmu(vcpu);
  2364. }
  2365. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  2366. {
  2367. ASSERT(vcpu);
  2368. destroy_kvm_mmu(vcpu);
  2369. free_mmu_pages(vcpu);
  2370. mmu_free_memory_caches(vcpu);
  2371. }
  2372. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  2373. {
  2374. struct kvm_mmu_page *sp;
  2375. spin_lock(&kvm->mmu_lock);
  2376. list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
  2377. int i;
  2378. u64 *pt;
  2379. if (!test_bit(slot, sp->slot_bitmap))
  2380. continue;
  2381. pt = sp->spt;
  2382. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  2383. /* avoid RMW */
  2384. if (pt[i] & PT_WRITABLE_MASK)
  2385. pt[i] &= ~PT_WRITABLE_MASK;
  2386. }
  2387. kvm_flush_remote_tlbs(kvm);
  2388. spin_unlock(&kvm->mmu_lock);
  2389. }
  2390. void kvm_mmu_zap_all(struct kvm *kvm)
  2391. {
  2392. struct kvm_mmu_page *sp, *node;
  2393. spin_lock(&kvm->mmu_lock);
  2394. list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
  2395. if (kvm_mmu_zap_page(kvm, sp))
  2396. node = container_of(kvm->arch.active_mmu_pages.next,
  2397. struct kvm_mmu_page, link);
  2398. spin_unlock(&kvm->mmu_lock);
  2399. kvm_flush_remote_tlbs(kvm);
  2400. }
  2401. static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
  2402. {
  2403. struct kvm_mmu_page *page;
  2404. page = container_of(kvm->arch.active_mmu_pages.prev,
  2405. struct kvm_mmu_page, link);
  2406. kvm_mmu_zap_page(kvm, page);
  2407. }
  2408. static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
  2409. {
  2410. struct kvm *kvm;
  2411. struct kvm *kvm_freed = NULL;
  2412. int cache_count = 0;
  2413. spin_lock(&kvm_lock);
  2414. list_for_each_entry(kvm, &vm_list, vm_list) {
  2415. int npages;
  2416. if (!down_read_trylock(&kvm->slots_lock))
  2417. continue;
  2418. spin_lock(&kvm->mmu_lock);
  2419. npages = kvm->arch.n_alloc_mmu_pages -
  2420. kvm->arch.n_free_mmu_pages;
  2421. cache_count += npages;
  2422. if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
  2423. kvm_mmu_remove_one_alloc_mmu_page(kvm);
  2424. cache_count--;
  2425. kvm_freed = kvm;
  2426. }
  2427. nr_to_scan--;
  2428. spin_unlock(&kvm->mmu_lock);
  2429. up_read(&kvm->slots_lock);
  2430. }
  2431. if (kvm_freed)
  2432. list_move_tail(&kvm_freed->vm_list, &vm_list);
  2433. spin_unlock(&kvm_lock);
  2434. return cache_count;
  2435. }
  2436. static struct shrinker mmu_shrinker = {
  2437. .shrink = mmu_shrink,
  2438. .seeks = DEFAULT_SEEKS * 10,
  2439. };
  2440. static void mmu_destroy_caches(void)
  2441. {
  2442. if (pte_chain_cache)
  2443. kmem_cache_destroy(pte_chain_cache);
  2444. if (rmap_desc_cache)
  2445. kmem_cache_destroy(rmap_desc_cache);
  2446. if (mmu_page_header_cache)
  2447. kmem_cache_destroy(mmu_page_header_cache);
  2448. }
  2449. void kvm_mmu_module_exit(void)
  2450. {
  2451. mmu_destroy_caches();
  2452. unregister_shrinker(&mmu_shrinker);
  2453. }
  2454. int kvm_mmu_module_init(void)
  2455. {
  2456. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  2457. sizeof(struct kvm_pte_chain),
  2458. 0, 0, NULL);
  2459. if (!pte_chain_cache)
  2460. goto nomem;
  2461. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  2462. sizeof(struct kvm_rmap_desc),
  2463. 0, 0, NULL);
  2464. if (!rmap_desc_cache)
  2465. goto nomem;
  2466. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  2467. sizeof(struct kvm_mmu_page),
  2468. 0, 0, NULL);
  2469. if (!mmu_page_header_cache)
  2470. goto nomem;
  2471. register_shrinker(&mmu_shrinker);
  2472. return 0;
  2473. nomem:
  2474. mmu_destroy_caches();
  2475. return -ENOMEM;
  2476. }
  2477. /*
  2478. * Caculate mmu pages needed for kvm.
  2479. */
  2480. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  2481. {
  2482. int i;
  2483. unsigned int nr_mmu_pages;
  2484. unsigned int nr_pages = 0;
  2485. for (i = 0; i < kvm->nmemslots; i++)
  2486. nr_pages += kvm->memslots[i].npages;
  2487. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  2488. nr_mmu_pages = max(nr_mmu_pages,
  2489. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  2490. return nr_mmu_pages;
  2491. }
  2492. static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2493. unsigned len)
  2494. {
  2495. if (len > buffer->len)
  2496. return NULL;
  2497. return buffer->ptr;
  2498. }
  2499. static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2500. unsigned len)
  2501. {
  2502. void *ret;
  2503. ret = pv_mmu_peek_buffer(buffer, len);
  2504. if (!ret)
  2505. return ret;
  2506. buffer->ptr += len;
  2507. buffer->len -= len;
  2508. buffer->processed += len;
  2509. return ret;
  2510. }
  2511. static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
  2512. gpa_t addr, gpa_t value)
  2513. {
  2514. int bytes = 8;
  2515. int r;
  2516. if (!is_long_mode(vcpu) && !is_pae(vcpu))
  2517. bytes = 4;
  2518. r = mmu_topup_memory_caches(vcpu);
  2519. if (r)
  2520. return r;
  2521. if (!emulator_write_phys(vcpu, addr, &value, bytes))
  2522. return -EFAULT;
  2523. return 1;
  2524. }
  2525. static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  2526. {
  2527. kvm_set_cr3(vcpu, vcpu->arch.cr3);
  2528. return 1;
  2529. }
  2530. static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
  2531. {
  2532. spin_lock(&vcpu->kvm->mmu_lock);
  2533. mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
  2534. spin_unlock(&vcpu->kvm->mmu_lock);
  2535. return 1;
  2536. }
  2537. static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
  2538. struct kvm_pv_mmu_op_buffer *buffer)
  2539. {
  2540. struct kvm_mmu_op_header *header;
  2541. header = pv_mmu_peek_buffer(buffer, sizeof *header);
  2542. if (!header)
  2543. return 0;
  2544. switch (header->op) {
  2545. case KVM_MMU_OP_WRITE_PTE: {
  2546. struct kvm_mmu_op_write_pte *wpte;
  2547. wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
  2548. if (!wpte)
  2549. return 0;
  2550. return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
  2551. wpte->pte_val);
  2552. }
  2553. case KVM_MMU_OP_FLUSH_TLB: {
  2554. struct kvm_mmu_op_flush_tlb *ftlb;
  2555. ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
  2556. if (!ftlb)
  2557. return 0;
  2558. return kvm_pv_mmu_flush_tlb(vcpu);
  2559. }
  2560. case KVM_MMU_OP_RELEASE_PT: {
  2561. struct kvm_mmu_op_release_pt *rpt;
  2562. rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
  2563. if (!rpt)
  2564. return 0;
  2565. return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
  2566. }
  2567. default: return 0;
  2568. }
  2569. }
  2570. int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
  2571. gpa_t addr, unsigned long *ret)
  2572. {
  2573. int r;
  2574. struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
  2575. buffer->ptr = buffer->buf;
  2576. buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
  2577. buffer->processed = 0;
  2578. r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
  2579. if (r)
  2580. goto out;
  2581. while (buffer->len) {
  2582. r = kvm_pv_mmu_op_one(vcpu, buffer);
  2583. if (r < 0)
  2584. goto out;
  2585. if (r == 0)
  2586. break;
  2587. }
  2588. r = 1;
  2589. out:
  2590. *ret = buffer->processed;
  2591. return r;
  2592. }
  2593. #ifdef AUDIT
  2594. static const char *audit_msg;
  2595. static gva_t canonicalize(gva_t gva)
  2596. {
  2597. #ifdef CONFIG_X86_64
  2598. gva = (long long)(gva << 16) >> 16;
  2599. #endif
  2600. return gva;
  2601. }
  2602. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  2603. gva_t va, int level)
  2604. {
  2605. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  2606. int i;
  2607. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  2608. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  2609. u64 ent = pt[i];
  2610. if (ent == shadow_trap_nonpresent_pte)
  2611. continue;
  2612. va = canonicalize(va);
  2613. if (level > 1) {
  2614. if (ent == shadow_notrap_nonpresent_pte)
  2615. printk(KERN_ERR "audit: (%s) nontrapping pte"
  2616. " in nonleaf level: levels %d gva %lx"
  2617. " level %d pte %llx\n", audit_msg,
  2618. vcpu->arch.mmu.root_level, va, level, ent);
  2619. audit_mappings_page(vcpu, ent, va, level - 1);
  2620. } else {
  2621. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
  2622. hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
  2623. if (is_shadow_present_pte(ent)
  2624. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  2625. printk(KERN_ERR "xx audit error: (%s) levels %d"
  2626. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  2627. audit_msg, vcpu->arch.mmu.root_level,
  2628. va, gpa, hpa, ent,
  2629. is_shadow_present_pte(ent));
  2630. else if (ent == shadow_notrap_nonpresent_pte
  2631. && !is_error_hpa(hpa))
  2632. printk(KERN_ERR "audit: (%s) notrap shadow,"
  2633. " valid guest gva %lx\n", audit_msg, va);
  2634. kvm_release_pfn_clean(pfn);
  2635. }
  2636. }
  2637. }
  2638. static void audit_mappings(struct kvm_vcpu *vcpu)
  2639. {
  2640. unsigned i;
  2641. if (vcpu->arch.mmu.root_level == 4)
  2642. audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
  2643. else
  2644. for (i = 0; i < 4; ++i)
  2645. if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
  2646. audit_mappings_page(vcpu,
  2647. vcpu->arch.mmu.pae_root[i],
  2648. i << 30,
  2649. 2);
  2650. }
  2651. static int count_rmaps(struct kvm_vcpu *vcpu)
  2652. {
  2653. int nmaps = 0;
  2654. int i, j, k;
  2655. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  2656. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  2657. struct kvm_rmap_desc *d;
  2658. for (j = 0; j < m->npages; ++j) {
  2659. unsigned long *rmapp = &m->rmap[j];
  2660. if (!*rmapp)
  2661. continue;
  2662. if (!(*rmapp & 1)) {
  2663. ++nmaps;
  2664. continue;
  2665. }
  2666. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  2667. while (d) {
  2668. for (k = 0; k < RMAP_EXT; ++k)
  2669. if (d->shadow_ptes[k])
  2670. ++nmaps;
  2671. else
  2672. break;
  2673. d = d->more;
  2674. }
  2675. }
  2676. }
  2677. return nmaps;
  2678. }
  2679. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  2680. {
  2681. int nmaps = 0;
  2682. struct kvm_mmu_page *sp;
  2683. int i;
  2684. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2685. u64 *pt = sp->spt;
  2686. if (sp->role.level != PT_PAGE_TABLE_LEVEL)
  2687. continue;
  2688. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  2689. u64 ent = pt[i];
  2690. if (!(ent & PT_PRESENT_MASK))
  2691. continue;
  2692. if (!(ent & PT_WRITABLE_MASK))
  2693. continue;
  2694. ++nmaps;
  2695. }
  2696. }
  2697. return nmaps;
  2698. }
  2699. static void audit_rmap(struct kvm_vcpu *vcpu)
  2700. {
  2701. int n_rmap = count_rmaps(vcpu);
  2702. int n_actual = count_writable_mappings(vcpu);
  2703. if (n_rmap != n_actual)
  2704. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  2705. __func__, audit_msg, n_rmap, n_actual);
  2706. }
  2707. static void audit_write_protection(struct kvm_vcpu *vcpu)
  2708. {
  2709. struct kvm_mmu_page *sp;
  2710. struct kvm_memory_slot *slot;
  2711. unsigned long *rmapp;
  2712. gfn_t gfn;
  2713. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2714. if (sp->role.direct)
  2715. continue;
  2716. gfn = unalias_gfn(vcpu->kvm, sp->gfn);
  2717. slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
  2718. rmapp = &slot->rmap[gfn - slot->base_gfn];
  2719. if (*rmapp)
  2720. printk(KERN_ERR "%s: (%s) shadow page has writable"
  2721. " mappings: gfn %lx role %x\n",
  2722. __func__, audit_msg, sp->gfn,
  2723. sp->role.word);
  2724. }
  2725. }
  2726. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  2727. {
  2728. int olddbg = dbg;
  2729. dbg = 0;
  2730. audit_msg = msg;
  2731. audit_rmap(vcpu);
  2732. audit_write_protection(vcpu);
  2733. audit_mappings(vcpu);
  2734. dbg = olddbg;
  2735. }
  2736. #endif