iwl4965-base.c 251 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-eeprom.h"
  45. #include "iwl-core.h"
  46. #include "iwl-4965.h"
  47. #include "iwl-helpers.h"
  48. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  49. struct iwl4965_tx_queue *txq);
  50. /******************************************************************************
  51. *
  52. * module boiler plate
  53. *
  54. ******************************************************************************/
  55. /* module parameters */
  56. static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
  57. static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
  58. static int iwl4965_param_disable; /* def: enable radio */
  59. static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
  60. int iwl4965_param_hwcrypto; /* def: using software encryption */
  61. static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
  62. int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
  63. int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
  64. /*
  65. * module name, copyright, version, etc.
  66. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  67. */
  68. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  69. #ifdef CONFIG_IWL4965_DEBUG
  70. #define VD "d"
  71. #else
  72. #define VD
  73. #endif
  74. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  75. #define VS "s"
  76. #else
  77. #define VS
  78. #endif
  79. #define DRV_VERSION IWLWIFI_VERSION VD VS
  80. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  81. MODULE_VERSION(DRV_VERSION);
  82. MODULE_AUTHOR(DRV_COPYRIGHT);
  83. MODULE_LICENSE("GPL");
  84. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  85. {
  86. u16 fc = le16_to_cpu(hdr->frame_control);
  87. int hdr_len = ieee80211_get_hdrlen(fc);
  88. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  89. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  90. return NULL;
  91. }
  92. static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
  93. struct iwl4965_priv *priv, enum ieee80211_band band)
  94. {
  95. return priv->hw->wiphy->bands[band];
  96. }
  97. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  98. {
  99. /* Single white space is for Linksys APs */
  100. if (essid_len == 1 && essid[0] == ' ')
  101. return 1;
  102. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  103. while (essid_len) {
  104. essid_len--;
  105. if (essid[essid_len] != '\0')
  106. return 0;
  107. }
  108. return 1;
  109. }
  110. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  111. {
  112. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  113. const char *s = essid;
  114. char *d = escaped;
  115. if (iwl4965_is_empty_essid(essid, essid_len)) {
  116. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  117. return escaped;
  118. }
  119. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  120. while (essid_len--) {
  121. if (*s == '\0') {
  122. *d++ = '\\';
  123. *d++ = '0';
  124. s++;
  125. } else
  126. *d++ = *s++;
  127. }
  128. *d = '\0';
  129. return escaped;
  130. }
  131. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  132. * DMA services
  133. *
  134. * Theory of operation
  135. *
  136. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  137. * of buffer descriptors, each of which points to one or more data buffers for
  138. * the device to read from or fill. Driver and device exchange status of each
  139. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  140. * entries in each circular buffer, to protect against confusing empty and full
  141. * queue states.
  142. *
  143. * The device reads or writes the data in the queues via the device's several
  144. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  145. *
  146. * For Tx queue, there are low mark and high mark limits. If, after queuing
  147. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  148. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  149. * Tx queue resumed.
  150. *
  151. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  152. * queue (#4) for sending commands to the device firmware, and 15 other
  153. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  154. *
  155. * See more detailed info in iwl-4965-hw.h.
  156. ***************************************************/
  157. int iwl4965_queue_space(const struct iwl4965_queue *q)
  158. {
  159. int s = q->read_ptr - q->write_ptr;
  160. if (q->read_ptr > q->write_ptr)
  161. s -= q->n_bd;
  162. if (s <= 0)
  163. s += q->n_window;
  164. /* keep some reserve to not confuse empty and full situations */
  165. s -= 2;
  166. if (s < 0)
  167. s = 0;
  168. return s;
  169. }
  170. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  171. {
  172. return q->write_ptr > q->read_ptr ?
  173. (i >= q->read_ptr && i < q->write_ptr) :
  174. !(i < q->read_ptr && i >= q->write_ptr);
  175. }
  176. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  177. {
  178. /* This is for scan command, the big buffer at end of command array */
  179. if (is_huge)
  180. return q->n_window; /* must be power of 2 */
  181. /* Otherwise, use normal size buffers */
  182. return index & (q->n_window - 1);
  183. }
  184. /**
  185. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  186. */
  187. static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
  188. int count, int slots_num, u32 id)
  189. {
  190. q->n_bd = count;
  191. q->n_window = slots_num;
  192. q->id = id;
  193. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  194. * and iwl_queue_dec_wrap are broken. */
  195. BUG_ON(!is_power_of_2(count));
  196. /* slots_num must be power-of-two size, otherwise
  197. * get_cmd_index is broken. */
  198. BUG_ON(!is_power_of_2(slots_num));
  199. q->low_mark = q->n_window / 4;
  200. if (q->low_mark < 4)
  201. q->low_mark = 4;
  202. q->high_mark = q->n_window / 8;
  203. if (q->high_mark < 2)
  204. q->high_mark = 2;
  205. q->write_ptr = q->read_ptr = 0;
  206. return 0;
  207. }
  208. /**
  209. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  210. */
  211. static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
  212. struct iwl4965_tx_queue *txq, u32 id)
  213. {
  214. struct pci_dev *dev = priv->pci_dev;
  215. /* Driver private data, only for Tx (not command) queues,
  216. * not shared with device. */
  217. if (id != IWL_CMD_QUEUE_NUM) {
  218. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  219. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  220. if (!txq->txb) {
  221. IWL_ERROR("kmalloc for auxiliary BD "
  222. "structures failed\n");
  223. goto error;
  224. }
  225. } else
  226. txq->txb = NULL;
  227. /* Circular buffer of transmit frame descriptors (TFDs),
  228. * shared with device */
  229. txq->bd = pci_alloc_consistent(dev,
  230. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  231. &txq->q.dma_addr);
  232. if (!txq->bd) {
  233. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  234. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  235. goto error;
  236. }
  237. txq->q.id = id;
  238. return 0;
  239. error:
  240. if (txq->txb) {
  241. kfree(txq->txb);
  242. txq->txb = NULL;
  243. }
  244. return -ENOMEM;
  245. }
  246. /**
  247. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  248. */
  249. int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
  250. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  251. {
  252. struct pci_dev *dev = priv->pci_dev;
  253. int len;
  254. int rc = 0;
  255. /*
  256. * Alloc buffer array for commands (Tx or other types of commands).
  257. * For the command queue (#4), allocate command space + one big
  258. * command for scan, since scan command is very huge; the system will
  259. * not have two scans at the same time, so only one is needed.
  260. * For normal Tx queues (all other queues), no super-size command
  261. * space is needed.
  262. */
  263. len = sizeof(struct iwl4965_cmd) * slots_num;
  264. if (txq_id == IWL_CMD_QUEUE_NUM)
  265. len += IWL_MAX_SCAN_SIZE;
  266. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  267. if (!txq->cmd)
  268. return -ENOMEM;
  269. /* Alloc driver data array and TFD circular buffer */
  270. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  271. if (rc) {
  272. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  273. return -ENOMEM;
  274. }
  275. txq->need_update = 0;
  276. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  277. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  278. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  279. /* Initialize queue's high/low-water marks, and head/tail indexes */
  280. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  281. /* Tell device where to find queue */
  282. iwl4965_hw_tx_queue_init(priv, txq);
  283. return 0;
  284. }
  285. /**
  286. * iwl4965_tx_queue_free - Deallocate DMA queue.
  287. * @txq: Transmit queue to deallocate.
  288. *
  289. * Empty queue by removing and destroying all BD's.
  290. * Free all buffers.
  291. * 0-fill, but do not free "txq" descriptor structure.
  292. */
  293. void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  294. {
  295. struct iwl4965_queue *q = &txq->q;
  296. struct pci_dev *dev = priv->pci_dev;
  297. int len;
  298. if (q->n_bd == 0)
  299. return;
  300. /* first, empty all BD's */
  301. for (; q->write_ptr != q->read_ptr;
  302. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
  303. iwl4965_hw_txq_free_tfd(priv, txq);
  304. len = sizeof(struct iwl4965_cmd) * q->n_window;
  305. if (q->id == IWL_CMD_QUEUE_NUM)
  306. len += IWL_MAX_SCAN_SIZE;
  307. /* De-alloc array of command/tx buffers */
  308. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  309. /* De-alloc circular buffer of TFDs */
  310. if (txq->q.n_bd)
  311. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  312. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  313. /* De-alloc array of per-TFD driver data */
  314. if (txq->txb) {
  315. kfree(txq->txb);
  316. txq->txb = NULL;
  317. }
  318. /* 0-fill queue descriptor structure */
  319. memset(txq, 0, sizeof(*txq));
  320. }
  321. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  322. /*************** STATION TABLE MANAGEMENT ****
  323. * mac80211 should be examined to determine if sta_info is duplicating
  324. * the functionality provided here
  325. */
  326. /**************************************************************/
  327. #if 0 /* temporary disable till we add real remove station */
  328. /**
  329. * iwl4965_remove_station - Remove driver's knowledge of station.
  330. *
  331. * NOTE: This does not remove station from device's station table.
  332. */
  333. static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
  334. {
  335. int index = IWL_INVALID_STATION;
  336. int i;
  337. unsigned long flags;
  338. spin_lock_irqsave(&priv->sta_lock, flags);
  339. if (is_ap)
  340. index = IWL_AP_ID;
  341. else if (is_broadcast_ether_addr(addr))
  342. index = priv->hw_setting.bcast_sta_id;
  343. else
  344. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  345. if (priv->stations[i].used &&
  346. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  347. addr)) {
  348. index = i;
  349. break;
  350. }
  351. if (unlikely(index == IWL_INVALID_STATION))
  352. goto out;
  353. if (priv->stations[index].used) {
  354. priv->stations[index].used = 0;
  355. priv->num_stations--;
  356. }
  357. BUG_ON(priv->num_stations < 0);
  358. out:
  359. spin_unlock_irqrestore(&priv->sta_lock, flags);
  360. return 0;
  361. }
  362. #endif
  363. /**
  364. * iwl4965_clear_stations_table - Clear the driver's station table
  365. *
  366. * NOTE: This does not clear or otherwise alter the device's station table.
  367. */
  368. static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
  369. {
  370. unsigned long flags;
  371. spin_lock_irqsave(&priv->sta_lock, flags);
  372. priv->num_stations = 0;
  373. memset(priv->stations, 0, sizeof(priv->stations));
  374. spin_unlock_irqrestore(&priv->sta_lock, flags);
  375. }
  376. /**
  377. * iwl4965_add_station_flags - Add station to tables in driver and device
  378. */
  379. u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
  380. int is_ap, u8 flags, void *ht_data)
  381. {
  382. int i;
  383. int index = IWL_INVALID_STATION;
  384. struct iwl4965_station_entry *station;
  385. unsigned long flags_spin;
  386. DECLARE_MAC_BUF(mac);
  387. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  388. if (is_ap)
  389. index = IWL_AP_ID;
  390. else if (is_broadcast_ether_addr(addr))
  391. index = priv->hw_setting.bcast_sta_id;
  392. else
  393. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  394. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  395. addr)) {
  396. index = i;
  397. break;
  398. }
  399. if (!priv->stations[i].used &&
  400. index == IWL_INVALID_STATION)
  401. index = i;
  402. }
  403. /* These two conditions have the same outcome, but keep them separate
  404. since they have different meanings */
  405. if (unlikely(index == IWL_INVALID_STATION)) {
  406. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  407. return index;
  408. }
  409. if (priv->stations[index].used &&
  410. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  411. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  412. return index;
  413. }
  414. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  415. station = &priv->stations[index];
  416. station->used = 1;
  417. priv->num_stations++;
  418. /* Set up the REPLY_ADD_STA command to send to device */
  419. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  420. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  421. station->sta.mode = 0;
  422. station->sta.sta.sta_id = index;
  423. station->sta.station_flags = 0;
  424. #ifdef CONFIG_IWL4965_HT
  425. /* BCAST station and IBSS stations do not work in HT mode */
  426. if (index != priv->hw_setting.bcast_sta_id &&
  427. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  428. iwl4965_set_ht_add_station(priv, index,
  429. (struct ieee80211_ht_info *) ht_data);
  430. #endif /*CONFIG_IWL4965_HT*/
  431. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  432. /* Add station to device's station table */
  433. iwl4965_send_add_station(priv, &station->sta, flags);
  434. return index;
  435. }
  436. /*************** DRIVER STATUS FUNCTIONS *****/
  437. static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
  438. {
  439. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  440. * set but EXIT_PENDING is not */
  441. return test_bit(STATUS_READY, &priv->status) &&
  442. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  443. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  444. }
  445. static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
  446. {
  447. return test_bit(STATUS_ALIVE, &priv->status);
  448. }
  449. static inline int iwl4965_is_init(struct iwl4965_priv *priv)
  450. {
  451. return test_bit(STATUS_INIT, &priv->status);
  452. }
  453. static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
  454. {
  455. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  456. test_bit(STATUS_RF_KILL_SW, &priv->status);
  457. }
  458. static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
  459. {
  460. if (iwl4965_is_rfkill(priv))
  461. return 0;
  462. return iwl4965_is_ready(priv);
  463. }
  464. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  465. #define IWL_CMD(x) case x : return #x
  466. static const char *get_cmd_string(u8 cmd)
  467. {
  468. switch (cmd) {
  469. IWL_CMD(REPLY_ALIVE);
  470. IWL_CMD(REPLY_ERROR);
  471. IWL_CMD(REPLY_RXON);
  472. IWL_CMD(REPLY_RXON_ASSOC);
  473. IWL_CMD(REPLY_QOS_PARAM);
  474. IWL_CMD(REPLY_RXON_TIMING);
  475. IWL_CMD(REPLY_ADD_STA);
  476. IWL_CMD(REPLY_REMOVE_STA);
  477. IWL_CMD(REPLY_REMOVE_ALL_STA);
  478. IWL_CMD(REPLY_TX);
  479. IWL_CMD(REPLY_RATE_SCALE);
  480. IWL_CMD(REPLY_LEDS_CMD);
  481. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  482. IWL_CMD(RADAR_NOTIFICATION);
  483. IWL_CMD(REPLY_QUIET_CMD);
  484. IWL_CMD(REPLY_CHANNEL_SWITCH);
  485. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  486. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  487. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  488. IWL_CMD(POWER_TABLE_CMD);
  489. IWL_CMD(PM_SLEEP_NOTIFICATION);
  490. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  491. IWL_CMD(REPLY_SCAN_CMD);
  492. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  493. IWL_CMD(SCAN_START_NOTIFICATION);
  494. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  495. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  496. IWL_CMD(BEACON_NOTIFICATION);
  497. IWL_CMD(REPLY_TX_BEACON);
  498. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  499. IWL_CMD(QUIET_NOTIFICATION);
  500. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  501. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  502. IWL_CMD(REPLY_BT_CONFIG);
  503. IWL_CMD(REPLY_STATISTICS_CMD);
  504. IWL_CMD(STATISTICS_NOTIFICATION);
  505. IWL_CMD(REPLY_CARD_STATE_CMD);
  506. IWL_CMD(CARD_STATE_NOTIFICATION);
  507. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  508. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  509. IWL_CMD(SENSITIVITY_CMD);
  510. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  511. IWL_CMD(REPLY_RX_PHY_CMD);
  512. IWL_CMD(REPLY_RX_MPDU_CMD);
  513. IWL_CMD(REPLY_4965_RX);
  514. IWL_CMD(REPLY_COMPRESSED_BA);
  515. default:
  516. return "UNKNOWN";
  517. }
  518. }
  519. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  520. /**
  521. * iwl4965_enqueue_hcmd - enqueue a uCode command
  522. * @priv: device private data point
  523. * @cmd: a point to the ucode command structure
  524. *
  525. * The function returns < 0 values to indicate the operation is
  526. * failed. On success, it turns the index (> 0) of command in the
  527. * command queue.
  528. */
  529. static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  530. {
  531. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  532. struct iwl4965_queue *q = &txq->q;
  533. struct iwl4965_tfd_frame *tfd;
  534. u32 *control_flags;
  535. struct iwl4965_cmd *out_cmd;
  536. u32 idx;
  537. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  538. dma_addr_t phys_addr;
  539. int ret;
  540. unsigned long flags;
  541. /* If any of the command structures end up being larger than
  542. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  543. * we will need to increase the size of the TFD entries */
  544. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  545. !(cmd->meta.flags & CMD_SIZE_HUGE));
  546. if (iwl4965_is_rfkill(priv)) {
  547. IWL_DEBUG_INFO("Not sending command - RF KILL");
  548. return -EIO;
  549. }
  550. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  551. IWL_ERROR("No space for Tx\n");
  552. return -ENOSPC;
  553. }
  554. spin_lock_irqsave(&priv->hcmd_lock, flags);
  555. tfd = &txq->bd[q->write_ptr];
  556. memset(tfd, 0, sizeof(*tfd));
  557. control_flags = (u32 *) tfd;
  558. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  559. out_cmd = &txq->cmd[idx];
  560. out_cmd->hdr.cmd = cmd->id;
  561. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  562. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  563. /* At this point, the out_cmd now has all of the incoming cmd
  564. * information */
  565. out_cmd->hdr.flags = 0;
  566. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  567. INDEX_TO_SEQ(q->write_ptr));
  568. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  569. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  570. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  571. offsetof(struct iwl4965_cmd, hdr);
  572. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  573. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  574. "%d bytes at %d[%d]:%d\n",
  575. get_cmd_string(out_cmd->hdr.cmd),
  576. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  577. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  578. txq->need_update = 1;
  579. /* Set up entry in queue's byte count circular buffer */
  580. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  581. /* Increment and update queue's write index */
  582. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  583. iwl4965_tx_queue_update_write_ptr(priv, txq);
  584. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  585. return ret ? ret : idx;
  586. }
  587. static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  588. {
  589. int ret;
  590. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  591. /* An asynchronous command can not expect an SKB to be set. */
  592. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  593. /* An asynchronous command MUST have a callback. */
  594. BUG_ON(!cmd->meta.u.callback);
  595. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  596. return -EBUSY;
  597. ret = iwl4965_enqueue_hcmd(priv, cmd);
  598. if (ret < 0) {
  599. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  600. get_cmd_string(cmd->id), ret);
  601. return ret;
  602. }
  603. return 0;
  604. }
  605. static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  606. {
  607. int cmd_idx;
  608. int ret;
  609. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  610. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  611. /* A synchronous command can not have a callback set. */
  612. BUG_ON(cmd->meta.u.callback != NULL);
  613. if (atomic_xchg(&entry, 1)) {
  614. IWL_ERROR("Error sending %s: Already sending a host command\n",
  615. get_cmd_string(cmd->id));
  616. return -EBUSY;
  617. }
  618. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  619. if (cmd->meta.flags & CMD_WANT_SKB)
  620. cmd->meta.source = &cmd->meta;
  621. cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
  622. if (cmd_idx < 0) {
  623. ret = cmd_idx;
  624. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  625. get_cmd_string(cmd->id), ret);
  626. goto out;
  627. }
  628. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  629. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  630. HOST_COMPLETE_TIMEOUT);
  631. if (!ret) {
  632. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  633. IWL_ERROR("Error sending %s: time out after %dms.\n",
  634. get_cmd_string(cmd->id),
  635. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  636. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  637. ret = -ETIMEDOUT;
  638. goto cancel;
  639. }
  640. }
  641. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  642. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  643. get_cmd_string(cmd->id));
  644. ret = -ECANCELED;
  645. goto fail;
  646. }
  647. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  648. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  649. get_cmd_string(cmd->id));
  650. ret = -EIO;
  651. goto fail;
  652. }
  653. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  654. IWL_ERROR("Error: Response NULL in '%s'\n",
  655. get_cmd_string(cmd->id));
  656. ret = -EIO;
  657. goto out;
  658. }
  659. ret = 0;
  660. goto out;
  661. cancel:
  662. if (cmd->meta.flags & CMD_WANT_SKB) {
  663. struct iwl4965_cmd *qcmd;
  664. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  665. * TX cmd queue. Otherwise in case the cmd comes
  666. * in later, it will possibly set an invalid
  667. * address (cmd->meta.source). */
  668. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  669. qcmd->meta.flags &= ~CMD_WANT_SKB;
  670. }
  671. fail:
  672. if (cmd->meta.u.skb) {
  673. dev_kfree_skb_any(cmd->meta.u.skb);
  674. cmd->meta.u.skb = NULL;
  675. }
  676. out:
  677. atomic_set(&entry, 0);
  678. return ret;
  679. }
  680. int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  681. {
  682. if (cmd->meta.flags & CMD_ASYNC)
  683. return iwl4965_send_cmd_async(priv, cmd);
  684. return iwl4965_send_cmd_sync(priv, cmd);
  685. }
  686. int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
  687. {
  688. struct iwl4965_host_cmd cmd = {
  689. .id = id,
  690. .len = len,
  691. .data = data,
  692. };
  693. return iwl4965_send_cmd_sync(priv, &cmd);
  694. }
  695. static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
  696. {
  697. struct iwl4965_host_cmd cmd = {
  698. .id = id,
  699. .len = sizeof(val),
  700. .data = &val,
  701. };
  702. return iwl4965_send_cmd_sync(priv, &cmd);
  703. }
  704. int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
  705. {
  706. return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  707. }
  708. /**
  709. * iwl4965_rxon_add_station - add station into station table.
  710. *
  711. * there is only one AP station with id= IWL_AP_ID
  712. * NOTE: mutex must be held before calling this fnction
  713. */
  714. static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
  715. const u8 *addr, int is_ap)
  716. {
  717. u8 sta_id;
  718. /* Add station to device's station table */
  719. #ifdef CONFIG_IWL4965_HT
  720. struct ieee80211_conf *conf = &priv->hw->conf;
  721. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  722. if ((is_ap) &&
  723. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  724. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  725. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  726. 0, cur_ht_config);
  727. else
  728. #endif /* CONFIG_IWL4965_HT */
  729. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  730. 0, NULL);
  731. /* Set up default rate scaling table in device's station table */
  732. iwl4965_add_station(priv, addr, is_ap);
  733. return sta_id;
  734. }
  735. /**
  736. * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
  737. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  738. * @channel: Any channel valid for the requested phymode
  739. * In addition to setting the staging RXON, priv->phymode is also set.
  740. *
  741. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  742. * in the staging RXON flag structure based on the phymode
  743. */
  744. static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv,
  745. enum ieee80211_band band,
  746. u16 channel)
  747. {
  748. if (!iwl4965_get_channel_info(priv, band, channel)) {
  749. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  750. channel, band);
  751. return -EINVAL;
  752. }
  753. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  754. (priv->band == band))
  755. return 0;
  756. priv->staging_rxon.channel = cpu_to_le16(channel);
  757. if (band == IEEE80211_BAND_5GHZ)
  758. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  759. else
  760. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  761. priv->band = band;
  762. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
  763. return 0;
  764. }
  765. /**
  766. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  767. *
  768. * NOTE: This is really only useful during development and can eventually
  769. * be #ifdef'd out once the driver is stable and folks aren't actively
  770. * making changes
  771. */
  772. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  773. {
  774. int error = 0;
  775. int counter = 1;
  776. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  777. error |= le32_to_cpu(rxon->flags &
  778. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  779. RXON_FLG_RADAR_DETECT_MSK));
  780. if (error)
  781. IWL_WARNING("check 24G fields %d | %d\n",
  782. counter++, error);
  783. } else {
  784. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  785. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  786. if (error)
  787. IWL_WARNING("check 52 fields %d | %d\n",
  788. counter++, error);
  789. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  790. if (error)
  791. IWL_WARNING("check 52 CCK %d | %d\n",
  792. counter++, error);
  793. }
  794. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  795. if (error)
  796. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  797. /* make sure basic rates 6Mbps and 1Mbps are supported */
  798. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  799. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  800. if (error)
  801. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  802. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  803. if (error)
  804. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  805. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  806. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  807. if (error)
  808. IWL_WARNING("check CCK and short slot %d | %d\n",
  809. counter++, error);
  810. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  811. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  812. if (error)
  813. IWL_WARNING("check CCK & auto detect %d | %d\n",
  814. counter++, error);
  815. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  816. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  817. if (error)
  818. IWL_WARNING("check TGG and auto detect %d | %d\n",
  819. counter++, error);
  820. if (error)
  821. IWL_WARNING("Tuning to channel %d\n",
  822. le16_to_cpu(rxon->channel));
  823. if (error) {
  824. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  825. return -1;
  826. }
  827. return 0;
  828. }
  829. /**
  830. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  831. * @priv: staging_rxon is compared to active_rxon
  832. *
  833. * If the RXON structure is changing enough to require a new tune,
  834. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  835. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  836. */
  837. static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
  838. {
  839. /* These items are only settable from the full RXON command */
  840. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  841. compare_ether_addr(priv->staging_rxon.bssid_addr,
  842. priv->active_rxon.bssid_addr) ||
  843. compare_ether_addr(priv->staging_rxon.node_addr,
  844. priv->active_rxon.node_addr) ||
  845. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  846. priv->active_rxon.wlap_bssid_addr) ||
  847. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  848. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  849. (priv->staging_rxon.air_propagation !=
  850. priv->active_rxon.air_propagation) ||
  851. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  852. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  853. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  854. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  855. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  856. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  857. return 1;
  858. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  859. * be updated with the RXON_ASSOC command -- however only some
  860. * flag transitions are allowed using RXON_ASSOC */
  861. /* Check if we are not switching bands */
  862. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  863. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  864. return 1;
  865. /* Check if we are switching association toggle */
  866. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  867. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  868. return 1;
  869. return 0;
  870. }
  871. static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
  872. {
  873. int rc = 0;
  874. struct iwl4965_rx_packet *res = NULL;
  875. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  876. struct iwl4965_host_cmd cmd = {
  877. .id = REPLY_RXON_ASSOC,
  878. .len = sizeof(rxon_assoc),
  879. .meta.flags = CMD_WANT_SKB,
  880. .data = &rxon_assoc,
  881. };
  882. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  883. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  884. if ((rxon1->flags == rxon2->flags) &&
  885. (rxon1->filter_flags == rxon2->filter_flags) &&
  886. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  887. (rxon1->ofdm_ht_single_stream_basic_rates ==
  888. rxon2->ofdm_ht_single_stream_basic_rates) &&
  889. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  890. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  891. (rxon1->rx_chain == rxon2->rx_chain) &&
  892. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  893. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  894. return 0;
  895. }
  896. rxon_assoc.flags = priv->staging_rxon.flags;
  897. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  898. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  899. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  900. rxon_assoc.reserved = 0;
  901. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  902. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  903. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  904. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  905. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  906. rc = iwl4965_send_cmd_sync(priv, &cmd);
  907. if (rc)
  908. return rc;
  909. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  910. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  911. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  912. rc = -EIO;
  913. }
  914. priv->alloc_rxb_skb--;
  915. dev_kfree_skb_any(cmd.meta.u.skb);
  916. return rc;
  917. }
  918. /**
  919. * iwl4965_commit_rxon - commit staging_rxon to hardware
  920. *
  921. * The RXON command in staging_rxon is committed to the hardware and
  922. * the active_rxon structure is updated with the new data. This
  923. * function correctly transitions out of the RXON_ASSOC_MSK state if
  924. * a HW tune is required based on the RXON structure changes.
  925. */
  926. static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
  927. {
  928. /* cast away the const for active_rxon in this function */
  929. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  930. DECLARE_MAC_BUF(mac);
  931. int rc = 0;
  932. if (!iwl4965_is_alive(priv))
  933. return -1;
  934. /* always get timestamp with Rx frame */
  935. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  936. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  937. if (rc) {
  938. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  939. return -EINVAL;
  940. }
  941. /* If we don't need to send a full RXON, we can use
  942. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  943. * and other flags for the current radio configuration. */
  944. if (!iwl4965_full_rxon_required(priv)) {
  945. rc = iwl4965_send_rxon_assoc(priv);
  946. if (rc) {
  947. IWL_ERROR("Error setting RXON_ASSOC "
  948. "configuration (%d).\n", rc);
  949. return rc;
  950. }
  951. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  952. return 0;
  953. }
  954. /* station table will be cleared */
  955. priv->assoc_station_added = 0;
  956. #ifdef CONFIG_IWL4965_SENSITIVITY
  957. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  958. if (!priv->error_recovering)
  959. priv->start_calib = 0;
  960. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  961. #endif /* CONFIG_IWL4965_SENSITIVITY */
  962. /* If we are currently associated and the new config requires
  963. * an RXON_ASSOC and the new config wants the associated mask enabled,
  964. * we must clear the associated from the active configuration
  965. * before we apply the new config */
  966. if (iwl4965_is_associated(priv) &&
  967. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  968. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  969. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  970. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  971. sizeof(struct iwl4965_rxon_cmd),
  972. &priv->active_rxon);
  973. /* If the mask clearing failed then we set
  974. * active_rxon back to what it was previously */
  975. if (rc) {
  976. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  977. IWL_ERROR("Error clearing ASSOC_MSK on current "
  978. "configuration (%d).\n", rc);
  979. return rc;
  980. }
  981. }
  982. IWL_DEBUG_INFO("Sending RXON\n"
  983. "* with%s RXON_FILTER_ASSOC_MSK\n"
  984. "* channel = %d\n"
  985. "* bssid = %s\n",
  986. ((priv->staging_rxon.filter_flags &
  987. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  988. le16_to_cpu(priv->staging_rxon.channel),
  989. print_mac(mac, priv->staging_rxon.bssid_addr));
  990. /* Apply the new configuration */
  991. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  992. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  993. if (rc) {
  994. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  995. return rc;
  996. }
  997. iwl4965_clear_stations_table(priv);
  998. #ifdef CONFIG_IWL4965_SENSITIVITY
  999. if (!priv->error_recovering)
  1000. priv->start_calib = 0;
  1001. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  1002. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  1003. #endif /* CONFIG_IWL4965_SENSITIVITY */
  1004. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  1005. /* If we issue a new RXON command which required a tune then we must
  1006. * send a new TXPOWER command or we won't be able to Tx any frames */
  1007. rc = iwl4965_hw_reg_send_txpower(priv);
  1008. if (rc) {
  1009. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  1010. return rc;
  1011. }
  1012. /* Add the broadcast address so we can send broadcast frames */
  1013. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  1014. IWL_INVALID_STATION) {
  1015. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  1016. return -EIO;
  1017. }
  1018. /* If we have set the ASSOC_MSK and we are in BSS mode then
  1019. * add the IWL_AP_ID to the station rate table */
  1020. if (iwl4965_is_associated(priv) &&
  1021. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  1022. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  1023. == IWL_INVALID_STATION) {
  1024. IWL_ERROR("Error adding AP address for transmit.\n");
  1025. return -EIO;
  1026. }
  1027. priv->assoc_station_added = 1;
  1028. }
  1029. return 0;
  1030. }
  1031. static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
  1032. {
  1033. struct iwl4965_bt_cmd bt_cmd = {
  1034. .flags = 3,
  1035. .lead_time = 0xAA,
  1036. .max_kill = 1,
  1037. .kill_ack_mask = 0,
  1038. .kill_cts_mask = 0,
  1039. };
  1040. return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1041. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  1042. }
  1043. static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
  1044. {
  1045. int rc = 0;
  1046. struct iwl4965_rx_packet *res;
  1047. struct iwl4965_host_cmd cmd = {
  1048. .id = REPLY_SCAN_ABORT_CMD,
  1049. .meta.flags = CMD_WANT_SKB,
  1050. };
  1051. /* If there isn't a scan actively going on in the hardware
  1052. * then we are in between scan bands and not actually
  1053. * actively scanning, so don't send the abort command */
  1054. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1055. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1056. return 0;
  1057. }
  1058. rc = iwl4965_send_cmd_sync(priv, &cmd);
  1059. if (rc) {
  1060. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1061. return rc;
  1062. }
  1063. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1064. if (res->u.status != CAN_ABORT_STATUS) {
  1065. /* The scan abort will return 1 for success or
  1066. * 2 for "failure". A failure condition can be
  1067. * due to simply not being in an active scan which
  1068. * can occur if we send the scan abort before we
  1069. * the microcode has notified us that a scan is
  1070. * completed. */
  1071. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1072. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1073. clear_bit(STATUS_SCAN_HW, &priv->status);
  1074. }
  1075. dev_kfree_skb_any(cmd.meta.u.skb);
  1076. return rc;
  1077. }
  1078. static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
  1079. struct iwl4965_cmd *cmd,
  1080. struct sk_buff *skb)
  1081. {
  1082. return 1;
  1083. }
  1084. /*
  1085. * CARD_STATE_CMD
  1086. *
  1087. * Use: Sets the device's internal card state to enable, disable, or halt
  1088. *
  1089. * When in the 'enable' state the card operates as normal.
  1090. * When in the 'disable' state, the card enters into a low power mode.
  1091. * When in the 'halt' state, the card is shut down and must be fully
  1092. * restarted to come back on.
  1093. */
  1094. static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
  1095. {
  1096. struct iwl4965_host_cmd cmd = {
  1097. .id = REPLY_CARD_STATE_CMD,
  1098. .len = sizeof(u32),
  1099. .data = &flags,
  1100. .meta.flags = meta_flag,
  1101. };
  1102. if (meta_flag & CMD_ASYNC)
  1103. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  1104. return iwl4965_send_cmd(priv, &cmd);
  1105. }
  1106. static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
  1107. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  1108. {
  1109. struct iwl4965_rx_packet *res = NULL;
  1110. if (!skb) {
  1111. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1112. return 1;
  1113. }
  1114. res = (struct iwl4965_rx_packet *)skb->data;
  1115. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1116. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1117. res->hdr.flags);
  1118. return 1;
  1119. }
  1120. switch (res->u.add_sta.status) {
  1121. case ADD_STA_SUCCESS_MSK:
  1122. break;
  1123. default:
  1124. break;
  1125. }
  1126. /* We didn't cache the SKB; let the caller free it */
  1127. return 1;
  1128. }
  1129. int iwl4965_send_add_station(struct iwl4965_priv *priv,
  1130. struct iwl4965_addsta_cmd *sta, u8 flags)
  1131. {
  1132. struct iwl4965_rx_packet *res = NULL;
  1133. int rc = 0;
  1134. struct iwl4965_host_cmd cmd = {
  1135. .id = REPLY_ADD_STA,
  1136. .len = sizeof(struct iwl4965_addsta_cmd),
  1137. .meta.flags = flags,
  1138. .data = sta,
  1139. };
  1140. if (flags & CMD_ASYNC)
  1141. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  1142. else
  1143. cmd.meta.flags |= CMD_WANT_SKB;
  1144. rc = iwl4965_send_cmd(priv, &cmd);
  1145. if (rc || (flags & CMD_ASYNC))
  1146. return rc;
  1147. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1148. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1149. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1150. res->hdr.flags);
  1151. rc = -EIO;
  1152. }
  1153. if (rc == 0) {
  1154. switch (res->u.add_sta.status) {
  1155. case ADD_STA_SUCCESS_MSK:
  1156. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1157. break;
  1158. default:
  1159. rc = -EIO;
  1160. IWL_WARNING("REPLY_ADD_STA failed\n");
  1161. break;
  1162. }
  1163. }
  1164. priv->alloc_rxb_skb--;
  1165. dev_kfree_skb_any(cmd.meta.u.skb);
  1166. return rc;
  1167. }
  1168. static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
  1169. struct ieee80211_key_conf *keyconf,
  1170. u8 sta_id)
  1171. {
  1172. unsigned long flags;
  1173. __le16 key_flags = 0;
  1174. switch (keyconf->alg) {
  1175. case ALG_CCMP:
  1176. key_flags |= STA_KEY_FLG_CCMP;
  1177. key_flags |= cpu_to_le16(
  1178. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1179. key_flags &= ~STA_KEY_FLG_INVALID;
  1180. break;
  1181. case ALG_TKIP:
  1182. case ALG_WEP:
  1183. default:
  1184. return -EINVAL;
  1185. }
  1186. spin_lock_irqsave(&priv->sta_lock, flags);
  1187. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1188. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1189. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1190. keyconf->keylen);
  1191. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1192. keyconf->keylen);
  1193. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1194. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1195. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1196. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1197. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1198. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1199. return 0;
  1200. }
  1201. static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
  1202. {
  1203. unsigned long flags;
  1204. spin_lock_irqsave(&priv->sta_lock, flags);
  1205. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1206. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1207. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1208. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1209. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1210. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1211. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1212. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1213. return 0;
  1214. }
  1215. static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
  1216. {
  1217. struct list_head *element;
  1218. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1219. priv->frames_count);
  1220. while (!list_empty(&priv->free_frames)) {
  1221. element = priv->free_frames.next;
  1222. list_del(element);
  1223. kfree(list_entry(element, struct iwl4965_frame, list));
  1224. priv->frames_count--;
  1225. }
  1226. if (priv->frames_count) {
  1227. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1228. priv->frames_count);
  1229. priv->frames_count = 0;
  1230. }
  1231. }
  1232. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
  1233. {
  1234. struct iwl4965_frame *frame;
  1235. struct list_head *element;
  1236. if (list_empty(&priv->free_frames)) {
  1237. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1238. if (!frame) {
  1239. IWL_ERROR("Could not allocate frame!\n");
  1240. return NULL;
  1241. }
  1242. priv->frames_count++;
  1243. return frame;
  1244. }
  1245. element = priv->free_frames.next;
  1246. list_del(element);
  1247. return list_entry(element, struct iwl4965_frame, list);
  1248. }
  1249. static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
  1250. {
  1251. memset(frame, 0, sizeof(*frame));
  1252. list_add(&frame->list, &priv->free_frames);
  1253. }
  1254. unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
  1255. struct ieee80211_hdr *hdr,
  1256. const u8 *dest, int left)
  1257. {
  1258. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1259. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1260. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1261. return 0;
  1262. if (priv->ibss_beacon->len > left)
  1263. return 0;
  1264. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1265. return priv->ibss_beacon->len;
  1266. }
  1267. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1268. {
  1269. u8 i;
  1270. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1271. i = iwl4965_rates[i].next_ieee) {
  1272. if (rate_mask & (1 << i))
  1273. return iwl4965_rates[i].plcp;
  1274. }
  1275. return IWL_RATE_INVALID;
  1276. }
  1277. static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
  1278. {
  1279. struct iwl4965_frame *frame;
  1280. unsigned int frame_size;
  1281. int rc;
  1282. u8 rate;
  1283. frame = iwl4965_get_free_frame(priv);
  1284. if (!frame) {
  1285. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1286. "command.\n");
  1287. return -ENOMEM;
  1288. }
  1289. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1290. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1291. 0xFF0);
  1292. if (rate == IWL_INVALID_RATE)
  1293. rate = IWL_RATE_6M_PLCP;
  1294. } else {
  1295. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1296. if (rate == IWL_INVALID_RATE)
  1297. rate = IWL_RATE_1M_PLCP;
  1298. }
  1299. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1300. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1301. &frame->u.cmd[0]);
  1302. iwl4965_free_frame(priv, frame);
  1303. return rc;
  1304. }
  1305. /******************************************************************************
  1306. *
  1307. * Misc. internal state and helper functions
  1308. *
  1309. ******************************************************************************/
  1310. static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
  1311. {
  1312. if (priv->hw_setting.shared_virt)
  1313. pci_free_consistent(priv->pci_dev,
  1314. sizeof(struct iwl4965_shared),
  1315. priv->hw_setting.shared_virt,
  1316. priv->hw_setting.shared_phys);
  1317. }
  1318. /**
  1319. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1320. *
  1321. * return : set the bit for each supported rate insert in ie
  1322. */
  1323. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1324. u16 basic_rate, int *left)
  1325. {
  1326. u16 ret_rates = 0, bit;
  1327. int i;
  1328. u8 *cnt = ie;
  1329. u8 *rates = ie + 1;
  1330. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1331. if (bit & supported_rate) {
  1332. ret_rates |= bit;
  1333. rates[*cnt] = iwl4965_rates[i].ieee |
  1334. ((bit & basic_rate) ? 0x80 : 0x00);
  1335. (*cnt)++;
  1336. (*left)--;
  1337. if ((*left <= 0) ||
  1338. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1339. break;
  1340. }
  1341. }
  1342. return ret_rates;
  1343. }
  1344. /**
  1345. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1346. */
  1347. static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
  1348. enum ieee80211_band band,
  1349. struct ieee80211_mgmt *frame,
  1350. int left, int is_direct)
  1351. {
  1352. int len = 0;
  1353. u8 *pos = NULL;
  1354. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1355. #ifdef CONFIG_IWL4965_HT
  1356. const struct ieee80211_supported_band *sband =
  1357. iwl4965_get_hw_mode(priv, band);
  1358. #endif /* CONFIG_IWL4965_HT */
  1359. /* Make sure there is enough space for the probe request,
  1360. * two mandatory IEs and the data */
  1361. left -= 24;
  1362. if (left < 0)
  1363. return 0;
  1364. len += 24;
  1365. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1366. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1367. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1368. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1369. frame->seq_ctrl = 0;
  1370. /* fill in our indirect SSID IE */
  1371. /* ...next IE... */
  1372. left -= 2;
  1373. if (left < 0)
  1374. return 0;
  1375. len += 2;
  1376. pos = &(frame->u.probe_req.variable[0]);
  1377. *pos++ = WLAN_EID_SSID;
  1378. *pos++ = 0;
  1379. /* fill in our direct SSID IE... */
  1380. if (is_direct) {
  1381. /* ...next IE... */
  1382. left -= 2 + priv->essid_len;
  1383. if (left < 0)
  1384. return 0;
  1385. /* ... fill it in... */
  1386. *pos++ = WLAN_EID_SSID;
  1387. *pos++ = priv->essid_len;
  1388. memcpy(pos, priv->essid, priv->essid_len);
  1389. pos += priv->essid_len;
  1390. len += 2 + priv->essid_len;
  1391. }
  1392. /* fill in supported rate */
  1393. /* ...next IE... */
  1394. left -= 2;
  1395. if (left < 0)
  1396. return 0;
  1397. /* ... fill it in... */
  1398. *pos++ = WLAN_EID_SUPP_RATES;
  1399. *pos = 0;
  1400. /* exclude 60M rate */
  1401. active_rates = priv->rates_mask;
  1402. active_rates &= ~IWL_RATE_60M_MASK;
  1403. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1404. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1405. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1406. active_rate_basic, &left);
  1407. active_rates &= ~ret_rates;
  1408. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1409. active_rate_basic, &left);
  1410. active_rates &= ~ret_rates;
  1411. len += 2 + *pos;
  1412. pos += (*pos) + 1;
  1413. if (active_rates == 0)
  1414. goto fill_end;
  1415. /* fill in supported extended rate */
  1416. /* ...next IE... */
  1417. left -= 2;
  1418. if (left < 0)
  1419. return 0;
  1420. /* ... fill it in... */
  1421. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1422. *pos = 0;
  1423. iwl4965_supported_rate_to_ie(pos, active_rates,
  1424. active_rate_basic, &left);
  1425. if (*pos > 0)
  1426. len += 2 + *pos;
  1427. #ifdef CONFIG_IWL4965_HT
  1428. if (sband && sband->ht_info.ht_supported) {
  1429. struct ieee80211_ht_cap *ht_cap;
  1430. pos += (*pos) + 1;
  1431. *pos++ = WLAN_EID_HT_CAPABILITY;
  1432. *pos++ = sizeof(struct ieee80211_ht_cap);
  1433. ht_cap = (struct ieee80211_ht_cap *)pos;
  1434. ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
  1435. memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
  1436. ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
  1437. IEEE80211_HT_CAP_AMPDU_FACTOR) |
  1438. ((sband->ht_info.ampdu_density << 2) &
  1439. IEEE80211_HT_CAP_AMPDU_DENSITY);
  1440. len += 2 + sizeof(struct ieee80211_ht_cap);
  1441. }
  1442. #endif /*CONFIG_IWL4965_HT */
  1443. fill_end:
  1444. return (u16)len;
  1445. }
  1446. /*
  1447. * QoS support
  1448. */
  1449. static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
  1450. struct iwl4965_qosparam_cmd *qos)
  1451. {
  1452. return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1453. sizeof(struct iwl4965_qosparam_cmd), qos);
  1454. }
  1455. static void iwl4965_reset_qos(struct iwl4965_priv *priv)
  1456. {
  1457. u16 cw_min = 15;
  1458. u16 cw_max = 1023;
  1459. u8 aifs = 2;
  1460. u8 is_legacy = 0;
  1461. unsigned long flags;
  1462. int i;
  1463. spin_lock_irqsave(&priv->lock, flags);
  1464. priv->qos_data.qos_active = 0;
  1465. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1466. if (priv->qos_data.qos_enable)
  1467. priv->qos_data.qos_active = 1;
  1468. if (!(priv->active_rate & 0xfff0)) {
  1469. cw_min = 31;
  1470. is_legacy = 1;
  1471. }
  1472. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1473. if (priv->qos_data.qos_enable)
  1474. priv->qos_data.qos_active = 1;
  1475. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1476. cw_min = 31;
  1477. is_legacy = 1;
  1478. }
  1479. if (priv->qos_data.qos_active)
  1480. aifs = 3;
  1481. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1482. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1483. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1484. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1485. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1486. if (priv->qos_data.qos_active) {
  1487. i = 1;
  1488. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1489. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1490. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1491. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1492. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1493. i = 2;
  1494. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1495. cpu_to_le16((cw_min + 1) / 2 - 1);
  1496. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1497. cpu_to_le16(cw_max);
  1498. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1499. if (is_legacy)
  1500. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1501. cpu_to_le16(6016);
  1502. else
  1503. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1504. cpu_to_le16(3008);
  1505. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1506. i = 3;
  1507. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1508. cpu_to_le16((cw_min + 1) / 4 - 1);
  1509. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1510. cpu_to_le16((cw_max + 1) / 2 - 1);
  1511. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1512. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1513. if (is_legacy)
  1514. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1515. cpu_to_le16(3264);
  1516. else
  1517. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1518. cpu_to_le16(1504);
  1519. } else {
  1520. for (i = 1; i < 4; i++) {
  1521. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1522. cpu_to_le16(cw_min);
  1523. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1524. cpu_to_le16(cw_max);
  1525. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1526. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1527. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1528. }
  1529. }
  1530. IWL_DEBUG_QOS("set QoS to default \n");
  1531. spin_unlock_irqrestore(&priv->lock, flags);
  1532. }
  1533. static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
  1534. {
  1535. unsigned long flags;
  1536. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1537. return;
  1538. if (!priv->qos_data.qos_enable)
  1539. return;
  1540. spin_lock_irqsave(&priv->lock, flags);
  1541. priv->qos_data.def_qos_parm.qos_flags = 0;
  1542. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1543. !priv->qos_data.qos_cap.q_AP.txop_request)
  1544. priv->qos_data.def_qos_parm.qos_flags |=
  1545. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1546. if (priv->qos_data.qos_active)
  1547. priv->qos_data.def_qos_parm.qos_flags |=
  1548. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1549. #ifdef CONFIG_IWL4965_HT
  1550. if (priv->current_ht_config.is_ht)
  1551. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1552. #endif /* CONFIG_IWL4965_HT */
  1553. spin_unlock_irqrestore(&priv->lock, flags);
  1554. if (force || iwl4965_is_associated(priv)) {
  1555. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1556. priv->qos_data.qos_active,
  1557. priv->qos_data.def_qos_parm.qos_flags);
  1558. iwl4965_send_qos_params_command(priv,
  1559. &(priv->qos_data.def_qos_parm));
  1560. }
  1561. }
  1562. /*
  1563. * Power management (not Tx power!) functions
  1564. */
  1565. #define MSEC_TO_USEC 1024
  1566. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1567. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1568. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1569. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1570. __constant_cpu_to_le32(X1), \
  1571. __constant_cpu_to_le32(X2), \
  1572. __constant_cpu_to_le32(X3), \
  1573. __constant_cpu_to_le32(X4)}
  1574. /* default power management (not Tx power) table values */
  1575. /* for tim 0-10 */
  1576. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1577. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1578. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1579. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1580. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1581. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1582. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1583. };
  1584. /* for tim > 10 */
  1585. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1586. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1587. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1588. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1589. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1590. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1591. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1592. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1593. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1594. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1595. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1596. };
  1597. int iwl4965_power_init_handle(struct iwl4965_priv *priv)
  1598. {
  1599. int rc = 0, i;
  1600. struct iwl4965_power_mgr *pow_data;
  1601. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1602. u16 pci_pm;
  1603. IWL_DEBUG_POWER("Initialize power \n");
  1604. pow_data = &(priv->power_data);
  1605. memset(pow_data, 0, sizeof(*pow_data));
  1606. pow_data->active_index = IWL_POWER_RANGE_0;
  1607. pow_data->dtim_val = 0xffff;
  1608. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1609. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1610. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1611. if (rc != 0)
  1612. return 0;
  1613. else {
  1614. struct iwl4965_powertable_cmd *cmd;
  1615. IWL_DEBUG_POWER("adjust power command flags\n");
  1616. for (i = 0; i < IWL_POWER_AC; i++) {
  1617. cmd = &pow_data->pwr_range_0[i].cmd;
  1618. if (pci_pm & 0x1)
  1619. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1620. else
  1621. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1622. }
  1623. }
  1624. return rc;
  1625. }
  1626. static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
  1627. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1628. {
  1629. int rc = 0, i;
  1630. u8 skip;
  1631. u32 max_sleep = 0;
  1632. struct iwl4965_power_vec_entry *range;
  1633. u8 period = 0;
  1634. struct iwl4965_power_mgr *pow_data;
  1635. if (mode > IWL_POWER_INDEX_5) {
  1636. IWL_DEBUG_POWER("Error invalid power mode \n");
  1637. return -1;
  1638. }
  1639. pow_data = &(priv->power_data);
  1640. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1641. range = &pow_data->pwr_range_0[0];
  1642. else
  1643. range = &pow_data->pwr_range_1[1];
  1644. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1645. #ifdef IWL_MAC80211_DISABLE
  1646. if (priv->assoc_network != NULL) {
  1647. unsigned long flags;
  1648. period = priv->assoc_network->tim.tim_period;
  1649. }
  1650. #endif /*IWL_MAC80211_DISABLE */
  1651. skip = range[mode].no_dtim;
  1652. if (period == 0) {
  1653. period = 1;
  1654. skip = 0;
  1655. }
  1656. if (skip == 0) {
  1657. max_sleep = period;
  1658. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1659. } else {
  1660. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1661. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1662. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1663. }
  1664. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1665. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1666. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1667. }
  1668. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1669. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1670. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1671. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1672. le32_to_cpu(cmd->sleep_interval[0]),
  1673. le32_to_cpu(cmd->sleep_interval[1]),
  1674. le32_to_cpu(cmd->sleep_interval[2]),
  1675. le32_to_cpu(cmd->sleep_interval[3]),
  1676. le32_to_cpu(cmd->sleep_interval[4]));
  1677. return rc;
  1678. }
  1679. static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
  1680. {
  1681. u32 uninitialized_var(final_mode);
  1682. int rc;
  1683. struct iwl4965_powertable_cmd cmd;
  1684. /* If on battery, set to 3,
  1685. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1686. * else user level */
  1687. switch (mode) {
  1688. case IWL_POWER_BATTERY:
  1689. final_mode = IWL_POWER_INDEX_3;
  1690. break;
  1691. case IWL_POWER_AC:
  1692. final_mode = IWL_POWER_MODE_CAM;
  1693. break;
  1694. default:
  1695. final_mode = mode;
  1696. break;
  1697. }
  1698. cmd.keep_alive_beacons = 0;
  1699. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1700. rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1701. if (final_mode == IWL_POWER_MODE_CAM)
  1702. clear_bit(STATUS_POWER_PMI, &priv->status);
  1703. else
  1704. set_bit(STATUS_POWER_PMI, &priv->status);
  1705. return rc;
  1706. }
  1707. int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  1708. {
  1709. /* Filter incoming packets to determine if they are targeted toward
  1710. * this network, discarding packets coming from ourselves */
  1711. switch (priv->iw_mode) {
  1712. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1713. /* packets from our adapter are dropped (echo) */
  1714. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1715. return 0;
  1716. /* {broad,multi}cast packets to our IBSS go through */
  1717. if (is_multicast_ether_addr(header->addr1))
  1718. return !compare_ether_addr(header->addr3, priv->bssid);
  1719. /* packets to our adapter go through */
  1720. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1721. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1722. /* packets from our adapter are dropped (echo) */
  1723. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1724. return 0;
  1725. /* {broad,multi}cast packets to our BSS go through */
  1726. if (is_multicast_ether_addr(header->addr1))
  1727. return !compare_ether_addr(header->addr2, priv->bssid);
  1728. /* packets to our adapter go through */
  1729. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1730. }
  1731. return 1;
  1732. }
  1733. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1734. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1735. {
  1736. switch (status & TX_STATUS_MSK) {
  1737. case TX_STATUS_SUCCESS:
  1738. return "SUCCESS";
  1739. TX_STATUS_ENTRY(SHORT_LIMIT);
  1740. TX_STATUS_ENTRY(LONG_LIMIT);
  1741. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1742. TX_STATUS_ENTRY(MGMNT_ABORT);
  1743. TX_STATUS_ENTRY(NEXT_FRAG);
  1744. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1745. TX_STATUS_ENTRY(DEST_PS);
  1746. TX_STATUS_ENTRY(ABORTED);
  1747. TX_STATUS_ENTRY(BT_RETRY);
  1748. TX_STATUS_ENTRY(STA_INVALID);
  1749. TX_STATUS_ENTRY(FRAG_DROPPED);
  1750. TX_STATUS_ENTRY(TID_DISABLE);
  1751. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1752. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1753. TX_STATUS_ENTRY(TX_LOCKED);
  1754. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1755. }
  1756. return "UNKNOWN";
  1757. }
  1758. /**
  1759. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  1760. *
  1761. * NOTE: priv->mutex is not required before calling this function
  1762. */
  1763. static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
  1764. {
  1765. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1766. clear_bit(STATUS_SCANNING, &priv->status);
  1767. return 0;
  1768. }
  1769. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1770. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1771. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1772. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1773. queue_work(priv->workqueue, &priv->abort_scan);
  1774. } else
  1775. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1776. return test_bit(STATUS_SCANNING, &priv->status);
  1777. }
  1778. return 0;
  1779. }
  1780. /**
  1781. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  1782. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1783. *
  1784. * NOTE: priv->mutex must be held before calling this function
  1785. */
  1786. static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
  1787. {
  1788. unsigned long now = jiffies;
  1789. int ret;
  1790. ret = iwl4965_scan_cancel(priv);
  1791. if (ret && ms) {
  1792. mutex_unlock(&priv->mutex);
  1793. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1794. test_bit(STATUS_SCANNING, &priv->status))
  1795. msleep(1);
  1796. mutex_lock(&priv->mutex);
  1797. return test_bit(STATUS_SCANNING, &priv->status);
  1798. }
  1799. return ret;
  1800. }
  1801. static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
  1802. {
  1803. /* Reset ieee stats */
  1804. /* We don't reset the net_device_stats (ieee->stats) on
  1805. * re-association */
  1806. priv->last_seq_num = -1;
  1807. priv->last_frag_num = -1;
  1808. priv->last_packet_time = 0;
  1809. iwl4965_scan_cancel(priv);
  1810. }
  1811. #define MAX_UCODE_BEACON_INTERVAL 4096
  1812. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1813. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  1814. {
  1815. u16 new_val = 0;
  1816. u16 beacon_factor = 0;
  1817. beacon_factor =
  1818. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1819. / MAX_UCODE_BEACON_INTERVAL;
  1820. new_val = beacon_val / beacon_factor;
  1821. return cpu_to_le16(new_val);
  1822. }
  1823. static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
  1824. {
  1825. u64 interval_tm_unit;
  1826. u64 tsf, result;
  1827. unsigned long flags;
  1828. struct ieee80211_conf *conf = NULL;
  1829. u16 beacon_int = 0;
  1830. conf = ieee80211_get_hw_conf(priv->hw);
  1831. spin_lock_irqsave(&priv->lock, flags);
  1832. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  1833. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  1834. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1835. tsf = priv->timestamp1;
  1836. tsf = ((tsf << 32) | priv->timestamp0);
  1837. beacon_int = priv->beacon_int;
  1838. spin_unlock_irqrestore(&priv->lock, flags);
  1839. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1840. if (beacon_int == 0) {
  1841. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1842. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1843. } else {
  1844. priv->rxon_timing.beacon_interval =
  1845. cpu_to_le16(beacon_int);
  1846. priv->rxon_timing.beacon_interval =
  1847. iwl4965_adjust_beacon_interval(
  1848. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1849. }
  1850. priv->rxon_timing.atim_window = 0;
  1851. } else {
  1852. priv->rxon_timing.beacon_interval =
  1853. iwl4965_adjust_beacon_interval(conf->beacon_int);
  1854. /* TODO: we need to get atim_window from upper stack
  1855. * for now we set to 0 */
  1856. priv->rxon_timing.atim_window = 0;
  1857. }
  1858. interval_tm_unit =
  1859. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1860. result = do_div(tsf, interval_tm_unit);
  1861. priv->rxon_timing.beacon_init_val =
  1862. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1863. IWL_DEBUG_ASSOC
  1864. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1865. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1866. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1867. le16_to_cpu(priv->rxon_timing.atim_window));
  1868. }
  1869. static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
  1870. {
  1871. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1872. IWL_ERROR("APs don't scan.\n");
  1873. return 0;
  1874. }
  1875. if (!iwl4965_is_ready_rf(priv)) {
  1876. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1877. return -EIO;
  1878. }
  1879. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1880. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1881. return -EAGAIN;
  1882. }
  1883. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1884. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1885. "Queuing.\n");
  1886. return -EAGAIN;
  1887. }
  1888. IWL_DEBUG_INFO("Starting scan...\n");
  1889. priv->scan_bands = 2;
  1890. set_bit(STATUS_SCANNING, &priv->status);
  1891. priv->scan_start = jiffies;
  1892. priv->scan_pass_start = priv->scan_start;
  1893. queue_work(priv->workqueue, &priv->request_scan);
  1894. return 0;
  1895. }
  1896. static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
  1897. {
  1898. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  1899. if (hw_decrypt)
  1900. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  1901. else
  1902. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  1903. return 0;
  1904. }
  1905. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv,
  1906. enum ieee80211_band band)
  1907. {
  1908. if (band == IEEE80211_BAND_5GHZ) {
  1909. priv->staging_rxon.flags &=
  1910. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  1911. | RXON_FLG_CCK_MSK);
  1912. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1913. } else {
  1914. /* Copied from iwl4965_bg_post_associate() */
  1915. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  1916. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1917. else
  1918. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1919. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  1920. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1921. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  1922. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  1923. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  1924. }
  1925. }
  1926. /*
  1927. * initialize rxon structure with default values from eeprom
  1928. */
  1929. static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
  1930. {
  1931. const struct iwl4965_channel_info *ch_info;
  1932. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  1933. switch (priv->iw_mode) {
  1934. case IEEE80211_IF_TYPE_AP:
  1935. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  1936. break;
  1937. case IEEE80211_IF_TYPE_STA:
  1938. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1939. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1940. break;
  1941. case IEEE80211_IF_TYPE_IBSS:
  1942. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1943. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1944. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1945. RXON_FILTER_ACCEPT_GRP_MSK;
  1946. break;
  1947. case IEEE80211_IF_TYPE_MNTR:
  1948. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  1949. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  1950. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  1951. break;
  1952. }
  1953. #if 0
  1954. /* TODO: Figure out when short_preamble would be set and cache from
  1955. * that */
  1956. if (!hw_to_local(priv->hw)->short_preamble)
  1957. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1958. else
  1959. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1960. #endif
  1961. ch_info = iwl4965_get_channel_info(priv, priv->band,
  1962. le16_to_cpu(priv->staging_rxon.channel));
  1963. if (!ch_info)
  1964. ch_info = &priv->channel_info[0];
  1965. /*
  1966. * in some case A channels are all non IBSS
  1967. * in this case force B/G channel
  1968. */
  1969. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  1970. !(is_channel_ibss(ch_info)))
  1971. ch_info = &priv->channel_info[0];
  1972. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  1973. priv->band = ch_info->band;
  1974. iwl4965_set_flags_for_phymode(priv, priv->band);
  1975. priv->staging_rxon.ofdm_basic_rates =
  1976. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1977. priv->staging_rxon.cck_basic_rates =
  1978. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1979. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  1980. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  1981. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1982. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  1983. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  1984. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  1985. iwl4965_set_rxon_chain(priv);
  1986. }
  1987. static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
  1988. {
  1989. if (mode == IEEE80211_IF_TYPE_IBSS) {
  1990. const struct iwl4965_channel_info *ch_info;
  1991. ch_info = iwl4965_get_channel_info(priv,
  1992. priv->band,
  1993. le16_to_cpu(priv->staging_rxon.channel));
  1994. if (!ch_info || !is_channel_ibss(ch_info)) {
  1995. IWL_ERROR("channel %d not IBSS channel\n",
  1996. le16_to_cpu(priv->staging_rxon.channel));
  1997. return -EINVAL;
  1998. }
  1999. }
  2000. priv->iw_mode = mode;
  2001. iwl4965_connection_init_rx_config(priv);
  2002. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2003. iwl4965_clear_stations_table(priv);
  2004. /* dont commit rxon if rf-kill is on*/
  2005. if (!iwl4965_is_ready_rf(priv))
  2006. return -EAGAIN;
  2007. cancel_delayed_work(&priv->scan_check);
  2008. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  2009. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2010. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2011. return -EAGAIN;
  2012. }
  2013. iwl4965_commit_rxon(priv);
  2014. return 0;
  2015. }
  2016. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
  2017. struct ieee80211_tx_control *ctl,
  2018. struct iwl4965_cmd *cmd,
  2019. struct sk_buff *skb_frag,
  2020. int last_frag)
  2021. {
  2022. struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2023. switch (keyinfo->alg) {
  2024. case ALG_CCMP:
  2025. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2026. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2027. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  2028. cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
  2029. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2030. break;
  2031. case ALG_TKIP:
  2032. #if 0
  2033. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2034. if (last_frag)
  2035. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2036. 8);
  2037. else
  2038. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2039. #endif
  2040. break;
  2041. case ALG_WEP:
  2042. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2043. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2044. if (keyinfo->keylen == 13)
  2045. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2046. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2047. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2048. "with key %d\n", ctl->key_idx);
  2049. break;
  2050. default:
  2051. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2052. break;
  2053. }
  2054. }
  2055. /*
  2056. * handle build REPLY_TX command notification.
  2057. */
  2058. static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
  2059. struct iwl4965_cmd *cmd,
  2060. struct ieee80211_tx_control *ctrl,
  2061. struct ieee80211_hdr *hdr,
  2062. int is_unicast, u8 std_id)
  2063. {
  2064. __le16 *qc;
  2065. u16 fc = le16_to_cpu(hdr->frame_control);
  2066. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2067. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2068. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2069. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2070. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2071. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2072. if (ieee80211_is_probe_response(fc) &&
  2073. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2074. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2075. } else {
  2076. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2077. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2078. }
  2079. if (ieee80211_is_back_request(fc))
  2080. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  2081. cmd->cmd.tx.sta_id = std_id;
  2082. if (ieee80211_get_morefrag(hdr))
  2083. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2084. qc = ieee80211_get_qos_ctrl(hdr);
  2085. if (qc) {
  2086. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2087. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2088. } else
  2089. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2090. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2091. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2092. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2093. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2094. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2095. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2096. }
  2097. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2098. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2099. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2100. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2101. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2102. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2103. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  2104. else
  2105. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  2106. } else
  2107. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2108. cmd->cmd.tx.driver_txop = 0;
  2109. cmd->cmd.tx.tx_flags = tx_flags;
  2110. cmd->cmd.tx.next_frame_len = 0;
  2111. }
  2112. /**
  2113. * iwl4965_get_sta_id - Find station's index within station table
  2114. *
  2115. * If new IBSS station, create new entry in station table
  2116. */
  2117. static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
  2118. struct ieee80211_hdr *hdr)
  2119. {
  2120. int sta_id;
  2121. u16 fc = le16_to_cpu(hdr->frame_control);
  2122. DECLARE_MAC_BUF(mac);
  2123. /* If this frame is broadcast or management, use broadcast station id */
  2124. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2125. is_multicast_ether_addr(hdr->addr1))
  2126. return priv->hw_setting.bcast_sta_id;
  2127. switch (priv->iw_mode) {
  2128. /* If we are a client station in a BSS network, use the special
  2129. * AP station entry (that's the only station we communicate with) */
  2130. case IEEE80211_IF_TYPE_STA:
  2131. return IWL_AP_ID;
  2132. /* If we are an AP, then find the station, or use BCAST */
  2133. case IEEE80211_IF_TYPE_AP:
  2134. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2135. if (sta_id != IWL_INVALID_STATION)
  2136. return sta_id;
  2137. return priv->hw_setting.bcast_sta_id;
  2138. /* If this frame is going out to an IBSS network, find the station,
  2139. * or create a new station table entry */
  2140. case IEEE80211_IF_TYPE_IBSS:
  2141. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2142. if (sta_id != IWL_INVALID_STATION)
  2143. return sta_id;
  2144. /* Create new station table entry */
  2145. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  2146. 0, CMD_ASYNC, NULL);
  2147. if (sta_id != IWL_INVALID_STATION)
  2148. return sta_id;
  2149. IWL_DEBUG_DROP("Station %s not in station map. "
  2150. "Defaulting to broadcast...\n",
  2151. print_mac(mac, hdr->addr1));
  2152. iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2153. return priv->hw_setting.bcast_sta_id;
  2154. default:
  2155. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  2156. return priv->hw_setting.bcast_sta_id;
  2157. }
  2158. }
  2159. /*
  2160. * start REPLY_TX command process
  2161. */
  2162. static int iwl4965_tx_skb(struct iwl4965_priv *priv,
  2163. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2164. {
  2165. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2166. struct iwl4965_tfd_frame *tfd;
  2167. u32 *control_flags;
  2168. int txq_id = ctl->queue;
  2169. struct iwl4965_tx_queue *txq = NULL;
  2170. struct iwl4965_queue *q = NULL;
  2171. dma_addr_t phys_addr;
  2172. dma_addr_t txcmd_phys;
  2173. dma_addr_t scratch_phys;
  2174. struct iwl4965_cmd *out_cmd = NULL;
  2175. u16 len, idx, len_org;
  2176. u8 id, hdr_len, unicast;
  2177. u8 sta_id;
  2178. u16 seq_number = 0;
  2179. u16 fc;
  2180. __le16 *qc;
  2181. u8 wait_write_ptr = 0;
  2182. unsigned long flags;
  2183. int rc;
  2184. spin_lock_irqsave(&priv->lock, flags);
  2185. if (iwl4965_is_rfkill(priv)) {
  2186. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2187. goto drop_unlock;
  2188. }
  2189. if (!priv->vif) {
  2190. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  2191. goto drop_unlock;
  2192. }
  2193. if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
  2194. IWL_ERROR("ERROR: No TX rate available.\n");
  2195. goto drop_unlock;
  2196. }
  2197. unicast = !is_multicast_ether_addr(hdr->addr1);
  2198. id = 0;
  2199. fc = le16_to_cpu(hdr->frame_control);
  2200. #ifdef CONFIG_IWL4965_DEBUG
  2201. if (ieee80211_is_auth(fc))
  2202. IWL_DEBUG_TX("Sending AUTH frame\n");
  2203. else if (ieee80211_is_assoc_request(fc))
  2204. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2205. else if (ieee80211_is_reassoc_request(fc))
  2206. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2207. #endif
  2208. /* drop all data frame if we are not associated */
  2209. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  2210. (!iwl4965_is_associated(priv) ||
  2211. ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
  2212. !priv->assoc_station_added)) {
  2213. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  2214. goto drop_unlock;
  2215. }
  2216. spin_unlock_irqrestore(&priv->lock, flags);
  2217. hdr_len = ieee80211_get_hdrlen(fc);
  2218. /* Find (or create) index into station table for destination station */
  2219. sta_id = iwl4965_get_sta_id(priv, hdr);
  2220. if (sta_id == IWL_INVALID_STATION) {
  2221. DECLARE_MAC_BUF(mac);
  2222. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2223. print_mac(mac, hdr->addr1));
  2224. goto drop;
  2225. }
  2226. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2227. qc = ieee80211_get_qos_ctrl(hdr);
  2228. if (qc) {
  2229. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2230. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2231. IEEE80211_SCTL_SEQ;
  2232. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2233. (hdr->seq_ctrl &
  2234. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2235. seq_number += 0x10;
  2236. #ifdef CONFIG_IWL4965_HT
  2237. /* aggregation is on for this <sta,tid> */
  2238. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  2239. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2240. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  2241. #endif /* CONFIG_IWL4965_HT */
  2242. }
  2243. /* Descriptor for chosen Tx queue */
  2244. txq = &priv->txq[txq_id];
  2245. q = &txq->q;
  2246. spin_lock_irqsave(&priv->lock, flags);
  2247. /* Set up first empty TFD within this queue's circular TFD buffer */
  2248. tfd = &txq->bd[q->write_ptr];
  2249. memset(tfd, 0, sizeof(*tfd));
  2250. control_flags = (u32 *) tfd;
  2251. idx = get_cmd_index(q, q->write_ptr, 0);
  2252. /* Set up driver data for this TFD */
  2253. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2254. txq->txb[q->write_ptr].skb[0] = skb;
  2255. memcpy(&(txq->txb[q->write_ptr].status.control),
  2256. ctl, sizeof(struct ieee80211_tx_control));
  2257. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2258. out_cmd = &txq->cmd[idx];
  2259. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2260. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2261. /*
  2262. * Set up the Tx-command (not MAC!) header.
  2263. * Store the chosen Tx queue and TFD index within the sequence field;
  2264. * after Tx, uCode's Tx response will return this value so driver can
  2265. * locate the frame within the tx queue and do post-tx processing.
  2266. */
  2267. out_cmd->hdr.cmd = REPLY_TX;
  2268. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2269. INDEX_TO_SEQ(q->write_ptr)));
  2270. /* Copy MAC header from skb into command buffer */
  2271. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2272. /*
  2273. * Use the first empty entry in this queue's command buffer array
  2274. * to contain the Tx command and MAC header concatenated together
  2275. * (payload data will be in another buffer).
  2276. * Size of this varies, due to varying MAC header length.
  2277. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2278. * of the MAC header (device reads on dword boundaries).
  2279. * We'll tell device about this padding later.
  2280. */
  2281. len = priv->hw_setting.tx_cmd_len +
  2282. sizeof(struct iwl4965_cmd_header) + hdr_len;
  2283. len_org = len;
  2284. len = (len + 3) & ~3;
  2285. if (len_org != len)
  2286. len_org = 1;
  2287. else
  2288. len_org = 0;
  2289. /* Physical address of this Tx command's header (not MAC header!),
  2290. * within command buffer array. */
  2291. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
  2292. offsetof(struct iwl4965_cmd, hdr);
  2293. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2294. * first entry */
  2295. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2296. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2297. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2298. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2299. * if any (802.11 null frames have no payload). */
  2300. len = skb->len - hdr_len;
  2301. if (len) {
  2302. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2303. len, PCI_DMA_TODEVICE);
  2304. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2305. }
  2306. /* Tell 4965 about any 2-byte padding after MAC header */
  2307. if (len_org)
  2308. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2309. /* Total # bytes to be transmitted */
  2310. len = (u16)skb->len;
  2311. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2312. /* TODO need this for burst mode later on */
  2313. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2314. /* set is_hcca to 0; it probably will never be implemented */
  2315. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2316. scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
  2317. offsetof(struct iwl4965_tx_cmd, scratch);
  2318. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  2319. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  2320. if (!ieee80211_get_morefrag(hdr)) {
  2321. txq->need_update = 1;
  2322. if (qc) {
  2323. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2324. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2325. }
  2326. } else {
  2327. wait_write_ptr = 1;
  2328. txq->need_update = 0;
  2329. }
  2330. iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2331. sizeof(out_cmd->cmd.tx));
  2332. iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2333. ieee80211_get_hdrlen(fc));
  2334. /* Set up entry for this TFD in Tx byte-count array */
  2335. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2336. /* Tell device the write index *just past* this latest filled TFD */
  2337. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  2338. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2339. spin_unlock_irqrestore(&priv->lock, flags);
  2340. if (rc)
  2341. return rc;
  2342. if ((iwl4965_queue_space(q) < q->high_mark)
  2343. && priv->mac80211_registered) {
  2344. if (wait_write_ptr) {
  2345. spin_lock_irqsave(&priv->lock, flags);
  2346. txq->need_update = 1;
  2347. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2348. spin_unlock_irqrestore(&priv->lock, flags);
  2349. }
  2350. ieee80211_stop_queue(priv->hw, ctl->queue);
  2351. }
  2352. return 0;
  2353. drop_unlock:
  2354. spin_unlock_irqrestore(&priv->lock, flags);
  2355. drop:
  2356. return -1;
  2357. }
  2358. static void iwl4965_set_rate(struct iwl4965_priv *priv)
  2359. {
  2360. const struct ieee80211_supported_band *hw = NULL;
  2361. struct ieee80211_rate *rate;
  2362. int i;
  2363. hw = iwl4965_get_hw_mode(priv, priv->band);
  2364. if (!hw) {
  2365. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2366. return;
  2367. }
  2368. priv->active_rate = 0;
  2369. priv->active_rate_basic = 0;
  2370. for (i = 0; i < hw->n_bitrates; i++) {
  2371. rate = &(hw->bitrates[i]);
  2372. if (rate->hw_value < IWL_RATE_COUNT)
  2373. priv->active_rate |= (1 << rate->hw_value);
  2374. }
  2375. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2376. priv->active_rate, priv->active_rate_basic);
  2377. /*
  2378. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2379. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2380. * OFDM
  2381. */
  2382. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2383. priv->staging_rxon.cck_basic_rates =
  2384. ((priv->active_rate_basic &
  2385. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2386. else
  2387. priv->staging_rxon.cck_basic_rates =
  2388. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2389. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2390. priv->staging_rxon.ofdm_basic_rates =
  2391. ((priv->active_rate_basic &
  2392. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2393. IWL_FIRST_OFDM_RATE) & 0xFF;
  2394. else
  2395. priv->staging_rxon.ofdm_basic_rates =
  2396. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2397. }
  2398. static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
  2399. {
  2400. unsigned long flags;
  2401. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2402. return;
  2403. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2404. disable_radio ? "OFF" : "ON");
  2405. if (disable_radio) {
  2406. iwl4965_scan_cancel(priv);
  2407. /* FIXME: This is a workaround for AP */
  2408. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2409. spin_lock_irqsave(&priv->lock, flags);
  2410. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2411. CSR_UCODE_SW_BIT_RFKILL);
  2412. spin_unlock_irqrestore(&priv->lock, flags);
  2413. iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2414. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2415. }
  2416. return;
  2417. }
  2418. spin_lock_irqsave(&priv->lock, flags);
  2419. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2420. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2421. spin_unlock_irqrestore(&priv->lock, flags);
  2422. /* wake up ucode */
  2423. msleep(10);
  2424. spin_lock_irqsave(&priv->lock, flags);
  2425. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  2426. if (!iwl4965_grab_nic_access(priv))
  2427. iwl4965_release_nic_access(priv);
  2428. spin_unlock_irqrestore(&priv->lock, flags);
  2429. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2430. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2431. "disabled by HW switch\n");
  2432. return;
  2433. }
  2434. queue_work(priv->workqueue, &priv->restart);
  2435. return;
  2436. }
  2437. void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
  2438. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2439. {
  2440. u16 fc =
  2441. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2442. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2443. return;
  2444. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2445. return;
  2446. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2447. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2448. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2449. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2450. RX_RES_STATUS_BAD_ICV_MIC)
  2451. stats->flag |= RX_FLAG_MMIC_ERROR;
  2452. case RX_RES_STATUS_SEC_TYPE_WEP:
  2453. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2454. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2455. RX_RES_STATUS_DECRYPT_OK) {
  2456. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2457. stats->flag |= RX_FLAG_DECRYPTED;
  2458. }
  2459. break;
  2460. default:
  2461. break;
  2462. }
  2463. }
  2464. #define IWL_PACKET_RETRY_TIME HZ
  2465. int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  2466. {
  2467. u16 sc = le16_to_cpu(header->seq_ctrl);
  2468. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2469. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2470. u16 *last_seq, *last_frag;
  2471. unsigned long *last_time;
  2472. switch (priv->iw_mode) {
  2473. case IEEE80211_IF_TYPE_IBSS:{
  2474. struct list_head *p;
  2475. struct iwl4965_ibss_seq *entry = NULL;
  2476. u8 *mac = header->addr2;
  2477. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2478. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2479. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2480. if (!compare_ether_addr(entry->mac, mac))
  2481. break;
  2482. }
  2483. if (p == &priv->ibss_mac_hash[index]) {
  2484. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2485. if (!entry) {
  2486. IWL_ERROR("Cannot malloc new mac entry\n");
  2487. return 0;
  2488. }
  2489. memcpy(entry->mac, mac, ETH_ALEN);
  2490. entry->seq_num = seq;
  2491. entry->frag_num = frag;
  2492. entry->packet_time = jiffies;
  2493. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2494. return 0;
  2495. }
  2496. last_seq = &entry->seq_num;
  2497. last_frag = &entry->frag_num;
  2498. last_time = &entry->packet_time;
  2499. break;
  2500. }
  2501. case IEEE80211_IF_TYPE_STA:
  2502. last_seq = &priv->last_seq_num;
  2503. last_frag = &priv->last_frag_num;
  2504. last_time = &priv->last_packet_time;
  2505. break;
  2506. default:
  2507. return 0;
  2508. }
  2509. if ((*last_seq == seq) &&
  2510. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2511. if (*last_frag == frag)
  2512. goto drop;
  2513. if (*last_frag + 1 != frag)
  2514. /* out-of-order fragment */
  2515. goto drop;
  2516. } else
  2517. *last_seq = seq;
  2518. *last_frag = frag;
  2519. *last_time = jiffies;
  2520. return 0;
  2521. drop:
  2522. return 1;
  2523. }
  2524. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2525. #include "iwl-spectrum.h"
  2526. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2527. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2528. #define TIME_UNIT 1024
  2529. /*
  2530. * extended beacon time format
  2531. * time in usec will be changed into a 32-bit value in 8:24 format
  2532. * the high 1 byte is the beacon counts
  2533. * the lower 3 bytes is the time in usec within one beacon interval
  2534. */
  2535. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2536. {
  2537. u32 quot;
  2538. u32 rem;
  2539. u32 interval = beacon_interval * 1024;
  2540. if (!interval || !usec)
  2541. return 0;
  2542. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2543. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2544. return (quot << 24) + rem;
  2545. }
  2546. /* base is usually what we get from ucode with each received frame,
  2547. * the same as HW timer counter counting down
  2548. */
  2549. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2550. {
  2551. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2552. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2553. u32 interval = beacon_interval * TIME_UNIT;
  2554. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2555. (addon & BEACON_TIME_MASK_HIGH);
  2556. if (base_low > addon_low)
  2557. res += base_low - addon_low;
  2558. else if (base_low < addon_low) {
  2559. res += interval + base_low - addon_low;
  2560. res += (1 << 24);
  2561. } else
  2562. res += (1 << 24);
  2563. return cpu_to_le32(res);
  2564. }
  2565. static int iwl4965_get_measurement(struct iwl4965_priv *priv,
  2566. struct ieee80211_measurement_params *params,
  2567. u8 type)
  2568. {
  2569. struct iwl4965_spectrum_cmd spectrum;
  2570. struct iwl4965_rx_packet *res;
  2571. struct iwl4965_host_cmd cmd = {
  2572. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2573. .data = (void *)&spectrum,
  2574. .meta.flags = CMD_WANT_SKB,
  2575. };
  2576. u32 add_time = le64_to_cpu(params->start_time);
  2577. int rc;
  2578. int spectrum_resp_status;
  2579. int duration = le16_to_cpu(params->duration);
  2580. if (iwl4965_is_associated(priv))
  2581. add_time =
  2582. iwl4965_usecs_to_beacons(
  2583. le64_to_cpu(params->start_time) - priv->last_tsf,
  2584. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2585. memset(&spectrum, 0, sizeof(spectrum));
  2586. spectrum.channel_count = cpu_to_le16(1);
  2587. spectrum.flags =
  2588. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2589. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2590. cmd.len = sizeof(spectrum);
  2591. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2592. if (iwl4965_is_associated(priv))
  2593. spectrum.start_time =
  2594. iwl4965_add_beacon_time(priv->last_beacon_time,
  2595. add_time,
  2596. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2597. else
  2598. spectrum.start_time = 0;
  2599. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2600. spectrum.channels[0].channel = params->channel;
  2601. spectrum.channels[0].type = type;
  2602. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2603. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2604. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2605. rc = iwl4965_send_cmd_sync(priv, &cmd);
  2606. if (rc)
  2607. return rc;
  2608. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2609. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2610. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2611. rc = -EIO;
  2612. }
  2613. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2614. switch (spectrum_resp_status) {
  2615. case 0: /* Command will be handled */
  2616. if (res->u.spectrum.id != 0xff) {
  2617. IWL_DEBUG_INFO
  2618. ("Replaced existing measurement: %d\n",
  2619. res->u.spectrum.id);
  2620. priv->measurement_status &= ~MEASUREMENT_READY;
  2621. }
  2622. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2623. rc = 0;
  2624. break;
  2625. case 1: /* Command will not be handled */
  2626. rc = -EAGAIN;
  2627. break;
  2628. }
  2629. dev_kfree_skb_any(cmd.meta.u.skb);
  2630. return rc;
  2631. }
  2632. #endif
  2633. static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
  2634. struct iwl4965_tx_info *tx_sta)
  2635. {
  2636. tx_sta->status.ack_signal = 0;
  2637. tx_sta->status.excessive_retries = 0;
  2638. tx_sta->status.queue_length = 0;
  2639. tx_sta->status.queue_number = 0;
  2640. if (in_interrupt())
  2641. ieee80211_tx_status_irqsafe(priv->hw,
  2642. tx_sta->skb[0], &(tx_sta->status));
  2643. else
  2644. ieee80211_tx_status(priv->hw,
  2645. tx_sta->skb[0], &(tx_sta->status));
  2646. tx_sta->skb[0] = NULL;
  2647. }
  2648. /**
  2649. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2650. *
  2651. * When FW advances 'R' index, all entries between old and new 'R' index
  2652. * need to be reclaimed. As result, some free space forms. If there is
  2653. * enough free space (> low mark), wake the stack that feeds us.
  2654. */
  2655. int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
  2656. {
  2657. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2658. struct iwl4965_queue *q = &txq->q;
  2659. int nfreed = 0;
  2660. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2661. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2662. "is out of range [0-%d] %d %d.\n", txq_id,
  2663. index, q->n_bd, q->write_ptr, q->read_ptr);
  2664. return 0;
  2665. }
  2666. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2667. q->read_ptr != index;
  2668. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2669. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2670. iwl4965_txstatus_to_ieee(priv,
  2671. &(txq->txb[txq->q.read_ptr]));
  2672. iwl4965_hw_txq_free_tfd(priv, txq);
  2673. } else if (nfreed > 1) {
  2674. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2675. q->write_ptr, q->read_ptr);
  2676. queue_work(priv->workqueue, &priv->restart);
  2677. }
  2678. nfreed++;
  2679. }
  2680. /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2681. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2682. priv->mac80211_registered)
  2683. ieee80211_wake_queue(priv->hw, txq_id); */
  2684. return nfreed;
  2685. }
  2686. static int iwl4965_is_tx_success(u32 status)
  2687. {
  2688. status &= TX_STATUS_MSK;
  2689. return (status == TX_STATUS_SUCCESS)
  2690. || (status == TX_STATUS_DIRECT_DONE);
  2691. }
  2692. /******************************************************************************
  2693. *
  2694. * Generic RX handler implementations
  2695. *
  2696. ******************************************************************************/
  2697. #ifdef CONFIG_IWL4965_HT
  2698. static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
  2699. struct ieee80211_hdr *hdr)
  2700. {
  2701. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2702. return IWL_AP_ID;
  2703. else {
  2704. u8 *da = ieee80211_get_DA(hdr);
  2705. return iwl4965_hw_find_station(priv, da);
  2706. }
  2707. }
  2708. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2709. struct iwl4965_priv *priv, int txq_id, int idx)
  2710. {
  2711. if (priv->txq[txq_id].txb[idx].skb[0])
  2712. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2713. txb[idx].skb[0]->data;
  2714. return NULL;
  2715. }
  2716. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2717. {
  2718. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2719. tx_resp->frame_count);
  2720. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2721. }
  2722. /**
  2723. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2724. */
  2725. static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
  2726. struct iwl4965_ht_agg *agg,
  2727. struct iwl4965_tx_resp_agg *tx_resp,
  2728. u16 start_idx)
  2729. {
  2730. u16 status;
  2731. struct agg_tx_status *frame_status = &tx_resp->status;
  2732. struct ieee80211_tx_status *tx_status = NULL;
  2733. struct ieee80211_hdr *hdr = NULL;
  2734. int i, sh;
  2735. int txq_id, idx;
  2736. u16 seq;
  2737. if (agg->wait_for_ba)
  2738. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  2739. agg->frame_count = tx_resp->frame_count;
  2740. agg->start_idx = start_idx;
  2741. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2742. agg->bitmap = 0;
  2743. /* # frames attempted by Tx command */
  2744. if (agg->frame_count == 1) {
  2745. /* Only one frame was attempted; no block-ack will arrive */
  2746. status = le16_to_cpu(frame_status[0].status);
  2747. seq = le16_to_cpu(frame_status[0].sequence);
  2748. idx = SEQ_TO_INDEX(seq);
  2749. txq_id = SEQ_TO_QUEUE(seq);
  2750. /* FIXME: code repetition */
  2751. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  2752. agg->frame_count, agg->start_idx, idx);
  2753. tx_status = &(priv->txq[txq_id].txb[idx].status);
  2754. tx_status->retry_count = tx_resp->failure_frame;
  2755. tx_status->queue_number = status & 0xff;
  2756. tx_status->queue_length = tx_resp->failure_rts;
  2757. tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
  2758. tx_status->flags = iwl4965_is_tx_success(status)?
  2759. IEEE80211_TX_STATUS_ACK : 0;
  2760. iwl4965_hwrate_to_tx_control(priv,
  2761. le32_to_cpu(tx_resp->rate_n_flags),
  2762. &tx_status->control);
  2763. /* FIXME: code repetition end */
  2764. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2765. status & 0xff, tx_resp->failure_frame);
  2766. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2767. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2768. agg->wait_for_ba = 0;
  2769. } else {
  2770. /* Two or more frames were attempted; expect block-ack */
  2771. u64 bitmap = 0;
  2772. int start = agg->start_idx;
  2773. /* Construct bit-map of pending frames within Tx window */
  2774. for (i = 0; i < agg->frame_count; i++) {
  2775. u16 sc;
  2776. status = le16_to_cpu(frame_status[i].status);
  2777. seq = le16_to_cpu(frame_status[i].sequence);
  2778. idx = SEQ_TO_INDEX(seq);
  2779. txq_id = SEQ_TO_QUEUE(seq);
  2780. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  2781. AGG_TX_STATE_ABORT_MSK))
  2782. continue;
  2783. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  2784. agg->frame_count, txq_id, idx);
  2785. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  2786. sc = le16_to_cpu(hdr->seq_ctrl);
  2787. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  2788. IWL_ERROR("BUG_ON idx doesn't match seq control"
  2789. " idx=%d, seq_idx=%d, seq=%d\n",
  2790. idx, SEQ_TO_SN(sc),
  2791. hdr->seq_ctrl);
  2792. return -1;
  2793. }
  2794. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  2795. i, idx, SEQ_TO_SN(sc));
  2796. sh = idx - start;
  2797. if (sh > 64) {
  2798. sh = (start - idx) + 0xff;
  2799. bitmap = bitmap << sh;
  2800. sh = 0;
  2801. start = idx;
  2802. } else if (sh < -64)
  2803. sh = 0xff - (start - idx);
  2804. else if (sh < 0) {
  2805. sh = start - idx;
  2806. start = idx;
  2807. bitmap = bitmap << sh;
  2808. sh = 0;
  2809. }
  2810. bitmap |= (1 << sh);
  2811. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  2812. start, (u32)(bitmap & 0xFFFFFFFF));
  2813. }
  2814. agg->bitmap = bitmap;
  2815. agg->start_idx = start;
  2816. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2817. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  2818. agg->frame_count, agg->start_idx,
  2819. agg->bitmap);
  2820. if (bitmap)
  2821. agg->wait_for_ba = 1;
  2822. }
  2823. return 0;
  2824. }
  2825. #endif
  2826. /**
  2827. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  2828. */
  2829. static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
  2830. struct iwl4965_rx_mem_buffer *rxb)
  2831. {
  2832. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2833. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2834. int txq_id = SEQ_TO_QUEUE(sequence);
  2835. int index = SEQ_TO_INDEX(sequence);
  2836. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2837. struct ieee80211_tx_status *tx_status;
  2838. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2839. u32 status = le32_to_cpu(tx_resp->status);
  2840. #ifdef CONFIG_IWL4965_HT
  2841. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  2842. struct ieee80211_hdr *hdr;
  2843. __le16 *qc;
  2844. #endif
  2845. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2846. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2847. "is out of range [0-%d] %d %d\n", txq_id,
  2848. index, txq->q.n_bd, txq->q.write_ptr,
  2849. txq->q.read_ptr);
  2850. return;
  2851. }
  2852. #ifdef CONFIG_IWL4965_HT
  2853. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  2854. qc = ieee80211_get_qos_ctrl(hdr);
  2855. if (qc)
  2856. tid = le16_to_cpu(*qc) & 0xf;
  2857. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  2858. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  2859. IWL_ERROR("Station not known\n");
  2860. return;
  2861. }
  2862. if (txq->sched_retry) {
  2863. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  2864. struct iwl4965_ht_agg *agg = NULL;
  2865. if (!qc)
  2866. return;
  2867. agg = &priv->stations[sta_id].tid[tid].agg;
  2868. iwl4965_tx_status_reply_tx(priv, agg,
  2869. (struct iwl4965_tx_resp_agg *)tx_resp, index);
  2870. if ((tx_resp->frame_count == 1) &&
  2871. !iwl4965_is_tx_success(status)) {
  2872. /* TODO: send BAR */
  2873. }
  2874. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  2875. int freed;
  2876. index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  2877. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  2878. "%d index %d\n", scd_ssn , index);
  2879. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2880. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2881. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2882. txq_id >= 0 && priv->mac80211_registered &&
  2883. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  2884. ieee80211_wake_queue(priv->hw, txq_id);
  2885. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2886. }
  2887. } else {
  2888. #endif /* CONFIG_IWL4965_HT */
  2889. tx_status = &(txq->txb[txq->q.read_ptr].status);
  2890. tx_status->retry_count = tx_resp->failure_frame;
  2891. tx_status->queue_number = status;
  2892. tx_status->queue_length = tx_resp->bt_kill_count;
  2893. tx_status->queue_length |= tx_resp->failure_rts;
  2894. tx_status->flags =
  2895. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2896. iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
  2897. &tx_status->control);
  2898. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  2899. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  2900. status, le32_to_cpu(tx_resp->rate_n_flags),
  2901. tx_resp->failure_frame);
  2902. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2903. if (index != -1) {
  2904. int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2905. #ifdef CONFIG_IWL4965_HT
  2906. if (tid != MAX_TID_COUNT)
  2907. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2908. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2909. (txq_id >= 0) &&
  2910. priv->mac80211_registered)
  2911. ieee80211_wake_queue(priv->hw, txq_id);
  2912. if (tid != MAX_TID_COUNT)
  2913. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2914. #endif
  2915. }
  2916. #ifdef CONFIG_IWL4965_HT
  2917. }
  2918. #endif /* CONFIG_IWL4965_HT */
  2919. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  2920. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  2921. }
  2922. static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
  2923. struct iwl4965_rx_mem_buffer *rxb)
  2924. {
  2925. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2926. struct iwl4965_alive_resp *palive;
  2927. struct delayed_work *pwork;
  2928. palive = &pkt->u.alive_frame;
  2929. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2930. "0x%01X 0x%01X\n",
  2931. palive->is_valid, palive->ver_type,
  2932. palive->ver_subtype);
  2933. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2934. IWL_DEBUG_INFO("Initialization Alive received.\n");
  2935. memcpy(&priv->card_alive_init,
  2936. &pkt->u.alive_frame,
  2937. sizeof(struct iwl4965_init_alive_resp));
  2938. pwork = &priv->init_alive_start;
  2939. } else {
  2940. IWL_DEBUG_INFO("Runtime Alive received.\n");
  2941. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2942. sizeof(struct iwl4965_alive_resp));
  2943. pwork = &priv->alive_start;
  2944. }
  2945. /* We delay the ALIVE response by 5ms to
  2946. * give the HW RF Kill time to activate... */
  2947. if (palive->is_valid == UCODE_VALID_OK)
  2948. queue_delayed_work(priv->workqueue, pwork,
  2949. msecs_to_jiffies(5));
  2950. else
  2951. IWL_WARNING("uCode did not respond OK.\n");
  2952. }
  2953. static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
  2954. struct iwl4965_rx_mem_buffer *rxb)
  2955. {
  2956. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2957. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2958. return;
  2959. }
  2960. static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
  2961. struct iwl4965_rx_mem_buffer *rxb)
  2962. {
  2963. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2964. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  2965. "seq 0x%04X ser 0x%08X\n",
  2966. le32_to_cpu(pkt->u.err_resp.error_type),
  2967. get_cmd_string(pkt->u.err_resp.cmd_id),
  2968. pkt->u.err_resp.cmd_id,
  2969. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2970. le32_to_cpu(pkt->u.err_resp.error_info));
  2971. }
  2972. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2973. static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  2974. {
  2975. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2976. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  2977. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  2978. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2979. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2980. rxon->channel = csa->channel;
  2981. priv->staging_rxon.channel = csa->channel;
  2982. }
  2983. static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
  2984. struct iwl4965_rx_mem_buffer *rxb)
  2985. {
  2986. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2987. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2988. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2989. if (!report->state) {
  2990. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2991. "Spectrum Measure Notification: Start\n");
  2992. return;
  2993. }
  2994. memcpy(&priv->measure_report, report, sizeof(*report));
  2995. priv->measurement_status |= MEASUREMENT_READY;
  2996. #endif
  2997. }
  2998. static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
  2999. struct iwl4965_rx_mem_buffer *rxb)
  3000. {
  3001. #ifdef CONFIG_IWL4965_DEBUG
  3002. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3003. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3004. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3005. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3006. #endif
  3007. }
  3008. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
  3009. struct iwl4965_rx_mem_buffer *rxb)
  3010. {
  3011. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3012. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3013. "notification for %s:\n",
  3014. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3015. iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3016. }
  3017. static void iwl4965_bg_beacon_update(struct work_struct *work)
  3018. {
  3019. struct iwl4965_priv *priv =
  3020. container_of(work, struct iwl4965_priv, beacon_update);
  3021. struct sk_buff *beacon;
  3022. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3023. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  3024. if (!beacon) {
  3025. IWL_ERROR("update beacon failed\n");
  3026. return;
  3027. }
  3028. mutex_lock(&priv->mutex);
  3029. /* new beacon skb is allocated every time; dispose previous.*/
  3030. if (priv->ibss_beacon)
  3031. dev_kfree_skb(priv->ibss_beacon);
  3032. priv->ibss_beacon = beacon;
  3033. mutex_unlock(&priv->mutex);
  3034. iwl4965_send_beacon_cmd(priv);
  3035. }
  3036. static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
  3037. struct iwl4965_rx_mem_buffer *rxb)
  3038. {
  3039. #ifdef CONFIG_IWL4965_DEBUG
  3040. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3041. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  3042. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3043. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3044. "tsf %d %d rate %d\n",
  3045. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3046. beacon->beacon_notify_hdr.failure_frame,
  3047. le32_to_cpu(beacon->ibss_mgr_status),
  3048. le32_to_cpu(beacon->high_tsf),
  3049. le32_to_cpu(beacon->low_tsf), rate);
  3050. #endif
  3051. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3052. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3053. queue_work(priv->workqueue, &priv->beacon_update);
  3054. }
  3055. /* Service response to REPLY_SCAN_CMD (0x80) */
  3056. static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
  3057. struct iwl4965_rx_mem_buffer *rxb)
  3058. {
  3059. #ifdef CONFIG_IWL4965_DEBUG
  3060. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3061. struct iwl4965_scanreq_notification *notif =
  3062. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  3063. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3064. #endif
  3065. }
  3066. /* Service SCAN_START_NOTIFICATION (0x82) */
  3067. static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
  3068. struct iwl4965_rx_mem_buffer *rxb)
  3069. {
  3070. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3071. struct iwl4965_scanstart_notification *notif =
  3072. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  3073. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3074. IWL_DEBUG_SCAN("Scan start: "
  3075. "%d [802.11%s] "
  3076. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3077. notif->channel,
  3078. notif->band ? "bg" : "a",
  3079. notif->tsf_high,
  3080. notif->tsf_low, notif->status, notif->beacon_timer);
  3081. }
  3082. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3083. static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
  3084. struct iwl4965_rx_mem_buffer *rxb)
  3085. {
  3086. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3087. struct iwl4965_scanresults_notification *notif =
  3088. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  3089. IWL_DEBUG_SCAN("Scan ch.res: "
  3090. "%d [802.11%s] "
  3091. "(TSF: 0x%08X:%08X) - %d "
  3092. "elapsed=%lu usec (%dms since last)\n",
  3093. notif->channel,
  3094. notif->band ? "bg" : "a",
  3095. le32_to_cpu(notif->tsf_high),
  3096. le32_to_cpu(notif->tsf_low),
  3097. le32_to_cpu(notif->statistics[0]),
  3098. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3099. jiffies_to_msecs(elapsed_jiffies
  3100. (priv->last_scan_jiffies, jiffies)));
  3101. priv->last_scan_jiffies = jiffies;
  3102. priv->next_scan_jiffies = 0;
  3103. }
  3104. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3105. static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
  3106. struct iwl4965_rx_mem_buffer *rxb)
  3107. {
  3108. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3109. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3110. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3111. scan_notif->scanned_channels,
  3112. scan_notif->tsf_low,
  3113. scan_notif->tsf_high, scan_notif->status);
  3114. /* The HW is no longer scanning */
  3115. clear_bit(STATUS_SCAN_HW, &priv->status);
  3116. /* The scan completion notification came in, so kill that timer... */
  3117. cancel_delayed_work(&priv->scan_check);
  3118. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3119. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3120. jiffies_to_msecs(elapsed_jiffies
  3121. (priv->scan_pass_start, jiffies)));
  3122. /* Remove this scanned band from the list
  3123. * of pending bands to scan */
  3124. priv->scan_bands--;
  3125. /* If a request to abort was given, or the scan did not succeed
  3126. * then we reset the scan state machine and terminate,
  3127. * re-queuing another scan if one has been requested */
  3128. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3129. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3130. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3131. } else {
  3132. /* If there are more bands on this scan pass reschedule */
  3133. if (priv->scan_bands > 0)
  3134. goto reschedule;
  3135. }
  3136. priv->last_scan_jiffies = jiffies;
  3137. priv->next_scan_jiffies = 0;
  3138. IWL_DEBUG_INFO("Setting scan to off\n");
  3139. clear_bit(STATUS_SCANNING, &priv->status);
  3140. IWL_DEBUG_INFO("Scan took %dms\n",
  3141. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3142. queue_work(priv->workqueue, &priv->scan_completed);
  3143. return;
  3144. reschedule:
  3145. priv->scan_pass_start = jiffies;
  3146. queue_work(priv->workqueue, &priv->request_scan);
  3147. }
  3148. /* Handle notification from uCode that card's power state is changing
  3149. * due to software, hardware, or critical temperature RFKILL */
  3150. static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
  3151. struct iwl4965_rx_mem_buffer *rxb)
  3152. {
  3153. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3154. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3155. unsigned long status = priv->status;
  3156. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3157. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3158. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3159. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3160. RF_CARD_DISABLED)) {
  3161. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3162. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3163. if (!iwl4965_grab_nic_access(priv)) {
  3164. iwl4965_write_direct32(
  3165. priv, HBUS_TARG_MBX_C,
  3166. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3167. iwl4965_release_nic_access(priv);
  3168. }
  3169. if (!(flags & RXON_CARD_DISABLED)) {
  3170. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3171. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3172. if (!iwl4965_grab_nic_access(priv)) {
  3173. iwl4965_write_direct32(
  3174. priv, HBUS_TARG_MBX_C,
  3175. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3176. iwl4965_release_nic_access(priv);
  3177. }
  3178. }
  3179. if (flags & RF_CARD_DISABLED) {
  3180. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3181. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3182. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3183. if (!iwl4965_grab_nic_access(priv))
  3184. iwl4965_release_nic_access(priv);
  3185. }
  3186. }
  3187. if (flags & HW_CARD_DISABLED)
  3188. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3189. else
  3190. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3191. if (flags & SW_CARD_DISABLED)
  3192. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3193. else
  3194. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3195. if (!(flags & RXON_CARD_DISABLED))
  3196. iwl4965_scan_cancel(priv);
  3197. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3198. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3199. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3200. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3201. queue_work(priv->workqueue, &priv->rf_kill);
  3202. else
  3203. wake_up_interruptible(&priv->wait_command_queue);
  3204. }
  3205. /**
  3206. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  3207. *
  3208. * Setup the RX handlers for each of the reply types sent from the uCode
  3209. * to the host.
  3210. *
  3211. * This function chains into the hardware specific files for them to setup
  3212. * any hardware specific handlers as well.
  3213. */
  3214. static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
  3215. {
  3216. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  3217. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  3218. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  3219. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  3220. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3221. iwl4965_rx_spectrum_measure_notif;
  3222. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  3223. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3224. iwl4965_rx_pm_debug_statistics_notif;
  3225. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  3226. /*
  3227. * The same handler is used for both the REPLY to a discrete
  3228. * statistics request from the host as well as for the periodic
  3229. * statistics notifications (after received beacons) from the uCode.
  3230. */
  3231. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  3232. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  3233. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  3234. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  3235. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3236. iwl4965_rx_scan_results_notif;
  3237. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3238. iwl4965_rx_scan_complete_notif;
  3239. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  3240. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  3241. /* Set up hardware specific Rx handlers */
  3242. iwl4965_hw_rx_handler_setup(priv);
  3243. }
  3244. /**
  3245. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3246. * @rxb: Rx buffer to reclaim
  3247. *
  3248. * If an Rx buffer has an async callback associated with it the callback
  3249. * will be executed. The attached skb (if present) will only be freed
  3250. * if the callback returns 1
  3251. */
  3252. static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
  3253. struct iwl4965_rx_mem_buffer *rxb)
  3254. {
  3255. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3256. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3257. int txq_id = SEQ_TO_QUEUE(sequence);
  3258. int index = SEQ_TO_INDEX(sequence);
  3259. int huge = sequence & SEQ_HUGE_FRAME;
  3260. int cmd_index;
  3261. struct iwl4965_cmd *cmd;
  3262. /* If a Tx command is being handled and it isn't in the actual
  3263. * command queue then there a command routing bug has been introduced
  3264. * in the queue management code. */
  3265. if (txq_id != IWL_CMD_QUEUE_NUM)
  3266. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3267. txq_id, pkt->hdr.cmd);
  3268. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3269. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3270. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3271. /* Input error checking is done when commands are added to queue. */
  3272. if (cmd->meta.flags & CMD_WANT_SKB) {
  3273. cmd->meta.source->u.skb = rxb->skb;
  3274. rxb->skb = NULL;
  3275. } else if (cmd->meta.u.callback &&
  3276. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3277. rxb->skb = NULL;
  3278. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3279. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3280. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3281. wake_up_interruptible(&priv->wait_command_queue);
  3282. }
  3283. }
  3284. /************************** RX-FUNCTIONS ****************************/
  3285. /*
  3286. * Rx theory of operation
  3287. *
  3288. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3289. * each of which point to Receive Buffers to be filled by 4965. These get
  3290. * used not only for Rx frames, but for any command response or notification
  3291. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3292. * of indexes into the circular buffer.
  3293. *
  3294. * Rx Queue Indexes
  3295. * The host/firmware share two index registers for managing the Rx buffers.
  3296. *
  3297. * The READ index maps to the first position that the firmware may be writing
  3298. * to -- the driver can read up to (but not including) this position and get
  3299. * good data.
  3300. * The READ index is managed by the firmware once the card is enabled.
  3301. *
  3302. * The WRITE index maps to the last position the driver has read from -- the
  3303. * position preceding WRITE is the last slot the firmware can place a packet.
  3304. *
  3305. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3306. * WRITE = READ.
  3307. *
  3308. * During initialization, the host sets up the READ queue position to the first
  3309. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3310. *
  3311. * When the firmware places a packet in a buffer, it will advance the READ index
  3312. * and fire the RX interrupt. The driver can then query the READ index and
  3313. * process as many packets as possible, moving the WRITE index forward as it
  3314. * resets the Rx queue buffers with new memory.
  3315. *
  3316. * The management in the driver is as follows:
  3317. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3318. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3319. * to replenish the iwl->rxq->rx_free.
  3320. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3321. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3322. * 'processed' and 'read' driver indexes as well)
  3323. * + A received packet is processed and handed to the kernel network stack,
  3324. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3325. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3326. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3327. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3328. * were enough free buffers and RX_STALLED is set it is cleared.
  3329. *
  3330. *
  3331. * Driver sequence:
  3332. *
  3333. * iwl4965_rx_queue_alloc() Allocates rx_free
  3334. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3335. * iwl4965_rx_queue_restock
  3336. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3337. * queue, updates firmware pointers, and updates
  3338. * the WRITE index. If insufficient rx_free buffers
  3339. * are available, schedules iwl4965_rx_replenish
  3340. *
  3341. * -- enable interrupts --
  3342. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3343. * READ INDEX, detaching the SKB from the pool.
  3344. * Moves the packet buffer from queue to rx_used.
  3345. * Calls iwl4965_rx_queue_restock to refill any empty
  3346. * slots.
  3347. * ...
  3348. *
  3349. */
  3350. /**
  3351. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3352. */
  3353. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3354. {
  3355. int s = q->read - q->write;
  3356. if (s <= 0)
  3357. s += RX_QUEUE_SIZE;
  3358. /* keep some buffer to not confuse full and empty queue */
  3359. s -= 2;
  3360. if (s < 0)
  3361. s = 0;
  3362. return s;
  3363. }
  3364. /**
  3365. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3366. */
  3367. int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
  3368. {
  3369. u32 reg = 0;
  3370. int rc = 0;
  3371. unsigned long flags;
  3372. spin_lock_irqsave(&q->lock, flags);
  3373. if (q->need_update == 0)
  3374. goto exit_unlock;
  3375. /* If power-saving is in use, make sure device is awake */
  3376. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3377. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3378. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3379. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3380. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3381. goto exit_unlock;
  3382. }
  3383. rc = iwl4965_grab_nic_access(priv);
  3384. if (rc)
  3385. goto exit_unlock;
  3386. /* Device expects a multiple of 8 */
  3387. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3388. q->write & ~0x7);
  3389. iwl4965_release_nic_access(priv);
  3390. /* Else device is assumed to be awake */
  3391. } else
  3392. /* Device expects a multiple of 8 */
  3393. iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3394. q->need_update = 0;
  3395. exit_unlock:
  3396. spin_unlock_irqrestore(&q->lock, flags);
  3397. return rc;
  3398. }
  3399. /**
  3400. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3401. */
  3402. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
  3403. dma_addr_t dma_addr)
  3404. {
  3405. return cpu_to_le32((u32)(dma_addr >> 8));
  3406. }
  3407. /**
  3408. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3409. *
  3410. * If there are slots in the RX queue that need to be restocked,
  3411. * and we have free pre-allocated buffers, fill the ranks as much
  3412. * as we can, pulling from rx_free.
  3413. *
  3414. * This moves the 'write' index forward to catch up with 'processed', and
  3415. * also updates the memory address in the firmware to reference the new
  3416. * target buffer.
  3417. */
  3418. static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
  3419. {
  3420. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3421. struct list_head *element;
  3422. struct iwl4965_rx_mem_buffer *rxb;
  3423. unsigned long flags;
  3424. int write, rc;
  3425. spin_lock_irqsave(&rxq->lock, flags);
  3426. write = rxq->write & ~0x7;
  3427. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3428. /* Get next free Rx buffer, remove from free list */
  3429. element = rxq->rx_free.next;
  3430. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3431. list_del(element);
  3432. /* Point to Rx buffer via next RBD in circular buffer */
  3433. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3434. rxq->queue[rxq->write] = rxb;
  3435. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3436. rxq->free_count--;
  3437. }
  3438. spin_unlock_irqrestore(&rxq->lock, flags);
  3439. /* If the pre-allocated buffer pool is dropping low, schedule to
  3440. * refill it */
  3441. if (rxq->free_count <= RX_LOW_WATERMARK)
  3442. queue_work(priv->workqueue, &priv->rx_replenish);
  3443. /* If we've added more space for the firmware to place data, tell it.
  3444. * Increment device's write pointer in multiples of 8. */
  3445. if ((write != (rxq->write & ~0x7))
  3446. || (abs(rxq->write - rxq->read) > 7)) {
  3447. spin_lock_irqsave(&rxq->lock, flags);
  3448. rxq->need_update = 1;
  3449. spin_unlock_irqrestore(&rxq->lock, flags);
  3450. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3451. if (rc)
  3452. return rc;
  3453. }
  3454. return 0;
  3455. }
  3456. /**
  3457. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3458. *
  3459. * When moving to rx_free an SKB is allocated for the slot.
  3460. *
  3461. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3462. * This is called as a scheduled work item (except for during initialization)
  3463. */
  3464. static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
  3465. {
  3466. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3467. struct list_head *element;
  3468. struct iwl4965_rx_mem_buffer *rxb;
  3469. unsigned long flags;
  3470. spin_lock_irqsave(&rxq->lock, flags);
  3471. while (!list_empty(&rxq->rx_used)) {
  3472. element = rxq->rx_used.next;
  3473. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3474. /* Alloc a new receive buffer */
  3475. rxb->skb =
  3476. alloc_skb(priv->hw_setting.rx_buf_size,
  3477. __GFP_NOWARN | GFP_ATOMIC);
  3478. if (!rxb->skb) {
  3479. if (net_ratelimit())
  3480. printk(KERN_CRIT DRV_NAME
  3481. ": Can not allocate SKB buffers\n");
  3482. /* We don't reschedule replenish work here -- we will
  3483. * call the restock method and if it still needs
  3484. * more buffers it will schedule replenish */
  3485. break;
  3486. }
  3487. priv->alloc_rxb_skb++;
  3488. list_del(element);
  3489. /* Get physical address of RB/SKB */
  3490. rxb->dma_addr =
  3491. pci_map_single(priv->pci_dev, rxb->skb->data,
  3492. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3493. list_add_tail(&rxb->list, &rxq->rx_free);
  3494. rxq->free_count++;
  3495. }
  3496. spin_unlock_irqrestore(&rxq->lock, flags);
  3497. }
  3498. /*
  3499. * this should be called while priv->lock is locked
  3500. */
  3501. static void __iwl4965_rx_replenish(void *data)
  3502. {
  3503. struct iwl4965_priv *priv = data;
  3504. iwl4965_rx_allocate(priv);
  3505. iwl4965_rx_queue_restock(priv);
  3506. }
  3507. void iwl4965_rx_replenish(void *data)
  3508. {
  3509. struct iwl4965_priv *priv = data;
  3510. unsigned long flags;
  3511. iwl4965_rx_allocate(priv);
  3512. spin_lock_irqsave(&priv->lock, flags);
  3513. iwl4965_rx_queue_restock(priv);
  3514. spin_unlock_irqrestore(&priv->lock, flags);
  3515. }
  3516. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3517. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3518. * This free routine walks the list of POOL entries and if SKB is set to
  3519. * non NULL it is unmapped and freed
  3520. */
  3521. static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3522. {
  3523. int i;
  3524. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3525. if (rxq->pool[i].skb != NULL) {
  3526. pci_unmap_single(priv->pci_dev,
  3527. rxq->pool[i].dma_addr,
  3528. priv->hw_setting.rx_buf_size,
  3529. PCI_DMA_FROMDEVICE);
  3530. dev_kfree_skb(rxq->pool[i].skb);
  3531. }
  3532. }
  3533. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3534. rxq->dma_addr);
  3535. rxq->bd = NULL;
  3536. }
  3537. int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
  3538. {
  3539. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3540. struct pci_dev *dev = priv->pci_dev;
  3541. int i;
  3542. spin_lock_init(&rxq->lock);
  3543. INIT_LIST_HEAD(&rxq->rx_free);
  3544. INIT_LIST_HEAD(&rxq->rx_used);
  3545. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3546. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3547. if (!rxq->bd)
  3548. return -ENOMEM;
  3549. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3550. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3551. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3552. /* Set us so that we have processed and used all buffers, but have
  3553. * not restocked the Rx queue with fresh buffers */
  3554. rxq->read = rxq->write = 0;
  3555. rxq->free_count = 0;
  3556. rxq->need_update = 0;
  3557. return 0;
  3558. }
  3559. void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3560. {
  3561. unsigned long flags;
  3562. int i;
  3563. spin_lock_irqsave(&rxq->lock, flags);
  3564. INIT_LIST_HEAD(&rxq->rx_free);
  3565. INIT_LIST_HEAD(&rxq->rx_used);
  3566. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3567. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3568. /* In the reset function, these buffers may have been allocated
  3569. * to an SKB, so we need to unmap and free potential storage */
  3570. if (rxq->pool[i].skb != NULL) {
  3571. pci_unmap_single(priv->pci_dev,
  3572. rxq->pool[i].dma_addr,
  3573. priv->hw_setting.rx_buf_size,
  3574. PCI_DMA_FROMDEVICE);
  3575. priv->alloc_rxb_skb--;
  3576. dev_kfree_skb(rxq->pool[i].skb);
  3577. rxq->pool[i].skb = NULL;
  3578. }
  3579. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3580. }
  3581. /* Set us so that we have processed and used all buffers, but have
  3582. * not restocked the Rx queue with fresh buffers */
  3583. rxq->read = rxq->write = 0;
  3584. rxq->free_count = 0;
  3585. spin_unlock_irqrestore(&rxq->lock, flags);
  3586. }
  3587. /* Convert linear signal-to-noise ratio into dB */
  3588. static u8 ratio2dB[100] = {
  3589. /* 0 1 2 3 4 5 6 7 8 9 */
  3590. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3591. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3592. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3593. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3594. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3595. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3596. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3597. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3598. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3599. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3600. };
  3601. /* Calculates a relative dB value from a ratio of linear
  3602. * (i.e. not dB) signal levels.
  3603. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3604. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3605. {
  3606. /* 1000:1 or higher just report as 60 dB */
  3607. if (sig_ratio >= 1000)
  3608. return 60;
  3609. /* 100:1 or higher, divide by 10 and use table,
  3610. * add 20 dB to make up for divide by 10 */
  3611. if (sig_ratio >= 100)
  3612. return (20 + (int)ratio2dB[sig_ratio/10]);
  3613. /* We shouldn't see this */
  3614. if (sig_ratio < 1)
  3615. return 0;
  3616. /* Use table for ratios 1:1 - 99:1 */
  3617. return (int)ratio2dB[sig_ratio];
  3618. }
  3619. #define PERFECT_RSSI (-20) /* dBm */
  3620. #define WORST_RSSI (-95) /* dBm */
  3621. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3622. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3623. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3624. * about formulas used below. */
  3625. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3626. {
  3627. int sig_qual;
  3628. int degradation = PERFECT_RSSI - rssi_dbm;
  3629. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3630. * as indicator; formula is (signal dbm - noise dbm).
  3631. * SNR at or above 40 is a great signal (100%).
  3632. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3633. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3634. if (noise_dbm) {
  3635. if (rssi_dbm - noise_dbm >= 40)
  3636. return 100;
  3637. else if (rssi_dbm < noise_dbm)
  3638. return 0;
  3639. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3640. /* Else use just the signal level.
  3641. * This formula is a least squares fit of data points collected and
  3642. * compared with a reference system that had a percentage (%) display
  3643. * for signal quality. */
  3644. } else
  3645. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3646. (15 * RSSI_RANGE + 62 * degradation)) /
  3647. (RSSI_RANGE * RSSI_RANGE);
  3648. if (sig_qual > 100)
  3649. sig_qual = 100;
  3650. else if (sig_qual < 1)
  3651. sig_qual = 0;
  3652. return sig_qual;
  3653. }
  3654. /**
  3655. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3656. *
  3657. * Uses the priv->rx_handlers callback function array to invoke
  3658. * the appropriate handlers, including command responses,
  3659. * frame-received notifications, and other notifications.
  3660. */
  3661. static void iwl4965_rx_handle(struct iwl4965_priv *priv)
  3662. {
  3663. struct iwl4965_rx_mem_buffer *rxb;
  3664. struct iwl4965_rx_packet *pkt;
  3665. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3666. u32 r, i;
  3667. int reclaim;
  3668. unsigned long flags;
  3669. u8 fill_rx = 0;
  3670. u32 count = 8;
  3671. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3672. * buffer that the driver may process (last buffer filled by ucode). */
  3673. r = iwl4965_hw_get_rx_read(priv);
  3674. i = rxq->read;
  3675. /* Rx interrupt, but nothing sent from uCode */
  3676. if (i == r)
  3677. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3678. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3679. fill_rx = 1;
  3680. while (i != r) {
  3681. rxb = rxq->queue[i];
  3682. /* If an RXB doesn't have a Rx queue slot associated with it,
  3683. * then a bug has been introduced in the queue refilling
  3684. * routines -- catch it here */
  3685. BUG_ON(rxb == NULL);
  3686. rxq->queue[i] = NULL;
  3687. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3688. priv->hw_setting.rx_buf_size,
  3689. PCI_DMA_FROMDEVICE);
  3690. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3691. /* Reclaim a command buffer only if this packet is a response
  3692. * to a (driver-originated) command.
  3693. * If the packet (e.g. Rx frame) originated from uCode,
  3694. * there is no command buffer to reclaim.
  3695. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3696. * but apparently a few don't get set; catch them here. */
  3697. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3698. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3699. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3700. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3701. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3702. (pkt->hdr.cmd != REPLY_TX);
  3703. /* Based on type of command response or notification,
  3704. * handle those that need handling via function in
  3705. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3706. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3707. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3708. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3709. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3710. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3711. } else {
  3712. /* No handling needed */
  3713. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3714. "r %d i %d No handler needed for %s, 0x%02x\n",
  3715. r, i, get_cmd_string(pkt->hdr.cmd),
  3716. pkt->hdr.cmd);
  3717. }
  3718. if (reclaim) {
  3719. /* Invoke any callbacks, transfer the skb to caller, and
  3720. * fire off the (possibly) blocking iwl4965_send_cmd()
  3721. * as we reclaim the driver command queue */
  3722. if (rxb && rxb->skb)
  3723. iwl4965_tx_cmd_complete(priv, rxb);
  3724. else
  3725. IWL_WARNING("Claim null rxb?\n");
  3726. }
  3727. /* For now we just don't re-use anything. We can tweak this
  3728. * later to try and re-use notification packets and SKBs that
  3729. * fail to Rx correctly */
  3730. if (rxb->skb != NULL) {
  3731. priv->alloc_rxb_skb--;
  3732. dev_kfree_skb_any(rxb->skb);
  3733. rxb->skb = NULL;
  3734. }
  3735. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3736. priv->hw_setting.rx_buf_size,
  3737. PCI_DMA_FROMDEVICE);
  3738. spin_lock_irqsave(&rxq->lock, flags);
  3739. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3740. spin_unlock_irqrestore(&rxq->lock, flags);
  3741. i = (i + 1) & RX_QUEUE_MASK;
  3742. /* If there are a lot of unused frames,
  3743. * restock the Rx queue so ucode wont assert. */
  3744. if (fill_rx) {
  3745. count++;
  3746. if (count >= 8) {
  3747. priv->rxq.read = i;
  3748. __iwl4965_rx_replenish(priv);
  3749. count = 0;
  3750. }
  3751. }
  3752. }
  3753. /* Backtrack one entry */
  3754. priv->rxq.read = i;
  3755. iwl4965_rx_queue_restock(priv);
  3756. }
  3757. /**
  3758. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  3759. */
  3760. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  3761. struct iwl4965_tx_queue *txq)
  3762. {
  3763. u32 reg = 0;
  3764. int rc = 0;
  3765. int txq_id = txq->q.id;
  3766. if (txq->need_update == 0)
  3767. return rc;
  3768. /* if we're trying to save power */
  3769. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3770. /* wake up nic if it's powered down ...
  3771. * uCode will wake up, and interrupt us again, so next
  3772. * time we'll skip this part. */
  3773. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3774. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3775. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3776. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3777. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3778. return rc;
  3779. }
  3780. /* restore this queue's parameters in nic hardware. */
  3781. rc = iwl4965_grab_nic_access(priv);
  3782. if (rc)
  3783. return rc;
  3784. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  3785. txq->q.write_ptr | (txq_id << 8));
  3786. iwl4965_release_nic_access(priv);
  3787. /* else not in power-save mode, uCode will never sleep when we're
  3788. * trying to tx (during RFKILL, we're not trying to tx). */
  3789. } else
  3790. iwl4965_write32(priv, HBUS_TARG_WRPTR,
  3791. txq->q.write_ptr | (txq_id << 8));
  3792. txq->need_update = 0;
  3793. return rc;
  3794. }
  3795. #ifdef CONFIG_IWL4965_DEBUG
  3796. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  3797. {
  3798. DECLARE_MAC_BUF(mac);
  3799. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3800. iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3801. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3802. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3803. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3804. le32_to_cpu(rxon->filter_flags));
  3805. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3806. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3807. rxon->ofdm_basic_rates);
  3808. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3809. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3810. print_mac(mac, rxon->node_addr));
  3811. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3812. print_mac(mac, rxon->bssid_addr));
  3813. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3814. }
  3815. #endif
  3816. static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
  3817. {
  3818. IWL_DEBUG_ISR("Enabling interrupts\n");
  3819. set_bit(STATUS_INT_ENABLED, &priv->status);
  3820. iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3821. }
  3822. static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
  3823. {
  3824. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3825. /* disable interrupts from uCode/NIC to host */
  3826. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  3827. /* acknowledge/clear/reset any interrupts still pending
  3828. * from uCode or flow handler (Rx/Tx DMA) */
  3829. iwl4965_write32(priv, CSR_INT, 0xffffffff);
  3830. iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3831. IWL_DEBUG_ISR("Disabled interrupts\n");
  3832. }
  3833. static const char *desc_lookup(int i)
  3834. {
  3835. switch (i) {
  3836. case 1:
  3837. return "FAIL";
  3838. case 2:
  3839. return "BAD_PARAM";
  3840. case 3:
  3841. return "BAD_CHECKSUM";
  3842. case 4:
  3843. return "NMI_INTERRUPT";
  3844. case 5:
  3845. return "SYSASSERT";
  3846. case 6:
  3847. return "FATAL_ERROR";
  3848. }
  3849. return "UNKNOWN";
  3850. }
  3851. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3852. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3853. static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
  3854. {
  3855. u32 data2, line;
  3856. u32 desc, time, count, base, data1;
  3857. u32 blink1, blink2, ilink1, ilink2;
  3858. int rc;
  3859. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3860. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3861. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3862. return;
  3863. }
  3864. rc = iwl4965_grab_nic_access(priv);
  3865. if (rc) {
  3866. IWL_WARNING("Can not read from adapter at this time.\n");
  3867. return;
  3868. }
  3869. count = iwl4965_read_targ_mem(priv, base);
  3870. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3871. IWL_ERROR("Start IWL Error Log Dump:\n");
  3872. IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
  3873. }
  3874. desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
  3875. blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
  3876. blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
  3877. ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
  3878. ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
  3879. data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
  3880. data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
  3881. line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
  3882. time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
  3883. IWL_ERROR("Desc Time "
  3884. "data1 data2 line\n");
  3885. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  3886. desc_lookup(desc), desc, time, data1, data2, line);
  3887. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  3888. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  3889. ilink1, ilink2);
  3890. iwl4965_release_nic_access(priv);
  3891. }
  3892. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3893. /**
  3894. * iwl4965_print_event_log - Dump error event log to syslog
  3895. *
  3896. * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
  3897. */
  3898. static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
  3899. u32 num_events, u32 mode)
  3900. {
  3901. u32 i;
  3902. u32 base; /* SRAM byte address of event log header */
  3903. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3904. u32 ptr; /* SRAM byte address of log data */
  3905. u32 ev, time, data; /* event log data */
  3906. if (num_events == 0)
  3907. return;
  3908. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3909. if (mode == 0)
  3910. event_size = 2 * sizeof(u32);
  3911. else
  3912. event_size = 3 * sizeof(u32);
  3913. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3914. /* "time" is actually "data" for mode 0 (no timestamp).
  3915. * place event id # at far right for easier visual parsing. */
  3916. for (i = 0; i < num_events; i++) {
  3917. ev = iwl4965_read_targ_mem(priv, ptr);
  3918. ptr += sizeof(u32);
  3919. time = iwl4965_read_targ_mem(priv, ptr);
  3920. ptr += sizeof(u32);
  3921. if (mode == 0)
  3922. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  3923. else {
  3924. data = iwl4965_read_targ_mem(priv, ptr);
  3925. ptr += sizeof(u32);
  3926. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  3927. }
  3928. }
  3929. }
  3930. static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
  3931. {
  3932. int rc;
  3933. u32 base; /* SRAM byte address of event log header */
  3934. u32 capacity; /* event log capacity in # entries */
  3935. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  3936. u32 num_wraps; /* # times uCode wrapped to top of log */
  3937. u32 next_entry; /* index of next entry to be written by uCode */
  3938. u32 size; /* # entries that we'll print */
  3939. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3940. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3941. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  3942. return;
  3943. }
  3944. rc = iwl4965_grab_nic_access(priv);
  3945. if (rc) {
  3946. IWL_WARNING("Can not read from adapter at this time.\n");
  3947. return;
  3948. }
  3949. /* event log header */
  3950. capacity = iwl4965_read_targ_mem(priv, base);
  3951. mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
  3952. num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
  3953. next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
  3954. size = num_wraps ? capacity : next_entry;
  3955. /* bail out if nothing in log */
  3956. if (size == 0) {
  3957. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  3958. iwl4965_release_nic_access(priv);
  3959. return;
  3960. }
  3961. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  3962. size, num_wraps);
  3963. /* if uCode has wrapped back to top of log, start at the oldest entry,
  3964. * i.e the next one that uCode would fill. */
  3965. if (num_wraps)
  3966. iwl4965_print_event_log(priv, next_entry,
  3967. capacity - next_entry, mode);
  3968. /* (then/else) start at top of log */
  3969. iwl4965_print_event_log(priv, 0, next_entry, mode);
  3970. iwl4965_release_nic_access(priv);
  3971. }
  3972. /**
  3973. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  3974. */
  3975. static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
  3976. {
  3977. /* Set the FW error flag -- cleared on iwl4965_down */
  3978. set_bit(STATUS_FW_ERROR, &priv->status);
  3979. /* Cancel currently queued command. */
  3980. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3981. #ifdef CONFIG_IWL4965_DEBUG
  3982. if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
  3983. iwl4965_dump_nic_error_log(priv);
  3984. iwl4965_dump_nic_event_log(priv);
  3985. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  3986. }
  3987. #endif
  3988. wake_up_interruptible(&priv->wait_command_queue);
  3989. /* Keep the restart process from trying to send host
  3990. * commands by clearing the INIT status bit */
  3991. clear_bit(STATUS_READY, &priv->status);
  3992. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3993. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  3994. "Restarting adapter due to uCode error.\n");
  3995. if (iwl4965_is_associated(priv)) {
  3996. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  3997. sizeof(priv->recovery_rxon));
  3998. priv->error_recovering = 1;
  3999. }
  4000. queue_work(priv->workqueue, &priv->restart);
  4001. }
  4002. }
  4003. static void iwl4965_error_recovery(struct iwl4965_priv *priv)
  4004. {
  4005. unsigned long flags;
  4006. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4007. sizeof(priv->staging_rxon));
  4008. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4009. iwl4965_commit_rxon(priv);
  4010. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  4011. spin_lock_irqsave(&priv->lock, flags);
  4012. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4013. priv->error_recovering = 0;
  4014. spin_unlock_irqrestore(&priv->lock, flags);
  4015. }
  4016. static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
  4017. {
  4018. u32 inta, handled = 0;
  4019. u32 inta_fh;
  4020. unsigned long flags;
  4021. #ifdef CONFIG_IWL4965_DEBUG
  4022. u32 inta_mask;
  4023. #endif
  4024. spin_lock_irqsave(&priv->lock, flags);
  4025. /* Ack/clear/reset pending uCode interrupts.
  4026. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4027. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4028. inta = iwl4965_read32(priv, CSR_INT);
  4029. iwl4965_write32(priv, CSR_INT, inta);
  4030. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4031. * Any new interrupts that happen after this, either while we're
  4032. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4033. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4034. iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4035. #ifdef CONFIG_IWL4965_DEBUG
  4036. if (iwl4965_debug_level & IWL_DL_ISR) {
  4037. /* just for debug */
  4038. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4039. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4040. inta, inta_mask, inta_fh);
  4041. }
  4042. #endif
  4043. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4044. * atomic, make sure that inta covers all the interrupts that
  4045. * we've discovered, even if FH interrupt came in just after
  4046. * reading CSR_INT. */
  4047. if (inta_fh & CSR49_FH_INT_RX_MASK)
  4048. inta |= CSR_INT_BIT_FH_RX;
  4049. if (inta_fh & CSR49_FH_INT_TX_MASK)
  4050. inta |= CSR_INT_BIT_FH_TX;
  4051. /* Now service all interrupt bits discovered above. */
  4052. if (inta & CSR_INT_BIT_HW_ERR) {
  4053. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4054. /* Tell the device to stop sending interrupts */
  4055. iwl4965_disable_interrupts(priv);
  4056. iwl4965_irq_handle_error(priv);
  4057. handled |= CSR_INT_BIT_HW_ERR;
  4058. spin_unlock_irqrestore(&priv->lock, flags);
  4059. return;
  4060. }
  4061. #ifdef CONFIG_IWL4965_DEBUG
  4062. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4063. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4064. if (inta & CSR_INT_BIT_SCD)
  4065. IWL_DEBUG_ISR("Scheduler finished to transmit "
  4066. "the frame/frames.\n");
  4067. /* Alive notification via Rx interrupt will do the real work */
  4068. if (inta & CSR_INT_BIT_ALIVE)
  4069. IWL_DEBUG_ISR("Alive interrupt\n");
  4070. }
  4071. #endif
  4072. /* Safely ignore these bits for debug checks below */
  4073. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  4074. /* HW RF KILL switch toggled */
  4075. if (inta & CSR_INT_BIT_RF_KILL) {
  4076. int hw_rf_kill = 0;
  4077. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  4078. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4079. hw_rf_kill = 1;
  4080. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4081. "RF_KILL bit toggled to %s.\n",
  4082. hw_rf_kill ? "disable radio":"enable radio");
  4083. /* Queue restart only if RF_KILL switch was set to "kill"
  4084. * when we loaded driver, and is now set to "enable".
  4085. * After we're Alive, RF_KILL gets handled by
  4086. * iwl4965_rx_card_state_notif() */
  4087. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  4088. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4089. queue_work(priv->workqueue, &priv->restart);
  4090. }
  4091. handled |= CSR_INT_BIT_RF_KILL;
  4092. }
  4093. /* Chip got too hot and stopped itself */
  4094. if (inta & CSR_INT_BIT_CT_KILL) {
  4095. IWL_ERROR("Microcode CT kill error detected.\n");
  4096. handled |= CSR_INT_BIT_CT_KILL;
  4097. }
  4098. /* Error detected by uCode */
  4099. if (inta & CSR_INT_BIT_SW_ERR) {
  4100. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4101. inta);
  4102. iwl4965_irq_handle_error(priv);
  4103. handled |= CSR_INT_BIT_SW_ERR;
  4104. }
  4105. /* uCode wakes up after power-down sleep */
  4106. if (inta & CSR_INT_BIT_WAKEUP) {
  4107. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4108. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  4109. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4110. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4111. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4112. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4113. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4114. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4115. handled |= CSR_INT_BIT_WAKEUP;
  4116. }
  4117. /* All uCode command responses, including Tx command responses,
  4118. * Rx "responses" (frame-received notification), and other
  4119. * notifications from uCode come through here*/
  4120. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4121. iwl4965_rx_handle(priv);
  4122. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4123. }
  4124. if (inta & CSR_INT_BIT_FH_TX) {
  4125. IWL_DEBUG_ISR("Tx interrupt\n");
  4126. handled |= CSR_INT_BIT_FH_TX;
  4127. }
  4128. if (inta & ~handled)
  4129. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4130. if (inta & ~CSR_INI_SET_MASK) {
  4131. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4132. inta & ~CSR_INI_SET_MASK);
  4133. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4134. }
  4135. /* Re-enable all interrupts */
  4136. iwl4965_enable_interrupts(priv);
  4137. #ifdef CONFIG_IWL4965_DEBUG
  4138. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4139. inta = iwl4965_read32(priv, CSR_INT);
  4140. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4141. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4142. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4143. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4144. }
  4145. #endif
  4146. spin_unlock_irqrestore(&priv->lock, flags);
  4147. }
  4148. static irqreturn_t iwl4965_isr(int irq, void *data)
  4149. {
  4150. struct iwl4965_priv *priv = data;
  4151. u32 inta, inta_mask;
  4152. u32 inta_fh;
  4153. if (!priv)
  4154. return IRQ_NONE;
  4155. spin_lock(&priv->lock);
  4156. /* Disable (but don't clear!) interrupts here to avoid
  4157. * back-to-back ISRs and sporadic interrupts from our NIC.
  4158. * If we have something to service, the tasklet will re-enable ints.
  4159. * If we *don't* have something, we'll re-enable before leaving here. */
  4160. inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
  4161. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4162. /* Discover which interrupts are active/pending */
  4163. inta = iwl4965_read32(priv, CSR_INT);
  4164. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4165. /* Ignore interrupt if there's nothing in NIC to service.
  4166. * This may be due to IRQ shared with another device,
  4167. * or due to sporadic interrupts thrown from our NIC. */
  4168. if (!inta && !inta_fh) {
  4169. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4170. goto none;
  4171. }
  4172. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4173. /* Hardware disappeared. It might have already raised
  4174. * an interrupt */
  4175. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4176. goto unplugged;
  4177. }
  4178. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4179. inta, inta_mask, inta_fh);
  4180. inta &= ~CSR_INT_BIT_SCD;
  4181. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  4182. if (likely(inta || inta_fh))
  4183. tasklet_schedule(&priv->irq_tasklet);
  4184. unplugged:
  4185. spin_unlock(&priv->lock);
  4186. return IRQ_HANDLED;
  4187. none:
  4188. /* re-enable interrupts here since we don't have anything to service. */
  4189. iwl4965_enable_interrupts(priv);
  4190. spin_unlock(&priv->lock);
  4191. return IRQ_NONE;
  4192. }
  4193. /************************** EEPROM BANDS ****************************
  4194. *
  4195. * The iwl4965_eeprom_band definitions below provide the mapping from the
  4196. * EEPROM contents to the specific channel number supported for each
  4197. * band.
  4198. *
  4199. * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
  4200. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4201. * The specific geography and calibration information for that channel
  4202. * is contained in the eeprom map itself.
  4203. *
  4204. * During init, we copy the eeprom information and channel map
  4205. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4206. *
  4207. * channel_map_24/52 provides the index in the channel_info array for a
  4208. * given channel. We have to have two separate maps as there is channel
  4209. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4210. * band_2
  4211. *
  4212. * A value of 0xff stored in the channel_map indicates that the channel
  4213. * is not supported by the hardware at all.
  4214. *
  4215. * A value of 0xfe in the channel_map indicates that the channel is not
  4216. * valid for Tx with the current hardware. This means that
  4217. * while the system can tune and receive on a given channel, it may not
  4218. * be able to associate or transmit any frames on that
  4219. * channel. There is no corresponding channel information for that
  4220. * entry.
  4221. *
  4222. *********************************************************************/
  4223. /* 2.4 GHz */
  4224. static const u8 iwl4965_eeprom_band_1[14] = {
  4225. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4226. };
  4227. /* 5.2 GHz bands */
  4228. static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
  4229. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4230. };
  4231. static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
  4232. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4233. };
  4234. static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
  4235. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4236. };
  4237. static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
  4238. 145, 149, 153, 157, 161, 165
  4239. };
  4240. static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
  4241. 1, 2, 3, 4, 5, 6, 7
  4242. };
  4243. static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
  4244. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4245. };
  4246. static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
  4247. int band,
  4248. int *eeprom_ch_count,
  4249. const struct iwl4965_eeprom_channel
  4250. **eeprom_ch_info,
  4251. const u8 **eeprom_ch_index)
  4252. {
  4253. switch (band) {
  4254. case 1: /* 2.4GHz band */
  4255. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
  4256. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4257. *eeprom_ch_index = iwl4965_eeprom_band_1;
  4258. break;
  4259. case 2: /* 4.9GHz band */
  4260. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
  4261. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4262. *eeprom_ch_index = iwl4965_eeprom_band_2;
  4263. break;
  4264. case 3: /* 5.2GHz band */
  4265. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
  4266. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4267. *eeprom_ch_index = iwl4965_eeprom_band_3;
  4268. break;
  4269. case 4: /* 5.5GHz band */
  4270. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
  4271. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4272. *eeprom_ch_index = iwl4965_eeprom_band_4;
  4273. break;
  4274. case 5: /* 5.7GHz band */
  4275. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
  4276. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4277. *eeprom_ch_index = iwl4965_eeprom_band_5;
  4278. break;
  4279. case 6: /* 2.4GHz FAT channels */
  4280. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
  4281. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4282. *eeprom_ch_index = iwl4965_eeprom_band_6;
  4283. break;
  4284. case 7: /* 5 GHz FAT channels */
  4285. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
  4286. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4287. *eeprom_ch_index = iwl4965_eeprom_band_7;
  4288. break;
  4289. default:
  4290. BUG();
  4291. return;
  4292. }
  4293. }
  4294. /**
  4295. * iwl4965_get_channel_info - Find driver's private channel info
  4296. *
  4297. * Based on band and channel number.
  4298. */
  4299. const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
  4300. enum ieee80211_band band, u16 channel)
  4301. {
  4302. int i;
  4303. switch (band) {
  4304. case IEEE80211_BAND_5GHZ:
  4305. for (i = 14; i < priv->channel_count; i++) {
  4306. if (priv->channel_info[i].channel == channel)
  4307. return &priv->channel_info[i];
  4308. }
  4309. break;
  4310. case IEEE80211_BAND_2GHZ:
  4311. if (channel >= 1 && channel <= 14)
  4312. return &priv->channel_info[channel - 1];
  4313. break;
  4314. default:
  4315. BUG();
  4316. }
  4317. return NULL;
  4318. }
  4319. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4320. ? # x " " : "")
  4321. /**
  4322. * iwl4965_init_channel_map - Set up driver's info for all possible channels
  4323. */
  4324. static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
  4325. {
  4326. int eeprom_ch_count = 0;
  4327. const u8 *eeprom_ch_index = NULL;
  4328. const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
  4329. int band, ch;
  4330. struct iwl4965_channel_info *ch_info;
  4331. if (priv->channel_count) {
  4332. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4333. return 0;
  4334. }
  4335. if (priv->eeprom.version < 0x2f) {
  4336. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4337. priv->eeprom.version);
  4338. return -EINVAL;
  4339. }
  4340. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4341. priv->channel_count =
  4342. ARRAY_SIZE(iwl4965_eeprom_band_1) +
  4343. ARRAY_SIZE(iwl4965_eeprom_band_2) +
  4344. ARRAY_SIZE(iwl4965_eeprom_band_3) +
  4345. ARRAY_SIZE(iwl4965_eeprom_band_4) +
  4346. ARRAY_SIZE(iwl4965_eeprom_band_5);
  4347. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4348. priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
  4349. priv->channel_count, GFP_KERNEL);
  4350. if (!priv->channel_info) {
  4351. IWL_ERROR("Could not allocate channel_info\n");
  4352. priv->channel_count = 0;
  4353. return -ENOMEM;
  4354. }
  4355. ch_info = priv->channel_info;
  4356. /* Loop through the 5 EEPROM bands adding them in order to the
  4357. * channel map we maintain (that contains additional information than
  4358. * what just in the EEPROM) */
  4359. for (band = 1; band <= 5; band++) {
  4360. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4361. &eeprom_ch_info, &eeprom_ch_index);
  4362. /* Loop through each band adding each of the channels */
  4363. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4364. ch_info->channel = eeprom_ch_index[ch];
  4365. ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
  4366. IEEE80211_BAND_5GHZ;
  4367. /* permanently store EEPROM's channel regulatory flags
  4368. * and max power in channel info database. */
  4369. ch_info->eeprom = eeprom_ch_info[ch];
  4370. /* Copy the run-time flags so they are there even on
  4371. * invalid channels */
  4372. ch_info->flags = eeprom_ch_info[ch].flags;
  4373. if (!(is_channel_valid(ch_info))) {
  4374. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4375. "No traffic\n",
  4376. ch_info->channel,
  4377. ch_info->flags,
  4378. is_channel_a_band(ch_info) ?
  4379. "5.2" : "2.4");
  4380. ch_info++;
  4381. continue;
  4382. }
  4383. /* Initialize regulatory-based run-time data */
  4384. ch_info->max_power_avg = ch_info->curr_txpow =
  4385. eeprom_ch_info[ch].max_power_avg;
  4386. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4387. ch_info->min_power = 0;
  4388. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s%s(0x%02x"
  4389. " %ddBm): Ad-Hoc %ssupported\n",
  4390. ch_info->channel,
  4391. is_channel_a_band(ch_info) ?
  4392. "5.2" : "2.4",
  4393. CHECK_AND_PRINT(VALID),
  4394. CHECK_AND_PRINT(IBSS),
  4395. CHECK_AND_PRINT(ACTIVE),
  4396. CHECK_AND_PRINT(RADAR),
  4397. CHECK_AND_PRINT(WIDE),
  4398. CHECK_AND_PRINT(NARROW),
  4399. CHECK_AND_PRINT(DFS),
  4400. eeprom_ch_info[ch].flags,
  4401. eeprom_ch_info[ch].max_power_avg,
  4402. ((eeprom_ch_info[ch].
  4403. flags & EEPROM_CHANNEL_IBSS)
  4404. && !(eeprom_ch_info[ch].
  4405. flags & EEPROM_CHANNEL_RADAR))
  4406. ? "" : "not ");
  4407. /* Set the user_txpower_limit to the highest power
  4408. * supported by any channel */
  4409. if (eeprom_ch_info[ch].max_power_avg >
  4410. priv->user_txpower_limit)
  4411. priv->user_txpower_limit =
  4412. eeprom_ch_info[ch].max_power_avg;
  4413. ch_info++;
  4414. }
  4415. }
  4416. /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
  4417. for (band = 6; band <= 7; band++) {
  4418. enum ieee80211_band ieeeband;
  4419. u8 fat_extension_chan;
  4420. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4421. &eeprom_ch_info, &eeprom_ch_index);
  4422. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  4423. ieeeband = (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  4424. /* Loop through each band adding each of the channels */
  4425. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4426. if ((band == 6) &&
  4427. ((eeprom_ch_index[ch] == 5) ||
  4428. (eeprom_ch_index[ch] == 6) ||
  4429. (eeprom_ch_index[ch] == 7)))
  4430. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4431. else
  4432. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4433. /* Set up driver's info for lower half */
  4434. iwl4965_set_fat_chan_info(priv, ieeeband,
  4435. eeprom_ch_index[ch],
  4436. &(eeprom_ch_info[ch]),
  4437. fat_extension_chan);
  4438. /* Set up driver's info for upper half */
  4439. iwl4965_set_fat_chan_info(priv, ieeeband,
  4440. (eeprom_ch_index[ch] + 4),
  4441. &(eeprom_ch_info[ch]),
  4442. HT_IE_EXT_CHANNEL_BELOW);
  4443. }
  4444. }
  4445. return 0;
  4446. }
  4447. /*
  4448. * iwl4965_free_channel_map - undo allocations in iwl4965_init_channel_map
  4449. */
  4450. static void iwl4965_free_channel_map(struct iwl4965_priv *priv)
  4451. {
  4452. kfree(priv->channel_info);
  4453. priv->channel_count = 0;
  4454. }
  4455. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4456. * sending probe req. This should be set long enough to hear probe responses
  4457. * from more than one AP. */
  4458. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4459. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4460. /* For faster active scanning, scan will move to the next channel if fewer than
  4461. * PLCP_QUIET_THRESH packets are heard on this channel within
  4462. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4463. * time if it's a quiet channel (nothing responded to our probe, and there's
  4464. * no other traffic).
  4465. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4466. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4467. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4468. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4469. * Must be set longer than active dwell time.
  4470. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4471. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4472. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4473. #define IWL_PASSIVE_DWELL_BASE (100)
  4474. #define IWL_CHANNEL_TUNE_TIME 5
  4475. static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv,
  4476. enum ieee80211_band band)
  4477. {
  4478. if (band == IEEE80211_BAND_5GHZ)
  4479. return IWL_ACTIVE_DWELL_TIME_52;
  4480. else
  4481. return IWL_ACTIVE_DWELL_TIME_24;
  4482. }
  4483. static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv,
  4484. enum ieee80211_band band)
  4485. {
  4486. u16 active = iwl4965_get_active_dwell_time(priv, band);
  4487. u16 passive = (band != IEEE80211_BAND_5GHZ) ?
  4488. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4489. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4490. if (iwl4965_is_associated(priv)) {
  4491. /* If we're associated, we clamp the maximum passive
  4492. * dwell time to be 98% of the beacon interval (minus
  4493. * 2 * channel tune time) */
  4494. passive = priv->beacon_int;
  4495. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4496. passive = IWL_PASSIVE_DWELL_BASE;
  4497. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4498. }
  4499. if (passive <= active)
  4500. passive = active + 1;
  4501. return passive;
  4502. }
  4503. static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv,
  4504. enum ieee80211_band band,
  4505. u8 is_active, u8 direct_mask,
  4506. struct iwl4965_scan_channel *scan_ch)
  4507. {
  4508. const struct ieee80211_channel *channels = NULL;
  4509. const struct ieee80211_supported_band *sband;
  4510. const struct iwl4965_channel_info *ch_info;
  4511. u16 passive_dwell = 0;
  4512. u16 active_dwell = 0;
  4513. int added, i;
  4514. sband = iwl4965_get_hw_mode(priv, band);
  4515. if (!sband)
  4516. return 0;
  4517. channels = sband->channels;
  4518. active_dwell = iwl4965_get_active_dwell_time(priv, band);
  4519. passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
  4520. for (i = 0, added = 0; i < sband->n_channels; i++) {
  4521. if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
  4522. le16_to_cpu(priv->active_rxon.channel)) {
  4523. if (iwl4965_is_associated(priv)) {
  4524. IWL_DEBUG_SCAN
  4525. ("Skipping current channel %d\n",
  4526. le16_to_cpu(priv->active_rxon.channel));
  4527. continue;
  4528. }
  4529. } else if (priv->only_active_channel)
  4530. continue;
  4531. scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
  4532. ch_info = iwl4965_get_channel_info(priv, band,
  4533. scan_ch->channel);
  4534. if (!is_channel_valid(ch_info)) {
  4535. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4536. scan_ch->channel);
  4537. continue;
  4538. }
  4539. if (!is_active || is_channel_passive(ch_info) ||
  4540. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
  4541. scan_ch->type = 0; /* passive */
  4542. else
  4543. scan_ch->type = 1; /* active */
  4544. if (scan_ch->type & 1)
  4545. scan_ch->type |= (direct_mask << 1);
  4546. if (is_channel_narrow(ch_info))
  4547. scan_ch->type |= (1 << 7);
  4548. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4549. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4550. /* Set txpower levels to defaults */
  4551. scan_ch->tpc.dsp_atten = 110;
  4552. /* scan_pwr_info->tpc.dsp_atten; */
  4553. /*scan_pwr_info->tpc.tx_gain; */
  4554. if (band == IEEE80211_BAND_5GHZ)
  4555. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4556. else {
  4557. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4558. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4559. * power level:
  4560. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  4561. */
  4562. }
  4563. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4564. scan_ch->channel,
  4565. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4566. (scan_ch->type & 1) ?
  4567. active_dwell : passive_dwell);
  4568. scan_ch++;
  4569. added++;
  4570. }
  4571. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4572. return added;
  4573. }
  4574. static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
  4575. struct ieee80211_rate *rates)
  4576. {
  4577. int i;
  4578. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4579. rates[i].bitrate = iwl4965_rates[i].ieee * 5;
  4580. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  4581. rates[i].hw_value_short = i;
  4582. rates[i].flags = 0;
  4583. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  4584. /*
  4585. * If CCK != 1M then set short preamble rate flag.
  4586. */
  4587. rates[i].flags |=
  4588. (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  4589. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  4590. }
  4591. }
  4592. }
  4593. /**
  4594. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4595. */
  4596. static int iwl4965_init_geos(struct iwl4965_priv *priv)
  4597. {
  4598. struct iwl4965_channel_info *ch;
  4599. struct ieee80211_supported_band *sband;
  4600. struct ieee80211_channel *channels;
  4601. struct ieee80211_channel *geo_ch;
  4602. struct ieee80211_rate *rates;
  4603. int i = 0;
  4604. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  4605. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  4606. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4607. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4608. return 0;
  4609. }
  4610. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4611. priv->channel_count, GFP_KERNEL);
  4612. if (!channels)
  4613. return -ENOMEM;
  4614. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  4615. GFP_KERNEL);
  4616. if (!rates) {
  4617. kfree(channels);
  4618. return -ENOMEM;
  4619. }
  4620. /* 5.2GHz channels start after the 2.4GHz channels */
  4621. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4622. sband->channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
  4623. /* just OFDM */
  4624. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  4625. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  4626. iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_5GHZ);
  4627. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4628. sband->channels = channels;
  4629. /* OFDM & CCK */
  4630. sband->bitrates = rates;
  4631. sband->n_bitrates = IWL_RATE_COUNT;
  4632. iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_2GHZ);
  4633. priv->ieee_channels = channels;
  4634. priv->ieee_rates = rates;
  4635. iwl4965_init_hw_rates(priv, rates);
  4636. for (i = 0; i < priv->channel_count; i++) {
  4637. ch = &priv->channel_info[i];
  4638. /* FIXME: might be removed if scan is OK */
  4639. if (!is_channel_valid(ch))
  4640. continue;
  4641. if (is_channel_a_band(ch))
  4642. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4643. else
  4644. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4645. geo_ch = &sband->channels[sband->n_channels++];
  4646. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  4647. geo_ch->max_power = ch->max_power_avg;
  4648. geo_ch->max_antenna_gain = 0xff;
  4649. geo_ch->hw_value = ch->channel;
  4650. if (is_channel_valid(ch)) {
  4651. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  4652. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  4653. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  4654. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  4655. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4656. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  4657. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4658. priv->max_channel_txpower_limit =
  4659. ch->max_power_avg;
  4660. } else {
  4661. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  4662. }
  4663. /* Save flags for reg domain usage */
  4664. geo_ch->orig_flags = geo_ch->flags;
  4665. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  4666. ch->channel, geo_ch->center_freq,
  4667. is_channel_a_band(ch) ? "5.2" : "2.4",
  4668. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  4669. "restricted" : "valid",
  4670. geo_ch->flags);
  4671. }
  4672. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  4673. priv->cfg->sku & IWL_SKU_A) {
  4674. printk(KERN_INFO DRV_NAME
  4675. ": Incorrectly detected BG card as ABG. Please send "
  4676. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4677. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4678. priv->cfg->sku &= ~IWL_SKU_A;
  4679. }
  4680. printk(KERN_INFO DRV_NAME
  4681. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4682. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  4683. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  4684. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
  4685. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
  4686. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4687. return 0;
  4688. }
  4689. /*
  4690. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  4691. */
  4692. static void iwl4965_free_geos(struct iwl4965_priv *priv)
  4693. {
  4694. kfree(priv->ieee_channels);
  4695. kfree(priv->ieee_rates);
  4696. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4697. }
  4698. /******************************************************************************
  4699. *
  4700. * uCode download functions
  4701. *
  4702. ******************************************************************************/
  4703. static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
  4704. {
  4705. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  4706. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  4707. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4708. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  4709. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4710. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4711. }
  4712. /**
  4713. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  4714. * looking at all data.
  4715. */
  4716. static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 *image,
  4717. u32 len)
  4718. {
  4719. u32 val;
  4720. u32 save_len = len;
  4721. int rc = 0;
  4722. u32 errcnt;
  4723. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4724. rc = iwl4965_grab_nic_access(priv);
  4725. if (rc)
  4726. return rc;
  4727. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4728. errcnt = 0;
  4729. for (; len > 0; len -= sizeof(u32), image++) {
  4730. /* read data comes through single port, auto-incr addr */
  4731. /* NOTE: Use the debugless read so we don't flood kernel log
  4732. * if IWL_DL_IO is set */
  4733. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4734. if (val != le32_to_cpu(*image)) {
  4735. IWL_ERROR("uCode INST section is invalid at "
  4736. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4737. save_len - len, val, le32_to_cpu(*image));
  4738. rc = -EIO;
  4739. errcnt++;
  4740. if (errcnt >= 20)
  4741. break;
  4742. }
  4743. }
  4744. iwl4965_release_nic_access(priv);
  4745. if (!errcnt)
  4746. IWL_DEBUG_INFO
  4747. ("ucode image in INSTRUCTION memory is good\n");
  4748. return rc;
  4749. }
  4750. /**
  4751. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4752. * using sample data 100 bytes apart. If these sample points are good,
  4753. * it's a pretty good bet that everything between them is good, too.
  4754. */
  4755. static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
  4756. {
  4757. u32 val;
  4758. int rc = 0;
  4759. u32 errcnt = 0;
  4760. u32 i;
  4761. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4762. rc = iwl4965_grab_nic_access(priv);
  4763. if (rc)
  4764. return rc;
  4765. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4766. /* read data comes through single port, auto-incr addr */
  4767. /* NOTE: Use the debugless read so we don't flood kernel log
  4768. * if IWL_DL_IO is set */
  4769. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  4770. i + RTC_INST_LOWER_BOUND);
  4771. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4772. if (val != le32_to_cpu(*image)) {
  4773. #if 0 /* Enable this if you want to see details */
  4774. IWL_ERROR("uCode INST section is invalid at "
  4775. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4776. i, val, *image);
  4777. #endif
  4778. rc = -EIO;
  4779. errcnt++;
  4780. if (errcnt >= 3)
  4781. break;
  4782. }
  4783. }
  4784. iwl4965_release_nic_access(priv);
  4785. return rc;
  4786. }
  4787. /**
  4788. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  4789. * and verify its contents
  4790. */
  4791. static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
  4792. {
  4793. __le32 *image;
  4794. u32 len;
  4795. int rc = 0;
  4796. /* Try bootstrap */
  4797. image = (__le32 *)priv->ucode_boot.v_addr;
  4798. len = priv->ucode_boot.len;
  4799. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4800. if (rc == 0) {
  4801. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4802. return 0;
  4803. }
  4804. /* Try initialize */
  4805. image = (__le32 *)priv->ucode_init.v_addr;
  4806. len = priv->ucode_init.len;
  4807. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4808. if (rc == 0) {
  4809. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4810. return 0;
  4811. }
  4812. /* Try runtime/protocol */
  4813. image = (__le32 *)priv->ucode_code.v_addr;
  4814. len = priv->ucode_code.len;
  4815. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4816. if (rc == 0) {
  4817. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4818. return 0;
  4819. }
  4820. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4821. /* Since nothing seems to match, show first several data entries in
  4822. * instruction SRAM, so maybe visual inspection will give a clue.
  4823. * Selection of bootstrap image (vs. other images) is arbitrary. */
  4824. image = (__le32 *)priv->ucode_boot.v_addr;
  4825. len = priv->ucode_boot.len;
  4826. rc = iwl4965_verify_inst_full(priv, image, len);
  4827. return rc;
  4828. }
  4829. /* check contents of special bootstrap uCode SRAM */
  4830. static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
  4831. {
  4832. __le32 *image = priv->ucode_boot.v_addr;
  4833. u32 len = priv->ucode_boot.len;
  4834. u32 reg;
  4835. u32 val;
  4836. IWL_DEBUG_INFO("Begin verify bsm\n");
  4837. /* verify BSM SRAM contents */
  4838. val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
  4839. for (reg = BSM_SRAM_LOWER_BOUND;
  4840. reg < BSM_SRAM_LOWER_BOUND + len;
  4841. reg += sizeof(u32), image ++) {
  4842. val = iwl4965_read_prph(priv, reg);
  4843. if (val != le32_to_cpu(*image)) {
  4844. IWL_ERROR("BSM uCode verification failed at "
  4845. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  4846. BSM_SRAM_LOWER_BOUND,
  4847. reg - BSM_SRAM_LOWER_BOUND, len,
  4848. val, le32_to_cpu(*image));
  4849. return -EIO;
  4850. }
  4851. }
  4852. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  4853. return 0;
  4854. }
  4855. /**
  4856. * iwl4965_load_bsm - Load bootstrap instructions
  4857. *
  4858. * BSM operation:
  4859. *
  4860. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  4861. * in special SRAM that does not power down during RFKILL. When powering back
  4862. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  4863. * the bootstrap program into the on-board processor, and starts it.
  4864. *
  4865. * The bootstrap program loads (via DMA) instructions and data for a new
  4866. * program from host DRAM locations indicated by the host driver in the
  4867. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  4868. * automatically.
  4869. *
  4870. * When initializing the NIC, the host driver points the BSM to the
  4871. * "initialize" uCode image. This uCode sets up some internal data, then
  4872. * notifies host via "initialize alive" that it is complete.
  4873. *
  4874. * The host then replaces the BSM_DRAM_* pointer values to point to the
  4875. * normal runtime uCode instructions and a backup uCode data cache buffer
  4876. * (filled initially with starting data values for the on-board processor),
  4877. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  4878. * which begins normal operation.
  4879. *
  4880. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  4881. * the backup data cache in DRAM before SRAM is powered down.
  4882. *
  4883. * When powering back up, the BSM loads the bootstrap program. This reloads
  4884. * the runtime uCode instructions and the backup data cache into SRAM,
  4885. * and re-launches the runtime uCode from where it left off.
  4886. */
  4887. static int iwl4965_load_bsm(struct iwl4965_priv *priv)
  4888. {
  4889. __le32 *image = priv->ucode_boot.v_addr;
  4890. u32 len = priv->ucode_boot.len;
  4891. dma_addr_t pinst;
  4892. dma_addr_t pdata;
  4893. u32 inst_len;
  4894. u32 data_len;
  4895. int rc;
  4896. int i;
  4897. u32 done;
  4898. u32 reg_offset;
  4899. IWL_DEBUG_INFO("Begin load bsm\n");
  4900. /* make sure bootstrap program is no larger than BSM's SRAM size */
  4901. if (len > IWL_MAX_BSM_SIZE)
  4902. return -EINVAL;
  4903. /* Tell bootstrap uCode where to find the "Initialize" uCode
  4904. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  4905. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  4906. * after the "initialize" uCode has run, to point to
  4907. * runtime/protocol instructions and backup data cache. */
  4908. pinst = priv->ucode_init.p_addr >> 4;
  4909. pdata = priv->ucode_init_data.p_addr >> 4;
  4910. inst_len = priv->ucode_init.len;
  4911. data_len = priv->ucode_init_data.len;
  4912. rc = iwl4965_grab_nic_access(priv);
  4913. if (rc)
  4914. return rc;
  4915. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4916. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4917. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  4918. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  4919. /* Fill BSM memory with bootstrap instructions */
  4920. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  4921. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  4922. reg_offset += sizeof(u32), image++)
  4923. _iwl4965_write_prph(priv, reg_offset,
  4924. le32_to_cpu(*image));
  4925. rc = iwl4965_verify_bsm(priv);
  4926. if (rc) {
  4927. iwl4965_release_nic_access(priv);
  4928. return rc;
  4929. }
  4930. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  4931. iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  4932. iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
  4933. RTC_INST_LOWER_BOUND);
  4934. iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  4935. /* Load bootstrap code into instruction SRAM now,
  4936. * to prepare to load "initialize" uCode */
  4937. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  4938. BSM_WR_CTRL_REG_BIT_START);
  4939. /* Wait for load of bootstrap uCode to finish */
  4940. for (i = 0; i < 100; i++) {
  4941. done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
  4942. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  4943. break;
  4944. udelay(10);
  4945. }
  4946. if (i < 100)
  4947. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  4948. else {
  4949. IWL_ERROR("BSM write did not complete!\n");
  4950. return -EIO;
  4951. }
  4952. /* Enable future boot loads whenever power management unit triggers it
  4953. * (e.g. when powering back up after power-save shutdown) */
  4954. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  4955. BSM_WR_CTRL_REG_BIT_START_EN);
  4956. iwl4965_release_nic_access(priv);
  4957. return 0;
  4958. }
  4959. static void iwl4965_nic_start(struct iwl4965_priv *priv)
  4960. {
  4961. /* Remove all resets to allow NIC to operate */
  4962. iwl4965_write32(priv, CSR_RESET, 0);
  4963. }
  4964. /**
  4965. * iwl4965_read_ucode - Read uCode images from disk file.
  4966. *
  4967. * Copy into buffers for card to fetch via bus-mastering
  4968. */
  4969. static int iwl4965_read_ucode(struct iwl4965_priv *priv)
  4970. {
  4971. struct iwl4965_ucode *ucode;
  4972. int ret;
  4973. const struct firmware *ucode_raw;
  4974. const char *name = priv->cfg->fw_name;
  4975. u8 *src;
  4976. size_t len;
  4977. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  4978. /* Ask kernel firmware_class module to get the boot firmware off disk.
  4979. * request_firmware() is synchronous, file is in memory on return. */
  4980. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  4981. if (ret < 0) {
  4982. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  4983. name, ret);
  4984. goto error;
  4985. }
  4986. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  4987. name, ucode_raw->size);
  4988. /* Make sure that we got at least our header! */
  4989. if (ucode_raw->size < sizeof(*ucode)) {
  4990. IWL_ERROR("File size way too small!\n");
  4991. ret = -EINVAL;
  4992. goto err_release;
  4993. }
  4994. /* Data from ucode file: header followed by uCode images */
  4995. ucode = (void *)ucode_raw->data;
  4996. ver = le32_to_cpu(ucode->ver);
  4997. inst_size = le32_to_cpu(ucode->inst_size);
  4998. data_size = le32_to_cpu(ucode->data_size);
  4999. init_size = le32_to_cpu(ucode->init_size);
  5000. init_data_size = le32_to_cpu(ucode->init_data_size);
  5001. boot_size = le32_to_cpu(ucode->boot_size);
  5002. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5003. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5004. inst_size);
  5005. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5006. data_size);
  5007. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5008. init_size);
  5009. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5010. init_data_size);
  5011. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5012. boot_size);
  5013. /* Verify size of file vs. image size info in file's header */
  5014. if (ucode_raw->size < sizeof(*ucode) +
  5015. inst_size + data_size + init_size +
  5016. init_data_size + boot_size) {
  5017. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5018. (int)ucode_raw->size);
  5019. ret = -EINVAL;
  5020. goto err_release;
  5021. }
  5022. /* Verify that uCode images will fit in card's SRAM */
  5023. if (inst_size > IWL_MAX_INST_SIZE) {
  5024. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  5025. inst_size);
  5026. ret = -EINVAL;
  5027. goto err_release;
  5028. }
  5029. if (data_size > IWL_MAX_DATA_SIZE) {
  5030. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  5031. data_size);
  5032. ret = -EINVAL;
  5033. goto err_release;
  5034. }
  5035. if (init_size > IWL_MAX_INST_SIZE) {
  5036. IWL_DEBUG_INFO
  5037. ("uCode init instr len %d too large to fit in\n",
  5038. init_size);
  5039. ret = -EINVAL;
  5040. goto err_release;
  5041. }
  5042. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5043. IWL_DEBUG_INFO
  5044. ("uCode init data len %d too large to fit in\n",
  5045. init_data_size);
  5046. ret = -EINVAL;
  5047. goto err_release;
  5048. }
  5049. if (boot_size > IWL_MAX_BSM_SIZE) {
  5050. IWL_DEBUG_INFO
  5051. ("uCode boot instr len %d too large to fit in\n",
  5052. boot_size);
  5053. ret = -EINVAL;
  5054. goto err_release;
  5055. }
  5056. /* Allocate ucode buffers for card's bus-master loading ... */
  5057. /* Runtime instructions and 2 copies of data:
  5058. * 1) unmodified from disk
  5059. * 2) backup cache for save/restore during power-downs */
  5060. priv->ucode_code.len = inst_size;
  5061. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  5062. priv->ucode_data.len = data_size;
  5063. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  5064. priv->ucode_data_backup.len = data_size;
  5065. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  5066. /* Initialization instructions and data */
  5067. if (init_size && init_data_size) {
  5068. priv->ucode_init.len = init_size;
  5069. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  5070. priv->ucode_init_data.len = init_data_size;
  5071. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  5072. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  5073. goto err_pci_alloc;
  5074. }
  5075. /* Bootstrap (instructions only, no data) */
  5076. if (boot_size) {
  5077. priv->ucode_boot.len = boot_size;
  5078. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  5079. if (!priv->ucode_boot.v_addr)
  5080. goto err_pci_alloc;
  5081. }
  5082. /* Copy images into buffers for card's bus-master reads ... */
  5083. /* Runtime instructions (first block of data in file) */
  5084. src = &ucode->data[0];
  5085. len = priv->ucode_code.len;
  5086. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  5087. memcpy(priv->ucode_code.v_addr, src, len);
  5088. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5089. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5090. /* Runtime data (2nd block)
  5091. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  5092. src = &ucode->data[inst_size];
  5093. len = priv->ucode_data.len;
  5094. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  5095. memcpy(priv->ucode_data.v_addr, src, len);
  5096. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5097. /* Initialization instructions (3rd block) */
  5098. if (init_size) {
  5099. src = &ucode->data[inst_size + data_size];
  5100. len = priv->ucode_init.len;
  5101. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  5102. len);
  5103. memcpy(priv->ucode_init.v_addr, src, len);
  5104. }
  5105. /* Initialization data (4th block) */
  5106. if (init_data_size) {
  5107. src = &ucode->data[inst_size + data_size + init_size];
  5108. len = priv->ucode_init_data.len;
  5109. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  5110. len);
  5111. memcpy(priv->ucode_init_data.v_addr, src, len);
  5112. }
  5113. /* Bootstrap instructions (5th block) */
  5114. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5115. len = priv->ucode_boot.len;
  5116. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  5117. memcpy(priv->ucode_boot.v_addr, src, len);
  5118. /* We have our copies now, allow OS release its copies */
  5119. release_firmware(ucode_raw);
  5120. return 0;
  5121. err_pci_alloc:
  5122. IWL_ERROR("failed to allocate pci memory\n");
  5123. ret = -ENOMEM;
  5124. iwl4965_dealloc_ucode_pci(priv);
  5125. err_release:
  5126. release_firmware(ucode_raw);
  5127. error:
  5128. return ret;
  5129. }
  5130. /**
  5131. * iwl4965_set_ucode_ptrs - Set uCode address location
  5132. *
  5133. * Tell initialization uCode where to find runtime uCode.
  5134. *
  5135. * BSM registers initially contain pointers to initialization uCode.
  5136. * We need to replace them to load runtime uCode inst and data,
  5137. * and to save runtime data when powering down.
  5138. */
  5139. static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
  5140. {
  5141. dma_addr_t pinst;
  5142. dma_addr_t pdata;
  5143. int rc = 0;
  5144. unsigned long flags;
  5145. /* bits 35:4 for 4965 */
  5146. pinst = priv->ucode_code.p_addr >> 4;
  5147. pdata = priv->ucode_data_backup.p_addr >> 4;
  5148. spin_lock_irqsave(&priv->lock, flags);
  5149. rc = iwl4965_grab_nic_access(priv);
  5150. if (rc) {
  5151. spin_unlock_irqrestore(&priv->lock, flags);
  5152. return rc;
  5153. }
  5154. /* Tell bootstrap uCode where to find image to load */
  5155. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5156. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5157. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5158. priv->ucode_data.len);
  5159. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5160. * that all new ptr/size info is in place */
  5161. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5162. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5163. iwl4965_release_nic_access(priv);
  5164. spin_unlock_irqrestore(&priv->lock, flags);
  5165. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5166. return rc;
  5167. }
  5168. /**
  5169. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  5170. *
  5171. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5172. *
  5173. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5174. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5175. * (3945 does not contain this data).
  5176. *
  5177. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5178. */
  5179. static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
  5180. {
  5181. /* Check alive response for "valid" sign from uCode */
  5182. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5183. /* We had an error bringing up the hardware, so take it
  5184. * all the way back down so we can try again */
  5185. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5186. goto restart;
  5187. }
  5188. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5189. * This is a paranoid check, because we would not have gotten the
  5190. * "initialize" alive if code weren't properly loaded. */
  5191. if (iwl4965_verify_ucode(priv)) {
  5192. /* Runtime instruction load was bad;
  5193. * take it all the way back down so we can try again */
  5194. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5195. goto restart;
  5196. }
  5197. /* Calculate temperature */
  5198. priv->temperature = iwl4965_get_temperature(priv);
  5199. /* Send pointers to protocol/runtime uCode image ... init code will
  5200. * load and launch runtime uCode, which will send us another "Alive"
  5201. * notification. */
  5202. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5203. if (iwl4965_set_ucode_ptrs(priv)) {
  5204. /* Runtime instruction load won't happen;
  5205. * take it all the way back down so we can try again */
  5206. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5207. goto restart;
  5208. }
  5209. return;
  5210. restart:
  5211. queue_work(priv->workqueue, &priv->restart);
  5212. }
  5213. /**
  5214. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  5215. * from protocol/runtime uCode (initialization uCode's
  5216. * Alive gets handled by iwl4965_init_alive_start()).
  5217. */
  5218. static void iwl4965_alive_start(struct iwl4965_priv *priv)
  5219. {
  5220. int rc = 0;
  5221. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5222. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5223. /* We had an error bringing up the hardware, so take it
  5224. * all the way back down so we can try again */
  5225. IWL_DEBUG_INFO("Alive failed.\n");
  5226. goto restart;
  5227. }
  5228. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5229. * This is a paranoid check, because we would not have gotten the
  5230. * "runtime" alive if code weren't properly loaded. */
  5231. if (iwl4965_verify_ucode(priv)) {
  5232. /* Runtime instruction load was bad;
  5233. * take it all the way back down so we can try again */
  5234. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5235. goto restart;
  5236. }
  5237. iwl4965_clear_stations_table(priv);
  5238. rc = iwl4965_alive_notify(priv);
  5239. if (rc) {
  5240. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5241. rc);
  5242. goto restart;
  5243. }
  5244. /* After the ALIVE response, we can send host commands to 4965 uCode */
  5245. set_bit(STATUS_ALIVE, &priv->status);
  5246. /* Clear out the uCode error bit if it is set */
  5247. clear_bit(STATUS_FW_ERROR, &priv->status);
  5248. if (iwl4965_is_rfkill(priv))
  5249. return;
  5250. ieee80211_start_queues(priv->hw);
  5251. priv->active_rate = priv->rates_mask;
  5252. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5253. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5254. if (iwl4965_is_associated(priv)) {
  5255. struct iwl4965_rxon_cmd *active_rxon =
  5256. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  5257. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5258. sizeof(priv->staging_rxon));
  5259. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5260. } else {
  5261. /* Initialize our rx_config data */
  5262. iwl4965_connection_init_rx_config(priv);
  5263. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5264. }
  5265. /* Configure Bluetooth device coexistence support */
  5266. iwl4965_send_bt_config(priv);
  5267. /* Configure the adapter for unassociated operation */
  5268. iwl4965_commit_rxon(priv);
  5269. /* At this point, the NIC is initialized and operational */
  5270. priv->notif_missed_beacons = 0;
  5271. set_bit(STATUS_READY, &priv->status);
  5272. iwl4965_rf_kill_ct_config(priv);
  5273. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5274. wake_up_interruptible(&priv->wait_command_queue);
  5275. if (priv->error_recovering)
  5276. iwl4965_error_recovery(priv);
  5277. return;
  5278. restart:
  5279. queue_work(priv->workqueue, &priv->restart);
  5280. }
  5281. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
  5282. static void __iwl4965_down(struct iwl4965_priv *priv)
  5283. {
  5284. unsigned long flags;
  5285. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5286. struct ieee80211_conf *conf = NULL;
  5287. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5288. conf = ieee80211_get_hw_conf(priv->hw);
  5289. if (!exit_pending)
  5290. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5291. iwl4965_clear_stations_table(priv);
  5292. /* Unblock any waiting calls */
  5293. wake_up_interruptible_all(&priv->wait_command_queue);
  5294. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5295. * exiting the module */
  5296. if (!exit_pending)
  5297. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5298. /* stop and reset the on-board processor */
  5299. iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5300. /* tell the device to stop sending interrupts */
  5301. iwl4965_disable_interrupts(priv);
  5302. if (priv->mac80211_registered)
  5303. ieee80211_stop_queues(priv->hw);
  5304. /* If we have not previously called iwl4965_init() then
  5305. * clear all bits but the RF Kill and SUSPEND bits and return */
  5306. if (!iwl4965_is_init(priv)) {
  5307. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5308. STATUS_RF_KILL_HW |
  5309. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5310. STATUS_RF_KILL_SW |
  5311. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5312. STATUS_GEO_CONFIGURED |
  5313. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5314. STATUS_IN_SUSPEND;
  5315. goto exit;
  5316. }
  5317. /* ...otherwise clear out all the status bits but the RF Kill and
  5318. * SUSPEND bits and continue taking the NIC down. */
  5319. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5320. STATUS_RF_KILL_HW |
  5321. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5322. STATUS_RF_KILL_SW |
  5323. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5324. STATUS_GEO_CONFIGURED |
  5325. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5326. STATUS_IN_SUSPEND |
  5327. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5328. STATUS_FW_ERROR;
  5329. spin_lock_irqsave(&priv->lock, flags);
  5330. iwl4965_clear_bit(priv, CSR_GP_CNTRL,
  5331. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5332. spin_unlock_irqrestore(&priv->lock, flags);
  5333. iwl4965_hw_txq_ctx_stop(priv);
  5334. iwl4965_hw_rxq_stop(priv);
  5335. spin_lock_irqsave(&priv->lock, flags);
  5336. if (!iwl4965_grab_nic_access(priv)) {
  5337. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  5338. APMG_CLK_VAL_DMA_CLK_RQT);
  5339. iwl4965_release_nic_access(priv);
  5340. }
  5341. spin_unlock_irqrestore(&priv->lock, flags);
  5342. udelay(5);
  5343. iwl4965_hw_nic_stop_master(priv);
  5344. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5345. iwl4965_hw_nic_reset(priv);
  5346. exit:
  5347. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  5348. if (priv->ibss_beacon)
  5349. dev_kfree_skb(priv->ibss_beacon);
  5350. priv->ibss_beacon = NULL;
  5351. /* clear out any free frames */
  5352. iwl4965_clear_free_frames(priv);
  5353. }
  5354. static void iwl4965_down(struct iwl4965_priv *priv)
  5355. {
  5356. mutex_lock(&priv->mutex);
  5357. __iwl4965_down(priv);
  5358. mutex_unlock(&priv->mutex);
  5359. iwl4965_cancel_deferred_work(priv);
  5360. }
  5361. #define MAX_HW_RESTARTS 5
  5362. static int __iwl4965_up(struct iwl4965_priv *priv)
  5363. {
  5364. int rc, i;
  5365. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5366. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5367. return -EIO;
  5368. }
  5369. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5370. IWL_WARNING("Radio disabled by SW RF kill (module "
  5371. "parameter)\n");
  5372. return -ENODEV;
  5373. }
  5374. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  5375. IWL_ERROR("ucode not available for device bringup\n");
  5376. return -EIO;
  5377. }
  5378. /* If platform's RF_KILL switch is NOT set to KILL */
  5379. if (iwl4965_read32(priv, CSR_GP_CNTRL) &
  5380. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  5381. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  5382. else {
  5383. set_bit(STATUS_RF_KILL_HW, &priv->status);
  5384. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  5385. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5386. return -ENODEV;
  5387. }
  5388. }
  5389. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5390. rc = iwl4965_hw_nic_init(priv);
  5391. if (rc) {
  5392. IWL_ERROR("Unable to int nic\n");
  5393. return rc;
  5394. }
  5395. /* make sure rfkill handshake bits are cleared */
  5396. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5397. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5398. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5399. /* clear (again), then enable host interrupts */
  5400. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5401. iwl4965_enable_interrupts(priv);
  5402. /* really make sure rfkill handshake bits are cleared */
  5403. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5404. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5405. /* Copy original ucode data image from disk into backup cache.
  5406. * This will be used to initialize the on-board processor's
  5407. * data SRAM for a clean start when the runtime program first loads. */
  5408. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5409. priv->ucode_data.len);
  5410. /* We return success when we resume from suspend and rf_kill is on. */
  5411. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  5412. return 0;
  5413. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5414. iwl4965_clear_stations_table(priv);
  5415. /* load bootstrap state machine,
  5416. * load bootstrap program into processor's memory,
  5417. * prepare to load the "initialize" uCode */
  5418. rc = iwl4965_load_bsm(priv);
  5419. if (rc) {
  5420. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5421. continue;
  5422. }
  5423. /* start card; "initialize" will load runtime ucode */
  5424. iwl4965_nic_start(priv);
  5425. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5426. return 0;
  5427. }
  5428. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5429. __iwl4965_down(priv);
  5430. /* tried to restart and config the device for as long as our
  5431. * patience could withstand */
  5432. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5433. return -EIO;
  5434. }
  5435. /*****************************************************************************
  5436. *
  5437. * Workqueue callbacks
  5438. *
  5439. *****************************************************************************/
  5440. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  5441. {
  5442. struct iwl4965_priv *priv =
  5443. container_of(data, struct iwl4965_priv, init_alive_start.work);
  5444. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5445. return;
  5446. mutex_lock(&priv->mutex);
  5447. iwl4965_init_alive_start(priv);
  5448. mutex_unlock(&priv->mutex);
  5449. }
  5450. static void iwl4965_bg_alive_start(struct work_struct *data)
  5451. {
  5452. struct iwl4965_priv *priv =
  5453. container_of(data, struct iwl4965_priv, alive_start.work);
  5454. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5455. return;
  5456. mutex_lock(&priv->mutex);
  5457. iwl4965_alive_start(priv);
  5458. mutex_unlock(&priv->mutex);
  5459. }
  5460. static void iwl4965_bg_rf_kill(struct work_struct *work)
  5461. {
  5462. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
  5463. wake_up_interruptible(&priv->wait_command_queue);
  5464. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5465. return;
  5466. mutex_lock(&priv->mutex);
  5467. if (!iwl4965_is_rfkill(priv)) {
  5468. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5469. "HW and/or SW RF Kill no longer active, restarting "
  5470. "device\n");
  5471. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5472. queue_work(priv->workqueue, &priv->restart);
  5473. } else {
  5474. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5475. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5476. "disabled by SW switch\n");
  5477. else
  5478. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5479. "Kill switch must be turned off for "
  5480. "wireless networking to work.\n");
  5481. }
  5482. mutex_unlock(&priv->mutex);
  5483. }
  5484. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5485. static void iwl4965_bg_scan_check(struct work_struct *data)
  5486. {
  5487. struct iwl4965_priv *priv =
  5488. container_of(data, struct iwl4965_priv, scan_check.work);
  5489. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5490. return;
  5491. mutex_lock(&priv->mutex);
  5492. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5493. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5494. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5495. "Scan completion watchdog resetting adapter (%dms)\n",
  5496. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5497. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5498. iwl4965_send_scan_abort(priv);
  5499. }
  5500. mutex_unlock(&priv->mutex);
  5501. }
  5502. static void iwl4965_bg_request_scan(struct work_struct *data)
  5503. {
  5504. struct iwl4965_priv *priv =
  5505. container_of(data, struct iwl4965_priv, request_scan);
  5506. struct iwl4965_host_cmd cmd = {
  5507. .id = REPLY_SCAN_CMD,
  5508. .len = sizeof(struct iwl4965_scan_cmd),
  5509. .meta.flags = CMD_SIZE_HUGE,
  5510. };
  5511. int rc = 0;
  5512. struct iwl4965_scan_cmd *scan;
  5513. struct ieee80211_conf *conf = NULL;
  5514. u16 cmd_len;
  5515. enum ieee80211_band band;
  5516. u8 direct_mask;
  5517. conf = ieee80211_get_hw_conf(priv->hw);
  5518. mutex_lock(&priv->mutex);
  5519. if (!iwl4965_is_ready(priv)) {
  5520. IWL_WARNING("request scan called when driver not ready.\n");
  5521. goto done;
  5522. }
  5523. /* Make sure the scan wasn't cancelled before this queued work
  5524. * was given the chance to run... */
  5525. if (!test_bit(STATUS_SCANNING, &priv->status))
  5526. goto done;
  5527. /* This should never be called or scheduled if there is currently
  5528. * a scan active in the hardware. */
  5529. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5530. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5531. "Ignoring second request.\n");
  5532. rc = -EIO;
  5533. goto done;
  5534. }
  5535. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5536. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5537. goto done;
  5538. }
  5539. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5540. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5541. goto done;
  5542. }
  5543. if (iwl4965_is_rfkill(priv)) {
  5544. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5545. goto done;
  5546. }
  5547. if (!test_bit(STATUS_READY, &priv->status)) {
  5548. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5549. goto done;
  5550. }
  5551. if (!priv->scan_bands) {
  5552. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5553. goto done;
  5554. }
  5555. if (!priv->scan) {
  5556. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5557. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5558. if (!priv->scan) {
  5559. rc = -ENOMEM;
  5560. goto done;
  5561. }
  5562. }
  5563. scan = priv->scan;
  5564. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5565. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5566. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5567. if (iwl4965_is_associated(priv)) {
  5568. u16 interval = 0;
  5569. u32 extra;
  5570. u32 suspend_time = 100;
  5571. u32 scan_suspend_time = 100;
  5572. unsigned long flags;
  5573. IWL_DEBUG_INFO("Scanning while associated...\n");
  5574. spin_lock_irqsave(&priv->lock, flags);
  5575. interval = priv->beacon_int;
  5576. spin_unlock_irqrestore(&priv->lock, flags);
  5577. scan->suspend_time = 0;
  5578. scan->max_out_time = cpu_to_le32(200 * 1024);
  5579. if (!interval)
  5580. interval = suspend_time;
  5581. extra = (suspend_time / interval) << 22;
  5582. scan_suspend_time = (extra |
  5583. ((suspend_time % interval) * 1024));
  5584. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5585. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5586. scan_suspend_time, interval);
  5587. }
  5588. /* We should add the ability for user to lock to PASSIVE ONLY */
  5589. if (priv->one_direct_scan) {
  5590. IWL_DEBUG_SCAN
  5591. ("Kicking off one direct scan for '%s'\n",
  5592. iwl4965_escape_essid(priv->direct_ssid,
  5593. priv->direct_ssid_len));
  5594. scan->direct_scan[0].id = WLAN_EID_SSID;
  5595. scan->direct_scan[0].len = priv->direct_ssid_len;
  5596. memcpy(scan->direct_scan[0].ssid,
  5597. priv->direct_ssid, priv->direct_ssid_len);
  5598. direct_mask = 1;
  5599. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5600. scan->direct_scan[0].id = WLAN_EID_SSID;
  5601. scan->direct_scan[0].len = priv->essid_len;
  5602. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5603. direct_mask = 1;
  5604. } else
  5605. direct_mask = 0;
  5606. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5607. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5608. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5609. switch (priv->scan_bands) {
  5610. case 2:
  5611. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5612. scan->tx_cmd.rate_n_flags =
  5613. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5614. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5615. scan->good_CRC_th = 0;
  5616. band = IEEE80211_BAND_2GHZ;
  5617. break;
  5618. case 1:
  5619. scan->tx_cmd.rate_n_flags =
  5620. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5621. RATE_MCS_ANT_B_MSK);
  5622. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5623. band = IEEE80211_BAND_5GHZ;
  5624. break;
  5625. default:
  5626. IWL_WARNING("Invalid scan band count\n");
  5627. goto done;
  5628. }
  5629. /* We don't build a direct scan probe request; the uCode will do
  5630. * that based on the direct_mask added to each channel entry */
  5631. cmd_len = iwl4965_fill_probe_req(priv, band,
  5632. (struct ieee80211_mgmt *)scan->data,
  5633. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
  5634. scan->tx_cmd.len = cpu_to_le16(cmd_len);
  5635. /* select Rx chains */
  5636. /* Force use of chains B and C (0x6) for scan Rx.
  5637. * Avoid A (0x1) because of its off-channel reception on A-band.
  5638. * MIMO is not used here, but value is required to make uCode happy. */
  5639. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5640. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5641. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5642. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5643. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5644. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5645. if (direct_mask) {
  5646. IWL_DEBUG_SCAN
  5647. ("Initiating direct scan for %s.\n",
  5648. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5649. scan->channel_count =
  5650. iwl4965_get_channels_for_scan(
  5651. priv, band, 1, /* active */
  5652. direct_mask,
  5653. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5654. } else {
  5655. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5656. scan->channel_count =
  5657. iwl4965_get_channels_for_scan(
  5658. priv, band, 0, /* passive */
  5659. direct_mask,
  5660. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5661. }
  5662. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5663. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5664. cmd.data = scan;
  5665. scan->len = cpu_to_le16(cmd.len);
  5666. set_bit(STATUS_SCAN_HW, &priv->status);
  5667. rc = iwl4965_send_cmd_sync(priv, &cmd);
  5668. if (rc)
  5669. goto done;
  5670. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5671. IWL_SCAN_CHECK_WATCHDOG);
  5672. mutex_unlock(&priv->mutex);
  5673. return;
  5674. done:
  5675. /* inform mac80211 scan aborted */
  5676. queue_work(priv->workqueue, &priv->scan_completed);
  5677. mutex_unlock(&priv->mutex);
  5678. }
  5679. static void iwl4965_bg_up(struct work_struct *data)
  5680. {
  5681. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
  5682. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5683. return;
  5684. mutex_lock(&priv->mutex);
  5685. __iwl4965_up(priv);
  5686. mutex_unlock(&priv->mutex);
  5687. }
  5688. static void iwl4965_bg_restart(struct work_struct *data)
  5689. {
  5690. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
  5691. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5692. return;
  5693. iwl4965_down(priv);
  5694. queue_work(priv->workqueue, &priv->up);
  5695. }
  5696. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  5697. {
  5698. struct iwl4965_priv *priv =
  5699. container_of(data, struct iwl4965_priv, rx_replenish);
  5700. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5701. return;
  5702. mutex_lock(&priv->mutex);
  5703. iwl4965_rx_replenish(priv);
  5704. mutex_unlock(&priv->mutex);
  5705. }
  5706. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  5707. static void iwl4965_bg_post_associate(struct work_struct *data)
  5708. {
  5709. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
  5710. post_associate.work);
  5711. int rc = 0;
  5712. struct ieee80211_conf *conf = NULL;
  5713. DECLARE_MAC_BUF(mac);
  5714. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5715. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5716. return;
  5717. }
  5718. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5719. priv->assoc_id,
  5720. print_mac(mac, priv->active_rxon.bssid_addr));
  5721. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5722. return;
  5723. mutex_lock(&priv->mutex);
  5724. if (!priv->vif || !priv->is_open) {
  5725. mutex_unlock(&priv->mutex);
  5726. return;
  5727. }
  5728. iwl4965_scan_cancel_timeout(priv, 200);
  5729. conf = ieee80211_get_hw_conf(priv->hw);
  5730. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5731. iwl4965_commit_rxon(priv);
  5732. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5733. iwl4965_setup_rxon_timing(priv);
  5734. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5735. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5736. if (rc)
  5737. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5738. "Attempting to continue.\n");
  5739. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5740. #ifdef CONFIG_IWL4965_HT
  5741. if (priv->current_ht_config.is_ht)
  5742. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  5743. #endif /* CONFIG_IWL4965_HT*/
  5744. iwl4965_set_rxon_chain(priv);
  5745. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5746. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5747. priv->assoc_id, priv->beacon_int);
  5748. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5749. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5750. else
  5751. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5752. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5753. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5754. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5755. else
  5756. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5757. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5758. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5759. }
  5760. iwl4965_commit_rxon(priv);
  5761. switch (priv->iw_mode) {
  5762. case IEEE80211_IF_TYPE_STA:
  5763. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  5764. break;
  5765. case IEEE80211_IF_TYPE_IBSS:
  5766. /* clear out the station table */
  5767. iwl4965_clear_stations_table(priv);
  5768. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5769. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  5770. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  5771. iwl4965_send_beacon_cmd(priv);
  5772. break;
  5773. default:
  5774. IWL_ERROR("%s Should not be called in %d mode\n",
  5775. __FUNCTION__, priv->iw_mode);
  5776. break;
  5777. }
  5778. iwl4965_sequence_reset(priv);
  5779. #ifdef CONFIG_IWL4965_SENSITIVITY
  5780. /* Enable Rx differential gain and sensitivity calibrations */
  5781. iwl4965_chain_noise_reset(priv);
  5782. priv->start_calib = 1;
  5783. #endif /* CONFIG_IWL4965_SENSITIVITY */
  5784. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5785. priv->assoc_station_added = 1;
  5786. iwl4965_activate_qos(priv, 0);
  5787. /* we have just associated, don't start scan too early */
  5788. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  5789. mutex_unlock(&priv->mutex);
  5790. }
  5791. static void iwl4965_bg_abort_scan(struct work_struct *work)
  5792. {
  5793. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
  5794. if (!iwl4965_is_ready(priv))
  5795. return;
  5796. mutex_lock(&priv->mutex);
  5797. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5798. iwl4965_send_scan_abort(priv);
  5799. mutex_unlock(&priv->mutex);
  5800. }
  5801. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  5802. static void iwl4965_bg_scan_completed(struct work_struct *work)
  5803. {
  5804. struct iwl4965_priv *priv =
  5805. container_of(work, struct iwl4965_priv, scan_completed);
  5806. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5807. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5808. return;
  5809. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  5810. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  5811. ieee80211_scan_completed(priv->hw);
  5812. /* Since setting the TXPOWER may have been deferred while
  5813. * performing the scan, fire one off */
  5814. mutex_lock(&priv->mutex);
  5815. iwl4965_hw_reg_send_txpower(priv);
  5816. mutex_unlock(&priv->mutex);
  5817. }
  5818. /*****************************************************************************
  5819. *
  5820. * mac80211 entry point functions
  5821. *
  5822. *****************************************************************************/
  5823. #define UCODE_READY_TIMEOUT (2 * HZ)
  5824. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  5825. {
  5826. struct iwl4965_priv *priv = hw->priv;
  5827. int ret;
  5828. IWL_DEBUG_MAC80211("enter\n");
  5829. if (pci_enable_device(priv->pci_dev)) {
  5830. IWL_ERROR("Fail to pci_enable_device\n");
  5831. return -ENODEV;
  5832. }
  5833. pci_restore_state(priv->pci_dev);
  5834. pci_enable_msi(priv->pci_dev);
  5835. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  5836. DRV_NAME, priv);
  5837. if (ret) {
  5838. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  5839. goto out_disable_msi;
  5840. }
  5841. /* we should be verifying the device is ready to be opened */
  5842. mutex_lock(&priv->mutex);
  5843. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  5844. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  5845. * ucode filename and max sizes are card-specific. */
  5846. if (!priv->ucode_code.len) {
  5847. ret = iwl4965_read_ucode(priv);
  5848. if (ret) {
  5849. IWL_ERROR("Could not read microcode: %d\n", ret);
  5850. mutex_unlock(&priv->mutex);
  5851. goto out_release_irq;
  5852. }
  5853. }
  5854. ret = __iwl4965_up(priv);
  5855. mutex_unlock(&priv->mutex);
  5856. if (ret)
  5857. goto out_release_irq;
  5858. IWL_DEBUG_INFO("Start UP work done.\n");
  5859. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  5860. return 0;
  5861. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  5862. * mac80211 will not be run successfully. */
  5863. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  5864. test_bit(STATUS_READY, &priv->status),
  5865. UCODE_READY_TIMEOUT);
  5866. if (!ret) {
  5867. if (!test_bit(STATUS_READY, &priv->status)) {
  5868. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  5869. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  5870. ret = -ETIMEDOUT;
  5871. goto out_release_irq;
  5872. }
  5873. }
  5874. priv->is_open = 1;
  5875. IWL_DEBUG_MAC80211("leave\n");
  5876. return 0;
  5877. out_release_irq:
  5878. free_irq(priv->pci_dev->irq, priv);
  5879. out_disable_msi:
  5880. pci_disable_msi(priv->pci_dev);
  5881. pci_disable_device(priv->pci_dev);
  5882. priv->is_open = 0;
  5883. IWL_DEBUG_MAC80211("leave - failed\n");
  5884. return ret;
  5885. }
  5886. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  5887. {
  5888. struct iwl4965_priv *priv = hw->priv;
  5889. IWL_DEBUG_MAC80211("enter\n");
  5890. if (!priv->is_open) {
  5891. IWL_DEBUG_MAC80211("leave - skip\n");
  5892. return;
  5893. }
  5894. priv->is_open = 0;
  5895. if (iwl4965_is_ready_rf(priv)) {
  5896. /* stop mac, cancel any scan request and clear
  5897. * RXON_FILTER_ASSOC_MSK BIT
  5898. */
  5899. mutex_lock(&priv->mutex);
  5900. iwl4965_scan_cancel_timeout(priv, 100);
  5901. cancel_delayed_work(&priv->post_associate);
  5902. mutex_unlock(&priv->mutex);
  5903. }
  5904. iwl4965_down(priv);
  5905. flush_workqueue(priv->workqueue);
  5906. free_irq(priv->pci_dev->irq, priv);
  5907. pci_disable_msi(priv->pci_dev);
  5908. pci_save_state(priv->pci_dev);
  5909. pci_disable_device(priv->pci_dev);
  5910. IWL_DEBUG_MAC80211("leave\n");
  5911. }
  5912. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5913. struct ieee80211_tx_control *ctl)
  5914. {
  5915. struct iwl4965_priv *priv = hw->priv;
  5916. IWL_DEBUG_MAC80211("enter\n");
  5917. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  5918. IWL_DEBUG_MAC80211("leave - monitor\n");
  5919. return -1;
  5920. }
  5921. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  5922. ctl->tx_rate->bitrate);
  5923. if (iwl4965_tx_skb(priv, skb, ctl))
  5924. dev_kfree_skb_any(skb);
  5925. IWL_DEBUG_MAC80211("leave\n");
  5926. return 0;
  5927. }
  5928. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  5929. struct ieee80211_if_init_conf *conf)
  5930. {
  5931. struct iwl4965_priv *priv = hw->priv;
  5932. unsigned long flags;
  5933. DECLARE_MAC_BUF(mac);
  5934. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  5935. if (priv->vif) {
  5936. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  5937. return -EOPNOTSUPP;
  5938. }
  5939. spin_lock_irqsave(&priv->lock, flags);
  5940. priv->vif = conf->vif;
  5941. spin_unlock_irqrestore(&priv->lock, flags);
  5942. mutex_lock(&priv->mutex);
  5943. if (conf->mac_addr) {
  5944. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  5945. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  5946. }
  5947. if (iwl4965_is_ready(priv))
  5948. iwl4965_set_mode(priv, conf->type);
  5949. mutex_unlock(&priv->mutex);
  5950. IWL_DEBUG_MAC80211("leave\n");
  5951. return 0;
  5952. }
  5953. /**
  5954. * iwl4965_mac_config - mac80211 config callback
  5955. *
  5956. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  5957. * be set inappropriately and the driver currently sets the hardware up to
  5958. * use it whenever needed.
  5959. */
  5960. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  5961. {
  5962. struct iwl4965_priv *priv = hw->priv;
  5963. const struct iwl4965_channel_info *ch_info;
  5964. unsigned long flags;
  5965. int ret = 0;
  5966. mutex_lock(&priv->mutex);
  5967. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  5968. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  5969. if (!iwl4965_is_ready(priv)) {
  5970. IWL_DEBUG_MAC80211("leave - not ready\n");
  5971. ret = -EIO;
  5972. goto out;
  5973. }
  5974. if (unlikely(!iwl4965_param_disable_hw_scan &&
  5975. test_bit(STATUS_SCANNING, &priv->status))) {
  5976. IWL_DEBUG_MAC80211("leave - scanning\n");
  5977. set_bit(STATUS_CONF_PENDING, &priv->status);
  5978. mutex_unlock(&priv->mutex);
  5979. return 0;
  5980. }
  5981. spin_lock_irqsave(&priv->lock, flags);
  5982. ch_info = iwl4965_get_channel_info(priv, conf->channel->band,
  5983. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5984. if (!is_channel_valid(ch_info)) {
  5985. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  5986. spin_unlock_irqrestore(&priv->lock, flags);
  5987. ret = -EINVAL;
  5988. goto out;
  5989. }
  5990. #ifdef CONFIG_IWL4965_HT
  5991. /* if we are switching from ht to 2.4 clear flags
  5992. * from any ht related info since 2.4 does not
  5993. * support ht */
  5994. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
  5995. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5996. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  5997. #endif
  5998. )
  5999. priv->staging_rxon.flags = 0;
  6000. #endif /* CONFIG_IWL4965_HT */
  6001. iwl4965_set_rxon_channel(priv, conf->channel->band,
  6002. ieee80211_frequency_to_channel(conf->channel->center_freq));
  6003. iwl4965_set_flags_for_phymode(priv, conf->channel->band);
  6004. /* The list of supported rates and rate mask can be different
  6005. * for each band; since the band may have changed, reset
  6006. * the rate mask to what mac80211 lists */
  6007. iwl4965_set_rate(priv);
  6008. spin_unlock_irqrestore(&priv->lock, flags);
  6009. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6010. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6011. iwl4965_hw_channel_switch(priv, conf->channel);
  6012. goto out;
  6013. }
  6014. #endif
  6015. iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
  6016. if (!conf->radio_enabled) {
  6017. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6018. goto out;
  6019. }
  6020. if (iwl4965_is_rfkill(priv)) {
  6021. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6022. ret = -EIO;
  6023. goto out;
  6024. }
  6025. iwl4965_set_rate(priv);
  6026. if (memcmp(&priv->active_rxon,
  6027. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6028. iwl4965_commit_rxon(priv);
  6029. else
  6030. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6031. IWL_DEBUG_MAC80211("leave\n");
  6032. out:
  6033. clear_bit(STATUS_CONF_PENDING, &priv->status);
  6034. mutex_unlock(&priv->mutex);
  6035. return ret;
  6036. }
  6037. static void iwl4965_config_ap(struct iwl4965_priv *priv)
  6038. {
  6039. int rc = 0;
  6040. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6041. return;
  6042. /* The following should be done only at AP bring up */
  6043. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6044. /* RXON - unassoc (to set timing command) */
  6045. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6046. iwl4965_commit_rxon(priv);
  6047. /* RXON Timing */
  6048. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6049. iwl4965_setup_rxon_timing(priv);
  6050. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6051. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6052. if (rc)
  6053. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6054. "Attempting to continue.\n");
  6055. iwl4965_set_rxon_chain(priv);
  6056. /* FIXME: what should be the assoc_id for AP? */
  6057. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6058. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6059. priv->staging_rxon.flags |=
  6060. RXON_FLG_SHORT_PREAMBLE_MSK;
  6061. else
  6062. priv->staging_rxon.flags &=
  6063. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6064. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6065. if (priv->assoc_capability &
  6066. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6067. priv->staging_rxon.flags |=
  6068. RXON_FLG_SHORT_SLOT_MSK;
  6069. else
  6070. priv->staging_rxon.flags &=
  6071. ~RXON_FLG_SHORT_SLOT_MSK;
  6072. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6073. priv->staging_rxon.flags &=
  6074. ~RXON_FLG_SHORT_SLOT_MSK;
  6075. }
  6076. /* restore RXON assoc */
  6077. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6078. iwl4965_commit_rxon(priv);
  6079. iwl4965_activate_qos(priv, 1);
  6080. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6081. }
  6082. iwl4965_send_beacon_cmd(priv);
  6083. /* FIXME - we need to add code here to detect a totally new
  6084. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6085. * clear sta table, add BCAST sta... */
  6086. }
  6087. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  6088. struct ieee80211_vif *vif,
  6089. struct ieee80211_if_conf *conf)
  6090. {
  6091. struct iwl4965_priv *priv = hw->priv;
  6092. DECLARE_MAC_BUF(mac);
  6093. unsigned long flags;
  6094. int rc;
  6095. if (conf == NULL)
  6096. return -EIO;
  6097. if (priv->vif != vif) {
  6098. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  6099. mutex_unlock(&priv->mutex);
  6100. return 0;
  6101. }
  6102. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6103. (!conf->beacon || !conf->ssid_len)) {
  6104. IWL_DEBUG_MAC80211
  6105. ("Leaving in AP mode because HostAPD is not ready.\n");
  6106. return 0;
  6107. }
  6108. if (!iwl4965_is_alive(priv))
  6109. return -EAGAIN;
  6110. mutex_lock(&priv->mutex);
  6111. if (conf->bssid)
  6112. IWL_DEBUG_MAC80211("bssid: %s\n",
  6113. print_mac(mac, conf->bssid));
  6114. /*
  6115. * very dubious code was here; the probe filtering flag is never set:
  6116. *
  6117. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6118. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6119. */
  6120. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6121. if (!conf->bssid) {
  6122. conf->bssid = priv->mac_addr;
  6123. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6124. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  6125. print_mac(mac, conf->bssid));
  6126. }
  6127. if (priv->ibss_beacon)
  6128. dev_kfree_skb(priv->ibss_beacon);
  6129. priv->ibss_beacon = conf->beacon;
  6130. }
  6131. if (iwl4965_is_rfkill(priv))
  6132. goto done;
  6133. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6134. !is_multicast_ether_addr(conf->bssid)) {
  6135. /* If there is currently a HW scan going on in the background
  6136. * then we need to cancel it else the RXON below will fail. */
  6137. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  6138. IWL_WARNING("Aborted scan still in progress "
  6139. "after 100ms\n");
  6140. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6141. mutex_unlock(&priv->mutex);
  6142. return -EAGAIN;
  6143. }
  6144. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6145. /* TODO: Audit driver for usage of these members and see
  6146. * if mac80211 deprecates them (priv->bssid looks like it
  6147. * shouldn't be there, but I haven't scanned the IBSS code
  6148. * to verify) - jpk */
  6149. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6150. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6151. iwl4965_config_ap(priv);
  6152. else {
  6153. rc = iwl4965_commit_rxon(priv);
  6154. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6155. iwl4965_rxon_add_station(
  6156. priv, priv->active_rxon.bssid_addr, 1);
  6157. }
  6158. } else {
  6159. iwl4965_scan_cancel_timeout(priv, 100);
  6160. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6161. iwl4965_commit_rxon(priv);
  6162. }
  6163. done:
  6164. spin_lock_irqsave(&priv->lock, flags);
  6165. if (!conf->ssid_len)
  6166. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6167. else
  6168. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6169. priv->essid_len = conf->ssid_len;
  6170. spin_unlock_irqrestore(&priv->lock, flags);
  6171. IWL_DEBUG_MAC80211("leave\n");
  6172. mutex_unlock(&priv->mutex);
  6173. return 0;
  6174. }
  6175. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  6176. unsigned int changed_flags,
  6177. unsigned int *total_flags,
  6178. int mc_count, struct dev_addr_list *mc_list)
  6179. {
  6180. /*
  6181. * XXX: dummy
  6182. * see also iwl4965_connection_init_rx_config
  6183. */
  6184. *total_flags = 0;
  6185. }
  6186. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  6187. struct ieee80211_if_init_conf *conf)
  6188. {
  6189. struct iwl4965_priv *priv = hw->priv;
  6190. IWL_DEBUG_MAC80211("enter\n");
  6191. mutex_lock(&priv->mutex);
  6192. if (iwl4965_is_ready_rf(priv)) {
  6193. iwl4965_scan_cancel_timeout(priv, 100);
  6194. cancel_delayed_work(&priv->post_associate);
  6195. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6196. iwl4965_commit_rxon(priv);
  6197. }
  6198. if (priv->vif == conf->vif) {
  6199. priv->vif = NULL;
  6200. memset(priv->bssid, 0, ETH_ALEN);
  6201. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6202. priv->essid_len = 0;
  6203. }
  6204. mutex_unlock(&priv->mutex);
  6205. IWL_DEBUG_MAC80211("leave\n");
  6206. }
  6207. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  6208. struct ieee80211_vif *vif,
  6209. struct ieee80211_bss_conf *bss_conf,
  6210. u32 changes)
  6211. {
  6212. struct iwl4965_priv *priv = hw->priv;
  6213. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  6214. if (bss_conf->use_short_preamble)
  6215. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6216. else
  6217. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6218. }
  6219. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  6220. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  6221. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  6222. else
  6223. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  6224. }
  6225. if (changes & BSS_CHANGED_ASSOC) {
  6226. /*
  6227. * TODO:
  6228. * do stuff instead of sniffing assoc resp
  6229. */
  6230. }
  6231. if (iwl4965_is_associated(priv))
  6232. iwl4965_send_rxon_assoc(priv);
  6233. }
  6234. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6235. {
  6236. int rc = 0;
  6237. unsigned long flags;
  6238. struct iwl4965_priv *priv = hw->priv;
  6239. IWL_DEBUG_MAC80211("enter\n");
  6240. mutex_lock(&priv->mutex);
  6241. spin_lock_irqsave(&priv->lock, flags);
  6242. if (!iwl4965_is_ready_rf(priv)) {
  6243. rc = -EIO;
  6244. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6245. goto out_unlock;
  6246. }
  6247. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6248. rc = -EIO;
  6249. IWL_ERROR("ERROR: APs don't scan\n");
  6250. goto out_unlock;
  6251. }
  6252. /* we don't schedule scan within next_scan_jiffies period */
  6253. if (priv->next_scan_jiffies &&
  6254. time_after(priv->next_scan_jiffies, jiffies)) {
  6255. rc = -EAGAIN;
  6256. goto out_unlock;
  6257. }
  6258. /* if we just finished scan ask for delay */
  6259. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  6260. IWL_DELAY_NEXT_SCAN, jiffies)) {
  6261. rc = -EAGAIN;
  6262. goto out_unlock;
  6263. }
  6264. if (len) {
  6265. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  6266. iwl4965_escape_essid(ssid, len), (int)len);
  6267. priv->one_direct_scan = 1;
  6268. priv->direct_ssid_len = (u8)
  6269. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6270. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6271. } else
  6272. priv->one_direct_scan = 0;
  6273. rc = iwl4965_scan_initiate(priv);
  6274. IWL_DEBUG_MAC80211("leave\n");
  6275. out_unlock:
  6276. spin_unlock_irqrestore(&priv->lock, flags);
  6277. mutex_unlock(&priv->mutex);
  6278. return rc;
  6279. }
  6280. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6281. const u8 *local_addr, const u8 *addr,
  6282. struct ieee80211_key_conf *key)
  6283. {
  6284. struct iwl4965_priv *priv = hw->priv;
  6285. DECLARE_MAC_BUF(mac);
  6286. int rc = 0;
  6287. u8 sta_id;
  6288. IWL_DEBUG_MAC80211("enter\n");
  6289. if (!iwl4965_param_hwcrypto) {
  6290. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6291. return -EOPNOTSUPP;
  6292. }
  6293. if (is_zero_ether_addr(addr))
  6294. /* only support pairwise keys */
  6295. return -EOPNOTSUPP;
  6296. sta_id = iwl4965_hw_find_station(priv, addr);
  6297. if (sta_id == IWL_INVALID_STATION) {
  6298. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6299. print_mac(mac, addr));
  6300. return -EINVAL;
  6301. }
  6302. mutex_lock(&priv->mutex);
  6303. iwl4965_scan_cancel_timeout(priv, 100);
  6304. switch (cmd) {
  6305. case SET_KEY:
  6306. rc = iwl4965_update_sta_key_info(priv, key, sta_id);
  6307. if (!rc) {
  6308. iwl4965_set_rxon_hwcrypto(priv, 1);
  6309. iwl4965_commit_rxon(priv);
  6310. key->hw_key_idx = sta_id;
  6311. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6312. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6313. }
  6314. break;
  6315. case DISABLE_KEY:
  6316. rc = iwl4965_clear_sta_key_info(priv, sta_id);
  6317. if (!rc) {
  6318. iwl4965_set_rxon_hwcrypto(priv, 0);
  6319. iwl4965_commit_rxon(priv);
  6320. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6321. }
  6322. break;
  6323. default:
  6324. rc = -EINVAL;
  6325. }
  6326. IWL_DEBUG_MAC80211("leave\n");
  6327. mutex_unlock(&priv->mutex);
  6328. return rc;
  6329. }
  6330. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6331. const struct ieee80211_tx_queue_params *params)
  6332. {
  6333. struct iwl4965_priv *priv = hw->priv;
  6334. unsigned long flags;
  6335. int q;
  6336. IWL_DEBUG_MAC80211("enter\n");
  6337. if (!iwl4965_is_ready_rf(priv)) {
  6338. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6339. return -EIO;
  6340. }
  6341. if (queue >= AC_NUM) {
  6342. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6343. return 0;
  6344. }
  6345. if (!priv->qos_data.qos_enable) {
  6346. priv->qos_data.qos_active = 0;
  6347. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6348. return 0;
  6349. }
  6350. q = AC_NUM - 1 - queue;
  6351. spin_lock_irqsave(&priv->lock, flags);
  6352. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6353. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6354. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6355. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6356. cpu_to_le16((params->txop * 32));
  6357. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6358. priv->qos_data.qos_active = 1;
  6359. spin_unlock_irqrestore(&priv->lock, flags);
  6360. mutex_lock(&priv->mutex);
  6361. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6362. iwl4965_activate_qos(priv, 1);
  6363. else if (priv->assoc_id && iwl4965_is_associated(priv))
  6364. iwl4965_activate_qos(priv, 0);
  6365. mutex_unlock(&priv->mutex);
  6366. IWL_DEBUG_MAC80211("leave\n");
  6367. return 0;
  6368. }
  6369. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  6370. struct ieee80211_tx_queue_stats *stats)
  6371. {
  6372. struct iwl4965_priv *priv = hw->priv;
  6373. int i, avail;
  6374. struct iwl4965_tx_queue *txq;
  6375. struct iwl4965_queue *q;
  6376. unsigned long flags;
  6377. IWL_DEBUG_MAC80211("enter\n");
  6378. if (!iwl4965_is_ready_rf(priv)) {
  6379. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6380. return -EIO;
  6381. }
  6382. spin_lock_irqsave(&priv->lock, flags);
  6383. for (i = 0; i < AC_NUM; i++) {
  6384. txq = &priv->txq[i];
  6385. q = &txq->q;
  6386. avail = iwl4965_queue_space(q);
  6387. stats->data[i].len = q->n_window - avail;
  6388. stats->data[i].limit = q->n_window - q->high_mark;
  6389. stats->data[i].count = q->n_window;
  6390. }
  6391. spin_unlock_irqrestore(&priv->lock, flags);
  6392. IWL_DEBUG_MAC80211("leave\n");
  6393. return 0;
  6394. }
  6395. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  6396. struct ieee80211_low_level_stats *stats)
  6397. {
  6398. IWL_DEBUG_MAC80211("enter\n");
  6399. IWL_DEBUG_MAC80211("leave\n");
  6400. return 0;
  6401. }
  6402. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  6403. {
  6404. IWL_DEBUG_MAC80211("enter\n");
  6405. IWL_DEBUG_MAC80211("leave\n");
  6406. return 0;
  6407. }
  6408. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  6409. {
  6410. struct iwl4965_priv *priv = hw->priv;
  6411. unsigned long flags;
  6412. mutex_lock(&priv->mutex);
  6413. IWL_DEBUG_MAC80211("enter\n");
  6414. priv->lq_mngr.lq_ready = 0;
  6415. #ifdef CONFIG_IWL4965_HT
  6416. spin_lock_irqsave(&priv->lock, flags);
  6417. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  6418. spin_unlock_irqrestore(&priv->lock, flags);
  6419. #endif /* CONFIG_IWL4965_HT */
  6420. iwl4965_reset_qos(priv);
  6421. cancel_delayed_work(&priv->post_associate);
  6422. spin_lock_irqsave(&priv->lock, flags);
  6423. priv->assoc_id = 0;
  6424. priv->assoc_capability = 0;
  6425. priv->call_post_assoc_from_beacon = 0;
  6426. priv->assoc_station_added = 0;
  6427. /* new association get rid of ibss beacon skb */
  6428. if (priv->ibss_beacon)
  6429. dev_kfree_skb(priv->ibss_beacon);
  6430. priv->ibss_beacon = NULL;
  6431. priv->beacon_int = priv->hw->conf.beacon_int;
  6432. priv->timestamp1 = 0;
  6433. priv->timestamp0 = 0;
  6434. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6435. priv->beacon_int = 0;
  6436. spin_unlock_irqrestore(&priv->lock, flags);
  6437. if (!iwl4965_is_ready_rf(priv)) {
  6438. IWL_DEBUG_MAC80211("leave - not ready\n");
  6439. mutex_unlock(&priv->mutex);
  6440. return;
  6441. }
  6442. /* we are restarting association process
  6443. * clear RXON_FILTER_ASSOC_MSK bit
  6444. */
  6445. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6446. iwl4965_scan_cancel_timeout(priv, 100);
  6447. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6448. iwl4965_commit_rxon(priv);
  6449. }
  6450. /* Per mac80211.h: This is only used in IBSS mode... */
  6451. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6452. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6453. mutex_unlock(&priv->mutex);
  6454. return;
  6455. }
  6456. priv->only_active_channel = 0;
  6457. iwl4965_set_rate(priv);
  6458. mutex_unlock(&priv->mutex);
  6459. IWL_DEBUG_MAC80211("leave\n");
  6460. }
  6461. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6462. struct ieee80211_tx_control *control)
  6463. {
  6464. struct iwl4965_priv *priv = hw->priv;
  6465. unsigned long flags;
  6466. mutex_lock(&priv->mutex);
  6467. IWL_DEBUG_MAC80211("enter\n");
  6468. if (!iwl4965_is_ready_rf(priv)) {
  6469. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6470. mutex_unlock(&priv->mutex);
  6471. return -EIO;
  6472. }
  6473. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6474. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6475. mutex_unlock(&priv->mutex);
  6476. return -EIO;
  6477. }
  6478. spin_lock_irqsave(&priv->lock, flags);
  6479. if (priv->ibss_beacon)
  6480. dev_kfree_skb(priv->ibss_beacon);
  6481. priv->ibss_beacon = skb;
  6482. priv->assoc_id = 0;
  6483. IWL_DEBUG_MAC80211("leave\n");
  6484. spin_unlock_irqrestore(&priv->lock, flags);
  6485. iwl4965_reset_qos(priv);
  6486. queue_work(priv->workqueue, &priv->post_associate.work);
  6487. mutex_unlock(&priv->mutex);
  6488. return 0;
  6489. }
  6490. #ifdef CONFIG_IWL4965_HT
  6491. static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
  6492. struct iwl4965_priv *priv)
  6493. {
  6494. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  6495. struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
  6496. struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
  6497. IWL_DEBUG_MAC80211("enter: \n");
  6498. if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
  6499. iwl_conf->is_ht = 0;
  6500. return;
  6501. }
  6502. iwl_conf->is_ht = 1;
  6503. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6504. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  6505. iwl_conf->sgf |= 0x1;
  6506. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  6507. iwl_conf->sgf |= 0x2;
  6508. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  6509. iwl_conf->max_amsdu_size =
  6510. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  6511. iwl_conf->supported_chan_width =
  6512. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  6513. iwl_conf->extension_chan_offset =
  6514. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  6515. /* If no above or below channel supplied disable FAT channel */
  6516. if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
  6517. iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
  6518. iwl_conf->supported_chan_width = 0;
  6519. iwl_conf->tx_mimo_ps_mode =
  6520. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6521. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  6522. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  6523. iwl_conf->tx_chan_width =
  6524. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  6525. iwl_conf->ht_protection =
  6526. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  6527. iwl_conf->non_GF_STA_present =
  6528. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  6529. IWL_DEBUG_MAC80211("control channel %d\n",
  6530. iwl_conf->control_channel);
  6531. IWL_DEBUG_MAC80211("leave\n");
  6532. }
  6533. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6534. struct ieee80211_conf *conf)
  6535. {
  6536. struct iwl4965_priv *priv = hw->priv;
  6537. IWL_DEBUG_MAC80211("enter: \n");
  6538. iwl4965_ht_info_fill(conf, priv);
  6539. iwl4965_set_rxon_chain(priv);
  6540. if (priv && priv->assoc_id &&
  6541. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6542. unsigned long flags;
  6543. spin_lock_irqsave(&priv->lock, flags);
  6544. if (priv->beacon_int)
  6545. queue_work(priv->workqueue, &priv->post_associate.work);
  6546. else
  6547. priv->call_post_assoc_from_beacon = 1;
  6548. spin_unlock_irqrestore(&priv->lock, flags);
  6549. }
  6550. IWL_DEBUG_MAC80211("leave:\n");
  6551. return 0;
  6552. }
  6553. #endif /*CONFIG_IWL4965_HT*/
  6554. /*****************************************************************************
  6555. *
  6556. * sysfs attributes
  6557. *
  6558. *****************************************************************************/
  6559. #ifdef CONFIG_IWL4965_DEBUG
  6560. /*
  6561. * The following adds a new attribute to the sysfs representation
  6562. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6563. * used for controlling the debug level.
  6564. *
  6565. * See the level definitions in iwl for details.
  6566. */
  6567. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6568. {
  6569. return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
  6570. }
  6571. static ssize_t store_debug_level(struct device_driver *d,
  6572. const char *buf, size_t count)
  6573. {
  6574. char *p = (char *)buf;
  6575. u32 val;
  6576. val = simple_strtoul(p, &p, 0);
  6577. if (p == buf)
  6578. printk(KERN_INFO DRV_NAME
  6579. ": %s is not in hex or decimal form.\n", buf);
  6580. else
  6581. iwl4965_debug_level = val;
  6582. return strnlen(buf, count);
  6583. }
  6584. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6585. show_debug_level, store_debug_level);
  6586. #endif /* CONFIG_IWL4965_DEBUG */
  6587. static ssize_t show_rf_kill(struct device *d,
  6588. struct device_attribute *attr, char *buf)
  6589. {
  6590. /*
  6591. * 0 - RF kill not enabled
  6592. * 1 - SW based RF kill active (sysfs)
  6593. * 2 - HW based RF kill active
  6594. * 3 - Both HW and SW based RF kill active
  6595. */
  6596. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6597. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6598. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6599. return sprintf(buf, "%i\n", val);
  6600. }
  6601. static ssize_t store_rf_kill(struct device *d,
  6602. struct device_attribute *attr,
  6603. const char *buf, size_t count)
  6604. {
  6605. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6606. mutex_lock(&priv->mutex);
  6607. iwl4965_radio_kill_sw(priv, buf[0] == '1');
  6608. mutex_unlock(&priv->mutex);
  6609. return count;
  6610. }
  6611. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6612. static ssize_t show_temperature(struct device *d,
  6613. struct device_attribute *attr, char *buf)
  6614. {
  6615. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6616. if (!iwl4965_is_alive(priv))
  6617. return -EAGAIN;
  6618. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6619. }
  6620. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6621. static ssize_t show_rs_window(struct device *d,
  6622. struct device_attribute *attr,
  6623. char *buf)
  6624. {
  6625. struct iwl4965_priv *priv = d->driver_data;
  6626. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6627. }
  6628. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6629. static ssize_t show_tx_power(struct device *d,
  6630. struct device_attribute *attr, char *buf)
  6631. {
  6632. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6633. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6634. }
  6635. static ssize_t store_tx_power(struct device *d,
  6636. struct device_attribute *attr,
  6637. const char *buf, size_t count)
  6638. {
  6639. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6640. char *p = (char *)buf;
  6641. u32 val;
  6642. val = simple_strtoul(p, &p, 10);
  6643. if (p == buf)
  6644. printk(KERN_INFO DRV_NAME
  6645. ": %s is not in decimal form.\n", buf);
  6646. else
  6647. iwl4965_hw_reg_set_txpower(priv, val);
  6648. return count;
  6649. }
  6650. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6651. static ssize_t show_flags(struct device *d,
  6652. struct device_attribute *attr, char *buf)
  6653. {
  6654. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6655. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6656. }
  6657. static ssize_t store_flags(struct device *d,
  6658. struct device_attribute *attr,
  6659. const char *buf, size_t count)
  6660. {
  6661. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6662. u32 flags = simple_strtoul(buf, NULL, 0);
  6663. mutex_lock(&priv->mutex);
  6664. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6665. /* Cancel any currently running scans... */
  6666. if (iwl4965_scan_cancel_timeout(priv, 100))
  6667. IWL_WARNING("Could not cancel scan.\n");
  6668. else {
  6669. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6670. flags);
  6671. priv->staging_rxon.flags = cpu_to_le32(flags);
  6672. iwl4965_commit_rxon(priv);
  6673. }
  6674. }
  6675. mutex_unlock(&priv->mutex);
  6676. return count;
  6677. }
  6678. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6679. static ssize_t show_filter_flags(struct device *d,
  6680. struct device_attribute *attr, char *buf)
  6681. {
  6682. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6683. return sprintf(buf, "0x%04X\n",
  6684. le32_to_cpu(priv->active_rxon.filter_flags));
  6685. }
  6686. static ssize_t store_filter_flags(struct device *d,
  6687. struct device_attribute *attr,
  6688. const char *buf, size_t count)
  6689. {
  6690. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6691. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6692. mutex_lock(&priv->mutex);
  6693. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6694. /* Cancel any currently running scans... */
  6695. if (iwl4965_scan_cancel_timeout(priv, 100))
  6696. IWL_WARNING("Could not cancel scan.\n");
  6697. else {
  6698. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6699. "0x%04X\n", filter_flags);
  6700. priv->staging_rxon.filter_flags =
  6701. cpu_to_le32(filter_flags);
  6702. iwl4965_commit_rxon(priv);
  6703. }
  6704. }
  6705. mutex_unlock(&priv->mutex);
  6706. return count;
  6707. }
  6708. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6709. store_filter_flags);
  6710. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6711. static ssize_t show_measurement(struct device *d,
  6712. struct device_attribute *attr, char *buf)
  6713. {
  6714. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6715. struct iwl4965_spectrum_notification measure_report;
  6716. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6717. u8 *data = (u8 *) & measure_report;
  6718. unsigned long flags;
  6719. spin_lock_irqsave(&priv->lock, flags);
  6720. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6721. spin_unlock_irqrestore(&priv->lock, flags);
  6722. return 0;
  6723. }
  6724. memcpy(&measure_report, &priv->measure_report, size);
  6725. priv->measurement_status = 0;
  6726. spin_unlock_irqrestore(&priv->lock, flags);
  6727. while (size && (PAGE_SIZE - len)) {
  6728. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6729. PAGE_SIZE - len, 1);
  6730. len = strlen(buf);
  6731. if (PAGE_SIZE - len)
  6732. buf[len++] = '\n';
  6733. ofs += 16;
  6734. size -= min(size, 16U);
  6735. }
  6736. return len;
  6737. }
  6738. static ssize_t store_measurement(struct device *d,
  6739. struct device_attribute *attr,
  6740. const char *buf, size_t count)
  6741. {
  6742. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6743. struct ieee80211_measurement_params params = {
  6744. .channel = le16_to_cpu(priv->active_rxon.channel),
  6745. .start_time = cpu_to_le64(priv->last_tsf),
  6746. .duration = cpu_to_le16(1),
  6747. };
  6748. u8 type = IWL_MEASURE_BASIC;
  6749. u8 buffer[32];
  6750. u8 channel;
  6751. if (count) {
  6752. char *p = buffer;
  6753. strncpy(buffer, buf, min(sizeof(buffer), count));
  6754. channel = simple_strtoul(p, NULL, 0);
  6755. if (channel)
  6756. params.channel = channel;
  6757. p = buffer;
  6758. while (*p && *p != ' ')
  6759. p++;
  6760. if (*p)
  6761. type = simple_strtoul(p + 1, NULL, 0);
  6762. }
  6763. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6764. "channel %d (for '%s')\n", type, params.channel, buf);
  6765. iwl4965_get_measurement(priv, &params, type);
  6766. return count;
  6767. }
  6768. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6769. show_measurement, store_measurement);
  6770. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  6771. static ssize_t store_retry_rate(struct device *d,
  6772. struct device_attribute *attr,
  6773. const char *buf, size_t count)
  6774. {
  6775. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6776. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6777. if (priv->retry_rate <= 0)
  6778. priv->retry_rate = 1;
  6779. return count;
  6780. }
  6781. static ssize_t show_retry_rate(struct device *d,
  6782. struct device_attribute *attr, char *buf)
  6783. {
  6784. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6785. return sprintf(buf, "%d", priv->retry_rate);
  6786. }
  6787. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6788. store_retry_rate);
  6789. static ssize_t store_power_level(struct device *d,
  6790. struct device_attribute *attr,
  6791. const char *buf, size_t count)
  6792. {
  6793. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6794. int rc;
  6795. int mode;
  6796. mode = simple_strtoul(buf, NULL, 0);
  6797. mutex_lock(&priv->mutex);
  6798. if (!iwl4965_is_ready(priv)) {
  6799. rc = -EAGAIN;
  6800. goto out;
  6801. }
  6802. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6803. mode = IWL_POWER_AC;
  6804. else
  6805. mode |= IWL_POWER_ENABLED;
  6806. if (mode != priv->power_mode) {
  6807. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6808. if (rc) {
  6809. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6810. goto out;
  6811. }
  6812. priv->power_mode = mode;
  6813. }
  6814. rc = count;
  6815. out:
  6816. mutex_unlock(&priv->mutex);
  6817. return rc;
  6818. }
  6819. #define MAX_WX_STRING 80
  6820. /* Values are in microsecond */
  6821. static const s32 timeout_duration[] = {
  6822. 350000,
  6823. 250000,
  6824. 75000,
  6825. 37000,
  6826. 25000,
  6827. };
  6828. static const s32 period_duration[] = {
  6829. 400000,
  6830. 700000,
  6831. 1000000,
  6832. 1000000,
  6833. 1000000
  6834. };
  6835. static ssize_t show_power_level(struct device *d,
  6836. struct device_attribute *attr, char *buf)
  6837. {
  6838. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6839. int level = IWL_POWER_LEVEL(priv->power_mode);
  6840. char *p = buf;
  6841. p += sprintf(p, "%d ", level);
  6842. switch (level) {
  6843. case IWL_POWER_MODE_CAM:
  6844. case IWL_POWER_AC:
  6845. p += sprintf(p, "(AC)");
  6846. break;
  6847. case IWL_POWER_BATTERY:
  6848. p += sprintf(p, "(BATTERY)");
  6849. break;
  6850. default:
  6851. p += sprintf(p,
  6852. "(Timeout %dms, Period %dms)",
  6853. timeout_duration[level - 1] / 1000,
  6854. period_duration[level - 1] / 1000);
  6855. }
  6856. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6857. p += sprintf(p, " OFF\n");
  6858. else
  6859. p += sprintf(p, " \n");
  6860. return (p - buf + 1);
  6861. }
  6862. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6863. store_power_level);
  6864. static ssize_t show_channels(struct device *d,
  6865. struct device_attribute *attr, char *buf)
  6866. {
  6867. /* all this shit doesn't belong into sysfs anyway */
  6868. return 0;
  6869. }
  6870. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6871. static ssize_t show_statistics(struct device *d,
  6872. struct device_attribute *attr, char *buf)
  6873. {
  6874. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6875. u32 size = sizeof(struct iwl4965_notif_statistics);
  6876. u32 len = 0, ofs = 0;
  6877. u8 *data = (u8 *) & priv->statistics;
  6878. int rc = 0;
  6879. if (!iwl4965_is_alive(priv))
  6880. return -EAGAIN;
  6881. mutex_lock(&priv->mutex);
  6882. rc = iwl4965_send_statistics_request(priv);
  6883. mutex_unlock(&priv->mutex);
  6884. if (rc) {
  6885. len = sprintf(buf,
  6886. "Error sending statistics request: 0x%08X\n", rc);
  6887. return len;
  6888. }
  6889. while (size && (PAGE_SIZE - len)) {
  6890. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6891. PAGE_SIZE - len, 1);
  6892. len = strlen(buf);
  6893. if (PAGE_SIZE - len)
  6894. buf[len++] = '\n';
  6895. ofs += 16;
  6896. size -= min(size, 16U);
  6897. }
  6898. return len;
  6899. }
  6900. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6901. static ssize_t show_antenna(struct device *d,
  6902. struct device_attribute *attr, char *buf)
  6903. {
  6904. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6905. if (!iwl4965_is_alive(priv))
  6906. return -EAGAIN;
  6907. return sprintf(buf, "%d\n", priv->antenna);
  6908. }
  6909. static ssize_t store_antenna(struct device *d,
  6910. struct device_attribute *attr,
  6911. const char *buf, size_t count)
  6912. {
  6913. int ant;
  6914. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6915. if (count == 0)
  6916. return 0;
  6917. if (sscanf(buf, "%1i", &ant) != 1) {
  6918. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  6919. return count;
  6920. }
  6921. if ((ant >= 0) && (ant <= 2)) {
  6922. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  6923. priv->antenna = (enum iwl4965_antenna)ant;
  6924. } else
  6925. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  6926. return count;
  6927. }
  6928. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  6929. static ssize_t show_status(struct device *d,
  6930. struct device_attribute *attr, char *buf)
  6931. {
  6932. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6933. if (!iwl4965_is_alive(priv))
  6934. return -EAGAIN;
  6935. return sprintf(buf, "0x%08x\n", (int)priv->status);
  6936. }
  6937. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  6938. static ssize_t dump_error_log(struct device *d,
  6939. struct device_attribute *attr,
  6940. const char *buf, size_t count)
  6941. {
  6942. char *p = (char *)buf;
  6943. if (p[0] == '1')
  6944. iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
  6945. return strnlen(buf, count);
  6946. }
  6947. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  6948. static ssize_t dump_event_log(struct device *d,
  6949. struct device_attribute *attr,
  6950. const char *buf, size_t count)
  6951. {
  6952. char *p = (char *)buf;
  6953. if (p[0] == '1')
  6954. iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
  6955. return strnlen(buf, count);
  6956. }
  6957. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  6958. /*****************************************************************************
  6959. *
  6960. * driver setup and teardown
  6961. *
  6962. *****************************************************************************/
  6963. static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
  6964. {
  6965. priv->workqueue = create_workqueue(DRV_NAME);
  6966. init_waitqueue_head(&priv->wait_command_queue);
  6967. INIT_WORK(&priv->up, iwl4965_bg_up);
  6968. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  6969. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  6970. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  6971. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  6972. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  6973. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  6974. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  6975. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  6976. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  6977. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  6978. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  6979. iwl4965_hw_setup_deferred_work(priv);
  6980. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  6981. iwl4965_irq_tasklet, (unsigned long)priv);
  6982. }
  6983. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
  6984. {
  6985. iwl4965_hw_cancel_deferred_work(priv);
  6986. cancel_delayed_work_sync(&priv->init_alive_start);
  6987. cancel_delayed_work(&priv->scan_check);
  6988. cancel_delayed_work(&priv->alive_start);
  6989. cancel_delayed_work(&priv->post_associate);
  6990. cancel_work_sync(&priv->beacon_update);
  6991. }
  6992. static struct attribute *iwl4965_sysfs_entries[] = {
  6993. &dev_attr_antenna.attr,
  6994. &dev_attr_channels.attr,
  6995. &dev_attr_dump_errors.attr,
  6996. &dev_attr_dump_events.attr,
  6997. &dev_attr_flags.attr,
  6998. &dev_attr_filter_flags.attr,
  6999. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7000. &dev_attr_measurement.attr,
  7001. #endif
  7002. &dev_attr_power_level.attr,
  7003. &dev_attr_retry_rate.attr,
  7004. &dev_attr_rf_kill.attr,
  7005. &dev_attr_rs_window.attr,
  7006. &dev_attr_statistics.attr,
  7007. &dev_attr_status.attr,
  7008. &dev_attr_temperature.attr,
  7009. &dev_attr_tx_power.attr,
  7010. NULL
  7011. };
  7012. static struct attribute_group iwl4965_attribute_group = {
  7013. .name = NULL, /* put in device directory */
  7014. .attrs = iwl4965_sysfs_entries,
  7015. };
  7016. static struct ieee80211_ops iwl4965_hw_ops = {
  7017. .tx = iwl4965_mac_tx,
  7018. .start = iwl4965_mac_start,
  7019. .stop = iwl4965_mac_stop,
  7020. .add_interface = iwl4965_mac_add_interface,
  7021. .remove_interface = iwl4965_mac_remove_interface,
  7022. .config = iwl4965_mac_config,
  7023. .config_interface = iwl4965_mac_config_interface,
  7024. .configure_filter = iwl4965_configure_filter,
  7025. .set_key = iwl4965_mac_set_key,
  7026. .get_stats = iwl4965_mac_get_stats,
  7027. .get_tx_stats = iwl4965_mac_get_tx_stats,
  7028. .conf_tx = iwl4965_mac_conf_tx,
  7029. .get_tsf = iwl4965_mac_get_tsf,
  7030. .reset_tsf = iwl4965_mac_reset_tsf,
  7031. .beacon_update = iwl4965_mac_beacon_update,
  7032. .bss_info_changed = iwl4965_bss_info_changed,
  7033. #ifdef CONFIG_IWL4965_HT
  7034. .conf_ht = iwl4965_mac_conf_ht,
  7035. .ampdu_action = iwl4965_mac_ampdu_action,
  7036. #endif /* CONFIG_IWL4965_HT */
  7037. .hw_scan = iwl4965_mac_hw_scan
  7038. };
  7039. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7040. {
  7041. int err = 0;
  7042. struct iwl4965_priv *priv;
  7043. struct ieee80211_hw *hw;
  7044. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  7045. int i;
  7046. DECLARE_MAC_BUF(mac);
  7047. /* Disabling hardware scan means that mac80211 will perform scans
  7048. * "the hard way", rather than using device's scan. */
  7049. if (iwl4965_param_disable_hw_scan) {
  7050. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7051. iwl4965_hw_ops.hw_scan = NULL;
  7052. }
  7053. if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  7054. (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  7055. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  7056. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  7057. err = -EINVAL;
  7058. goto out;
  7059. }
  7060. /* mac80211 allocates memory for this device instance, including
  7061. * space for this driver's private structure */
  7062. hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
  7063. if (hw == NULL) {
  7064. IWL_ERROR("Can not allocate network device\n");
  7065. err = -ENOMEM;
  7066. goto out;
  7067. }
  7068. SET_IEEE80211_DEV(hw, &pdev->dev);
  7069. hw->rate_control_algorithm = "iwl-4965-rs";
  7070. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7071. priv = hw->priv;
  7072. priv->hw = hw;
  7073. priv->cfg = cfg;
  7074. priv->pci_dev = pdev;
  7075. priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
  7076. #ifdef CONFIG_IWL4965_DEBUG
  7077. iwl4965_debug_level = iwl4965_param_debug;
  7078. atomic_set(&priv->restrict_refcnt, 0);
  7079. #endif
  7080. priv->retry_rate = 1;
  7081. priv->ibss_beacon = NULL;
  7082. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7083. * the range of signal quality values that we'll provide.
  7084. * Negative values for level/noise indicate that we'll provide dBm.
  7085. * For WE, at least, non-0 values here *enable* display of values
  7086. * in app (iwconfig). */
  7087. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7088. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7089. hw->max_signal = 100; /* link quality indication (%) */
  7090. /* Tell mac80211 our Tx characteristics */
  7091. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7092. /* Default value; 4 EDCA QOS priorities */
  7093. hw->queues = 4;
  7094. #ifdef CONFIG_IWL4965_HT
  7095. /* Enhanced value; more queues, to support 11n aggregation */
  7096. hw->queues = 16;
  7097. #endif /* CONFIG_IWL4965_HT */
  7098. spin_lock_init(&priv->lock);
  7099. spin_lock_init(&priv->power_data.lock);
  7100. spin_lock_init(&priv->sta_lock);
  7101. spin_lock_init(&priv->hcmd_lock);
  7102. spin_lock_init(&priv->lq_mngr.lock);
  7103. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7104. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7105. INIT_LIST_HEAD(&priv->free_frames);
  7106. mutex_init(&priv->mutex);
  7107. if (pci_enable_device(pdev)) {
  7108. err = -ENODEV;
  7109. goto out_ieee80211_free_hw;
  7110. }
  7111. pci_set_master(pdev);
  7112. /* Clear the driver's (not device's) station table */
  7113. iwl4965_clear_stations_table(priv);
  7114. priv->data_retry_limit = -1;
  7115. priv->ieee_channels = NULL;
  7116. priv->ieee_rates = NULL;
  7117. priv->band = IEEE80211_BAND_2GHZ;
  7118. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7119. if (!err)
  7120. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7121. if (err) {
  7122. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  7123. goto out_pci_disable_device;
  7124. }
  7125. pci_set_drvdata(pdev, priv);
  7126. err = pci_request_regions(pdev, DRV_NAME);
  7127. if (err)
  7128. goto out_pci_disable_device;
  7129. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7130. * PCI Tx retries from interfering with C3 CPU state */
  7131. pci_write_config_byte(pdev, 0x41, 0x00);
  7132. priv->hw_base = pci_iomap(pdev, 0, 0);
  7133. if (!priv->hw_base) {
  7134. err = -ENODEV;
  7135. goto out_pci_release_regions;
  7136. }
  7137. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7138. (unsigned long long) pci_resource_len(pdev, 0));
  7139. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7140. /* Initialize module parameter values here */
  7141. /* Disable radio (SW RF KILL) via parameter when loading driver */
  7142. if (iwl4965_param_disable) {
  7143. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7144. IWL_DEBUG_INFO("Radio disabled.\n");
  7145. }
  7146. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7147. priv->ps_mode = 0;
  7148. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7149. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7150. priv->ps_mode = IWL_MIMO_PS_NONE;
  7151. /* Choose which receivers/antennas to use */
  7152. iwl4965_set_rxon_chain(priv);
  7153. printk(KERN_INFO DRV_NAME
  7154. ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
  7155. /* Device-specific setup */
  7156. if (iwl4965_hw_set_hw_setting(priv)) {
  7157. IWL_ERROR("failed to set hw settings\n");
  7158. goto out_iounmap;
  7159. }
  7160. if (iwl4965_param_qos_enable)
  7161. priv->qos_data.qos_enable = 1;
  7162. iwl4965_reset_qos(priv);
  7163. priv->qos_data.qos_active = 0;
  7164. priv->qos_data.qos_cap.val = 0;
  7165. iwl4965_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
  7166. iwl4965_setup_deferred_work(priv);
  7167. iwl4965_setup_rx_handlers(priv);
  7168. priv->rates_mask = IWL_RATES_MASK;
  7169. /* If power management is turned on, default to AC mode */
  7170. priv->power_mode = IWL_POWER_AC;
  7171. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7172. iwl4965_disable_interrupts(priv);
  7173. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7174. if (err) {
  7175. IWL_ERROR("failed to create sysfs device attributes\n");
  7176. goto out_release_irq;
  7177. }
  7178. /* nic init */
  7179. iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  7180. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  7181. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  7182. err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
  7183. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  7184. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  7185. if (err < 0) {
  7186. IWL_DEBUG_INFO("Failed to init the card\n");
  7187. goto out_remove_sysfs;
  7188. }
  7189. /* Read the EEPROM */
  7190. err = iwl_eeprom_init(priv);
  7191. if (err) {
  7192. IWL_ERROR("Unable to init EEPROM\n");
  7193. goto out_remove_sysfs;
  7194. }
  7195. /* MAC Address location in EEPROM same for 3945/4965 */
  7196. iwl_eeprom_get_mac(priv, priv->mac_addr);
  7197. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  7198. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  7199. err = iwl4965_init_channel_map(priv);
  7200. if (err) {
  7201. IWL_ERROR("initializing regulatory failed: %d\n", err);
  7202. goto out_remove_sysfs;
  7203. }
  7204. err = iwl4965_init_geos(priv);
  7205. if (err) {
  7206. IWL_ERROR("initializing geos failed: %d\n", err);
  7207. goto out_free_channel_map;
  7208. }
  7209. iwl4965_rate_control_register(priv->hw);
  7210. err = ieee80211_register_hw(priv->hw);
  7211. if (err) {
  7212. IWL_ERROR("Failed to register network device (error %d)\n", err);
  7213. goto out_free_geos;
  7214. }
  7215. priv->hw->conf.beacon_int = 100;
  7216. priv->mac80211_registered = 1;
  7217. pci_save_state(pdev);
  7218. pci_disable_device(pdev);
  7219. return 0;
  7220. out_free_geos:
  7221. iwl4965_free_geos(priv);
  7222. out_free_channel_map:
  7223. iwl4965_free_channel_map(priv);
  7224. out_remove_sysfs:
  7225. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7226. out_release_irq:
  7227. destroy_workqueue(priv->workqueue);
  7228. priv->workqueue = NULL;
  7229. iwl4965_unset_hw_setting(priv);
  7230. out_iounmap:
  7231. pci_iounmap(pdev, priv->hw_base);
  7232. out_pci_release_regions:
  7233. pci_release_regions(pdev);
  7234. out_pci_disable_device:
  7235. pci_disable_device(pdev);
  7236. pci_set_drvdata(pdev, NULL);
  7237. out_ieee80211_free_hw:
  7238. ieee80211_free_hw(priv->hw);
  7239. out:
  7240. return err;
  7241. }
  7242. static void iwl4965_pci_remove(struct pci_dev *pdev)
  7243. {
  7244. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7245. struct list_head *p, *q;
  7246. int i;
  7247. if (!priv)
  7248. return;
  7249. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7250. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7251. iwl4965_down(priv);
  7252. /* Free MAC hash list for ADHOC */
  7253. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7254. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7255. list_del(p);
  7256. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  7257. }
  7258. }
  7259. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7260. iwl4965_dealloc_ucode_pci(priv);
  7261. if (priv->rxq.bd)
  7262. iwl4965_rx_queue_free(priv, &priv->rxq);
  7263. iwl4965_hw_txq_ctx_free(priv);
  7264. iwl4965_unset_hw_setting(priv);
  7265. iwl4965_clear_stations_table(priv);
  7266. if (priv->mac80211_registered) {
  7267. ieee80211_unregister_hw(priv->hw);
  7268. iwl4965_rate_control_unregister(priv->hw);
  7269. }
  7270. /*netif_stop_queue(dev); */
  7271. flush_workqueue(priv->workqueue);
  7272. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  7273. * priv->workqueue... so we can't take down the workqueue
  7274. * until now... */
  7275. destroy_workqueue(priv->workqueue);
  7276. priv->workqueue = NULL;
  7277. pci_iounmap(pdev, priv->hw_base);
  7278. pci_release_regions(pdev);
  7279. pci_disable_device(pdev);
  7280. pci_set_drvdata(pdev, NULL);
  7281. iwl4965_free_channel_map(priv);
  7282. iwl4965_free_geos(priv);
  7283. if (priv->ibss_beacon)
  7284. dev_kfree_skb(priv->ibss_beacon);
  7285. ieee80211_free_hw(priv->hw);
  7286. }
  7287. #ifdef CONFIG_PM
  7288. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7289. {
  7290. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7291. if (priv->is_open) {
  7292. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7293. iwl4965_mac_stop(priv->hw);
  7294. priv->is_open = 1;
  7295. }
  7296. pci_set_power_state(pdev, PCI_D3hot);
  7297. return 0;
  7298. }
  7299. static int iwl4965_pci_resume(struct pci_dev *pdev)
  7300. {
  7301. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7302. pci_set_power_state(pdev, PCI_D0);
  7303. if (priv->is_open)
  7304. iwl4965_mac_start(priv->hw);
  7305. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7306. return 0;
  7307. }
  7308. #endif /* CONFIG_PM */
  7309. /*****************************************************************************
  7310. *
  7311. * driver and module entry point
  7312. *
  7313. *****************************************************************************/
  7314. static struct pci_driver iwl4965_driver = {
  7315. .name = DRV_NAME,
  7316. .id_table = iwl4965_hw_card_ids,
  7317. .probe = iwl4965_pci_probe,
  7318. .remove = __devexit_p(iwl4965_pci_remove),
  7319. #ifdef CONFIG_PM
  7320. .suspend = iwl4965_pci_suspend,
  7321. .resume = iwl4965_pci_resume,
  7322. #endif
  7323. };
  7324. static int __init iwl4965_init(void)
  7325. {
  7326. int ret;
  7327. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7328. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7329. ret = pci_register_driver(&iwl4965_driver);
  7330. if (ret) {
  7331. IWL_ERROR("Unable to initialize PCI module\n");
  7332. return ret;
  7333. }
  7334. #ifdef CONFIG_IWL4965_DEBUG
  7335. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7336. if (ret) {
  7337. IWL_ERROR("Unable to create driver sysfs file\n");
  7338. pci_unregister_driver(&iwl4965_driver);
  7339. return ret;
  7340. }
  7341. #endif
  7342. return ret;
  7343. }
  7344. static void __exit iwl4965_exit(void)
  7345. {
  7346. #ifdef CONFIG_IWL4965_DEBUG
  7347. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7348. #endif
  7349. pci_unregister_driver(&iwl4965_driver);
  7350. }
  7351. module_param_named(antenna, iwl4965_param_antenna, int, 0444);
  7352. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7353. module_param_named(disable, iwl4965_param_disable, int, 0444);
  7354. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7355. module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
  7356. MODULE_PARM_DESC(hwcrypto,
  7357. "using hardware crypto engine (default 0 [software])\n");
  7358. module_param_named(debug, iwl4965_param_debug, int, 0444);
  7359. MODULE_PARM_DESC(debug, "debug output mask");
  7360. module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
  7361. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7362. module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
  7363. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7364. /* QoS */
  7365. module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
  7366. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7367. module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
  7368. MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
  7369. module_exit(iwl4965_exit);
  7370. module_init(iwl4965_init);