regmap.h 6.6 KB

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  1. #ifndef __LINUX_REGMAP_H
  2. #define __LINUX_REGMAP_H
  3. /*
  4. * Register map access API
  5. *
  6. * Copyright 2011 Wolfson Microelectronics plc
  7. *
  8. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/device.h>
  15. #include <linux/list.h>
  16. struct module;
  17. struct i2c_client;
  18. struct spi_device;
  19. /* An enum of all the supported cache types */
  20. enum regcache_type {
  21. REGCACHE_NONE,
  22. REGCACHE_RBTREE,
  23. REGCACHE_COMPRESSED
  24. };
  25. /**
  26. * Default value for a register. We use an array of structs rather
  27. * than a simple array as many modern devices have very sparse
  28. * register maps.
  29. *
  30. * @reg: Register address.
  31. * @def: Register default value.
  32. */
  33. struct reg_default {
  34. unsigned int reg;
  35. unsigned int def;
  36. };
  37. /**
  38. * Configuration for the register map of a device.
  39. *
  40. * @reg_bits: Number of bits in a register address, mandatory.
  41. * @pad_bits: Number of bits of padding between register and value.
  42. * @val_bits: Number of bits in a register value, mandatory.
  43. *
  44. * @writeable_reg: Optional callback returning true if the register
  45. * can be written to.
  46. * @readable_reg: Optional callback returning true if the register
  47. * can be read from.
  48. * @volatile_reg: Optional callback returning true if the register
  49. * value can't be cached.
  50. * @precious_reg: Optional callback returning true if the rgister
  51. * should not be read outside of a call from the driver
  52. * (eg, a clear on read interrupt status register).
  53. *
  54. * @max_register: Optional, specifies the maximum valid register index.
  55. * @reg_defaults: Power on reset values for registers (for use with
  56. * register cache support).
  57. * @num_reg_defaults: Number of elements in reg_defaults.
  58. *
  59. * @read_flag_mask: Mask to be set in the top byte of the register when doing
  60. * a read.
  61. * @write_flag_mask: Mask to be set in the top byte of the register when doing
  62. * a write. If both read_flag_mask and write_flag_mask are
  63. * empty the regmap_bus default masks are used.
  64. *
  65. * @cache_type: The actual cache type.
  66. * @reg_defaults_raw: Power on reset values for registers (for use with
  67. * register cache support).
  68. * @num_reg_defaults_raw: Number of elements in reg_defaults_raw.
  69. */
  70. struct regmap_config {
  71. int reg_bits;
  72. int pad_bits;
  73. int val_bits;
  74. bool (*writeable_reg)(struct device *dev, unsigned int reg);
  75. bool (*readable_reg)(struct device *dev, unsigned int reg);
  76. bool (*volatile_reg)(struct device *dev, unsigned int reg);
  77. bool (*precious_reg)(struct device *dev, unsigned int reg);
  78. unsigned int max_register;
  79. const struct reg_default *reg_defaults;
  80. unsigned int num_reg_defaults;
  81. enum regcache_type cache_type;
  82. const void *reg_defaults_raw;
  83. unsigned int num_reg_defaults_raw;
  84. u8 read_flag_mask;
  85. u8 write_flag_mask;
  86. };
  87. typedef int (*regmap_hw_write)(struct device *dev, const void *data,
  88. size_t count);
  89. typedef int (*regmap_hw_gather_write)(struct device *dev,
  90. const void *reg, size_t reg_len,
  91. const void *val, size_t val_len);
  92. typedef int (*regmap_hw_read)(struct device *dev,
  93. const void *reg_buf, size_t reg_size,
  94. void *val_buf, size_t val_size);
  95. /**
  96. * Description of a hardware bus for the register map infrastructure.
  97. *
  98. * @write: Write operation.
  99. * @gather_write: Write operation with split register/value, return -ENOTSUPP
  100. * if not implemented on a given device.
  101. * @read: Read operation. Data is returned in the buffer used to transmit
  102. * data.
  103. * @read_flag_mask: Mask to be set in the top byte of the register when doing
  104. * a read.
  105. */
  106. struct regmap_bus {
  107. regmap_hw_write write;
  108. regmap_hw_gather_write gather_write;
  109. regmap_hw_read read;
  110. u8 read_flag_mask;
  111. };
  112. struct regmap *regmap_init(struct device *dev,
  113. const struct regmap_bus *bus,
  114. const struct regmap_config *config);
  115. struct regmap *regmap_init_i2c(struct i2c_client *i2c,
  116. const struct regmap_config *config);
  117. struct regmap *regmap_init_spi(struct spi_device *dev,
  118. const struct regmap_config *config);
  119. void regmap_exit(struct regmap *map);
  120. int regmap_reinit_cache(struct regmap *map,
  121. const struct regmap_config *config);
  122. int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
  123. int regmap_raw_write(struct regmap *map, unsigned int reg,
  124. const void *val, size_t val_len);
  125. int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
  126. int regmap_raw_read(struct regmap *map, unsigned int reg,
  127. void *val, size_t val_len);
  128. int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
  129. size_t val_count);
  130. int regmap_update_bits(struct regmap *map, unsigned int reg,
  131. unsigned int mask, unsigned int val);
  132. int regmap_update_bits_check(struct regmap *map, unsigned int reg,
  133. unsigned int mask, unsigned int val,
  134. bool *change);
  135. int regcache_sync(struct regmap *map);
  136. void regcache_cache_only(struct regmap *map, bool enable);
  137. void regcache_cache_bypass(struct regmap *map, bool enable);
  138. void regcache_mark_dirty(struct regmap *map);
  139. /**
  140. * Description of an IRQ for the generic regmap irq_chip.
  141. *
  142. * @reg_offset: Offset of the status/mask register within the bank
  143. * @mask: Mask used to flag/control the register.
  144. */
  145. struct regmap_irq {
  146. unsigned int reg_offset;
  147. unsigned int mask;
  148. };
  149. /**
  150. * Description of a generic regmap irq_chip. This is not intended to
  151. * handle every possible interrupt controller, but it should handle a
  152. * substantial proportion of those that are found in the wild.
  153. *
  154. * @name: Descriptive name for IRQ controller.
  155. *
  156. * @status_base: Base status register address.
  157. * @mask_base: Base mask register address.
  158. * @ack_base: Base ack address. If zero then the chip is clear on read.
  159. *
  160. * @num_regs: Number of registers in each control bank.
  161. * @irqs: Descriptors for individual IRQs. Interrupt numbers are
  162. * assigned based on the index in the array of the interrupt.
  163. * @num_irqs: Number of descriptors.
  164. */
  165. struct regmap_irq_chip {
  166. const char *name;
  167. unsigned int status_base;
  168. unsigned int mask_base;
  169. unsigned int ack_base;
  170. int num_regs;
  171. const struct regmap_irq *irqs;
  172. int num_irqs;
  173. };
  174. struct regmap_irq_chip_data;
  175. int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
  176. int irq_base, struct regmap_irq_chip *chip,
  177. struct regmap_irq_chip_data **data);
  178. void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);
  179. int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data);
  180. #endif