radeon_drv.c 17 KB

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  1. /**
  2. * \file radeon_drv.c
  3. * ATI Radeon driver
  4. *
  5. * \author Gareth Hughes <gareth@valinux.com>
  6. */
  7. /*
  8. * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  9. * All Rights Reserved.
  10. *
  11. * Permission is hereby granted, free of charge, to any person obtaining a
  12. * copy of this software and associated documentation files (the "Software"),
  13. * to deal in the Software without restriction, including without limitation
  14. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  15. * and/or sell copies of the Software, and to permit persons to whom the
  16. * Software is furnished to do so, subject to the following conditions:
  17. *
  18. * The above copyright notice and this permission notice (including the next
  19. * paragraph) shall be included in all copies or substantial portions of the
  20. * Software.
  21. *
  22. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  23. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  24. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  25. * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  26. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  27. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  28. * OTHER DEALINGS IN THE SOFTWARE.
  29. */
  30. #include <drm/drmP.h>
  31. #include <drm/radeon_drm.h>
  32. #include "radeon_drv.h"
  33. #include <drm/drm_pciids.h>
  34. #include <linux/console.h>
  35. #include <linux/module.h>
  36. /*
  37. * KMS wrapper.
  38. * - 2.0.0 - initial interface
  39. * - 2.1.0 - add square tiling interface
  40. * - 2.2.0 - add r6xx/r7xx const buffer support
  41. * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
  42. * - 2.4.0 - add crtc id query
  43. * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
  44. * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
  45. * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
  46. * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
  47. * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
  48. * 2.10.0 - fusion 2D tiling
  49. * 2.11.0 - backend map, initial compute support for the CS checker
  50. * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
  51. * 2.13.0 - virtual memory support, streamout
  52. * 2.14.0 - add evergreen tiling informations
  53. * 2.15.0 - add max_pipes query
  54. * 2.16.0 - fix evergreen 2D tiled surface calculation
  55. * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
  56. * 2.18.0 - r600-eg: allow "invalid" DB formats
  57. * 2.19.0 - r600-eg: MSAA textures
  58. * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
  59. * 2.21.0 - r600-r700: FMASK and CMASK
  60. * 2.22.0 - r600 only: RESOLVE_BOX allowed
  61. * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
  62. * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
  63. * 2.25.0 - eg+: new info request for num SE and num SH
  64. * 2.26.0 - r600-eg: fix htile size computation
  65. * 2.27.0 - r600-SI: Add CS ioctl support for async DMA
  66. * 2.28.0 - r600-eg: Add MEM_WRITE packet support
  67. * 2.29.0 - R500 FP16 color clear registers
  68. * 2.30.0 - fix for FMASK texturing
  69. * 2.31.0 - Add fastfb support for rs690
  70. * 2.32.0 - new info request for rings working
  71. * 2.33.0 - Add SI tiling mode array query
  72. * 2.34.0 - Add CIK tiling mode array query
  73. */
  74. #define KMS_DRIVER_MAJOR 2
  75. #define KMS_DRIVER_MINOR 34
  76. #define KMS_DRIVER_PATCHLEVEL 0
  77. int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
  78. int radeon_driver_unload_kms(struct drm_device *dev);
  79. int radeon_driver_firstopen_kms(struct drm_device *dev);
  80. void radeon_driver_lastclose_kms(struct drm_device *dev);
  81. int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
  82. void radeon_driver_postclose_kms(struct drm_device *dev,
  83. struct drm_file *file_priv);
  84. void radeon_driver_preclose_kms(struct drm_device *dev,
  85. struct drm_file *file_priv);
  86. int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
  87. int radeon_resume_kms(struct drm_device *dev);
  88. u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
  89. int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
  90. void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
  91. int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
  92. int *max_error,
  93. struct timeval *vblank_time,
  94. unsigned flags);
  95. void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
  96. int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
  97. void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
  98. irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
  99. int radeon_gem_object_init(struct drm_gem_object *obj);
  100. void radeon_gem_object_free(struct drm_gem_object *obj);
  101. int radeon_gem_object_open(struct drm_gem_object *obj,
  102. struct drm_file *file_priv);
  103. void radeon_gem_object_close(struct drm_gem_object *obj,
  104. struct drm_file *file_priv);
  105. extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
  106. int *vpos, int *hpos);
  107. extern struct drm_ioctl_desc radeon_ioctls_kms[];
  108. extern int radeon_max_kms_ioctl;
  109. int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
  110. int radeon_mode_dumb_mmap(struct drm_file *filp,
  111. struct drm_device *dev,
  112. uint32_t handle, uint64_t *offset_p);
  113. int radeon_mode_dumb_create(struct drm_file *file_priv,
  114. struct drm_device *dev,
  115. struct drm_mode_create_dumb *args);
  116. int radeon_mode_dumb_destroy(struct drm_file *file_priv,
  117. struct drm_device *dev,
  118. uint32_t handle);
  119. struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
  120. struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
  121. size_t size,
  122. struct sg_table *sg);
  123. int radeon_gem_prime_pin(struct drm_gem_object *obj);
  124. void radeon_gem_prime_unpin(struct drm_gem_object *obj);
  125. void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
  126. void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
  127. extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
  128. unsigned long arg);
  129. #if defined(CONFIG_DEBUG_FS)
  130. int radeon_debugfs_init(struct drm_minor *minor);
  131. void radeon_debugfs_cleanup(struct drm_minor *minor);
  132. #endif
  133. /* atpx handler */
  134. #if defined(CONFIG_VGA_SWITCHEROO)
  135. void radeon_register_atpx_handler(void);
  136. void radeon_unregister_atpx_handler(void);
  137. #else
  138. static inline void radeon_register_atpx_handler(void) {}
  139. static inline void radeon_unregister_atpx_handler(void) {}
  140. #endif
  141. int radeon_no_wb;
  142. int radeon_modeset = -1;
  143. int radeon_dynclks = -1;
  144. int radeon_r4xx_atom = 0;
  145. int radeon_agpmode = 0;
  146. int radeon_vram_limit = 0;
  147. int radeon_gart_size = 512; /* default gart size */
  148. int radeon_benchmarking = 0;
  149. int radeon_testing = 0;
  150. int radeon_connector_table = 0;
  151. int radeon_tv = 1;
  152. int radeon_audio = 0;
  153. int radeon_disp_priority = 0;
  154. int radeon_hw_i2c = 0;
  155. int radeon_pcie_gen2 = -1;
  156. int radeon_msi = -1;
  157. int radeon_lockup_timeout = 10000;
  158. int radeon_fastfb = 0;
  159. int radeon_dpm = -1;
  160. int radeon_aspm = -1;
  161. MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
  162. module_param_named(no_wb, radeon_no_wb, int, 0444);
  163. MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
  164. module_param_named(modeset, radeon_modeset, int, 0400);
  165. MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
  166. module_param_named(dynclks, radeon_dynclks, int, 0444);
  167. MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
  168. module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
  169. MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
  170. module_param_named(vramlimit, radeon_vram_limit, int, 0600);
  171. MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
  172. module_param_named(agpmode, radeon_agpmode, int, 0444);
  173. MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
  174. module_param_named(gartsize, radeon_gart_size, int, 0600);
  175. MODULE_PARM_DESC(benchmark, "Run benchmark");
  176. module_param_named(benchmark, radeon_benchmarking, int, 0444);
  177. MODULE_PARM_DESC(test, "Run tests");
  178. module_param_named(test, radeon_testing, int, 0444);
  179. MODULE_PARM_DESC(connector_table, "Force connector table");
  180. module_param_named(connector_table, radeon_connector_table, int, 0444);
  181. MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
  182. module_param_named(tv, radeon_tv, int, 0444);
  183. MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
  184. module_param_named(audio, radeon_audio, int, 0444);
  185. MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
  186. module_param_named(disp_priority, radeon_disp_priority, int, 0444);
  187. MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
  188. module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
  189. MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
  190. module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
  191. MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
  192. module_param_named(msi, radeon_msi, int, 0444);
  193. MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
  194. module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
  195. MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
  196. module_param_named(fastfb, radeon_fastfb, int, 0444);
  197. MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
  198. module_param_named(dpm, radeon_dpm, int, 0444);
  199. MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
  200. module_param_named(aspm, radeon_aspm, int, 0444);
  201. static struct pci_device_id pciidlist[] = {
  202. radeon_PCI_IDS
  203. };
  204. MODULE_DEVICE_TABLE(pci, pciidlist);
  205. #ifdef CONFIG_DRM_RADEON_UMS
  206. static int radeon_suspend(struct drm_device *dev, pm_message_t state)
  207. {
  208. drm_radeon_private_t *dev_priv = dev->dev_private;
  209. if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
  210. return 0;
  211. /* Disable *all* interrupts */
  212. if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
  213. RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
  214. RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
  215. return 0;
  216. }
  217. static int radeon_resume(struct drm_device *dev)
  218. {
  219. drm_radeon_private_t *dev_priv = dev->dev_private;
  220. if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
  221. return 0;
  222. /* Restore interrupt registers */
  223. if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
  224. RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
  225. RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
  226. return 0;
  227. }
  228. static const struct file_operations radeon_driver_old_fops = {
  229. .owner = THIS_MODULE,
  230. .open = drm_open,
  231. .release = drm_release,
  232. .unlocked_ioctl = drm_ioctl,
  233. .mmap = drm_mmap,
  234. .poll = drm_poll,
  235. .fasync = drm_fasync,
  236. .read = drm_read,
  237. #ifdef CONFIG_COMPAT
  238. .compat_ioctl = radeon_compat_ioctl,
  239. #endif
  240. .llseek = noop_llseek,
  241. };
  242. static struct drm_driver driver_old = {
  243. .driver_features =
  244. DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
  245. DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
  246. .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
  247. .load = radeon_driver_load,
  248. .firstopen = radeon_driver_firstopen,
  249. .open = radeon_driver_open,
  250. .preclose = radeon_driver_preclose,
  251. .postclose = radeon_driver_postclose,
  252. .lastclose = radeon_driver_lastclose,
  253. .unload = radeon_driver_unload,
  254. .suspend = radeon_suspend,
  255. .resume = radeon_resume,
  256. .get_vblank_counter = radeon_get_vblank_counter,
  257. .enable_vblank = radeon_enable_vblank,
  258. .disable_vblank = radeon_disable_vblank,
  259. .master_create = radeon_master_create,
  260. .master_destroy = radeon_master_destroy,
  261. .irq_preinstall = radeon_driver_irq_preinstall,
  262. .irq_postinstall = radeon_driver_irq_postinstall,
  263. .irq_uninstall = radeon_driver_irq_uninstall,
  264. .irq_handler = radeon_driver_irq_handler,
  265. .ioctls = radeon_ioctls,
  266. .dma_ioctl = radeon_cp_buffers,
  267. .fops = &radeon_driver_old_fops,
  268. .name = DRIVER_NAME,
  269. .desc = DRIVER_DESC,
  270. .date = DRIVER_DATE,
  271. .major = DRIVER_MAJOR,
  272. .minor = DRIVER_MINOR,
  273. .patchlevel = DRIVER_PATCHLEVEL,
  274. };
  275. #endif
  276. static struct drm_driver kms_driver;
  277. static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
  278. {
  279. struct apertures_struct *ap;
  280. bool primary = false;
  281. ap = alloc_apertures(1);
  282. if (!ap)
  283. return -ENOMEM;
  284. ap->ranges[0].base = pci_resource_start(pdev, 0);
  285. ap->ranges[0].size = pci_resource_len(pdev, 0);
  286. #ifdef CONFIG_X86
  287. primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  288. #endif
  289. remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
  290. kfree(ap);
  291. return 0;
  292. }
  293. static int radeon_pci_probe(struct pci_dev *pdev,
  294. const struct pci_device_id *ent)
  295. {
  296. int ret;
  297. /* Get rid of things like offb */
  298. ret = radeon_kick_out_firmware_fb(pdev);
  299. if (ret)
  300. return ret;
  301. return drm_get_pci_dev(pdev, ent, &kms_driver);
  302. }
  303. static void
  304. radeon_pci_remove(struct pci_dev *pdev)
  305. {
  306. struct drm_device *dev = pci_get_drvdata(pdev);
  307. drm_put_dev(dev);
  308. }
  309. static int
  310. radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  311. {
  312. struct drm_device *dev = pci_get_drvdata(pdev);
  313. return radeon_suspend_kms(dev, state);
  314. }
  315. static int
  316. radeon_pci_resume(struct pci_dev *pdev)
  317. {
  318. struct drm_device *dev = pci_get_drvdata(pdev);
  319. return radeon_resume_kms(dev);
  320. }
  321. static const struct file_operations radeon_driver_kms_fops = {
  322. .owner = THIS_MODULE,
  323. .open = drm_open,
  324. .release = drm_release,
  325. .unlocked_ioctl = drm_ioctl,
  326. .mmap = radeon_mmap,
  327. .poll = drm_poll,
  328. .fasync = drm_fasync,
  329. .read = drm_read,
  330. #ifdef CONFIG_COMPAT
  331. .compat_ioctl = radeon_kms_compat_ioctl,
  332. #endif
  333. };
  334. static struct drm_driver kms_driver = {
  335. .driver_features =
  336. DRIVER_USE_AGP | DRIVER_USE_MTRR |
  337. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
  338. DRIVER_PRIME,
  339. .dev_priv_size = 0,
  340. .load = radeon_driver_load_kms,
  341. .firstopen = radeon_driver_firstopen_kms,
  342. .open = radeon_driver_open_kms,
  343. .preclose = radeon_driver_preclose_kms,
  344. .postclose = radeon_driver_postclose_kms,
  345. .lastclose = radeon_driver_lastclose_kms,
  346. .unload = radeon_driver_unload_kms,
  347. .suspend = radeon_suspend_kms,
  348. .resume = radeon_resume_kms,
  349. .get_vblank_counter = radeon_get_vblank_counter_kms,
  350. .enable_vblank = radeon_enable_vblank_kms,
  351. .disable_vblank = radeon_disable_vblank_kms,
  352. .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
  353. .get_scanout_position = radeon_get_crtc_scanoutpos,
  354. #if defined(CONFIG_DEBUG_FS)
  355. .debugfs_init = radeon_debugfs_init,
  356. .debugfs_cleanup = radeon_debugfs_cleanup,
  357. #endif
  358. .irq_preinstall = radeon_driver_irq_preinstall_kms,
  359. .irq_postinstall = radeon_driver_irq_postinstall_kms,
  360. .irq_uninstall = radeon_driver_irq_uninstall_kms,
  361. .irq_handler = radeon_driver_irq_handler_kms,
  362. .ioctls = radeon_ioctls_kms,
  363. .gem_init_object = radeon_gem_object_init,
  364. .gem_free_object = radeon_gem_object_free,
  365. .gem_open_object = radeon_gem_object_open,
  366. .gem_close_object = radeon_gem_object_close,
  367. .dumb_create = radeon_mode_dumb_create,
  368. .dumb_map_offset = radeon_mode_dumb_mmap,
  369. .dumb_destroy = radeon_mode_dumb_destroy,
  370. .fops = &radeon_driver_kms_fops,
  371. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  372. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  373. .gem_prime_export = drm_gem_prime_export,
  374. .gem_prime_import = drm_gem_prime_import,
  375. .gem_prime_pin = radeon_gem_prime_pin,
  376. .gem_prime_unpin = radeon_gem_prime_unpin,
  377. .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
  378. .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
  379. .gem_prime_vmap = radeon_gem_prime_vmap,
  380. .gem_prime_vunmap = radeon_gem_prime_vunmap,
  381. .name = DRIVER_NAME,
  382. .desc = DRIVER_DESC,
  383. .date = DRIVER_DATE,
  384. .major = KMS_DRIVER_MAJOR,
  385. .minor = KMS_DRIVER_MINOR,
  386. .patchlevel = KMS_DRIVER_PATCHLEVEL,
  387. };
  388. static struct drm_driver *driver;
  389. static struct pci_driver *pdriver;
  390. #ifdef CONFIG_DRM_RADEON_UMS
  391. static struct pci_driver radeon_pci_driver = {
  392. .name = DRIVER_NAME,
  393. .id_table = pciidlist,
  394. };
  395. #endif
  396. static struct pci_driver radeon_kms_pci_driver = {
  397. .name = DRIVER_NAME,
  398. .id_table = pciidlist,
  399. .probe = radeon_pci_probe,
  400. .remove = radeon_pci_remove,
  401. .suspend = radeon_pci_suspend,
  402. .resume = radeon_pci_resume,
  403. };
  404. static int __init radeon_init(void)
  405. {
  406. #ifdef CONFIG_VGA_CONSOLE
  407. if (vgacon_text_force() && radeon_modeset == -1) {
  408. DRM_INFO("VGACON disable radeon kernel modesetting.\n");
  409. radeon_modeset = 0;
  410. }
  411. #endif
  412. /* set to modesetting by default if not nomodeset */
  413. if (radeon_modeset == -1)
  414. radeon_modeset = 1;
  415. if (radeon_modeset == 1) {
  416. DRM_INFO("radeon kernel modesetting enabled.\n");
  417. driver = &kms_driver;
  418. pdriver = &radeon_kms_pci_driver;
  419. driver->driver_features |= DRIVER_MODESET;
  420. driver->num_ioctls = radeon_max_kms_ioctl;
  421. radeon_register_atpx_handler();
  422. } else {
  423. #ifdef CONFIG_DRM_RADEON_UMS
  424. DRM_INFO("radeon userspace modesetting enabled.\n");
  425. driver = &driver_old;
  426. pdriver = &radeon_pci_driver;
  427. driver->driver_features &= ~DRIVER_MODESET;
  428. driver->num_ioctls = radeon_max_ioctl;
  429. #else
  430. DRM_ERROR("No UMS support in radeon module!\n");
  431. return -EINVAL;
  432. #endif
  433. }
  434. /* let modprobe override vga console setting */
  435. return drm_pci_init(driver, pdriver);
  436. }
  437. static void __exit radeon_exit(void)
  438. {
  439. drm_pci_exit(driver, pdriver);
  440. radeon_unregister_atpx_handler();
  441. }
  442. module_init(radeon_init);
  443. module_exit(radeon_exit);
  444. MODULE_AUTHOR(DRIVER_AUTHOR);
  445. MODULE_DESCRIPTION(DRIVER_DESC);
  446. MODULE_LICENSE("GPL and additional rights");