cx18-av-core.c 24 KB

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  1. /*
  2. * cx18 ADEC audio functions
  3. *
  4. * Derived from cx25840-core.c
  5. *
  6. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * as published by the Free Software Foundation; either version 2
  11. * of the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  21. * 02110-1301, USA.
  22. */
  23. #include "cx18-driver.h"
  24. int cx18_av_write(struct cx18 *cx, u16 addr, u8 value)
  25. {
  26. u32 x = readl(cx->reg_mem + 0xc40000 + (addr & ~3));
  27. u32 mask = 0xff;
  28. int shift = (addr & 3) * 8;
  29. x = (x & ~(mask << shift)) | ((u32)value << shift);
  30. writel(x, cx->reg_mem + 0xc40000 + (addr & ~3));
  31. return 0;
  32. }
  33. int cx18_av_write4(struct cx18 *cx, u16 addr, u32 value)
  34. {
  35. writel(value, cx->reg_mem + 0xc40000 + addr);
  36. return 0;
  37. }
  38. u8 cx18_av_read(struct cx18 *cx, u16 addr)
  39. {
  40. u32 x = readl(cx->reg_mem + 0xc40000 + (addr & ~3));
  41. int shift = (addr & 3) * 8;
  42. return (x >> shift) & 0xff;
  43. }
  44. u32 cx18_av_read4(struct cx18 *cx, u16 addr)
  45. {
  46. return readl(cx->reg_mem + 0xc40000 + addr);
  47. }
  48. int cx18_av_and_or(struct cx18 *cx, u16 addr, unsigned and_mask,
  49. u8 or_value)
  50. {
  51. return cx18_av_write(cx, addr,
  52. (cx18_av_read(cx, addr) & and_mask) |
  53. or_value);
  54. }
  55. int cx18_av_and_or4(struct cx18 *cx, u16 addr, u32 and_mask,
  56. u32 or_value)
  57. {
  58. return cx18_av_write4(cx, addr,
  59. (cx18_av_read4(cx, addr) & and_mask) |
  60. or_value);
  61. }
  62. /* ----------------------------------------------------------------------- */
  63. static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input,
  64. enum cx18_av_audio_input aud_input);
  65. static void log_audio_status(struct cx18 *cx);
  66. static void log_video_status(struct cx18 *cx);
  67. /* ----------------------------------------------------------------------- */
  68. static void cx18_av_initialize(struct cx18 *cx)
  69. {
  70. u32 v;
  71. cx18_av_loadfw(cx);
  72. /* Stop 8051 code execution */
  73. cx18_av_write4(cx, CXADEC_DL_CTL, 0x03000000);
  74. /* initallize the PLL by toggling sleep bit */
  75. v = cx18_av_read4(cx, CXADEC_HOST_REG1);
  76. /* enable sleep mode */
  77. cx18_av_write4(cx, CXADEC_HOST_REG1, v | 1);
  78. /* disable sleep mode */
  79. cx18_av_write4(cx, CXADEC_HOST_REG1, v & 0xfffe);
  80. /* initialize DLLs */
  81. v = cx18_av_read4(cx, CXADEC_DLL1_DIAG_CTRL) & 0xE1FFFEFF;
  82. /* disable FLD */
  83. cx18_av_write4(cx, CXADEC_DLL1_DIAG_CTRL, v);
  84. /* enable FLD */
  85. cx18_av_write4(cx, CXADEC_DLL1_DIAG_CTRL, v | 0x10000100);
  86. v = cx18_av_read4(cx, CXADEC_DLL2_DIAG_CTRL) & 0xE1FFFEFF;
  87. /* disable FLD */
  88. cx18_av_write4(cx, CXADEC_DLL2_DIAG_CTRL, v);
  89. /* enable FLD */
  90. cx18_av_write4(cx, CXADEC_DLL2_DIAG_CTRL, v | 0x06000100);
  91. /* set analog bias currents. Set Vreg to 1.20V. */
  92. cx18_av_write4(cx, CXADEC_AFE_DIAG_CTRL1, 0x000A1802);
  93. v = cx18_av_read4(cx, CXADEC_AFE_DIAG_CTRL3) | 1;
  94. /* enable TUNE_FIL_RST */
  95. cx18_av_write4(cx, CXADEC_AFE_DIAG_CTRL3, v);
  96. /* disable TUNE_FIL_RST */
  97. cx18_av_write4(cx, CXADEC_AFE_DIAG_CTRL3, v & 0xFFFFFFFE);
  98. /* enable 656 output */
  99. cx18_av_and_or4(cx, CXADEC_PIN_CTRL1, ~0, 0x040C00);
  100. /* video output drive strength */
  101. cx18_av_and_or4(cx, CXADEC_PIN_CTRL2, ~0, 0x2);
  102. /* reset video */
  103. cx18_av_write4(cx, CXADEC_SOFT_RST_CTRL, 0x8000);
  104. cx18_av_write4(cx, CXADEC_SOFT_RST_CTRL, 0);
  105. /* set video to auto-detect */
  106. /* Clear bits 11-12 to enable slow locking mode. Set autodetect mode */
  107. /* set the comb notch = 1 */
  108. cx18_av_and_or4(cx, CXADEC_MODE_CTRL, 0xFFF7E7F0, 0x02040800);
  109. /* Enable wtw_en in CRUSH_CTRL (Set bit 22) */
  110. /* Enable maj_sel in CRUSH_CTRL (Set bit 20) */
  111. cx18_av_and_or4(cx, CXADEC_CRUSH_CTRL, ~0, 0x00500000);
  112. /* Set VGA_TRACK_RANGE to 0x20 */
  113. cx18_av_and_or4(cx, CXADEC_DFE_CTRL2, 0xFFFF00FF, 0x00002000);
  114. /* Enable VBI capture */
  115. cx18_av_write4(cx, CXADEC_OUT_CTRL1, 0x4010253F);
  116. /* cx18_av_write4(cx, CXADEC_OUT_CTRL1, 0x4010253E); */
  117. /* Set the video input.
  118. The setting in MODE_CTRL gets lost when we do the above setup */
  119. /* EncSetSignalStd(dwDevNum, pEnc->dwSigStd); */
  120. /* EncSetVideoInput(dwDevNum, pEnc->VidIndSelection); */
  121. v = cx18_av_read4(cx, CXADEC_AFE_CTRL);
  122. v &= 0xFFFBFFFF; /* turn OFF bit 18 for droop_comp_ch1 */
  123. v &= 0xFFFF7FFF; /* turn OFF bit 9 for clamp_sel_ch1 */
  124. v &= 0xFFFFFFFE; /* turn OFF bit 0 for 12db_ch1 */
  125. /* v |= 0x00000001;*/ /* turn ON bit 0 for 12db_ch1 */
  126. cx18_av_write4(cx, CXADEC_AFE_CTRL, v);
  127. /* if(dwEnable && dw3DCombAvailable) { */
  128. /* CxDevWrReg(CXADEC_SRC_COMB_CFG, 0x7728021F); */
  129. /* } else { */
  130. /* CxDevWrReg(CXADEC_SRC_COMB_CFG, 0x6628021F); */
  131. /* } */
  132. cx18_av_write4(cx, CXADEC_SRC_COMB_CFG, 0x6628021F);
  133. }
  134. /* ----------------------------------------------------------------------- */
  135. static void input_change(struct cx18 *cx)
  136. {
  137. struct cx18_av_state *state = &cx->av_state;
  138. v4l2_std_id std = state->std;
  139. /* Follow step 8c and 8d of section 3.16 in the cx18_av datasheet */
  140. cx18_av_write(cx, 0x49f, (std & V4L2_STD_NTSC) ? 0x14 : 0x11);
  141. cx18_av_and_or(cx, 0x401, ~0x60, 0);
  142. cx18_av_and_or(cx, 0x401, ~0x60, 0x60);
  143. if (std & V4L2_STD_525_60) {
  144. if (std == V4L2_STD_NTSC_M_JP) {
  145. /* Japan uses EIAJ audio standard */
  146. cx18_av_write(cx, 0x808, 0xf7);
  147. cx18_av_write(cx, 0x80b, 0x02);
  148. } else if (std == V4L2_STD_NTSC_M_KR) {
  149. /* South Korea uses A2 audio standard */
  150. cx18_av_write(cx, 0x808, 0xf8);
  151. cx18_av_write(cx, 0x80b, 0x03);
  152. } else {
  153. /* Others use the BTSC audio standard */
  154. cx18_av_write(cx, 0x808, 0xf6);
  155. cx18_av_write(cx, 0x80b, 0x01);
  156. }
  157. } else if (std & V4L2_STD_PAL) {
  158. /* Follow tuner change procedure for PAL */
  159. cx18_av_write(cx, 0x808, 0xff);
  160. cx18_av_write(cx, 0x80b, 0x03);
  161. } else if (std & V4L2_STD_SECAM) {
  162. /* Select autodetect for SECAM */
  163. cx18_av_write(cx, 0x808, 0xff);
  164. cx18_av_write(cx, 0x80b, 0x03);
  165. }
  166. if (cx18_av_read(cx, 0x803) & 0x10) {
  167. /* restart audio decoder microcontroller */
  168. cx18_av_and_or(cx, 0x803, ~0x10, 0x00);
  169. cx18_av_and_or(cx, 0x803, ~0x10, 0x10);
  170. }
  171. }
  172. static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input,
  173. enum cx18_av_audio_input aud_input)
  174. {
  175. struct cx18_av_state *state = &cx->av_state;
  176. u8 is_composite = (vid_input >= CX18_AV_COMPOSITE1 &&
  177. vid_input <= CX18_AV_COMPOSITE8);
  178. u8 reg;
  179. CX18_DEBUG_INFO("decoder set video input %d, audio input %d\n",
  180. vid_input, aud_input);
  181. if (is_composite) {
  182. reg = 0xf0 + (vid_input - CX18_AV_COMPOSITE1);
  183. } else {
  184. int luma = vid_input & 0xf0;
  185. int chroma = vid_input & 0xf00;
  186. if ((vid_input & ~0xff0) ||
  187. luma < CX18_AV_SVIDEO_LUMA1 ||
  188. luma > CX18_AV_SVIDEO_LUMA8 ||
  189. chroma < CX18_AV_SVIDEO_CHROMA4 ||
  190. chroma > CX18_AV_SVIDEO_CHROMA8) {
  191. CX18_ERR("0x%04x is not a valid video input!\n",
  192. vid_input);
  193. return -EINVAL;
  194. }
  195. reg = 0xf0 + ((luma - CX18_AV_SVIDEO_LUMA1) >> 4);
  196. if (chroma >= CX18_AV_SVIDEO_CHROMA7) {
  197. reg &= 0x3f;
  198. reg |= (chroma - CX18_AV_SVIDEO_CHROMA7) >> 2;
  199. } else {
  200. reg &= 0xcf;
  201. reg |= (chroma - CX18_AV_SVIDEO_CHROMA4) >> 4;
  202. }
  203. }
  204. switch (aud_input) {
  205. case CX18_AV_AUDIO_SERIAL1:
  206. case CX18_AV_AUDIO_SERIAL2:
  207. /* do nothing, use serial audio input */
  208. break;
  209. case CX18_AV_AUDIO4: reg &= ~0x30; break;
  210. case CX18_AV_AUDIO5: reg &= ~0x30; reg |= 0x10; break;
  211. case CX18_AV_AUDIO6: reg &= ~0x30; reg |= 0x20; break;
  212. case CX18_AV_AUDIO7: reg &= ~0xc0; break;
  213. case CX18_AV_AUDIO8: reg &= ~0xc0; reg |= 0x40; break;
  214. default:
  215. CX18_ERR("0x%04x is not a valid audio input!\n", aud_input);
  216. return -EINVAL;
  217. }
  218. cx18_av_write(cx, 0x103, reg);
  219. /* Set INPUT_MODE to Composite (0) or S-Video (1) */
  220. cx18_av_and_or(cx, 0x401, ~0x6, is_composite ? 0 : 0x02);
  221. /* Set CH_SEL_ADC2 to 1 if input comes from CH3 */
  222. cx18_av_and_or(cx, 0x102, ~0x2, (reg & 0x80) == 0 ? 2 : 0);
  223. /* Set DUAL_MODE_ADC2 to 1 if input comes from both CH2 and CH3 */
  224. if ((reg & 0xc0) != 0xc0 && (reg & 0x30) != 0x30)
  225. cx18_av_and_or(cx, 0x102, ~0x4, 4);
  226. else
  227. cx18_av_and_or(cx, 0x102, ~0x4, 0);
  228. /*cx18_av_and_or4(cx, 0x104, ~0x001b4180, 0x00004180);*/
  229. state->vid_input = vid_input;
  230. state->aud_input = aud_input;
  231. cx18_av_audio_set_path(cx);
  232. input_change(cx);
  233. return 0;
  234. }
  235. /* ----------------------------------------------------------------------- */
  236. static int set_v4lstd(struct cx18 *cx)
  237. {
  238. struct cx18_av_state *state = &cx->av_state;
  239. u8 fmt = 0; /* zero is autodetect */
  240. u8 pal_m = 0;
  241. /* First tests should be against specific std */
  242. if (state->std == V4L2_STD_NTSC_M_JP) {
  243. fmt = 0x2;
  244. } else if (state->std == V4L2_STD_NTSC_443) {
  245. fmt = 0x3;
  246. } else if (state->std == V4L2_STD_PAL_M) {
  247. pal_m = 1;
  248. fmt = 0x5;
  249. } else if (state->std == V4L2_STD_PAL_N) {
  250. fmt = 0x6;
  251. } else if (state->std == V4L2_STD_PAL_Nc) {
  252. fmt = 0x7;
  253. } else if (state->std == V4L2_STD_PAL_60) {
  254. fmt = 0x8;
  255. } else {
  256. /* Then, test against generic ones */
  257. if (state->std & V4L2_STD_NTSC)
  258. fmt = 0x1;
  259. else if (state->std & V4L2_STD_PAL)
  260. fmt = 0x4;
  261. else if (state->std & V4L2_STD_SECAM)
  262. fmt = 0xc;
  263. }
  264. CX18_DEBUG_INFO("changing video std to fmt %i\n", fmt);
  265. /* Follow step 9 of section 3.16 in the cx18_av datasheet.
  266. Without this PAL may display a vertical ghosting effect.
  267. This happens for example with the Yuan MPC622. */
  268. if (fmt >= 4 && fmt < 8) {
  269. /* Set format to NTSC-M */
  270. cx18_av_and_or(cx, 0x400, ~0xf, 1);
  271. /* Turn off LCOMB */
  272. cx18_av_and_or(cx, 0x47b, ~6, 0);
  273. }
  274. cx18_av_and_or(cx, 0x400, ~0x2f, fmt | 0x20);
  275. cx18_av_and_or(cx, 0x403, ~0x3, pal_m);
  276. cx18_av_vbi_setup(cx);
  277. input_change(cx);
  278. return 0;
  279. }
  280. /* ----------------------------------------------------------------------- */
  281. static int set_v4lctrl(struct cx18 *cx, struct v4l2_control *ctrl)
  282. {
  283. switch (ctrl->id) {
  284. case V4L2_CID_BRIGHTNESS:
  285. if (ctrl->value < 0 || ctrl->value > 255) {
  286. CX18_ERR("invalid brightness setting %d\n",
  287. ctrl->value);
  288. return -ERANGE;
  289. }
  290. cx18_av_write(cx, 0x414, ctrl->value - 128);
  291. break;
  292. case V4L2_CID_CONTRAST:
  293. if (ctrl->value < 0 || ctrl->value > 127) {
  294. CX18_ERR("invalid contrast setting %d\n",
  295. ctrl->value);
  296. return -ERANGE;
  297. }
  298. cx18_av_write(cx, 0x415, ctrl->value << 1);
  299. break;
  300. case V4L2_CID_SATURATION:
  301. if (ctrl->value < 0 || ctrl->value > 127) {
  302. CX18_ERR("invalid saturation setting %d\n",
  303. ctrl->value);
  304. return -ERANGE;
  305. }
  306. cx18_av_write(cx, 0x420, ctrl->value << 1);
  307. cx18_av_write(cx, 0x421, ctrl->value << 1);
  308. break;
  309. case V4L2_CID_HUE:
  310. if (ctrl->value < -127 || ctrl->value > 127) {
  311. CX18_ERR("invalid hue setting %d\n", ctrl->value);
  312. return -ERANGE;
  313. }
  314. cx18_av_write(cx, 0x422, ctrl->value);
  315. break;
  316. case V4L2_CID_AUDIO_VOLUME:
  317. case V4L2_CID_AUDIO_BASS:
  318. case V4L2_CID_AUDIO_TREBLE:
  319. case V4L2_CID_AUDIO_BALANCE:
  320. case V4L2_CID_AUDIO_MUTE:
  321. return cx18_av_audio(cx, VIDIOC_S_CTRL, ctrl);
  322. default:
  323. return -EINVAL;
  324. }
  325. return 0;
  326. }
  327. static int get_v4lctrl(struct cx18 *cx, struct v4l2_control *ctrl)
  328. {
  329. switch (ctrl->id) {
  330. case V4L2_CID_BRIGHTNESS:
  331. ctrl->value = (s8)cx18_av_read(cx, 0x414) + 128;
  332. break;
  333. case V4L2_CID_CONTRAST:
  334. ctrl->value = cx18_av_read(cx, 0x415) >> 1;
  335. break;
  336. case V4L2_CID_SATURATION:
  337. ctrl->value = cx18_av_read(cx, 0x420) >> 1;
  338. break;
  339. case V4L2_CID_HUE:
  340. ctrl->value = (s8)cx18_av_read(cx, 0x422);
  341. break;
  342. case V4L2_CID_AUDIO_VOLUME:
  343. case V4L2_CID_AUDIO_BASS:
  344. case V4L2_CID_AUDIO_TREBLE:
  345. case V4L2_CID_AUDIO_BALANCE:
  346. case V4L2_CID_AUDIO_MUTE:
  347. return cx18_av_audio(cx, VIDIOC_G_CTRL, ctrl);
  348. default:
  349. return -EINVAL;
  350. }
  351. return 0;
  352. }
  353. /* ----------------------------------------------------------------------- */
  354. static int get_v4lfmt(struct cx18 *cx, struct v4l2_format *fmt)
  355. {
  356. switch (fmt->type) {
  357. case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
  358. return cx18_av_vbi(cx, VIDIOC_G_FMT, fmt);
  359. default:
  360. return -EINVAL;
  361. }
  362. return 0;
  363. }
  364. static int set_v4lfmt(struct cx18 *cx, struct v4l2_format *fmt)
  365. {
  366. struct cx18_av_state *state = &cx->av_state;
  367. struct v4l2_pix_format *pix;
  368. int HSC, VSC, Vsrc, Hsrc, filter, Vlines;
  369. int is_50Hz = !(state->std & V4L2_STD_525_60);
  370. switch (fmt->type) {
  371. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  372. pix = &(fmt->fmt.pix);
  373. Vsrc = (cx18_av_read(cx, 0x476) & 0x3f) << 4;
  374. Vsrc |= (cx18_av_read(cx, 0x475) & 0xf0) >> 4;
  375. Hsrc = (cx18_av_read(cx, 0x472) & 0x3f) << 4;
  376. Hsrc |= (cx18_av_read(cx, 0x471) & 0xf0) >> 4;
  377. Vlines = pix->height + (is_50Hz ? 4 : 7);
  378. if ((pix->width * 16 < Hsrc) || (Hsrc < pix->width) ||
  379. (Vlines * 8 < Vsrc) || (Vsrc < Vlines)) {
  380. CX18_ERR("%dx%d is not a valid size!\n",
  381. pix->width, pix->height);
  382. return -ERANGE;
  383. }
  384. HSC = (Hsrc * (1 << 20)) / pix->width - (1 << 20);
  385. VSC = (1 << 16) - (Vsrc * (1 << 9) / Vlines - (1 << 9));
  386. VSC &= 0x1fff;
  387. if (pix->width >= 385)
  388. filter = 0;
  389. else if (pix->width > 192)
  390. filter = 1;
  391. else if (pix->width > 96)
  392. filter = 2;
  393. else
  394. filter = 3;
  395. CX18_DEBUG_INFO("decoder set size %dx%d -> scale %ux%u\n",
  396. pix->width, pix->height, HSC, VSC);
  397. /* HSCALE=HSC */
  398. cx18_av_write(cx, 0x418, HSC & 0xff);
  399. cx18_av_write(cx, 0x419, (HSC >> 8) & 0xff);
  400. cx18_av_write(cx, 0x41a, HSC >> 16);
  401. /* VSCALE=VSC */
  402. cx18_av_write(cx, 0x41c, VSC & 0xff);
  403. cx18_av_write(cx, 0x41d, VSC >> 8);
  404. /* VS_INTRLACE=1 VFILT=filter */
  405. cx18_av_write(cx, 0x41e, 0x8 | filter);
  406. break;
  407. case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
  408. return cx18_av_vbi(cx, VIDIOC_S_FMT, fmt);
  409. case V4L2_BUF_TYPE_VBI_CAPTURE:
  410. return cx18_av_vbi(cx, VIDIOC_S_FMT, fmt);
  411. default:
  412. return -EINVAL;
  413. }
  414. return 0;
  415. }
  416. /* ----------------------------------------------------------------------- */
  417. int cx18_av_cmd(struct cx18 *cx, unsigned int cmd, void *arg)
  418. {
  419. struct cx18_av_state *state = &cx->av_state;
  420. struct v4l2_tuner *vt = arg;
  421. struct v4l2_routing *route = arg;
  422. /* ignore these commands */
  423. switch (cmd) {
  424. case TUNER_SET_TYPE_ADDR:
  425. return 0;
  426. }
  427. if (!state->is_initialized) {
  428. CX18_DEBUG_INFO("cmd %08x triggered fw load\n", cmd);
  429. /* initialize on first use */
  430. state->is_initialized = 1;
  431. cx18_av_initialize(cx);
  432. }
  433. switch (cmd) {
  434. case VIDIOC_INT_DECODE_VBI_LINE:
  435. return cx18_av_vbi(cx, cmd, arg);
  436. case VIDIOC_INT_AUDIO_CLOCK_FREQ:
  437. return cx18_av_audio(cx, cmd, arg);
  438. case VIDIOC_STREAMON:
  439. CX18_DEBUG_INFO("enable output\n");
  440. cx18_av_write(cx, 0x115, 0x8c);
  441. cx18_av_write(cx, 0x116, 0x07);
  442. break;
  443. case VIDIOC_STREAMOFF:
  444. CX18_DEBUG_INFO("disable output\n");
  445. cx18_av_write(cx, 0x115, 0x00);
  446. cx18_av_write(cx, 0x116, 0x00);
  447. break;
  448. case VIDIOC_LOG_STATUS:
  449. log_video_status(cx);
  450. log_audio_status(cx);
  451. break;
  452. case VIDIOC_G_CTRL:
  453. return get_v4lctrl(cx, (struct v4l2_control *)arg);
  454. case VIDIOC_S_CTRL:
  455. return set_v4lctrl(cx, (struct v4l2_control *)arg);
  456. case VIDIOC_QUERYCTRL:
  457. {
  458. struct v4l2_queryctrl *qc = arg;
  459. switch (qc->id) {
  460. case V4L2_CID_BRIGHTNESS:
  461. case V4L2_CID_CONTRAST:
  462. case V4L2_CID_SATURATION:
  463. case V4L2_CID_HUE:
  464. return v4l2_ctrl_query_fill_std(qc);
  465. default:
  466. break;
  467. }
  468. switch (qc->id) {
  469. case V4L2_CID_AUDIO_VOLUME:
  470. case V4L2_CID_AUDIO_MUTE:
  471. case V4L2_CID_AUDIO_BALANCE:
  472. case V4L2_CID_AUDIO_BASS:
  473. case V4L2_CID_AUDIO_TREBLE:
  474. return v4l2_ctrl_query_fill_std(qc);
  475. default:
  476. return -EINVAL;
  477. }
  478. return -EINVAL;
  479. }
  480. case VIDIOC_G_STD:
  481. *(v4l2_std_id *)arg = state->std;
  482. break;
  483. case VIDIOC_S_STD:
  484. if (state->radio == 0 && state->std == *(v4l2_std_id *)arg)
  485. return 0;
  486. state->radio = 0;
  487. state->std = *(v4l2_std_id *)arg;
  488. return set_v4lstd(cx);
  489. case AUDC_SET_RADIO:
  490. state->radio = 1;
  491. break;
  492. case VIDIOC_INT_G_VIDEO_ROUTING:
  493. route->input = state->vid_input;
  494. route->output = 0;
  495. break;
  496. case VIDIOC_INT_S_VIDEO_ROUTING:
  497. return set_input(cx, route->input, state->aud_input);
  498. case VIDIOC_INT_G_AUDIO_ROUTING:
  499. route->input = state->aud_input;
  500. route->output = 0;
  501. break;
  502. case VIDIOC_INT_S_AUDIO_ROUTING:
  503. return set_input(cx, state->vid_input, route->input);
  504. case VIDIOC_S_FREQUENCY:
  505. input_change(cx);
  506. break;
  507. case VIDIOC_G_TUNER:
  508. {
  509. u8 vpres = cx18_av_read(cx, 0x40e) & 0x20;
  510. u8 mode;
  511. int val = 0;
  512. if (state->radio)
  513. break;
  514. vt->signal = vpres ? 0xffff : 0x0;
  515. vt->capability |=
  516. V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_LANG1 |
  517. V4L2_TUNER_CAP_LANG2 | V4L2_TUNER_CAP_SAP;
  518. mode = cx18_av_read(cx, 0x804);
  519. /* get rxsubchans and audmode */
  520. if ((mode & 0xf) == 1)
  521. val |= V4L2_TUNER_SUB_STEREO;
  522. else
  523. val |= V4L2_TUNER_SUB_MONO;
  524. if (mode == 2 || mode == 4)
  525. val = V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
  526. if (mode & 0x10)
  527. val |= V4L2_TUNER_SUB_SAP;
  528. vt->rxsubchans = val;
  529. vt->audmode = state->audmode;
  530. break;
  531. }
  532. case VIDIOC_S_TUNER:
  533. if (state->radio)
  534. break;
  535. switch (vt->audmode) {
  536. case V4L2_TUNER_MODE_MONO:
  537. /* mono -> mono
  538. stereo -> mono
  539. bilingual -> lang1 */
  540. cx18_av_and_or(cx, 0x809, ~0xf, 0x00);
  541. break;
  542. case V4L2_TUNER_MODE_STEREO:
  543. case V4L2_TUNER_MODE_LANG1:
  544. /* mono -> mono
  545. stereo -> stereo
  546. bilingual -> lang1 */
  547. cx18_av_and_or(cx, 0x809, ~0xf, 0x04);
  548. break;
  549. case V4L2_TUNER_MODE_LANG1_LANG2:
  550. /* mono -> mono
  551. stereo -> stereo
  552. bilingual -> lang1/lang2 */
  553. cx18_av_and_or(cx, 0x809, ~0xf, 0x07);
  554. break;
  555. case V4L2_TUNER_MODE_LANG2:
  556. /* mono -> mono
  557. stereo -> stereo
  558. bilingual -> lang2 */
  559. cx18_av_and_or(cx, 0x809, ~0xf, 0x01);
  560. break;
  561. default:
  562. return -EINVAL;
  563. }
  564. state->audmode = vt->audmode;
  565. break;
  566. case VIDIOC_G_FMT:
  567. return get_v4lfmt(cx, (struct v4l2_format *)arg);
  568. case VIDIOC_S_FMT:
  569. return set_v4lfmt(cx, (struct v4l2_format *)arg);
  570. case VIDIOC_INT_RESET:
  571. cx18_av_initialize(cx);
  572. break;
  573. default:
  574. return -EINVAL;
  575. }
  576. return 0;
  577. }
  578. /* ----------------------------------------------------------------------- */
  579. /* ----------------------------------------------------------------------- */
  580. static void log_video_status(struct cx18 *cx)
  581. {
  582. static const char *const fmt_strs[] = {
  583. "0x0",
  584. "NTSC-M", "NTSC-J", "NTSC-4.43",
  585. "PAL-BDGHI", "PAL-M", "PAL-N", "PAL-Nc", "PAL-60",
  586. "0x9", "0xA", "0xB",
  587. "SECAM",
  588. "0xD", "0xE", "0xF"
  589. };
  590. struct cx18_av_state *state = &cx->av_state;
  591. u8 vidfmt_sel = cx18_av_read(cx, 0x400) & 0xf;
  592. u8 gen_stat1 = cx18_av_read(cx, 0x40d);
  593. u8 gen_stat2 = cx18_av_read(cx, 0x40e);
  594. int vid_input = state->vid_input;
  595. CX18_INFO("Video signal: %spresent\n",
  596. (gen_stat2 & 0x20) ? "" : "not ");
  597. CX18_INFO("Detected format: %s\n",
  598. fmt_strs[gen_stat1 & 0xf]);
  599. CX18_INFO("Specified standard: %s\n",
  600. vidfmt_sel ? fmt_strs[vidfmt_sel] : "automatic detection");
  601. if (vid_input >= CX18_AV_COMPOSITE1 &&
  602. vid_input <= CX18_AV_COMPOSITE8) {
  603. CX18_INFO("Specified video input: Composite %d\n",
  604. vid_input - CX18_AV_COMPOSITE1 + 1);
  605. } else {
  606. CX18_INFO("Specified video input: S-Video (Luma In%d, Chroma In%d)\n",
  607. (vid_input & 0xf0) >> 4, (vid_input & 0xf00) >> 8);
  608. }
  609. CX18_INFO("Specified audioclock freq: %d Hz\n", state->audclk_freq);
  610. }
  611. /* ----------------------------------------------------------------------- */
  612. static void log_audio_status(struct cx18 *cx)
  613. {
  614. struct cx18_av_state *state = &cx->av_state;
  615. u8 download_ctl = cx18_av_read(cx, 0x803);
  616. u8 mod_det_stat0 = cx18_av_read(cx, 0x804);
  617. u8 mod_det_stat1 = cx18_av_read(cx, 0x805);
  618. u8 audio_config = cx18_av_read(cx, 0x808);
  619. u8 pref_mode = cx18_av_read(cx, 0x809);
  620. u8 afc0 = cx18_av_read(cx, 0x80b);
  621. u8 mute_ctl = cx18_av_read(cx, 0x8d3);
  622. int aud_input = state->aud_input;
  623. char *p;
  624. switch (mod_det_stat0) {
  625. case 0x00: p = "mono"; break;
  626. case 0x01: p = "stereo"; break;
  627. case 0x02: p = "dual"; break;
  628. case 0x04: p = "tri"; break;
  629. case 0x10: p = "mono with SAP"; break;
  630. case 0x11: p = "stereo with SAP"; break;
  631. case 0x12: p = "dual with SAP"; break;
  632. case 0x14: p = "tri with SAP"; break;
  633. case 0xfe: p = "forced mode"; break;
  634. default: p = "not defined"; break;
  635. }
  636. CX18_INFO("Detected audio mode: %s\n", p);
  637. switch (mod_det_stat1) {
  638. case 0x00: p = "not defined"; break;
  639. case 0x01: p = "EIAJ"; break;
  640. case 0x02: p = "A2-M"; break;
  641. case 0x03: p = "A2-BG"; break;
  642. case 0x04: p = "A2-DK1"; break;
  643. case 0x05: p = "A2-DK2"; break;
  644. case 0x06: p = "A2-DK3"; break;
  645. case 0x07: p = "A1 (6.0 MHz FM Mono)"; break;
  646. case 0x08: p = "AM-L"; break;
  647. case 0x09: p = "NICAM-BG"; break;
  648. case 0x0a: p = "NICAM-DK"; break;
  649. case 0x0b: p = "NICAM-I"; break;
  650. case 0x0c: p = "NICAM-L"; break;
  651. case 0x0d: p = "BTSC/EIAJ/A2-M Mono (4.5 MHz FMMono)"; break;
  652. case 0x0e: p = "IF FM Radio"; break;
  653. case 0x0f: p = "BTSC"; break;
  654. case 0x10: p = "detected chrominance"; break;
  655. case 0xfd: p = "unknown audio standard"; break;
  656. case 0xfe: p = "forced audio standard"; break;
  657. case 0xff: p = "no detected audio standard"; break;
  658. default: p = "not defined"; break;
  659. }
  660. CX18_INFO("Detected audio standard: %s\n", p);
  661. CX18_INFO("Audio muted: %s\n",
  662. (mute_ctl & 0x2) ? "yes" : "no");
  663. CX18_INFO("Audio microcontroller: %s\n",
  664. (download_ctl & 0x10) ? "running" : "stopped");
  665. switch (audio_config >> 4) {
  666. case 0x00: p = "undefined"; break;
  667. case 0x01: p = "BTSC"; break;
  668. case 0x02: p = "EIAJ"; break;
  669. case 0x03: p = "A2-M"; break;
  670. case 0x04: p = "A2-BG"; break;
  671. case 0x05: p = "A2-DK1"; break;
  672. case 0x06: p = "A2-DK2"; break;
  673. case 0x07: p = "A2-DK3"; break;
  674. case 0x08: p = "A1 (6.0 MHz FM Mono)"; break;
  675. case 0x09: p = "AM-L"; break;
  676. case 0x0a: p = "NICAM-BG"; break;
  677. case 0x0b: p = "NICAM-DK"; break;
  678. case 0x0c: p = "NICAM-I"; break;
  679. case 0x0d: p = "NICAM-L"; break;
  680. case 0x0e: p = "FM radio"; break;
  681. case 0x0f: p = "automatic detection"; break;
  682. default: p = "undefined"; break;
  683. }
  684. CX18_INFO("Configured audio standard: %s\n", p);
  685. if ((audio_config >> 4) < 0xF) {
  686. switch (audio_config & 0xF) {
  687. case 0x00: p = "MONO1 (LANGUAGE A/Mono L+R channel for BTSC, EIAJ, A2)"; break;
  688. case 0x01: p = "MONO2 (LANGUAGE B)"; break;
  689. case 0x02: p = "MONO3 (STEREO forced MONO)"; break;
  690. case 0x03: p = "MONO4 (NICAM ANALOG-Language C/Analog Fallback)"; break;
  691. case 0x04: p = "STEREO"; break;
  692. case 0x05: p = "DUAL1 (AC)"; break;
  693. case 0x06: p = "DUAL2 (BC)"; break;
  694. case 0x07: p = "DUAL3 (AB)"; break;
  695. default: p = "undefined";
  696. }
  697. CX18_INFO("Configured audio mode: %s\n", p);
  698. } else {
  699. switch (audio_config & 0xF) {
  700. case 0x00: p = "BG"; break;
  701. case 0x01: p = "DK1"; break;
  702. case 0x02: p = "DK2"; break;
  703. case 0x03: p = "DK3"; break;
  704. case 0x04: p = "I"; break;
  705. case 0x05: p = "L"; break;
  706. case 0x06: p = "BTSC"; break;
  707. case 0x07: p = "EIAJ"; break;
  708. case 0x08: p = "A2-M"; break;
  709. case 0x09: p = "FM Radio (4.5 MHz)"; break;
  710. case 0x0a: p = "FM Radio (5.5 MHz)"; break;
  711. case 0x0b: p = "S-Video"; break;
  712. case 0x0f: p = "automatic standard and mode detection"; break;
  713. default: p = "undefined"; break;
  714. }
  715. CX18_INFO("Configured audio system: %s\n", p);
  716. }
  717. if (aud_input)
  718. CX18_INFO("Specified audio input: Tuner (In%d)\n",
  719. aud_input);
  720. else
  721. CX18_INFO("Specified audio input: External\n");
  722. switch (pref_mode & 0xf) {
  723. case 0: p = "mono/language A"; break;
  724. case 1: p = "language B"; break;
  725. case 2: p = "language C"; break;
  726. case 3: p = "analog fallback"; break;
  727. case 4: p = "stereo"; break;
  728. case 5: p = "language AC"; break;
  729. case 6: p = "language BC"; break;
  730. case 7: p = "language AB"; break;
  731. default: p = "undefined"; break;
  732. }
  733. CX18_INFO("Preferred audio mode: %s\n", p);
  734. if ((audio_config & 0xf) == 0xf) {
  735. switch ((afc0 >> 3) & 0x1) {
  736. case 0: p = "system DK"; break;
  737. case 1: p = "system L"; break;
  738. }
  739. CX18_INFO("Selected 65 MHz format: %s\n", p);
  740. switch (afc0 & 0x7) {
  741. case 0: p = "Chroma"; break;
  742. case 1: p = "BTSC"; break;
  743. case 2: p = "EIAJ"; break;
  744. case 3: p = "A2-M"; break;
  745. case 4: p = "autodetect"; break;
  746. default: p = "undefined"; break;
  747. }
  748. CX18_INFO("Selected 45 MHz format: %s\n", p);
  749. }
  750. }