gpio.c 13 KB

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  1. /*
  2. * Generic GPIO driver for logic cells found in the Nomadik SoC
  3. *
  4. * Copyright (C) 2008,2009 STMicroelectronics
  5. * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
  6. * Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/init.h>
  15. #include <linux/device.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/io.h>
  18. #include <linux/clk.h>
  19. #include <linux/err.h>
  20. #include <linux/gpio.h>
  21. #include <linux/spinlock.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/irq.h>
  24. #include <linux/slab.h>
  25. #include <mach/hardware.h>
  26. #include <mach/gpio.h>
  27. /*
  28. * The GPIO module in the Nomadik family of Systems-on-Chip is an
  29. * AMBA device, managing 32 pins and alternate functions. The logic block
  30. * is currently only used in the Nomadik.
  31. *
  32. * Symbols in this file are called "nmk_gpio" for "nomadik gpio"
  33. */
  34. #define NMK_GPIO_PER_CHIP 32
  35. struct nmk_gpio_chip {
  36. struct gpio_chip chip;
  37. void __iomem *addr;
  38. struct clk *clk;
  39. unsigned int parent_irq;
  40. spinlock_t lock;
  41. /* Keep track of configured edges */
  42. u32 edge_rising;
  43. u32 edge_falling;
  44. };
  45. static void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip,
  46. unsigned offset, enum nmk_gpio_slpm mode)
  47. {
  48. u32 bit = 1 << offset;
  49. u32 slpm;
  50. slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC);
  51. if (mode == NMK_GPIO_SLPM_NOCHANGE)
  52. slpm |= bit;
  53. else
  54. slpm &= ~bit;
  55. writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC);
  56. }
  57. static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip,
  58. unsigned offset, enum nmk_gpio_pull pull)
  59. {
  60. u32 bit = 1 << offset;
  61. u32 pdis;
  62. pdis = readl(nmk_chip->addr + NMK_GPIO_PDIS);
  63. if (pull == NMK_GPIO_PULL_NONE)
  64. pdis |= bit;
  65. else
  66. pdis &= ~bit;
  67. writel(pdis, nmk_chip->addr + NMK_GPIO_PDIS);
  68. if (pull == NMK_GPIO_PULL_UP)
  69. writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
  70. else if (pull == NMK_GPIO_PULL_DOWN)
  71. writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
  72. }
  73. /**
  74. * nmk_gpio_set_slpm() - configure the sleep mode of a pin
  75. * @gpio: pin number
  76. * @mode: NMK_GPIO_SLPM_INPUT or NMK_GPIO_SLPM_NOCHANGE,
  77. *
  78. * Sets the sleep mode of a pin. If @mode is NMK_GPIO_SLPM_INPUT, the pin is
  79. * changed to an input (with pullup/down enabled) in sleep and deep sleep. If
  80. * @mode is NMK_GPIO_SLPM_NOCHANGE, the pin remains in the state it was
  81. * configured even when in sleep and deep sleep.
  82. */
  83. int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)
  84. {
  85. struct nmk_gpio_chip *nmk_chip;
  86. unsigned long flags;
  87. nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
  88. if (!nmk_chip)
  89. return -EINVAL;
  90. spin_lock_irqsave(&nmk_chip->lock, flags);
  91. __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base, mode);
  92. spin_unlock_irqrestore(&nmk_chip->lock, flags);
  93. return 0;
  94. }
  95. /**
  96. * nmk_gpio_set_pull() - enable/disable pull up/down on a gpio
  97. * @gpio: pin number
  98. * @pull: one of NMK_GPIO_PULL_DOWN, NMK_GPIO_PULL_UP, and NMK_GPIO_PULL_NONE
  99. *
  100. * Enables/disables pull up/down on a specified pin. This only takes effect if
  101. * the pin is configured as an input (either explicitly or by the alternate
  102. * function).
  103. *
  104. * NOTE: If enabling the pull up/down, the caller must ensure that the GPIO is
  105. * configured as an input. Otherwise, due to the way the controller registers
  106. * work, this function will change the value output on the pin.
  107. */
  108. int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull)
  109. {
  110. struct nmk_gpio_chip *nmk_chip;
  111. unsigned long flags;
  112. nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
  113. if (!nmk_chip)
  114. return -EINVAL;
  115. spin_lock_irqsave(&nmk_chip->lock, flags);
  116. __nmk_gpio_set_pull(nmk_chip, gpio - nmk_chip->chip.base, pull);
  117. spin_unlock_irqrestore(&nmk_chip->lock, flags);
  118. return 0;
  119. }
  120. /* Mode functions */
  121. int nmk_gpio_set_mode(int gpio, int gpio_mode)
  122. {
  123. struct nmk_gpio_chip *nmk_chip;
  124. unsigned long flags;
  125. u32 afunc, bfunc, bit;
  126. nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
  127. if (!nmk_chip)
  128. return -EINVAL;
  129. bit = 1 << (gpio - nmk_chip->chip.base);
  130. spin_lock_irqsave(&nmk_chip->lock, flags);
  131. afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit;
  132. bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit;
  133. if (gpio_mode & NMK_GPIO_ALT_A)
  134. afunc |= bit;
  135. if (gpio_mode & NMK_GPIO_ALT_B)
  136. bfunc |= bit;
  137. writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA);
  138. writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB);
  139. spin_unlock_irqrestore(&nmk_chip->lock, flags);
  140. return 0;
  141. }
  142. EXPORT_SYMBOL(nmk_gpio_set_mode);
  143. int nmk_gpio_get_mode(int gpio)
  144. {
  145. struct nmk_gpio_chip *nmk_chip;
  146. u32 afunc, bfunc, bit;
  147. nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
  148. if (!nmk_chip)
  149. return -EINVAL;
  150. bit = 1 << (gpio - nmk_chip->chip.base);
  151. afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit;
  152. bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit;
  153. return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0);
  154. }
  155. EXPORT_SYMBOL(nmk_gpio_get_mode);
  156. /* IRQ functions */
  157. static inline int nmk_gpio_get_bitmask(int gpio)
  158. {
  159. return 1 << (gpio % 32);
  160. }
  161. static void nmk_gpio_irq_ack(unsigned int irq)
  162. {
  163. int gpio;
  164. struct nmk_gpio_chip *nmk_chip;
  165. gpio = NOMADIK_IRQ_TO_GPIO(irq);
  166. nmk_chip = get_irq_chip_data(irq);
  167. if (!nmk_chip)
  168. return;
  169. writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
  170. }
  171. static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
  172. int gpio, bool enable)
  173. {
  174. u32 bitmask = nmk_gpio_get_bitmask(gpio);
  175. u32 reg;
  176. /* we must individually set/clear the two edges */
  177. if (nmk_chip->edge_rising & bitmask) {
  178. reg = readl(nmk_chip->addr + NMK_GPIO_RIMSC);
  179. if (enable)
  180. reg |= bitmask;
  181. else
  182. reg &= ~bitmask;
  183. writel(reg, nmk_chip->addr + NMK_GPIO_RIMSC);
  184. }
  185. if (nmk_chip->edge_falling & bitmask) {
  186. reg = readl(nmk_chip->addr + NMK_GPIO_FIMSC);
  187. if (enable)
  188. reg |= bitmask;
  189. else
  190. reg &= ~bitmask;
  191. writel(reg, nmk_chip->addr + NMK_GPIO_FIMSC);
  192. }
  193. }
  194. static void nmk_gpio_irq_modify(unsigned int irq, bool enable)
  195. {
  196. int gpio;
  197. struct nmk_gpio_chip *nmk_chip;
  198. unsigned long flags;
  199. u32 bitmask;
  200. gpio = NOMADIK_IRQ_TO_GPIO(irq);
  201. nmk_chip = get_irq_chip_data(irq);
  202. bitmask = nmk_gpio_get_bitmask(gpio);
  203. if (!nmk_chip)
  204. return;
  205. spin_lock_irqsave(&nmk_chip->lock, flags);
  206. __nmk_gpio_irq_modify(nmk_chip, gpio, enable);
  207. spin_unlock_irqrestore(&nmk_chip->lock, flags);
  208. }
  209. static void nmk_gpio_irq_mask(unsigned int irq)
  210. {
  211. nmk_gpio_irq_modify(irq, false);
  212. };
  213. static void nmk_gpio_irq_unmask(unsigned int irq)
  214. {
  215. nmk_gpio_irq_modify(irq, true);
  216. }
  217. static int nmk_gpio_irq_set_type(unsigned int irq, unsigned int type)
  218. {
  219. bool enabled = !(irq_to_desc(irq)->status & IRQ_DISABLED);
  220. int gpio;
  221. struct nmk_gpio_chip *nmk_chip;
  222. unsigned long flags;
  223. u32 bitmask;
  224. gpio = NOMADIK_IRQ_TO_GPIO(irq);
  225. nmk_chip = get_irq_chip_data(irq);
  226. bitmask = nmk_gpio_get_bitmask(gpio);
  227. if (!nmk_chip)
  228. return -EINVAL;
  229. if (type & IRQ_TYPE_LEVEL_HIGH)
  230. return -EINVAL;
  231. if (type & IRQ_TYPE_LEVEL_LOW)
  232. return -EINVAL;
  233. spin_lock_irqsave(&nmk_chip->lock, flags);
  234. if (enabled)
  235. __nmk_gpio_irq_modify(nmk_chip, gpio, false);
  236. nmk_chip->edge_rising &= ~bitmask;
  237. if (type & IRQ_TYPE_EDGE_RISING)
  238. nmk_chip->edge_rising |= bitmask;
  239. nmk_chip->edge_falling &= ~bitmask;
  240. if (type & IRQ_TYPE_EDGE_FALLING)
  241. nmk_chip->edge_falling |= bitmask;
  242. if (enabled)
  243. __nmk_gpio_irq_modify(nmk_chip, gpio, true);
  244. spin_unlock_irqrestore(&nmk_chip->lock, flags);
  245. return 0;
  246. }
  247. static struct irq_chip nmk_gpio_irq_chip = {
  248. .name = "Nomadik-GPIO",
  249. .ack = nmk_gpio_irq_ack,
  250. .mask = nmk_gpio_irq_mask,
  251. .unmask = nmk_gpio_irq_unmask,
  252. .set_type = nmk_gpio_irq_set_type,
  253. };
  254. static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
  255. {
  256. struct nmk_gpio_chip *nmk_chip;
  257. struct irq_chip *host_chip = get_irq_chip(irq);
  258. unsigned int gpio_irq;
  259. u32 pending;
  260. unsigned int first_irq;
  261. if (host_chip->mask_ack)
  262. host_chip->mask_ack(irq);
  263. else {
  264. host_chip->mask(irq);
  265. if (host_chip->ack)
  266. host_chip->ack(irq);
  267. }
  268. nmk_chip = get_irq_data(irq);
  269. first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
  270. while ( (pending = readl(nmk_chip->addr + NMK_GPIO_IS)) ) {
  271. gpio_irq = first_irq + __ffs(pending);
  272. generic_handle_irq(gpio_irq);
  273. }
  274. host_chip->unmask(irq);
  275. }
  276. static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
  277. {
  278. unsigned int first_irq;
  279. int i;
  280. first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
  281. for (i = first_irq; i < first_irq + NMK_GPIO_PER_CHIP; i++) {
  282. set_irq_chip(i, &nmk_gpio_irq_chip);
  283. set_irq_handler(i, handle_edge_irq);
  284. set_irq_flags(i, IRQF_VALID);
  285. set_irq_chip_data(i, nmk_chip);
  286. set_irq_type(i, IRQ_TYPE_EDGE_FALLING);
  287. }
  288. set_irq_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
  289. set_irq_data(nmk_chip->parent_irq, nmk_chip);
  290. return 0;
  291. }
  292. /* I/O Functions */
  293. static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
  294. {
  295. struct nmk_gpio_chip *nmk_chip =
  296. container_of(chip, struct nmk_gpio_chip, chip);
  297. writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
  298. return 0;
  299. }
  300. static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset)
  301. {
  302. struct nmk_gpio_chip *nmk_chip =
  303. container_of(chip, struct nmk_gpio_chip, chip);
  304. u32 bit = 1 << offset;
  305. return (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0;
  306. }
  307. static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset,
  308. int val)
  309. {
  310. struct nmk_gpio_chip *nmk_chip =
  311. container_of(chip, struct nmk_gpio_chip, chip);
  312. u32 bit = 1 << offset;
  313. if (val)
  314. writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
  315. else
  316. writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
  317. }
  318. static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
  319. int val)
  320. {
  321. struct nmk_gpio_chip *nmk_chip =
  322. container_of(chip, struct nmk_gpio_chip, chip);
  323. writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS);
  324. nmk_gpio_set_output(chip, offset, val);
  325. return 0;
  326. }
  327. /* This structure is replicated for each GPIO block allocated at probe time */
  328. static struct gpio_chip nmk_gpio_template = {
  329. .direction_input = nmk_gpio_make_input,
  330. .get = nmk_gpio_get_input,
  331. .direction_output = nmk_gpio_make_output,
  332. .set = nmk_gpio_set_output,
  333. .ngpio = NMK_GPIO_PER_CHIP,
  334. .can_sleep = 0,
  335. };
  336. static int __init nmk_gpio_probe(struct platform_device *dev)
  337. {
  338. struct nmk_gpio_platform_data *pdata = dev->dev.platform_data;
  339. struct nmk_gpio_chip *nmk_chip;
  340. struct gpio_chip *chip;
  341. struct resource *res;
  342. struct clk *clk;
  343. int irq;
  344. int ret;
  345. if (!pdata)
  346. return -ENODEV;
  347. res = platform_get_resource(dev, IORESOURCE_MEM, 0);
  348. if (!res) {
  349. ret = -ENOENT;
  350. goto out;
  351. }
  352. irq = platform_get_irq(dev, 0);
  353. if (irq < 0) {
  354. ret = irq;
  355. goto out;
  356. }
  357. if (request_mem_region(res->start, resource_size(res),
  358. dev_name(&dev->dev)) == NULL) {
  359. ret = -EBUSY;
  360. goto out;
  361. }
  362. clk = clk_get(&dev->dev, NULL);
  363. if (IS_ERR(clk)) {
  364. ret = PTR_ERR(clk);
  365. goto out_release;
  366. }
  367. clk_enable(clk);
  368. nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);
  369. if (!nmk_chip) {
  370. ret = -ENOMEM;
  371. goto out_clk;
  372. }
  373. /*
  374. * The virt address in nmk_chip->addr is in the nomadik register space,
  375. * so we can simply convert the resource address, without remapping
  376. */
  377. nmk_chip->clk = clk;
  378. nmk_chip->addr = io_p2v(res->start);
  379. nmk_chip->chip = nmk_gpio_template;
  380. nmk_chip->parent_irq = irq;
  381. spin_lock_init(&nmk_chip->lock);
  382. chip = &nmk_chip->chip;
  383. chip->base = pdata->first_gpio;
  384. chip->label = pdata->name;
  385. chip->dev = &dev->dev;
  386. chip->owner = THIS_MODULE;
  387. ret = gpiochip_add(&nmk_chip->chip);
  388. if (ret)
  389. goto out_free;
  390. platform_set_drvdata(dev, nmk_chip);
  391. nmk_gpio_init_irq(nmk_chip);
  392. dev_info(&dev->dev, "Bits %i-%i at address %p\n",
  393. nmk_chip->chip.base, nmk_chip->chip.base+31, nmk_chip->addr);
  394. return 0;
  395. out_free:
  396. kfree(nmk_chip);
  397. out_clk:
  398. clk_disable(clk);
  399. clk_put(clk);
  400. out_release:
  401. release_mem_region(res->start, resource_size(res));
  402. out:
  403. dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
  404. pdata->first_gpio, pdata->first_gpio+31);
  405. return ret;
  406. }
  407. static int __exit nmk_gpio_remove(struct platform_device *dev)
  408. {
  409. struct nmk_gpio_chip *nmk_chip;
  410. struct resource *res;
  411. res = platform_get_resource(dev, IORESOURCE_MEM, 0);
  412. nmk_chip = platform_get_drvdata(dev);
  413. gpiochip_remove(&nmk_chip->chip);
  414. clk_disable(nmk_chip->clk);
  415. clk_put(nmk_chip->clk);
  416. kfree(nmk_chip);
  417. release_mem_region(res->start, resource_size(res));
  418. return 0;
  419. }
  420. static struct platform_driver nmk_gpio_driver = {
  421. .driver = {
  422. .owner = THIS_MODULE,
  423. .name = "gpio",
  424. },
  425. .probe = nmk_gpio_probe,
  426. .remove = __exit_p(nmk_gpio_remove),
  427. .suspend = NULL, /* to be done */
  428. .resume = NULL,
  429. };
  430. static int __init nmk_gpio_init(void)
  431. {
  432. return platform_driver_register(&nmk_gpio_driver);
  433. }
  434. arch_initcall(nmk_gpio_init);
  435. MODULE_AUTHOR("Prafulla WADASKAR and Alessandro Rubini");
  436. MODULE_DESCRIPTION("Nomadik GPIO Driver");
  437. MODULE_LICENSE("GPL");